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-rw-r--r--meta/recipes-connectivity/openssl/openssl/initial-aarch64-bits.patch119
1 files changed, 119 insertions, 0 deletions
diff --git a/meta/recipes-connectivity/openssl/openssl/initial-aarch64-bits.patch b/meta/recipes-connectivity/openssl/openssl/initial-aarch64-bits.patch
new file mode 100644
index 0000000..2185ff8
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl/initial-aarch64-bits.patch
@@ -0,0 +1,119 @@
1From: Andy Polyakov <appro@openssl.org>
2Date: Sun, 13 Oct 2013 17:15:15 +0000 (+0200)
3Subject: Initial aarch64 bits.
4X-Git-Url: http://git.openssl.org/gitweb/?p=openssl.git;a=commitdiff_plain;h=039081b80977e2a5de84e1f88f8b4d025b559956
5
6Initial aarch64 bits.
7---
8 crypto/bn/bn_lcl.h | 9 +++++++++
9 crypto/md32_common.h | 18 ++++++++++++++++++
10 crypto/modes/modes_lcl.h | 8 ++++++++
11 crypto/sha/sha512.c | 13 +++++++++++++
12 4 files changed, 48 insertions(+)
13
14Index: openssl-1.0.1f/crypto/bn/bn_lcl.h
15===================================================================
16--- openssl-1.0.1f.orig/crypto/bn/bn_lcl.h 2014-01-06 15:47:42.000000000 +0200
17+++ openssl-1.0.1f/crypto/bn/bn_lcl.h 2014-02-28 10:37:55.495979037 +0200
18@@ -300,6 +300,15 @@
19 : "r"(a), "r"(b));
20 # endif
21 # endif
22+# elif defined(__aarch64__) && defined(SIXTY_FOUR_BIT_LONG)
23+# if defined(__GNUC__) && __GNUC__>=2
24+# define BN_UMULT_HIGH(a,b) ({ \
25+ register BN_ULONG ret; \
26+ asm ("umulh %0,%1,%2" \
27+ : "=r"(ret) \
28+ : "r"(a), "r"(b)); \
29+ ret; })
30+# endif
31 # endif /* cpu */
32 #endif /* OPENSSL_NO_ASM */
33
34Index: openssl-1.0.1f/crypto/md32_common.h
35===================================================================
36--- openssl-1.0.1f.orig/crypto/md32_common.h 2014-01-06 15:47:42.000000000 +0200
37+++ openssl-1.0.1f/crypto/md32_common.h 2014-02-28 10:39:21.751979107 +0200
38@@ -213,6 +213,24 @@
39 asm ("bswapl %0":"=r"(r):"0"(r)); \
40 *((unsigned int *)(c))=r; (c)+=4; r; })
41 # endif
42+# elif defined(__aarch64__)
43+# if defined(__BYTE_ORDER__)
44+# if defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
45+# define HOST_c2l(c,l) ({ unsigned int r; \
46+ asm ("rev %w0,%w1" \
47+ :"=r"(r) \
48+ :"r"(*((const unsigned int *)(c))));\
49+ (c)+=4; (l)=r; })
50+# define HOST_l2c(l,c) ({ unsigned int r; \
51+ asm ("rev %w0,%w1" \
52+ :"=r"(r) \
53+ :"r"((unsigned int)(l)));\
54+ *((unsigned int *)(c))=r; (c)+=4; r; })
55+# elif defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
56+# define HOST_c2l(c,l) ((l)=*((const unsigned int *)(c)), (c)+=4, (l))
57+# define HOST_l2c(l,c) (*((unsigned int *)(c))=(l), (c)+=4, (l))
58+# endif
59+# endif
60 # endif
61 # endif
62 #endif
63Index: openssl-1.0.1f/crypto/modes/modes_lcl.h
64===================================================================
65--- openssl-1.0.1f.orig/crypto/modes/modes_lcl.h 2014-02-28 10:47:48.731979011 +0200
66+++ openssl-1.0.1f/crypto/modes/modes_lcl.h 2014-02-28 10:48:49.707978919 +0200
67@@ -29,6 +29,7 @@
68 #if defined(__i386) || defined(__i386__) || \
69 defined(__x86_64) || defined(__x86_64__) || \
70 defined(_M_IX86) || defined(_M_AMD64) || defined(_M_X64) || \
71+ defined(__aarch64__) || \
72 defined(__s390__) || defined(__s390x__)
73 # undef STRICT_ALIGNMENT
74 #endif
75@@ -50,6 +51,13 @@
76 # define BSWAP4(x) ({ u32 ret=(x); \
77 asm ("bswapl %0" \
78 : "+r"(ret)); ret; })
79+# elif defined(__aarch64__)
80+# define BSWAP8(x) ({ u64 ret; \
81+ asm ("rev %0,%1" \
82+ : "=r"(ret) : "r"(x)); ret; })
83+# define BSWAP4(x) ({ u32 ret; \
84+ asm ("rev %w0,%w1" \
85+ : "=r"(ret) : "r"(x)); ret; })
86 # elif (defined(__arm__) || defined(__arm)) && !defined(STRICT_ALIGNMENT)
87 # define BSWAP8(x) ({ u32 lo=(u64)(x)>>32,hi=(x); \
88 asm ("rev %0,%0; rev %1,%1" \
89Index: openssl-1.0.1f/crypto/sha/sha512.c
90===================================================================
91--- openssl-1.0.1f.orig/crypto/sha/sha512.c 2014-01-06 15:47:42.000000000 +0200
92+++ openssl-1.0.1f/crypto/sha/sha512.c 2014-02-28 10:52:14.579978981 +0200
93@@ -55,6 +55,7 @@
94 #if defined(__i386) || defined(__i386__) || defined(_M_IX86) || \
95 defined(__x86_64) || defined(_M_AMD64) || defined(_M_X64) || \
96 defined(__s390__) || defined(__s390x__) || \
97+ defined(__aarch64__) || \
98 defined(SHA512_ASM)
99 #define SHA512_BLOCK_CAN_MANAGE_UNALIGNED_DATA
100 #endif
101@@ -347,6 +348,18 @@
102 asm ("rotrdi %0,%1,%2" \
103 : "=r"(ret) \
104 : "r"(a),"K"(n)); ret; })
105+# elif defined(__aarch64__)
106+# define ROTR(a,n) ({ SHA_LONG64 ret; \
107+ asm ("ror %0,%1,%2" \
108+ : "=r"(ret) \
109+ : "r"(a),"I"(n)); ret; })
110+# if defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && \
111+ __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
112+# define PULL64(x) ({ SHA_LONG64 ret; \
113+ asm ("rev %0,%1" \
114+ : "=r"(ret) \
115+ : "r"(*((const SHA_LONG64 *)(&(x))))); ret; })
116+# endif
117 # endif
118 # elif defined(_MSC_VER)
119 # if defined(_WIN64) /* applies to both IA-64 and AMD64 */