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1# This class exists to provide information about the targets that
2# may be needed by other classes and/or recipes. If you add a new
3# target this will probably need to be updated.
4
5#
6# Returns information about 'what' for the named target 'target'
7# where 'target' == "<arch>-<os>"
8#
9# 'what' can be one of
10# * target: Returns the target name ("<arch>-<os>")
11# * endianness: Return "be" for big endian targets, "le" for little endian
12# * bits: Returns the bit size of the target, either "32" or "64"
13# * libc: Returns the name of the c library used by the target
14#
15# It is an error for the target not to exist.
16# If 'what' doesn't exist then an empty value is returned
17#
18def siteinfo_data_for_machine(arch, os, d):
19 archinfo = {
20 "allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for allarch
21 "aarch64": "endian-little bit-64 arm-common arm-64",
22 "aarch64_be": "endian-big bit-64 arm-common arm-64",
23 "arc": "endian-little bit-32 arc-common",
24 "arceb": "endian-big bit-32 arc-common",
25 "arm": "endian-little bit-32 arm-common arm-32",
26 "armeb": "endian-big bit-32 arm-common arm-32",
27 "avr32": "endian-big bit-32 avr32-common",
28 "bfin": "endian-little bit-32 bfin-common",
29 "epiphany": "endian-little bit-32",
30 "i386": "endian-little bit-32 ix86-common",
31 "i486": "endian-little bit-32 ix86-common",
32 "i586": "endian-little bit-32 ix86-common",
33 "i686": "endian-little bit-32 ix86-common",
34 "ia64": "endian-little bit-64",
35 "lm32": "endian-big bit-32",
36 "m68k": "endian-big bit-32",
37 "microblaze": "endian-big bit-32 microblaze-common",
38 "microblazeel": "endian-little bit-32 microblaze-common",
39 "mips": "endian-big bit-32 mips-common",
40 "mips64": "endian-big bit-64 mips-common",
41 "mips64el": "endian-little bit-64 mips-common",
42 "mipsisa64r6": "endian-big bit-64 mips-common",
43 "mipsisa64r6el": "endian-little bit-64 mips-common",
44 "mipsel": "endian-little bit-32 mips-common",
45 "mipsisa32r6": "endian-big bit-32 mips-common",
46 "mipsisa32r6el": "endian-little bit-32 mips-common",
47 "powerpc": "endian-big bit-32 powerpc-common",
48 "powerpcle": "endian-little bit-32 powerpc-common",
49 "nios2": "endian-little bit-32 nios2-common",
50 "powerpc64": "endian-big bit-64 powerpc-common",
51 "powerpc64le": "endian-little bit-64 powerpc-common",
52 "ppc": "endian-big bit-32 powerpc-common",
53 "ppc64": "endian-big bit-64 powerpc-common",
54 "ppc64le" : "endian-little bit-64 powerpc-common",
55 "riscv32": "endian-little bit-32 riscv-common",
56 "riscv64": "endian-little bit-64 riscv-common",
57 "sh3": "endian-little bit-32 sh-common",
58 "sh3eb": "endian-big bit-32 sh-common",
59 "sh4": "endian-little bit-32 sh-common",
60 "sh4eb": "endian-big bit-32 sh-common",
61 "sparc": "endian-big bit-32",
62 "viac3": "endian-little bit-32 ix86-common",
63 "x86_64": "endian-little", # bitinfo specified in targetinfo
64 }
65 osinfo = {
66 "darwin": "common-darwin",
67 "darwin9": "common-darwin",
68 "linux": "common-linux common-glibc",
69 "linux-gnu": "common-linux common-glibc",
70 "linux-gnu_ilp32": "common-linux common-glibc",
71 "linux-gnux32": "common-linux common-glibc",
72 "linux-gnun32": "common-linux common-glibc",
73 "linux-gnueabi": "common-linux common-glibc",
74 "linux-gnuspe": "common-linux common-glibc",
75 "linux-musl": "common-linux common-musl",
76 "linux-muslx32": "common-linux common-musl",
77 "linux-musleabi": "common-linux common-musl",
78 "linux-muslspe": "common-linux common-musl",
79 "uclinux-uclibc": "common-uclibc",
80 "cygwin": "common-cygwin",
81 "mingw32": "common-mingw",
82 }
83 targetinfo = {
84 "aarch64-linux-gnu": "aarch64-linux",
85 "aarch64_be-linux-gnu": "aarch64_be-linux",
86 "aarch64-linux-gnu_ilp32": "bit-32 aarch64_be-linux arm-32",
87 "aarch64_be-linux-gnu_ilp32": "bit-32 aarch64_be-linux arm-32",
88 "aarch64-linux-musl": "aarch64-linux",
89 "aarch64_be-linux-musl": "aarch64_be-linux",
90 "arm-linux-gnueabi": "arm-linux",
91 "arm-linux-musleabi": "arm-linux",
92 "armeb-linux-gnueabi": "armeb-linux",
93 "armeb-linux-musleabi": "armeb-linux",
94 "microblazeel-linux" : "microblaze-linux",
95 "microblazeel-linux-musl" : "microblaze-linux",
96 "mips-linux-musl": "mips-linux",
97 "mipsel-linux-musl": "mipsel-linux",
98 "mips64-linux-musl": "mips64-linux",
99 "mips64el-linux-musl": "mips64el-linux",
100 "mips64-linux-gnun32": "mips-linux bit-32",
101 "mips64el-linux-gnun32": "mipsel-linux bit-32",
102 "mipsisa64r6-linux-gnun32": "mipsisa32r6-linux bit-32",
103 "mipsisa64r6el-linux-gnun32": "mipsisa32r6el-linux bit-32",
104 "powerpc-linux": "powerpc32-linux",
105 "powerpc-linux-musl": "powerpc-linux powerpc32-linux",
106 "powerpcle-linux": "powerpc32-linux",
107 "powerpcle-linux-musl": "powerpc-linux powerpc32-linux",
108 "powerpc-linux-gnuspe": "powerpc-linux powerpc32-linux",
109 "powerpc-linux-muslspe": "powerpc-linux powerpc32-linux",
110 "powerpc64-linux-gnuspe": "powerpc-linux powerpc64-linux",
111 "powerpc64-linux-muslspe": "powerpc-linux powerpc64-linux",
112 "powerpc64-linux": "powerpc-linux powerpc64-linux",
113 "powerpc64-linux-musl": "powerpc-linux powerpc64-linux",
114 "powerpc64le-linux": "powerpc-linux powerpc64-linux",
115 "powerpc64le-linux-musl": "powerpc-linux powerpc64-linux",
116 "riscv32-linux": "riscv32-linux",
117 "riscv32-linux-musl": "riscv32-linux",
118 "riscv64-linux": "riscv64-linux",
119 "riscv64-linux-musl": "riscv64-linux",
120 "x86_64-cygwin": "bit-64",
121 "x86_64-darwin": "bit-64",
122 "x86_64-darwin9": "bit-64",
123 "x86_64-linux": "bit-64",
124 "x86_64-linux-musl": "x86_64-linux bit-64",
125 "x86_64-linux-muslx32": "bit-32 ix86-common x32-linux",
126 "x86_64-elf": "bit-64",
127 "x86_64-linux-gnu": "bit-64 x86_64-linux",
128 "x86_64-linux-gnux32": "bit-32 ix86-common x32-linux",
129 "x86_64-mingw32": "bit-64",
130 }
131
132 # Add in any extra user supplied data which may come from a BSP layer, removing the
133 # need to always change this class directly
134 extra_siteinfo = (d.getVar("SITEINFO_EXTRA_DATAFUNCS") or "").split()
135 for m in extra_siteinfo:
136 call = m + "(archinfo, osinfo, targetinfo, d)"
137 locs = { "archinfo" : archinfo, "osinfo" : osinfo, "targetinfo" : targetinfo, "d" : d}
138 archinfo, osinfo, targetinfo = bb.utils.better_eval(call, locs)
139
140 target = "%s-%s" % (arch, os)
141
142 sitedata = []
143 if arch in archinfo:
144 sitedata.extend(archinfo[arch].split())
145 if os in osinfo:
146 sitedata.extend(osinfo[os].split())
147 if target in targetinfo:
148 sitedata.extend(targetinfo[target].split())
149 sitedata.append(target)
150 sitedata.append("common")
151
152 bb.debug(1, "SITE files %s" % sitedata);
153 return sitedata
154
155def siteinfo_data(d):
156 return siteinfo_data_for_machine(d.getVar("HOST_ARCH"), d.getVar("HOST_OS"), d)
157
158python () {
159 sitedata = set(siteinfo_data(d))
160 if "endian-little" in sitedata:
161 d.setVar("SITEINFO_ENDIANNESS", "le")
162 elif "endian-big" in sitedata:
163 d.setVar("SITEINFO_ENDIANNESS", "be")
164 else:
165 bb.error("Unable to determine endianness for architecture '%s'" %
166 d.getVar("HOST_ARCH"))
167 bb.fatal("Please add your architecture to siteinfo.bbclass")
168
169 if "bit-32" in sitedata:
170 d.setVar("SITEINFO_BITS", "32")
171 elif "bit-64" in sitedata:
172 d.setVar("SITEINFO_BITS", "64")
173 else:
174 bb.error("Unable to determine bit size for architecture '%s'" %
175 d.getVar("HOST_ARCH"))
176 bb.fatal("Please add your architecture to siteinfo.bbclass")
177}
178
179def siteinfo_get_files(d, sysrootcache = False):
180 sitedata = siteinfo_data(d)
181 sitefiles = ""
182 for path in d.getVar("BBPATH").split(":"):
183 for element in sitedata:
184 filename = os.path.join(path, "site", element)
185 if os.path.exists(filename):
186 sitefiles += filename + " "
187
188 if not sysrootcache:
189 return sitefiles
190
191 # Now check for siteconfig cache files in sysroots
192 path_siteconfig = d.getVar('SITECONFIG_SYSROOTCACHE')
193 if path_siteconfig and os.path.isdir(path_siteconfig):
194 for i in os.listdir(path_siteconfig):
195 if not i.endswith("_config"):
196 continue
197 filename = os.path.join(path_siteconfig, i)
198 sitefiles += filename + " "
199 return sitefiles
200
201#
202# Make some information available via variables
203#
204SITECONFIG_SYSROOTCACHE = "${STAGING_DATADIR}/${TARGET_SYS}_config_site.d"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-05-13 16:48:18 +0000