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1# This class exists to provide information about the targets that
2# may be needed by other classes and/or recipes. If you add a new
3# target this will probably need to be updated.
4
5#
6# Returns information about 'what' for the named target 'target'
7# where 'target' == "<arch>-<os>"
8#
9# 'what' can be one of
10# * target: Returns the target name ("<arch>-<os>")
11# * endianess: Return "be" for big endian targets, "le" for little endian
12# * bits: Returns the bit size of the target, either "32" or "64"
13# * libc: Returns the name of the c library used by the target
14#
15# It is an error for the target not to exist.
16# If 'what' doesn't exist then an empty value is returned
17#
18def siteinfo_data(d):
19 archinfo = {
20 "allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for allarch
21 "aarch64": "endian-little bit-64 arm-common",
22 "aarch64_be": "endian-big bit-64 arm-common",
23 "arm": "endian-little bit-32 arm-common",
24 "armeb": "endian-big bit-32 arm-common",
25 "avr32": "endian-big bit-32 avr32-common",
26 "bfin": "endian-little bit-32 bfin-common",
27 "i386": "endian-little bit-32 ix86-common",
28 "i486": "endian-little bit-32 ix86-common",
29 "i586": "endian-little bit-32 ix86-common",
30 "i686": "endian-little bit-32 ix86-common",
31 "ia64": "endian-little bit-64",
32 "microblaze": "endian-big bit-32 microblaze-common",
33 "microblazeel": "endian-little bit-32 microblaze-common",
34 "mips": "endian-big bit-32 mips-common",
35 "mips64": "endian-big bit-64 mips-common",
36 "mips64el": "endian-little bit-64 mips-common",
37 "mipsel": "endian-little bit-32 mips-common",
38 "powerpc": "endian-big bit-32 powerpc-common",
39 "nios2": "endian-little bit-32 nios2-common",
40 "powerpc64": "endian-big bit-64 powerpc-common",
41 "ppc": "endian-big bit-32 powerpc-common",
42 "ppc64": "endian-big bit-64 powerpc-common",
43 "sh3": "endian-little bit-32 sh-common",
44 "sh4": "endian-little bit-32 sh-common",
45 "sparc": "endian-big bit-32",
46 "viac3": "endian-little bit-32 ix86-common",
47 "x86_64": "endian-little", # bitinfo specified in targetinfo
48 }
49 osinfo = {
50 "darwin": "common-darwin",
51 "darwin9": "common-darwin",
52 "linux": "common-linux common-glibc",
53 "linux-gnu": "common-linux common-glibc",
54 "linux-gnux32": "common-linux common-glibc",
55 "linux-gnun32": "common-linux common-glibc",
56 "linux-gnueabi": "common-linux common-glibc",
57 "linux-gnuspe": "common-linux common-glibc",
58 "linux-uclibc": "common-linux common-uclibc",
59 "linux-uclibceabi": "common-linux common-uclibc",
60 "linux-uclibcspe": "common-linux common-uclibc",
61 "uclinux-uclibc": "common-uclibc",
62 "cygwin": "common-cygwin",
63 "mingw32": "common-mingw",
64 }
65 targetinfo = {
66 "aarch64-linux-gnu": "aarch64-linux",
67 "aarch64_be-linux-gnu": "aarch64_be-linux",
68 "arm-linux-gnueabi": "arm-linux",
69 "arm-linux-uclibceabi": "arm-linux-uclibc",
70 "armeb-linux-gnueabi": "armeb-linux",
71 "armeb-linux-uclibceabi": "armeb-linux-uclibc",
72 "mips64-linux-gnun32": "mips-linux bit-32",
73 "mips64el-linux-gnun32": "mipsel-linux bit-32",
74 "powerpc-linux": "powerpc32-linux",
75 "powerpc-linux-uclibc": "powerpc-linux powerpc32-linux",
76 "powerpc-linux-gnuspe": "powerpc-linux powerpc32-linux",
77 "powerpc-linux-uclibcspe": "powerpc-linux powerpc32-linux powerpc-linux-uclibc",
78 "powerpc64-linux-gnuspe": "powerpc-linux powerpc64-linux",
79 "powerpc64-linux": "powerpc-linux",
80 "x86_64-cygwin": "bit-64",
81 "x86_64-darwin": "bit-64",
82 "x86_64-darwin9": "bit-64",
83 "x86_64-linux": "bit-64",
84 "x86_64-linux-uclibc": "bit-64",
85 "x86_64-linux-gnu": "bit-64 x86_64-linux",
86 "x86_64-linux-gnux32": "bit-32 ix86-common x32-linux",
87 "x86_64-mingw32": "bit-64",
88 }
89
90 hostarch = d.getVar("HOST_ARCH", True)
91 hostos = d.getVar("HOST_OS", True)
92 target = "%s-%s" % (hostarch, hostos)
93
94 sitedata = []
95 if hostarch in archinfo:
96 sitedata.extend(archinfo[hostarch].split())
97 if hostos in osinfo:
98 sitedata.extend(osinfo[hostos].split())
99 if target in targetinfo:
100 sitedata.extend(targetinfo[target].split())
101 sitedata.append(target)
102 sitedata.append("common")
103
104 bb.debug(1, "SITE files %s" % sitedata);
105 return sitedata
106
107python () {
108 sitedata = set(siteinfo_data(d))
109 if "endian-little" in sitedata:
110 d.setVar("SITEINFO_ENDIANNESS", "le")
111 elif "endian-big" in sitedata:
112 d.setVar("SITEINFO_ENDIANNESS", "be")
113 else:
114 bb.error("Unable to determine endianness for architecture '%s'" %
115 d.getVar("HOST_ARCH", True))
116 bb.fatal("Please add your architecture to siteinfo.bbclass")
117
118 if "bit-32" in sitedata:
119 d.setVar("SITEINFO_BITS", "32")
120 elif "bit-64" in sitedata:
121 d.setVar("SITEINFO_BITS", "64")
122 else:
123 bb.error("Unable to determine bit size for architecture '%s'" %
124 d.getVar("HOST_ARCH", True))
125 bb.fatal("Please add your architecture to siteinfo.bbclass")
126}
127
128def siteinfo_get_files(d, no_cache = False):
129 sitedata = siteinfo_data(d)
130 sitefiles = ""
131 for path in d.getVar("BBPATH", True).split(":"):
132 for element in sitedata:
133 filename = os.path.join(path, "site", element)
134 if os.path.exists(filename):
135 sitefiles += filename + " "
136
137 if no_cache: return sitefiles
138
139 # Now check for siteconfig cache files
140 path_siteconfig = d.getVar('SITECONFIG_SYSROOTCACHE', True)
141 if os.path.isdir(path_siteconfig):
142 for i in os.listdir(path_siteconfig):
143 filename = os.path.join(path_siteconfig, i)
144 sitefiles += filename + " "
145
146 return sitefiles
147
148#
149# Make some information available via variables
150#
151SITECONFIG_SYSROOTCACHE = "${STAGING_DATADIR}/${TARGET_SYS}_config_site.d"