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-rw-r--r--meta/classes/baremetal-image.bbclass3
1 files changed, 3 insertions, 0 deletions
diff --git a/meta/classes/baremetal-image.bbclass b/meta/classes/baremetal-image.bbclass
index 9ec3f1460b..089c445522 100644
--- a/meta/classes/baremetal-image.bbclass
+++ b/meta/classes/baremetal-image.bbclass
@@ -82,12 +82,15 @@ QB_OPT_APPEND:append = " -nographic"
82# RISC-V tunes set the BIOS, unset, and instruct QEMU to 82# RISC-V tunes set the BIOS, unset, and instruct QEMU to
83# ignore the BIOS and boot from -kernel 83# ignore the BIOS and boot from -kernel
84QB_DEFAULT_BIOS:qemuriscv64 = "" 84QB_DEFAULT_BIOS:qemuriscv64 = ""
85QB_DEFAULT_BIOS:qemuriscv32 = ""
85QB_OPT_APPEND:append:qemuriscv64 = " -bios none" 86QB_OPT_APPEND:append:qemuriscv64 = " -bios none"
87QB_OPT_APPEND:append:qemuriscv32 = " -bios none"
86 88
87 89
88# Use the medium-any code model for the RISC-V 64 bit implementation, 90# Use the medium-any code model for the RISC-V 64 bit implementation,
89# since medlow can only access addresses below 0x80000000 and RAM 91# since medlow can only access addresses below 0x80000000 and RAM
90# starts at 0x80000000 on RISC-V 64 92# starts at 0x80000000 on RISC-V 64
93# Keep RISC-V 32 using -mcmodel=medlow (symbols lie between -2GB:2GB)
91CFLAGS:append:qemuriscv64 = " -mcmodel=medany" 94CFLAGS:append:qemuriscv64 = " -mcmodel=medany"
92 95
93 96