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-rw-r--r--meta/classes-recipe/rust-target-config.bbclass5
1 files changed, 3 insertions, 2 deletions
diff --git a/meta/classes-recipe/rust-target-config.bbclass b/meta/classes-recipe/rust-target-config.bbclass
index e30eaa1da3..9e1d81bf5c 100644
--- a/meta/classes-recipe/rust-target-config.bbclass
+++ b/meta/classes-recipe/rust-target-config.bbclass
@@ -272,13 +272,12 @@ def llvm_cpu(d):
272 trans['x86-64'] = "x86-64" 272 trans['x86-64'] = "x86-64"
273 trans['i686'] = "i686" 273 trans['i686'] = "i686"
274 trans['i586'] = "i586" 274 trans['i586'] = "i586"
275 trans['powerpc'] = "powerpc"
276 trans['mips64'] = "mips64" 275 trans['mips64'] = "mips64"
277 trans['mips64el'] = "mips64" 276 trans['mips64el'] = "mips64"
278 trans['riscv64'] = "generic-rv64" 277 trans['riscv64'] = "generic-rv64"
279 trans['riscv32'] = "generic-rv32" 278 trans['riscv32'] = "generic-rv32"
280 279
281 if target in ["mips", "mipsel"]: 280 if target in ["mips", "mipsel", "powerpc"]:
282 feat = frozenset(d.getVar('TUNE_FEATURES').split()) 281 feat = frozenset(d.getVar('TUNE_FEATURES').split())
283 if "mips32r2" in feat: 282 if "mips32r2" in feat:
284 trans['mipsel'] = "mips32r2" 283 trans['mipsel'] = "mips32r2"
@@ -286,6 +285,8 @@ def llvm_cpu(d):
286 elif "mips32" in feat: 285 elif "mips32" in feat:
287 trans['mipsel'] = "mips32" 286 trans['mipsel'] = "mips32"
288 trans['mips'] = "mips32" 287 trans['mips'] = "mips32"
288 elif "ppc7400" in feat:
289 trans['powerpc'] = "7400"
289 290
290 try: 291 try:
291 return trans[cpu] 292 return trans[cpu]