diff options
| -rw-r--r-- | meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch | 104 | ||||
| -rw-r--r-- | meta/recipes-support/libffi/libffi_3.3.bb | 1 |
2 files changed, 105 insertions, 0 deletions
diff --git a/meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch b/meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch new file mode 100644 index 0000000000..782dce70d8 --- /dev/null +++ b/meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch | |||
| @@ -0,0 +1,104 @@ | |||
| 1 | From 501a6b55853af549fae72723e74271f2a4ec7cf6 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Brett Warren <brett.warren@arm.com> | ||
| 3 | Date: Fri, 27 Nov 2020 15:28:42 +0000 | ||
| 4 | Subject: [PATCH] arm/sysv: reverted clang VFP mitigation | ||
| 5 | |||
| 6 | Since commit e3d2812ce43940aacae5bab2d0e965278cb1e7ea, | ||
| 7 | seperate instructions were used when compiling under clang, | ||
| 8 | as clang didn't allow the directives at the time. This mitigation | ||
| 9 | now causes compilation to fail under clang 10, as described by | ||
| 10 | https://github.com/libffi/libffi/issues/607. Now that | ||
| 11 | clang supports the LDC and SDC instructions, this mitigation | ||
| 12 | has been reverted. | ||
| 13 | |||
| 14 | Upstream-Status: Pending | ||
| 15 | Signed-off-by: Brett Warren <brett.warren@arm.com> | ||
| 16 | --- | ||
| 17 | src/arm/sysv.S | 33 --------------------------------- | ||
| 18 | 1 file changed, 33 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/src/arm/sysv.S b/src/arm/sysv.S | ||
| 21 | index 63180a4..e3ce526 100644 | ||
| 22 | --- a/src/arm/sysv.S | ||
| 23 | +++ b/src/arm/sysv.S | ||
| 24 | @@ -128,13 +128,8 @@ ARM_FUNC_START(ffi_call_VFP) | ||
| 25 | cfi_startproc | ||
| 26 | |||
| 27 | cmp r3, #3 @ load only d0 if possible | ||
| 28 | -#ifdef __clang__ | ||
| 29 | - vldrle d0, [sp] | ||
| 30 | - vldmgt sp, {d0-d7} | ||
| 31 | -#else | ||
| 32 | ldcle p11, cr0, [r0] @ vldrle d0, [sp] | ||
| 33 | ldcgt p11, cr0, [r0], {16} @ vldmgt sp, {d0-d7} | ||
| 34 | -#endif | ||
| 35 | add r0, r0, #64 @ discard the vfp register args | ||
| 36 | /* FALLTHRU */ | ||
| 37 | ARM_FUNC_END(ffi_call_VFP) | ||
| 38 | @@ -172,25 +167,13 @@ ARM_FUNC_START(ffi_call_SYSV) | ||
| 39 | nop | ||
| 40 | 0: | ||
| 41 | E(ARM_TYPE_VFP_S) | ||
| 42 | -#ifdef __clang__ | ||
| 43 | - vstr s0, [r2] | ||
| 44 | -#else | ||
| 45 | stc p10, cr0, [r2] @ vstr s0, [r2] | ||
| 46 | -#endif | ||
| 47 | pop {fp,pc} | ||
| 48 | E(ARM_TYPE_VFP_D) | ||
| 49 | -#ifdef __clang__ | ||
| 50 | - vstr d0, [r2] | ||
| 51 | -#else | ||
| 52 | stc p11, cr0, [r2] @ vstr d0, [r2] | ||
| 53 | -#endif | ||
| 54 | pop {fp,pc} | ||
| 55 | E(ARM_TYPE_VFP_N) | ||
| 56 | -#ifdef __clang__ | ||
| 57 | - vstm r2, {d0-d3} | ||
| 58 | -#else | ||
| 59 | stc p11, cr0, [r2], {8} @ vstm r2, {d0-d3} | ||
| 60 | -#endif | ||
| 61 | pop {fp,pc} | ||
| 62 | E(ARM_TYPE_INT64) | ||
| 63 | str r1, [r2, #4] | ||
| 64 | @@ -287,11 +270,7 @@ ARM_FUNC_START(ffi_closure_VFP) | ||
| 65 | add ip, sp, #16 | ||
| 66 | sub sp, sp, #64+32 @ allocate frame | ||
| 67 | cfi_adjust_cfa_offset(64+32) | ||
| 68 | -#ifdef __clang__ | ||
| 69 | - vstm sp, {d0-d7} | ||
| 70 | -#else | ||
| 71 | stc p11, cr0, [sp], {16} @ vstm sp, {d0-d7} | ||
| 72 | -#endif | ||
| 73 | stmdb sp!, {ip,lr} | ||
| 74 | |||
| 75 | /* See above. */ | ||
| 76 | @@ -320,25 +299,13 @@ ARM_FUNC_START_LOCAL(ffi_closure_ret) | ||
| 77 | cfi_rel_offset(lr, 4) | ||
| 78 | 0: | ||
| 79 | E(ARM_TYPE_VFP_S) | ||
| 80 | -#ifdef __clang__ | ||
| 81 | - vldr s0, [r2] | ||
| 82 | -#else | ||
| 83 | ldc p10, cr0, [r2] @ vldr s0, [r2] | ||
| 84 | -#endif | ||
| 85 | ldm sp, {sp,pc} | ||
| 86 | E(ARM_TYPE_VFP_D) | ||
| 87 | -#ifdef __clang__ | ||
| 88 | - vldr d0, [r2] | ||
| 89 | -#else | ||
| 90 | ldc p11, cr0, [r2] @ vldr d0, [r2] | ||
| 91 | -#endif | ||
| 92 | ldm sp, {sp,pc} | ||
| 93 | E(ARM_TYPE_VFP_N) | ||
| 94 | -#ifdef __clang__ | ||
| 95 | - vldm r2, {d0-d3} | ||
| 96 | -#else | ||
| 97 | ldc p11, cr0, [r2], {8} @ vldm r2, {d0-d3} | ||
| 98 | -#endif | ||
| 99 | ldm sp, {sp,pc} | ||
| 100 | E(ARM_TYPE_INT64) | ||
| 101 | ldr r1, [r2, #4] | ||
| 102 | -- | ||
| 103 | 2.17.1 | ||
| 104 | |||
diff --git a/meta/recipes-support/libffi/libffi_3.3.bb b/meta/recipes-support/libffi/libffi_3.3.bb index 9dfdb9e39b..10ef003242 100644 --- a/meta/recipes-support/libffi/libffi_3.3.bb +++ b/meta/recipes-support/libffi/libffi_3.3.bb | |||
| @@ -13,6 +13,7 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=492385fe22195952f5b9b197868ba268" | |||
| 13 | SRC_URI = "https://github.com/libffi/libffi/releases/download/v${PV}/${BPN}-${PV}.tar.gz \ | 13 | SRC_URI = "https://github.com/libffi/libffi/releases/download/v${PV}/${BPN}-${PV}.tar.gz \ |
| 14 | file://not-win32.patch \ | 14 | file://not-win32.patch \ |
| 15 | file://0001-Fixed-missed-ifndef-for-__mips_soft_float.patch \ | 15 | file://0001-Fixed-missed-ifndef-for-__mips_soft_float.patch \ |
| 16 | file://0001-arm-sysv-reverted-clang-VFP-mitigation.patch \ | ||
| 16 | file://0001-powerpc-fix-build-failure-on-power7-and-older-532.patch \ | 17 | file://0001-powerpc-fix-build-failure-on-power7-and-older-532.patch \ |
| 17 | file://0001-Address-platforms-with-no-__int128.patch \ | 18 | file://0001-Address-platforms-with-no-__int128.patch \ |
| 18 | file://0001-Address-platforms-with-no-__int128-part2.patch \ | 19 | file://0001-Address-platforms-with-no-__int128-part2.patch \ |
