diff options
author | Trevor Gamblin <tgamblin@baylibre.com> | 2023-07-11 12:22:15 -0400 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2023-07-14 17:31:05 +0100 |
commit | 832c59d8b896f1cffae38bd5d51e4d38b5af426d (patch) | |
tree | 6aec4023b54bd868b51f49112d96fab815a761e7 /meta/recipes-devtools/qemu | |
parent | 9cee34458d3c2e4a3bec4859f411b4225012482e (diff) | |
download | poky-832c59d8b896f1cffae38bd5d51e4d38b5af426d.tar.gz |
qemu: upgrade 8.0.0 -> 8.0.3
ppc.patch is removed because it is included in 8.0.3:
https://github.com/qemu/qemu/commit/864ce70c1c747898063cc2df854920d354b1b78f
General changelog for 8.x: https://wiki.qemu.org/ChangeLog/8.0
(From OE-Core rev: bb5c368e48e2222312b1fc4ba4ad609b2530d6bc)
Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/qemu')
-rw-r--r-- | meta/recipes-devtools/qemu/qemu-native_8.0.3.bb (renamed from meta/recipes-devtools/qemu/qemu-native_8.0.0.bb) | 0 | ||||
-rw-r--r-- | meta/recipes-devtools/qemu/qemu-system-native_8.0.3.bb (renamed from meta/recipes-devtools/qemu/qemu-system-native_8.0.0.bb) | 0 | ||||
-rw-r--r-- | meta/recipes-devtools/qemu/qemu.inc | 3 | ||||
-rw-r--r-- | meta/recipes-devtools/qemu/qemu/ppc.patch | 148 | ||||
-rw-r--r-- | meta/recipes-devtools/qemu/qemu_8.0.3.bb (renamed from meta/recipes-devtools/qemu/qemu_8.0.0.bb) | 0 |
5 files changed, 1 insertions, 150 deletions
diff --git a/meta/recipes-devtools/qemu/qemu-native_8.0.0.bb b/meta/recipes-devtools/qemu/qemu-native_8.0.3.bb index 73a0f63f2b..73a0f63f2b 100644 --- a/meta/recipes-devtools/qemu/qemu-native_8.0.0.bb +++ b/meta/recipes-devtools/qemu/qemu-native_8.0.3.bb | |||
diff --git a/meta/recipes-devtools/qemu/qemu-system-native_8.0.0.bb b/meta/recipes-devtools/qemu/qemu-system-native_8.0.3.bb index 04c7c2a6ac..04c7c2a6ac 100644 --- a/meta/recipes-devtools/qemu/qemu-system-native_8.0.0.bb +++ b/meta/recipes-devtools/qemu/qemu-system-native_8.0.3.bb | |||
diff --git a/meta/recipes-devtools/qemu/qemu.inc b/meta/recipes-devtools/qemu/qemu.inc index a5bdeef66d..f343dba75d 100644 --- a/meta/recipes-devtools/qemu/qemu.inc +++ b/meta/recipes-devtools/qemu/qemu.inc | |||
@@ -30,11 +30,10 @@ SRC_URI = "https://download.qemu.org/${BPN}-${PV}.tar.xz \ | |||
30 | file://0001-tracetool-use-relative-paths-for-line-preprocessor-d.patch \ | 30 | file://0001-tracetool-use-relative-paths-for-line-preprocessor-d.patch \ |
31 | file://qemu-guest-agent.init \ | 31 | file://qemu-guest-agent.init \ |
32 | file://qemu-guest-agent.udev \ | 32 | file://qemu-guest-agent.udev \ |
33 | file://ppc.patch \ | ||
34 | " | 33 | " |
35 | UPSTREAM_CHECK_REGEX = "qemu-(?P<pver>\d+(\.\d+)+)\.tar" | 34 | UPSTREAM_CHECK_REGEX = "qemu-(?P<pver>\d+(\.\d+)+)\.tar" |
36 | 35 | ||
37 | SRC_URI[sha256sum] = "bb60f0341531181d6cc3969dd19a013d0427a87f918193970d9adb91131e56d0" | 36 | SRC_URI[sha256sum] = "ecf4d32cbef9d397bfc8cc50e4d1e92a1b30253bf32e8ee73c7a8dcf9a232b09" |
38 | 37 | ||
39 | SRC_URI:append:class-target = " file://cross.patch" | 38 | SRC_URI:append:class-target = " file://cross.patch" |
40 | SRC_URI:append:class-nativesdk = " file://cross.patch" | 39 | SRC_URI:append:class-nativesdk = " file://cross.patch" |
diff --git a/meta/recipes-devtools/qemu/qemu/ppc.patch b/meta/recipes-devtools/qemu/qemu/ppc.patch deleted file mode 100644 index e14c48cf85..0000000000 --- a/meta/recipes-devtools/qemu/qemu/ppc.patch +++ /dev/null | |||
@@ -1,148 +0,0 @@ | |||
1 | From 31f02021ac17442c514593f7b9ed750ea87c21b1 Mon Sep 17 00:00:00 2001 | ||
2 | From: Richard Purdie <richard.purdie@linuxfoundation.org> | ||
3 | Date: Sat, 6 May 2023 07:42:35 +0100 | ||
4 | Cc: Víctor Colombo <victor.colombo@eldorado.org.br> | ||
5 | Cc: Matheus Ferst <matheus.ferst@eldorado.org.br> | ||
6 | Cc: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
7 | Cc: Richard Henderson <richard.henderson@linaro.org> | ||
8 | Cc: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
9 | Subject: [PATCH v3] target/ppc: Fix fallback to MFSS for MFFS* instructions on | ||
10 | pre 3.0 ISAs | ||
11 | |||
12 | The following commits changed the code such that the fallback to MFSS for MFFSCRN, | ||
13 | MFFSCRNI, MFFSCE and MFFSL on pre 3.0 ISAs was removed and became an illegal instruction: | ||
14 | |||
15 | bf8adfd88b547680aa857c46098f3a1e94373160 - target/ppc: Move mffscrn[i] to decodetree | ||
16 | 394c2e2fda70da722f20fb60412d6c0ca4bfaa03 - target/ppc: Move mffsce to decodetree | ||
17 | 3e5bce70efe6bd1f684efbb21fd2a316cbf0657e - target/ppc: Move mffsl to decodetree | ||
18 | |||
19 | The hardware will handle them as a MFFS instruction as the code did previously. | ||
20 | This means applications that were segfaulting under qemu when encountering these | ||
21 | instructions which is used in glibc libm functions for example. | ||
22 | |||
23 | The fallback for MFFSCDRN and MFFSCDRNI added in a later patch was also missing. | ||
24 | |||
25 | This patch restores the fallback to MFSS for these instructions on pre 3.0s ISAs | ||
26 | as the hardware decoder would, fixing the segfaulting libm code. It doesn't have | ||
27 | the fallback for 3.0 onwards to match hardware behaviour. | ||
28 | |||
29 | Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> | ||
30 | --- | ||
31 | target/ppc/insn32.decode | 20 +++++++++++++------- | ||
32 | target/ppc/translate/fp-impl.c.inc | 22 ++++++++++++++++------ | ||
33 | 2 files changed, 29 insertions(+), 13 deletions(-) | ||
34 | |||
35 | v3 - drop fallback to MFFS for 3.0 ISA to match hardware | ||
36 | v2 - switch to use decodetree pattern groups per feedback | ||
37 | |||
38 | Upstream-Status: Submitted [https://lore.kernel.org/qemu-devel/20230506065240.3177798-1-richard.purdie@linuxfoundation.org/] | ||
39 | |||
40 | diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode | ||
41 | index f8f589e9fd..4fcf3af8d0 100644 | ||
42 | --- a/target/ppc/insn32.decode | ||
43 | +++ b/target/ppc/insn32.decode | ||
44 | @@ -390,13 +390,19 @@ SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi | ||
45 | |||
46 | ### Move To/From FPSCR | ||
47 | |||
48 | -MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc | ||
49 | -MFFSCE 111111 ..... 00001 ----- 1001000111 - @X_t | ||
50 | -MFFSCRN 111111 ..... 10110 ..... 1001000111 - @X_tb | ||
51 | -MFFSCDRN 111111 ..... 10100 ..... 1001000111 - @X_tb | ||
52 | -MFFSCRNI 111111 ..... 10111 ---.. 1001000111 - @X_imm2 | ||
53 | -MFFSCDRNI 111111 ..... 10101 --... 1001000111 - @X_imm3 | ||
54 | -MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t | ||
55 | +{ | ||
56 | + # Before Power ISA v3.0, MFFS bits 11~15 were reserved and should be ignored | ||
57 | + MFFS_ISA207 111111 ..... ----- ----- 1001000111 . @X_t_rc | ||
58 | + [ | ||
59 | + MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc | ||
60 | + MFFSCE 111111 ..... 00001 ----- 1001000111 - @X_t | ||
61 | + MFFSCRN 111111 ..... 10110 ..... 1001000111 - @X_tb | ||
62 | + MFFSCDRN 111111 ..... 10100 ..... 1001000111 - @X_tb | ||
63 | + MFFSCRNI 111111 ..... 10111 ---.. 1001000111 - @X_imm2 | ||
64 | + MFFSCDRNI 111111 ..... 10101 --... 1001000111 - @X_imm3 | ||
65 | + MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t | ||
66 | + ] | ||
67 | +} | ||
68 | |||
69 | ### Decimal Floating-Point Arithmetic Instructions | ||
70 | |||
71 | diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc | ||
72 | index 57d8437851..874774eade 100644 | ||
73 | --- a/target/ppc/translate/fp-impl.c.inc | ||
74 | +++ b/target/ppc/translate/fp-impl.c.inc | ||
75 | @@ -568,6 +568,22 @@ static void store_fpscr_masked(TCGv_i64 fpscr, uint64_t clear_mask, | ||
76 | gen_helper_store_fpscr(cpu_env, fpscr_masked, st_mask); | ||
77 | } | ||
78 | |||
79 | +static bool trans_MFFS_ISA207(DisasContext *ctx, arg_X_t_rc *a) | ||
80 | +{ | ||
81 | + if (!(ctx->insns_flags2 & PPC2_ISA300)) { | ||
82 | + /* | ||
83 | + * Before Power ISA v3.0, MFFS bits 11~15 were reserved, any instruction | ||
84 | + * with OPCD=63 and XO=583 should be decoded as MFFS. | ||
85 | + */ | ||
86 | + return trans_MFFS(ctx, a); | ||
87 | + } | ||
88 | + /* | ||
89 | + * For Power ISA v3.0+, return false and let the pattern group | ||
90 | + * select the correct instruction. | ||
91 | + */ | ||
92 | + return false; | ||
93 | +} | ||
94 | + | ||
95 | static bool trans_MFFS(DisasContext *ctx, arg_X_t_rc *a) | ||
96 | { | ||
97 | REQUIRE_FPU(ctx); | ||
98 | @@ -584,7 +600,6 @@ static bool trans_MFFSCE(DisasContext *ctx, arg_X_t *a) | ||
99 | { | ||
100 | TCGv_i64 fpscr; | ||
101 | |||
102 | - REQUIRE_INSNS_FLAGS2(ctx, ISA300); | ||
103 | REQUIRE_FPU(ctx); | ||
104 | |||
105 | gen_reset_fpstatus(); | ||
106 | @@ -597,7 +612,6 @@ static bool trans_MFFSCRN(DisasContext *ctx, arg_X_tb *a) | ||
107 | { | ||
108 | TCGv_i64 t1, fpscr; | ||
109 | |||
110 | - REQUIRE_INSNS_FLAGS2(ctx, ISA300); | ||
111 | REQUIRE_FPU(ctx); | ||
112 | |||
113 | t1 = tcg_temp_new_i64(); | ||
114 | @@ -614,7 +628,6 @@ static bool trans_MFFSCDRN(DisasContext *ctx, arg_X_tb *a) | ||
115 | { | ||
116 | TCGv_i64 t1, fpscr; | ||
117 | |||
118 | - REQUIRE_INSNS_FLAGS2(ctx, ISA300); | ||
119 | REQUIRE_FPU(ctx); | ||
120 | |||
121 | t1 = tcg_temp_new_i64(); | ||
122 | @@ -631,7 +644,6 @@ static bool trans_MFFSCRNI(DisasContext *ctx, arg_X_imm2 *a) | ||
123 | { | ||
124 | TCGv_i64 t1, fpscr; | ||
125 | |||
126 | - REQUIRE_INSNS_FLAGS2(ctx, ISA300); | ||
127 | REQUIRE_FPU(ctx); | ||
128 | |||
129 | t1 = tcg_temp_new_i64(); | ||
130 | @@ -647,7 +659,6 @@ static bool trans_MFFSCDRNI(DisasContext *ctx, arg_X_imm3 *a) | ||
131 | { | ||
132 | TCGv_i64 t1, fpscr; | ||
133 | |||
134 | - REQUIRE_INSNS_FLAGS2(ctx, ISA300); | ||
135 | REQUIRE_FPU(ctx); | ||
136 | |||
137 | t1 = tcg_temp_new_i64(); | ||
138 | @@ -661,7 +672,6 @@ static bool trans_MFFSCDRNI(DisasContext *ctx, arg_X_imm3 *a) | ||
139 | |||
140 | static bool trans_MFFSL(DisasContext *ctx, arg_X_t *a) | ||
141 | { | ||
142 | - REQUIRE_INSNS_FLAGS2(ctx, ISA300); | ||
143 | REQUIRE_FPU(ctx); | ||
144 | |||
145 | gen_reset_fpstatus(); | ||
146 | -- | ||
147 | 2.39.2 | ||
148 | |||
diff --git a/meta/recipes-devtools/qemu/qemu_8.0.0.bb b/meta/recipes-devtools/qemu/qemu_8.0.3.bb index 42e133967e..42e133967e 100644 --- a/meta/recipes-devtools/qemu/qemu_8.0.0.bb +++ b/meta/recipes-devtools/qemu/qemu_8.0.3.bb | |||