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authorKhem Raj <raj.khem@gmail.com>2012-09-06 15:22:55 -0700
committerRichard Purdie <richard.purdie@linuxfoundation.org>2012-09-10 13:01:55 +0100
commit11432c69fa396eaad3eb5bd1644e9c86b80b5e55 (patch)
tree23ff736edd81ad50969cb9a68e6c95af8c182b17 /meta/recipes-devtools/qemu
parentf6cc0772504f3af0869f31abb0da0e5686c61aa8 (diff)
downloadpoky-11432c69fa396eaad3eb5bd1644e9c86b80b5e55.tar.gz
qemu: Update from 0.15 to 1.2
Forward port the patches which were not applied upstream (From OE-Core rev: 0c1328a27881f1b3046ed527447608a9fa91b1ea) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/qemu')
-rw-r--r--meta/recipes-devtools/qemu/qemu-0.15.1/0001-ppc64-Fix-linker-script.patch46
-rw-r--r--meta/recipes-devtools/qemu/qemu-0.15.1/a4d1f142542935b90d2eb30f3aead4edcf455fe6.patch66
-rw-r--r--meta/recipes-devtools/qemu/qemu-0.15.1/hw-pl031-Actually-raise-interrupt-on-timer-expiry.patch41
-rw-r--r--meta/recipes-devtools/qemu/qemu-0.15.1/ppc-s500-set-invalid-mask.patch610
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/arm-bgr.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/arm-bgr.patch)12
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/enable-i386-linux-user.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/enable-i386-linux-user.patch)0
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/fallback-to-safe-mmap_min_addr.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/fallback-to-safe-mmap_min_addr.patch)0
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/fix-configure-checks.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/fix-configure-checks.patch)18
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/init-info.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/init-info.patch)0
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/larger_default_ram_size.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/larger_default_ram_size.patch)0
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/linker-flags.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/linker-flags.patch)14
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/no-strip.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/no-strip.patch)0
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/powerpc_rom.bin (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/powerpc_rom.bin)bin4096 -> 4096 bytes
-rw-r--r--meta/recipes-devtools/qemu/qemu-1.2.0/qemu-vmware-vga-depth.patch (renamed from meta/recipes-devtools/qemu/qemu-0.15.1/qemu-vmware-vga-depth.patch)70
-rw-r--r--meta/recipes-devtools/qemu/qemu_1.2.0.bb (renamed from meta/recipes-devtools/qemu/qemu_0.15.1.bb)18
15 files changed, 54 insertions, 841 deletions
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/0001-ppc64-Fix-linker-script.patch b/meta/recipes-devtools/qemu/qemu-0.15.1/0001-ppc64-Fix-linker-script.patch
deleted file mode 100644
index d64d76fc6c..0000000000
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/0001-ppc64-Fix-linker-script.patch
+++ /dev/null
@@ -1,46 +0,0 @@
1Upstream-Status: Backport
2
3From 7c0a3409627604c111d5c5e1ce4e0224c2b56315 Mon Sep 17 00:00:00 2001
4From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
5Date: Tue, 4 Oct 2011 05:14:52 +0000
6Subject: [PATCH] ppc64: Fix linker script
7MIME-Version: 1.0
8Content-Type: text/plain; charset=UTF-8
9Content-Transfer-Encoding: 8bit
10
11Since commit 8733f609 (Fix linker scripts) linking on Linux/ppc64 fails:
12
13 LINK ppc64-linux-user/qemu-ppc64
14/usr/lib64/gcc/powerpc64-suse-linux/4.3/../../../../powerpc64-suse-linux/bin/ld:/home/afaerber/qemu/ppc64.ld:84: syntax error
15collect2: ld gab 1 als Ende-Status zurück
16make[1]: *** [qemu-ppc64] Fehler 1
17make: *** [subdir-ppc64-linux-user] Fehler 2
18
19Fix by removing a leftover line in the ppc64 linker script.
20
21Cc: Gerd Hoffmann <kraxel@redhat.com>
22Cc: Blue Swirl <blauwirbel@gmail.com>
23Signed-off-by: Andreas Färber <afaerber@suse.de>
24Signed-off-by: Alexander Graf <agraf@suse.de>
25---
26 ppc64.ld | 4 ++--
27 1 file changed, 2 insertions(+), 2 deletions(-)
28
29diff --git a/ppc64.ld b/ppc64.ld
30index 0059ee5..0a7c0dd 100644
31--- a/ppc64.ld
32+++ b/ppc64.ld
33@@ -81,8 +81,8 @@ SECTIONS
34 .sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) }
35 .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) }
36 .eh_frame_hdr : { *(.eh_frame_hdr) }
37-*(.gcc_except_table.*) } /* Adjust the address for the data segment. We want to
38-adjust up to + the same address within the page on the next page up. */
39+ /* Adjust the address for the data segment. We want to adjust up to
40+ the same address within the page on the next page up. */
41 . = ALIGN (0x10000) - ((0x10000 - .) & (0x10000 - 1)); . = DATA_SEGMENT_ALIGN
42 (0x10000, 0x1000); /* Exception handling */
43 .eh_frame : { KEEP (*(.eh_frame)) }
44--
451.7.10
46
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/a4d1f142542935b90d2eb30f3aead4edcf455fe6.patch b/meta/recipes-devtools/qemu/qemu-0.15.1/a4d1f142542935b90d2eb30f3aead4edcf455fe6.patch
deleted file mode 100644
index 405d557bdc..0000000000
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/a4d1f142542935b90d2eb30f3aead4edcf455fe6.patch
+++ /dev/null
@@ -1,66 +0,0 @@
1From a4d1f142542935b90d2eb30f3aead4edcf455fe6 Mon Sep 17 00:00:00 2001
2From: Aurelien Jarno <aurelien@aurel32.net>
3Date: Sat, 7 Jan 2012 15:20:11 +0100
4Subject: [PATCH 1/1] target-i386: fix {min,max}{pd,ps,sd,ss} SSE2 instructions
5
6minpd, minps, minsd, minss and maxpd, maxps, maxsd, maxss SSE2
7instructions have been broken when switching target-i386 to softfloat.
8It's not possible to use comparison instructions on float types anymore
9to softfloat, so use the floatXX_lt function instead, as the
10float_XX_min and float_XX_max functions can't be used due to the Intel
11specific behaviour.
12
13As it implements the correct NaNs behaviour, let's remove the
14corresponding entry from the TODO.
15
16It fixes GDM screen display on Debian Lenny.
17
18Thanks to Peter Maydell and Jason Wessel for their analysis of the
19problem.
20
21Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
22---
23 target-i386/TODO | 1 -
24 target-i386/ops_sse.h | 9 +++++++--
25 2 files changed, 7 insertions(+), 3 deletions(-)
26
27This fixes scrollbar issues in matchbox-terminal/vte on qemux86-64 and
28files not appearing in pcmanfm, as well as glib/gobject errors to do with gdoubles
29on the console [YOCTO #1906]
30
31Upstream-Status: Backport
32
33Index: qemu-0.15.1/target-i386/TODO
34===================================================================
35--- qemu-0.15.1.orig/target-i386/TODO 2011-10-12 16:41:43.000000000 +0000
36+++ qemu-0.15.1/target-i386/TODO 2012-04-19 07:30:38.704073075 +0000
37@@ -15,7 +15,6 @@
38 - DRx register support
39 - CR0.AC emulation
40 - SSE alignment checks
41-- fix SSE min/max with nans
42
43 Optimizations/Features:
44
45Index: qemu-0.15.1/target-i386/ops_sse.h
46===================================================================
47--- qemu-0.15.1.orig/target-i386/ops_sse.h 2011-10-12 16:41:43.000000000 +0000
48+++ qemu-0.15.1/target-i386/ops_sse.h 2012-04-19 07:30:38.712073076 +0000
49@@ -584,10 +584,15 @@
50 #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
51 #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
52 #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
53-#define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
54-#define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
55 #define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
56
57+/* Note that the choice of comparison op here is important to get the
58+ * special cases right: for min and max Intel specifies that (-0,0),
59+ * (NaN, anything) and (anything, NaN) return the second argument.
60+ */
61+#define FPU_MIN(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? (a) : (b)
62+#define FPU_MAX(size, a, b) float ## size ## _lt(b, a, &env->sse_status) ? (a) : (b)
63+
64 SSE_HELPER_S(add, FPU_ADD)
65 SSE_HELPER_S(sub, FPU_SUB)
66 SSE_HELPER_S(mul, FPU_MUL)
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/hw-pl031-Actually-raise-interrupt-on-timer-expiry.patch b/meta/recipes-devtools/qemu/qemu-0.15.1/hw-pl031-Actually-raise-interrupt-on-timer-expiry.patch
deleted file mode 100644
index 2ccc663d75..0000000000
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/hw-pl031-Actually-raise-interrupt-on-timer-expiry.patch
+++ /dev/null
@@ -1,41 +0,0 @@
1Upstream-Status: Backport
2commit 13a16f1d91fc7a46b65b22a33f6ffea1b826a097
3in git://git.qemu.org/qemu.git master
4
5From 13a16f1d91fc7a46b65b22a33f6ffea1b826a097 Mon Sep 17 00:00:00 2001
6From: Peter Maydell <peter.maydell@linaro.org>
7Date: Thu, 16 Feb 2012 09:56:10 +0000
8Subject: [PATCH] hw/pl031: Actually raise interrupt on timer expiry
9MIME-Version: 1.0
10Content-Type: text/plain; charset=UTF-8
11Content-Transfer-Encoding: 8bit
12
13Fix a typo in pl031_interrupt() which meant we were setting a bit
14in the interrupt mask rather than the interrupt status register
15and thus not actually raising an interrupt. This fix allows the
16rtctest program from the kernel's Documentation/rtc.txt to pass
17rather than hanging.
18
19Reported-by: Daniel Forsgren <daniel.forsgren@enea.com>
20Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
21Acked-by: Andreas Färber <afaerber@suse.de>
22---
23 hw/pl031.c | 2 +-
24 1 files changed, 1 insertions(+), 1 deletions(-)
25
26diff --git a/hw/pl031.c b/hw/pl031.c
27index 05b5b11..69abc4f 100644
28--- a/hw/pl031.c
29+++ b/hw/pl031.c
30@@ -76,7 +76,7 @@ static void pl031_interrupt(void * opaque)
31 {
32 pl031_state *s = (pl031_state *)opaque;
33
34- s->im = 1;
35+ s->is = 1;
36 DPRINTF("Alarm raised\n");
37 pl031_update(s);
38 }
39--
401.7.4.1
41
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/ppc-s500-set-invalid-mask.patch b/meta/recipes-devtools/qemu/qemu-0.15.1/ppc-s500-set-invalid-mask.patch
deleted file mode 100644
index 4c2134bf60..0000000000
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/ppc-s500-set-invalid-mask.patch
+++ /dev/null
@@ -1,610 +0,0 @@
1Upstream-Status: Backport
2Signed-off-by: Khem Raj <raj.khem@gmail.com>
3
4X-Git-Url: http://git.qemu.org/?p=qemu.git;a=blobdiff_plain;f=target-ppc%2Ftranslate.c;h=99e995c7b6094b0651d176f9b813525b44b7a74e;hp=1e362fc2385faeca53d0c1de37ccd7a7379202da;hb=70560da79d5be611bd7867f9c590847702c61fb5;hpb=bdcf9d6cd4ff987e58ba4f311ba7b1a33cf3ce5e
5
6Index: qemu-0.15.1/target-ppc/translate.c
7===================================================================
8--- qemu-0.15.1.orig/target-ppc/translate.c 2011-10-12 09:41:43.000000000 -0700
9+++ qemu-0.15.1/target-ppc/translate.c 2012-07-20 08:14:33.192405920 -0700
10@@ -196,8 +196,10 @@
11 } DisasContext;
12
13 struct opc_handler_t {
14- /* invalid bits */
15- uint32_t inval;
16+ /* invalid bits for instruction 1 (Rc(opcode) == 0) */
17+ uint32_t inval1;
18+ /* invalid bits for instruction 2 (Rc(opcode) == 1) */
19+ uint32_t inval2;
20 /* instruction type */
21 uint64_t type;
22 /* extended instruction type */
23@@ -469,7 +471,23 @@
24 .opc3 = op3, \
25 .pad = { 0, }, \
26 .handler = { \
27- .inval = invl, \
28+ .inval1 = invl, \
29+ .type = _typ, \
30+ .type2 = _typ2, \
31+ .handler = &gen_##name, \
32+ .oname = stringify(name), \
33+ }, \
34+ .oname = stringify(name), \
35+}
36+#define GEN_OPCODE_DUAL(name, op1, op2, op3, invl1, invl2, _typ, _typ2) \
37+{ \
38+ .opc1 = op1, \
39+ .opc2 = op2, \
40+ .opc3 = op3, \
41+ .pad = { 0, }, \
42+ .handler = { \
43+ .inval1 = invl1, \
44+ .inval2 = invl2, \
45 .type = _typ, \
46 .type2 = _typ2, \
47 .handler = &gen_##name, \
48@@ -484,7 +502,7 @@
49 .opc3 = op3, \
50 .pad = { 0, }, \
51 .handler = { \
52- .inval = invl, \
53+ .inval1 = invl, \
54 .type = _typ, \
55 .type2 = _typ2, \
56 .handler = &gen_##name, \
57@@ -500,7 +518,22 @@
58 .opc3 = op3, \
59 .pad = { 0, }, \
60 .handler = { \
61- .inval = invl, \
62+ .inval1 = invl, \
63+ .type = _typ, \
64+ .type2 = _typ2, \
65+ .handler = &gen_##name, \
66+ }, \
67+ .oname = stringify(name), \
68+}
69+#define GEN_OPCODE_DUAL(name, op1, op2, op3, invl1, invl2, _typ, _typ2) \
70+{ \
71+ .opc1 = op1, \
72+ .opc2 = op2, \
73+ .opc3 = op3, \
74+ .pad = { 0, }, \
75+ .handler = { \
76+ .inval1 = invl1, \
77+ .inval2 = invl2, \
78 .type = _typ, \
79 .type2 = _typ2, \
80 .handler = &gen_##name, \
81@@ -514,7 +547,7 @@
82 .opc3 = op3, \
83 .pad = { 0, }, \
84 .handler = { \
85- .inval = invl, \
86+ .inval1 = invl, \
87 .type = _typ, \
88 .type2 = _typ2, \
89 .handler = &gen_##name, \
90@@ -541,7 +574,8 @@
91 }
92
93 static opc_handler_t invalid_handler = {
94- .inval = 0xFFFFFFFF,
95+ .inval1 = 0xFFFFFFFF,
96+ .inval2 = 0xFFFFFFFF,
97 .type = PPC_NONE,
98 .type2 = PPC_NONE,
99 .handler = gen_invalid,
100@@ -6672,7 +6706,7 @@
101 #endif
102 }
103
104-#define GEN_SPE(name0, name1, opc2, opc3, inval, type) \
105+#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
106 static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
107 { \
108 if (Rc(ctx->opcode)) \
109@@ -7395,35 +7429,35 @@
110 tcg_temp_free_i64(tmp);
111 }
112
113-GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, PPC_SPE); ////
114-GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, PPC_SPE);
115-GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, PPC_SPE); ////
116-GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, PPC_SPE);
117-GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, PPC_SPE); ////
118-GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, PPC_SPE); ////
119-GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, PPC_SPE); ////
120-GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x00000000, PPC_SPE); //
121-GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, PPC_SPE);
122-GEN_SPE(speundef, evand, 0x08, 0x08, 0x00000000, PPC_SPE); ////
123-GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, PPC_SPE); ////
124-GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, PPC_SPE); ////
125-GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, PPC_SPE); ////
126-GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE);
127-GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE);
128-GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE);
129-GEN_SPE(speundef, evorc, 0x0D, 0x08, 0x00000000, PPC_SPE); ////
130-GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, PPC_SPE); ////
131-GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, PPC_SPE); ////
132-GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, PPC_SPE);
133-GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, PPC_SPE); ////
134-GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, PPC_SPE);
135-GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, PPC_SPE); //
136-GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, PPC_SPE);
137-GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, PPC_SPE); ////
138-GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, PPC_SPE); ////
139-GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, PPC_SPE); ////
140-GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, PPC_SPE); ////
141-GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, PPC_SPE); ////
142+GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE); ////
143+GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE);
144+GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE); ////
145+GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE);
146+GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, 0x0000F800, PPC_SPE); ////
147+GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, 0x0000F800, PPC_SPE); ////
148+GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, 0x0000F800, PPC_SPE); ////
149+GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x0000F800, 0x00000000, PPC_SPE); //
150+GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, 0xFFFFFFFF, PPC_SPE);
151+GEN_SPE(speundef, evand, 0x08, 0x08, 0xFFFFFFFF, 0x00000000, PPC_SPE); ////
152+GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE); ////
153+GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, 0x00000000, PPC_SPE); ////
154+GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, 0x00000000, PPC_SPE); ////
155+GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, 0x00000000, PPC_SPE);
156+GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, 0x00000000, PPC_SPE);
157+GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, 0x00000000, PPC_SPE);
158+GEN_SPE(speundef, evorc, 0x0D, 0x08, 0xFFFFFFFF, 0x00000000, PPC_SPE); ////
159+GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE); ////
160+GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, 0x00000000, PPC_SPE); ////
161+GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, 0x00000000, PPC_SPE);
162+GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE); ////
163+GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE);
164+GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, 0x0000F800, PPC_SPE); //
165+GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, 0x0000F800, PPC_SPE);
166+GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, 0x00000000, PPC_SPE); ////
167+GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, 0x00000000, PPC_SPE); ////
168+GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, 0x00600000, PPC_SPE); ////
169+GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, 0x00600000, PPC_SPE); ////
170+GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, 0xFFFFFFFF, PPC_SPE); ////
171
172 /* SPE load and stores */
173 static inline void gen_addr_spe_imm_index(DisasContext *ctx, TCGv EA, int sh)
174@@ -7782,74 +7816,74 @@
175
176 /* Multiply and add - TODO */
177 #if 0
178-GEN_SPE(speundef, evmhessf, 0x01, 0x10, 0x00000000, PPC_SPE);
179-GEN_SPE(speundef, evmhossf, 0x03, 0x10, 0x00000000, PPC_SPE);
180-GEN_SPE(evmheumi, evmhesmi, 0x04, 0x10, 0x00000000, PPC_SPE);
181-GEN_SPE(speundef, evmhesmf, 0x05, 0x10, 0x00000000, PPC_SPE);
182-GEN_SPE(evmhoumi, evmhosmi, 0x06, 0x10, 0x00000000, PPC_SPE);
183-GEN_SPE(speundef, evmhosmf, 0x07, 0x10, 0x00000000, PPC_SPE);
184-GEN_SPE(speundef, evmhessfa, 0x11, 0x10, 0x00000000, PPC_SPE);
185-GEN_SPE(speundef, evmhossfa, 0x13, 0x10, 0x00000000, PPC_SPE);
186-GEN_SPE(evmheumia, evmhesmia, 0x14, 0x10, 0x00000000, PPC_SPE);
187-GEN_SPE(speundef, evmhesmfa, 0x15, 0x10, 0x00000000, PPC_SPE);
188-GEN_SPE(evmhoumia, evmhosmia, 0x16, 0x10, 0x00000000, PPC_SPE);
189-GEN_SPE(speundef, evmhosmfa, 0x17, 0x10, 0x00000000, PPC_SPE);
190-
191-GEN_SPE(speundef, evmwhssf, 0x03, 0x11, 0x00000000, PPC_SPE);
192-GEN_SPE(evmwlumi, speundef, 0x04, 0x11, 0x00000000, PPC_SPE);
193-GEN_SPE(evmwhumi, evmwhsmi, 0x06, 0x11, 0x00000000, PPC_SPE);
194-GEN_SPE(speundef, evmwhsmf, 0x07, 0x11, 0x00000000, PPC_SPE);
195-GEN_SPE(speundef, evmwssf, 0x09, 0x11, 0x00000000, PPC_SPE);
196-GEN_SPE(speundef, evmwsmf, 0x0D, 0x11, 0x00000000, PPC_SPE);
197-GEN_SPE(speundef, evmwhssfa, 0x13, 0x11, 0x00000000, PPC_SPE);
198-GEN_SPE(evmwlumia, speundef, 0x14, 0x11, 0x00000000, PPC_SPE);
199-GEN_SPE(evmwhumia, evmwhsmia, 0x16, 0x11, 0x00000000, PPC_SPE);
200-GEN_SPE(speundef, evmwhsmfa, 0x17, 0x11, 0x00000000, PPC_SPE);
201-GEN_SPE(speundef, evmwssfa, 0x19, 0x11, 0x00000000, PPC_SPE);
202-GEN_SPE(speundef, evmwsmfa, 0x1D, 0x11, 0x00000000, PPC_SPE);
203-
204-GEN_SPE(evadduiaaw, evaddsiaaw, 0x00, 0x13, 0x0000F800, PPC_SPE);
205-GEN_SPE(evsubfusiaaw, evsubfssiaaw, 0x01, 0x13, 0x0000F800, PPC_SPE);
206-GEN_SPE(evaddumiaaw, evaddsmiaaw, 0x04, 0x13, 0x0000F800, PPC_SPE);
207-GEN_SPE(evsubfumiaaw, evsubfsmiaaw, 0x05, 0x13, 0x0000F800, PPC_SPE);
208-GEN_SPE(evdivws, evdivwu, 0x06, 0x13, 0x00000000, PPC_SPE);
209-
210-GEN_SPE(evmheusiaaw, evmhessiaaw, 0x00, 0x14, 0x00000000, PPC_SPE);
211-GEN_SPE(speundef, evmhessfaaw, 0x01, 0x14, 0x00000000, PPC_SPE);
212-GEN_SPE(evmhousiaaw, evmhossiaaw, 0x02, 0x14, 0x00000000, PPC_SPE);
213-GEN_SPE(speundef, evmhossfaaw, 0x03, 0x14, 0x00000000, PPC_SPE);
214-GEN_SPE(evmheumiaaw, evmhesmiaaw, 0x04, 0x14, 0x00000000, PPC_SPE);
215-GEN_SPE(speundef, evmhesmfaaw, 0x05, 0x14, 0x00000000, PPC_SPE);
216-GEN_SPE(evmhoumiaaw, evmhosmiaaw, 0x06, 0x14, 0x00000000, PPC_SPE);
217-GEN_SPE(speundef, evmhosmfaaw, 0x07, 0x14, 0x00000000, PPC_SPE);
218-GEN_SPE(evmhegumiaa, evmhegsmiaa, 0x14, 0x14, 0x00000000, PPC_SPE);
219-GEN_SPE(speundef, evmhegsmfaa, 0x15, 0x14, 0x00000000, PPC_SPE);
220-GEN_SPE(evmhogumiaa, evmhogsmiaa, 0x16, 0x14, 0x00000000, PPC_SPE);
221-GEN_SPE(speundef, evmhogsmfaa, 0x17, 0x14, 0x00000000, PPC_SPE);
222-
223-GEN_SPE(evmwlusiaaw, evmwlssiaaw, 0x00, 0x15, 0x00000000, PPC_SPE);
224-GEN_SPE(evmwlumiaaw, evmwlsmiaaw, 0x04, 0x15, 0x00000000, PPC_SPE);
225-GEN_SPE(speundef, evmwssfaa, 0x09, 0x15, 0x00000000, PPC_SPE);
226-GEN_SPE(speundef, evmwsmfaa, 0x0D, 0x15, 0x00000000, PPC_SPE);
227-
228-GEN_SPE(evmheusianw, evmhessianw, 0x00, 0x16, 0x00000000, PPC_SPE);
229-GEN_SPE(speundef, evmhessfanw, 0x01, 0x16, 0x00000000, PPC_SPE);
230-GEN_SPE(evmhousianw, evmhossianw, 0x02, 0x16, 0x00000000, PPC_SPE);
231-GEN_SPE(speundef, evmhossfanw, 0x03, 0x16, 0x00000000, PPC_SPE);
232-GEN_SPE(evmheumianw, evmhesmianw, 0x04, 0x16, 0x00000000, PPC_SPE);
233-GEN_SPE(speundef, evmhesmfanw, 0x05, 0x16, 0x00000000, PPC_SPE);
234-GEN_SPE(evmhoumianw, evmhosmianw, 0x06, 0x16, 0x00000000, PPC_SPE);
235-GEN_SPE(speundef, evmhosmfanw, 0x07, 0x16, 0x00000000, PPC_SPE);
236-GEN_SPE(evmhegumian, evmhegsmian, 0x14, 0x16, 0x00000000, PPC_SPE);
237-GEN_SPE(speundef, evmhegsmfan, 0x15, 0x16, 0x00000000, PPC_SPE);
238-GEN_SPE(evmhigumian, evmhigsmian, 0x16, 0x16, 0x00000000, PPC_SPE);
239-GEN_SPE(speundef, evmhogsmfan, 0x17, 0x16, 0x00000000, PPC_SPE);
240-
241-GEN_SPE(evmwlusianw, evmwlssianw, 0x00, 0x17, 0x00000000, PPC_SPE);
242-GEN_SPE(evmwlumianw, evmwlsmianw, 0x04, 0x17, 0x00000000, PPC_SPE);
243-GEN_SPE(speundef, evmwssfan, 0x09, 0x17, 0x00000000, PPC_SPE);
244-GEN_SPE(evmwumian, evmwsmian, 0x0C, 0x17, 0x00000000, PPC_SPE);
245-GEN_SPE(speundef, evmwsmfan, 0x0D, 0x17, 0x00000000, PPC_SPE);
246+GEN_SPE(speundef, evmhessf, 0x01, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);//
247+GEN_SPE(speundef, evmhossf, 0x03, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
248+GEN_SPE(evmheumi, evmhesmi, 0x04, 0x10, 0x00000000, 0x00000000, PPC_SPE);
249+GEN_SPE(speundef, evmhesmf, 0x05, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
250+GEN_SPE(evmhoumi, evmhosmi, 0x06, 0x10, 0x00000000, 0x00000000, PPC_SPE);
251+GEN_SPE(speundef, evmhosmf, 0x07, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
252+GEN_SPE(speundef, evmhessfa, 0x11, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
253+GEN_SPE(speundef, evmhossfa, 0x13, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
254+GEN_SPE(evmheumia, evmhesmia, 0x14, 0x10, 0x00000000, 0x00000000, PPC_SPE);
255+GEN_SPE(speundef, evmhesmfa, 0x15, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
256+GEN_SPE(evmhoumia, evmhosmia, 0x16, 0x10, 0x00000000, 0x00000000, PPC_SPE);
257+GEN_SPE(speundef, evmhosmfa, 0x17, 0x10, 0xFFFFFFFF, 0x00000000, PPC_SPE);
258+
259+GEN_SPE(speundef, evmwhssf, 0x03, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
260+GEN_SPE(evmwlumi, speundef, 0x04, 0x11, 0x00000000, 0xFFFFFFFF, PPC_SPE);
261+GEN_SPE(evmwhumi, evmwhsmi, 0x06, 0x11, 0x00000000, 0x00000000, PPC_SPE);
262+GEN_SPE(speundef, evmwhsmf, 0x07, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
263+GEN_SPE(speundef, evmwssf, 0x09, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
264+GEN_SPE(speundef, evmwsmf, 0x0D, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
265+GEN_SPE(speundef, evmwhssfa, 0x13, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
266+GEN_SPE(evmwlumia, speundef, 0x14, 0x11, 0x00000000, 0xFFFFFFFF, PPC_SPE);
267+GEN_SPE(evmwhumia, evmwhsmia, 0x16, 0x11, 0x00000000, 0x00000000, PPC_SPE);
268+GEN_SPE(speundef, evmwhsmfa, 0x17, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
269+GEN_SPE(speundef, evmwssfa, 0x19, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
270+GEN_SPE(speundef, evmwsmfa, 0x1D, 0x11, 0xFFFFFFFF, 0x00000000, PPC_SPE);
271+
272+GEN_SPE(evadduiaaw, evaddsiaaw, 0x00, 0x13, 0x0000F800, 0x0000F800, PPC_SPE);
273+GEN_SPE(evsubfusiaaw, evsubfssiaaw, 0x01, 0x13, 0x0000F800, 0x0000F800, PPC_SPE);
274+GEN_SPE(evaddumiaaw, evaddsmiaaw, 0x04, 0x13, 0x0000F800, 0x0000F800, PPC_SPE);
275+GEN_SPE(evsubfumiaaw, evsubfsmiaaw, 0x05, 0x13, 0x0000F800, 0x0000F800, PPC_SPE);
276+GEN_SPE(evdivws, evdivwu, 0x06, 0x13, 0x00000000, 0x00000000, PPC_SPE);
277+
278+GEN_SPE(evmheusiaaw, evmhessiaaw, 0x00, 0x14, 0x00000000, 0x00000000, PPC_SPE);
279+GEN_SPE(speundef, evmhessfaaw, 0x01, 0x14, 0xFFFFFFFF, 0x00000000, PPC_SPE);
280+GEN_SPE(evmhousiaaw, evmhossiaaw, 0x02, 0x14, 0x00000000, 0x00000000, PPC_SPE);
281+GEN_SPE(speundef, evmhossfaaw, 0x03, 0x14, 0xFFFFFFFF, 0x00000000, PPC_SPE);
282+GEN_SPE(evmheumiaaw, evmhesmiaaw, 0x04, 0x14, 0x00000000, 0x00000000, PPC_SPE);
283+GEN_SPE(speundef, evmhesmfaaw, 0x05, 0x14, 0xFFFFFFFF, 0x00000000, PPC_SPE);
284+GEN_SPE(evmhoumiaaw, evmhosmiaaw, 0x06, 0x14, 0x00000000, 0x00000000, PPC_SPE);
285+GEN_SPE(speundef, evmhosmfaaw, 0x07, 0x14, 0xFFFFFFFF, 0x00000000, PPC_SPE);
286+GEN_SPE(evmhegumiaa, evmhegsmiaa, 0x14, 0x14, 0x00000000, 0x00000000, PPC_SPE);
287+GEN_SPE(speundef, evmhegsmfaa, 0x15, 0x14, 0xFFFFFFFF, 0x00000000, PPC_SPE);
288+GEN_SPE(evmhogumiaa, evmhogsmiaa, 0x16, 0x14, 0x00000000, 0x00000000, PPC_SPE);
289+GEN_SPE(speundef, evmhogsmfaa, 0x17, 0x14, 0xFFFFFFFF, 0x00000000, PPC_SPE);
290+
291+GEN_SPE(evmwlusiaaw, evmwlssiaaw, 0x00, 0x15, 0x00000000, 0x00000000, PPC_SPE);
292+GEN_SPE(evmwlumiaaw, evmwlsmiaaw, 0x04, 0x15, 0x00000000, 0x00000000, PPC_SPE);
293+GEN_SPE(speundef, evmwssfaa, 0x09, 0x15, 0xFFFFFFFF, 0x00000000, PPC_SPE);
294+GEN_SPE(speundef, evmwsmfaa, 0x0D, 0x15, 0xFFFFFFFF, 0x00000000, PPC_SPE);
295+
296+GEN_SPE(evmheusianw, evmhessianw, 0x00, 0x16, 0x00000000, 0x00000000, PPC_SPE);
297+GEN_SPE(speundef, evmhessfanw, 0x01, 0x16, 0xFFFFFFFF, 0x00000000, PPC_SPE);
298+GEN_SPE(evmhousianw, evmhossianw, 0x02, 0x16, 0x00000000, 0x00000000, PPC_SPE);
299+GEN_SPE(speundef, evmhossfanw, 0x03, 0x16, 0xFFFFFFFF, 0x00000000, PPC_SPE);
300+GEN_SPE(evmheumianw, evmhesmianw, 0x04, 0x16, 0x00000000, 0x00000000, PPC_SPE);
301+GEN_SPE(speundef, evmhesmfanw, 0x05, 0x16, 0xFFFFFFFF, 0x00000000, PPC_SPE);
302+GEN_SPE(evmhoumianw, evmhosmianw, 0x06, 0x16, 0x00000000, 0x00000000, PPC_SPE);
303+GEN_SPE(speundef, evmhosmfanw, 0x07, 0x16, 0xFFFFFFFF, 0x00000000, PPC_SPE);
304+GEN_SPE(evmhegumian, evmhegsmian, 0x14, 0x16, 0x00000000, 0x00000000, PPC_SPE);
305+GEN_SPE(speundef, evmhegsmfan, 0x15, 0x16, 0xFFFFFFFF, 0x00000000, PPC_SPE);
306+GEN_SPE(evmhigumian, evmhigsmian, 0x16, 0x16, 0x00000000, 0x00000000, PPC_SPE);
307+GEN_SPE(speundef, evmhogsmfan, 0x17, 0x16, 0xFFFFFFFF, 0x00000000, PPC_SPE);
308+
309+GEN_SPE(evmwlusianw, evmwlssianw, 0x00, 0x17, 0x00000000, 0x00000000, PPC_SPE);
310+GEN_SPE(evmwlumianw, evmwlsmianw, 0x04, 0x17, 0x00000000, 0x00000000, PPC_SPE);
311+GEN_SPE(speundef, evmwssfan, 0x09, 0x17, 0xFFFFFFFF, 0x00000000, PPC_SPE);
312+GEN_SPE(evmwumian, evmwsmian, 0x0C, 0x17, 0x00000000, 0x00000000, PPC_SPE);
313+GEN_SPE(speundef, evmwsmfan, 0x0D, 0x17, 0xFFFFFFFF, 0x00000000, PPC_SPE);
314 #endif
315
316 /*** SPE floating-point extension ***/
317@@ -8110,20 +8144,20 @@
318 GEN_SPEFPUOP_COMP_64(evfststeq);
319
320 /* Opcodes definitions */
321-GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, PPC_SPE_SINGLE); //
322-GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, PPC_SPE_SINGLE); //
323-GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, PPC_SPE_SINGLE); //
324-GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, PPC_SPE_SINGLE); //
325-GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, PPC_SPE_SINGLE); //
326-GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, PPC_SPE_SINGLE); //
327-GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, PPC_SPE_SINGLE); //
328-GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, PPC_SPE_SINGLE); //
329-GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, PPC_SPE_SINGLE); //
330-GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, PPC_SPE_SINGLE); //
331-GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, PPC_SPE_SINGLE); //
332-GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, PPC_SPE_SINGLE); //
333-GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, PPC_SPE_SINGLE); //
334-GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, PPC_SPE_SINGLE); //
335+GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, 0x00000000, PPC_SPE_SINGLE); //
336+GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, 0x0000F800, PPC_SPE_SINGLE); //
337+GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, 0xFFFFFFFF, PPC_SPE_SINGLE); //
338+GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, 0x00000000, PPC_SPE_SINGLE); //
339+GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, 0x00600000, PPC_SPE_SINGLE); //
340+GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
341+GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
342+GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
343+GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
344+GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
345+GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
346+GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
347+GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, 0x00600000, PPC_SPE_SINGLE); //
348+GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
349
350 /* Single precision floating-point operations */
351 /* Arithmetic */
352@@ -8178,20 +8212,20 @@
353 GEN_SPEFPUOP_COMP_32(efststeq);
354
355 /* Opcodes definitions */
356-GEN_SPE(efsadd, efssub, 0x00, 0x0B, 0x00000000, PPC_SPE_SINGLE); //
357-GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, PPC_SPE_SINGLE); //
358-GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, PPC_SPE_SINGLE); //
359-GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, PPC_SPE_SINGLE); //
360-GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, PPC_SPE_SINGLE); //
361-GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, PPC_SPE_SINGLE); //
362-GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, PPC_SPE_SINGLE); //
363-GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, PPC_SPE_SINGLE); //
364-GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, PPC_SPE_SINGLE); //
365-GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, PPC_SPE_SINGLE); //
366-GEN_SPE(efsctuiz, speundef, 0x0C, 0x0B, 0x00180000, PPC_SPE_SINGLE); //
367-GEN_SPE(efsctsiz, speundef, 0x0D, 0x0B, 0x00180000, PPC_SPE_SINGLE); //
368-GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, PPC_SPE_SINGLE); //
369-GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, PPC_SPE_SINGLE); //
370+GEN_SPE(efsadd, efssub, 0x00, 0x0B, 0x00000000, 0x00000000, PPC_SPE_SINGLE); //
371+GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, 0x0000F800, PPC_SPE_SINGLE); //
372+GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, 0xFFFFFFFF, PPC_SPE_SINGLE); //
373+GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, 0x00000000, PPC_SPE_SINGLE); //
374+GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, 0x00600000, PPC_SPE_SINGLE); //
375+GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, 0x00180000, PPC_SPE_SINGLE); //
376+GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
377+GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
378+GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
379+GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE); //
380+GEN_SPE(efsctuiz, speundef, 0x0C, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
381+GEN_SPE(efsctsiz, speundef, 0x0D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
382+GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_SINGLE); //
383+GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE); //
384
385 /* Double precision floating-point operations */
386 /* Arithmetic */
387@@ -8265,22 +8299,22 @@
388 GEN_SPEFPUOP_COMP_64(efdtsteq);
389
390 /* Opcodes definitions */
391-GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, PPC_SPE_DOUBLE); //
392-GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
393-GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, PPC_SPE_DOUBLE); //
394-GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, PPC_SPE_DOUBLE); //
395-GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, PPC_SPE_DOUBLE); //
396-GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
397-GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, PPC_SPE_DOUBLE); //
398-GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, PPC_SPE_DOUBLE); //
399-GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
400-GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
401-GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
402-GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
403-GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
404-GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, PPC_SPE_DOUBLE); //
405-GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, PPC_SPE_DOUBLE); //
406-GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, PPC_SPE_DOUBLE); //
407+GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, 0x00000000, PPC_SPE_DOUBLE); //
408+GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE); //
409+GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, 0x0000F800, PPC_SPE_DOUBLE); //
410+GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, 0xFFFFFFFF, PPC_SPE_DOUBLE); //
411+GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, 0x00000000, PPC_SPE_DOUBLE); //
412+GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE); //
413+GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE); //
414+GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE); //
415+GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE); //
416+GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE); //
417+GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE); //
418+GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE); //
419+GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE); //
420+GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE); //
421+GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE); //
422+GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_DOUBLE); //
423
424 static opcode_t opcodes[] = {
425 GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE),
426@@ -9049,84 +9083,84 @@
427 GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23),
428
429 #undef GEN_SPE
430-#define GEN_SPE(name0, name1, opc2, opc3, inval, type) \
431-GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type)
432-GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, PPC_SPE),
433-GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, PPC_SPE),
434-GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, PPC_SPE),
435-GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, PPC_SPE),
436-GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, PPC_SPE),
437-GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, PPC_SPE),
438-GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, PPC_SPE),
439-GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x00000000, PPC_SPE),
440-GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, PPC_SPE),
441-GEN_SPE(speundef, evand, 0x08, 0x08, 0x00000000, PPC_SPE),
442-GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, PPC_SPE),
443-GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, PPC_SPE),
444-GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, PPC_SPE),
445-GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE),
446-GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE),
447-GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE),
448-GEN_SPE(speundef, evorc, 0x0D, 0x08, 0x00000000, PPC_SPE),
449-GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, PPC_SPE),
450-GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, PPC_SPE),
451-GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, PPC_SPE),
452-GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, PPC_SPE),
453-GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, PPC_SPE),
454-GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, PPC_SPE),
455-GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, PPC_SPE),
456-GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, PPC_SPE),
457-GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, PPC_SPE),
458-GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, PPC_SPE),
459-GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, PPC_SPE),
460-GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, PPC_SPE),
461-
462-GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, PPC_SPE_SINGLE),
463-GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, PPC_SPE_SINGLE),
464-GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, PPC_SPE_SINGLE),
465-GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, PPC_SPE_SINGLE),
466-GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, PPC_SPE_SINGLE),
467-GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, PPC_SPE_SINGLE),
468-GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, PPC_SPE_SINGLE),
469-GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, PPC_SPE_SINGLE),
470-GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, PPC_SPE_SINGLE),
471-GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, PPC_SPE_SINGLE),
472-GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, PPC_SPE_SINGLE),
473-GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, PPC_SPE_SINGLE),
474-GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, PPC_SPE_SINGLE),
475-GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, PPC_SPE_SINGLE),
476-
477-GEN_SPE(efsadd, efssub, 0x00, 0x0B, 0x00000000, PPC_SPE_SINGLE),
478-GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, PPC_SPE_SINGLE),
479-GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, PPC_SPE_SINGLE),
480-GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, PPC_SPE_SINGLE),
481-GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, PPC_SPE_SINGLE),
482-GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, PPC_SPE_SINGLE),
483-GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, PPC_SPE_SINGLE),
484-GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, PPC_SPE_SINGLE),
485-GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, PPC_SPE_SINGLE),
486-GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, PPC_SPE_SINGLE),
487-GEN_SPE(efsctuiz, speundef, 0x0C, 0x0B, 0x00180000, PPC_SPE_SINGLE),
488-GEN_SPE(efsctsiz, speundef, 0x0D, 0x0B, 0x00180000, PPC_SPE_SINGLE),
489-GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, PPC_SPE_SINGLE),
490-GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, PPC_SPE_SINGLE),
491-
492-GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, PPC_SPE_DOUBLE),
493-GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
494-GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, PPC_SPE_DOUBLE),
495-GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, PPC_SPE_DOUBLE),
496-GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, PPC_SPE_DOUBLE),
497-GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
498-GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, PPC_SPE_DOUBLE),
499-GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, PPC_SPE_DOUBLE),
500-GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
501-GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
502-GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
503-GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
504-GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
505-GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, PPC_SPE_DOUBLE),
506-GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, PPC_SPE_DOUBLE),
507-GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, PPC_SPE_DOUBLE),
508+#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
509+ GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)
510+GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
511+GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
512+GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
513+GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
514+GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, 0x0000F800, PPC_SPE),
515+GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, 0x0000F800, PPC_SPE),
516+GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, 0x0000F800, PPC_SPE),
517+GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x0000F800, 0x00000000, PPC_SPE),
518+GEN_SPE(evmra, speundef, 0x02, 0x13, 0x0000F800, 0xFFFFFFFF, PPC_SPE),
519+GEN_SPE(speundef, evand, 0x08, 0x08, 0xFFFFFFFF, 0x00000000, PPC_SPE),
520+GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
521+GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, 0x00000000, PPC_SPE),
522+GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, 0x00000000, PPC_SPE),
523+GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, 0x00000000, PPC_SPE),
524+GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, 0x00000000, PPC_SPE),
525+GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, 0x00000000, PPC_SPE),
526+GEN_SPE(speundef, evorc, 0x0D, 0x08, 0xFFFFFFFF, 0x00000000, PPC_SPE),
527+GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
528+GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, 0x00000000, PPC_SPE),
529+GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, 0x00000000, PPC_SPE),
530+GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
531+GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE),
532+GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, 0x0000F800, PPC_SPE),
533+GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, 0x0000F800, PPC_SPE),
534+GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, 0x00000000, PPC_SPE),
535+GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, 0x00000000, PPC_SPE),
536+GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, 0x00600000, PPC_SPE),
537+GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, 0x00600000, PPC_SPE),
538+GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, 0xFFFFFFFF, PPC_SPE),
539+
540+GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
541+GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, 0x0000F800, PPC_SPE_SINGLE),
542+GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, 0xFFFFFFFF, PPC_SPE_SINGLE),
543+GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
544+GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
545+GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE),
546+GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
547+GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
548+GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
549+GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
550+GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
551+GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
552+GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
553+GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE),
554+
555+GEN_SPE(efsadd, efssub, 0x00, 0x0B, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
556+GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, 0x0000F800, PPC_SPE_SINGLE),
557+GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, 0xFFFFFFFF, PPC_SPE_SINGLE),
558+GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, 0x00000000, PPC_SPE_SINGLE),
559+GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
560+GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, 0x00180000, PPC_SPE_SINGLE),
561+GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
562+GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
563+GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
564+GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, 0x00180000, PPC_SPE_SINGLE),
565+GEN_SPE(efsctuiz, speundef, 0x0C, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
566+GEN_SPE(efsctsiz, speundef, 0x0D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_SINGLE),
567+GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_SINGLE),
568+GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_SINGLE),
569+
570+GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, 0x00000000, PPC_SPE_DOUBLE),
571+GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
572+GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, 0x0000F800, PPC_SPE_DOUBLE),
573+GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, 0xFFFFFFFF, PPC_SPE_DOUBLE),
574+GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, 0x00000000, PPC_SPE_DOUBLE),
575+GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
576+GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE),
577+GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE),
578+GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
579+GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
580+GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
581+GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, 0x00180000, PPC_SPE_DOUBLE),
582+GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE),
583+GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, 0xFFFFFFFF, PPC_SPE_DOUBLE),
584+GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, 0x00600000, PPC_SPE_DOUBLE),
585+GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, 0xFFFFFFFF, PPC_SPE_DOUBLE),
586
587 #undef GEN_SPEOP_LDST
588 #define GEN_SPEOP_LDST(name, opc2, sh) \
589@@ -9456,11 +9490,19 @@
590 opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
591 }
592 } else {
593- if (unlikely((ctx.opcode & handler->inval) != 0)) {
594+ uint32_t inval;
595+
596+ if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE) && Rc(ctx.opcode))) {
597+ inval = handler->inval2;
598+ } else {
599+ inval = handler->inval1;
600+ }
601+
602+ if (unlikely((ctx.opcode & inval) != 0)) {
603 if (qemu_log_enabled()) {
604 qemu_log("invalid bits: %08x for opcode: "
605 "%02x - %02x - %02x (%08x) " TARGET_FMT_lx "\n",
606- ctx.opcode & handler->inval, opc1(ctx.opcode),
607+ ctx.opcode & inval, opc1(ctx.opcode),
608 opc2(ctx.opcode), opc3(ctx.opcode),
609 ctx.opcode, ctx.nip - 4);
610 }
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/arm-bgr.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/arm-bgr.patch
index a8fe65a1ea..f3ebde6364 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/arm-bgr.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/arm-bgr.patch
@@ -11,20 +11,20 @@ RP 16/9/2011
11 11
12Upstream-Status: Pending 12Upstream-Status: Pending
13 13
14Index: qemu-0.14.0/hw/pl110.c 14Index: qemu-1.2.0/hw/pl110.c
15=================================================================== 15===================================================================
16--- qemu-0.14.0.orig/hw/pl110.c 2011-09-16 14:45:34.228668514 +0100 16--- qemu-1.2.0.orig/hw/pl110.c 2012-09-06 14:07:27.619821133 -0700
17+++ qemu-0.14.0/hw/pl110.c 2011-09-16 15:17:22.458671206 +0100 17+++ qemu-1.2.0/hw/pl110.c 2012-09-06 14:12:07.699829648 -0700
18@@ -141,7 +141,11 @@ 18@@ -168,7 +168,11 @@
19 fprintf(stderr, "pl110: Bad color depth\n"); 19 fprintf(stderr, "pl110: Bad color depth\n");
20 exit(1); 20 exit(1);
21 } 21 }
22- if (s->cr & PL110_CR_BGR) 22- if (s->cr & PL110_CR_BGR)
23+ 23+
24+ if (s->versatile && s->bpp == BPP_16) 24+ if (s->version && s->bpp == BPP_16)
25+ /* Code assumes BPP_16 == 565 and BGR is never set on the versatile in 565 mode */ 25+ /* Code assumes BPP_16 == 565 and BGR is never set on the versatile in 565 mode */
26+ bpp_offset = 0; 26+ bpp_offset = 0;
27+ else if (s->cr & PL110_CR_BGR) 27+ else if (s->cr & PL110_CR_BGR)
28 bpp_offset = 0; 28 bpp_offset = 0;
29 else 29 else
30 bpp_offset = 18; 30 bpp_offset = 24;
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/enable-i386-linux-user.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/enable-i386-linux-user.patch
index bb0d6a3848..bb0d6a3848 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/enable-i386-linux-user.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/enable-i386-linux-user.patch
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/fallback-to-safe-mmap_min_addr.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/fallback-to-safe-mmap_min_addr.patch
index 2075386b9f..2075386b9f 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/fallback-to-safe-mmap_min_addr.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/fallback-to-safe-mmap_min_addr.patch
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/fix-configure-checks.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/fix-configure-checks.patch
index 96881bb91b..ef77c92842 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/fix-configure-checks.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/fix-configure-checks.patch
@@ -8,15 +8,15 @@ Patch from Paul Eggleton, Comments by RP 28/11/10
8 8
9Upstream-Status: Inappropriate [embedded specific] 9Upstream-Status: Inappropriate [embedded specific]
10 10
11Index: qemu-0.14.0/configure 11Index: qemu-1.2.0/configure
12=================================================================== 12===================================================================
13--- qemu-0.14.0.orig/configure 13--- qemu-1.2.0.orig/configure 2012-09-05 07:03:06.000000000 -0700
14+++ qemu-0.14.0/configure 14+++ qemu-1.2.0/configure 2012-09-06 13:55:07.007793823 -0700
15@@ -229,6 +229,7 @@ QEMU_CFLAGS="-Wstrict-prototypes -Wredun 15@@ -281,6 +281,7 @@
16 QEMU_CFLAGS="-Wstrict-prototypes -Wredundant-decls $QEMU_CFLAGS"
16 QEMU_CFLAGS="-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE $QEMU_CFLAGS" 17 QEMU_CFLAGS="-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE $QEMU_CFLAGS"
17 QEMU_CFLAGS="-D_FORTIFY_SOURCE=2 $QEMU_CFLAGS" 18 QEMU_INCLUDES="-I. -I\$(SRC_PATH) -I\$(SRC_PATH)/fpu"
18 QEMU_INCLUDES="-I. -I\$(SRC_PATH)"
19+QEMU_CFLAGS="$QEMU_CFLAGS $CFLAGS" 19+QEMU_CFLAGS="$QEMU_CFLAGS $CFLAGS"
20 LDFLAGS="-g $LDFLAGS" 20 if test "$debug_info" = "yes"; then
21 21 CFLAGS="-g $CFLAGS"
22 # make source path absolute 22 LDFLAGS="-g $LDFLAGS"
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/init-info.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/init-info.patch
index 2250444a2b..2250444a2b 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/init-info.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/init-info.patch
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/larger_default_ram_size.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/larger_default_ram_size.patch
index 711c36071d..711c36071d 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/larger_default_ram_size.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/larger_default_ram_size.patch
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/linker-flags.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/linker-flags.patch
index c0d1e5541d..0106ae2420 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/linker-flags.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/linker-flags.patch
@@ -10,14 +10,14 @@ JL - 15/06/10
10 10
11Upstream-Status: Inappropriate [configuration] 11Upstream-Status: Inappropriate [configuration]
12 12
13Index: qemu-0.14.0/Makefile.target 13Index: qemu-1.2.0/Makefile.target
14=================================================================== 14===================================================================
15--- qemu-0.14.0.orig/Makefile.target 15--- qemu-1.2.0.orig/Makefile.target 2012-09-05 07:03:06.000000000 -0700
16+++ qemu-0.14.0/Makefile.target 16+++ qemu-1.2.0/Makefile.target 2012-09-06 13:42:24.819764288 -0700
17@@ -218,7 +218,7 @@ obj-$(CONFIG_REALLY_VIRTFS) += virtio-9p 17@@ -130,7 +130,7 @@
18 obj-y += rwhandler.o 18 obj-$(CONFIG_HAVE_CORE_DUMP) += dump.o
19 obj-$(CONFIG_KVM) += kvm.o kvm-all.o 19 obj-$(CONFIG_NO_GET_MEMORY_MAPPING) += memory_mapping-stub.o
20 obj-$(CONFIG_NO_KVM) += kvm-stub.o 20 obj-$(CONFIG_NO_CORE_DUMP) += dump-stub.o
21-LIBS+=-lz 21-LIBS+=-lz
22+LIBS+=-lz -lX11 -ldl 22+LIBS+=-lz -lX11 -ldl
23 23
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/no-strip.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/no-strip.patch
index d6a4377cd0..d6a4377cd0 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/no-strip.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/no-strip.patch
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/powerpc_rom.bin b/meta/recipes-devtools/qemu/qemu-1.2.0/powerpc_rom.bin
index c4044296c5..c4044296c5 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/powerpc_rom.bin
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/powerpc_rom.bin
Binary files differ
diff --git a/meta/recipes-devtools/qemu/qemu-0.15.1/qemu-vmware-vga-depth.patch b/meta/recipes-devtools/qemu/qemu-1.2.0/qemu-vmware-vga-depth.patch
index c4c5424e16..a1b8035b70 100644
--- a/meta/recipes-devtools/qemu/qemu-0.15.1/qemu-vmware-vga-depth.patch
+++ b/meta/recipes-devtools/qemu/qemu-1.2.0/qemu-vmware-vga-depth.patch
@@ -4,11 +4,11 @@
4 4
5Upstream-Status: Pending 5Upstream-Status: Pending
6 6
7Index: qemu-0.14.0/console.h 7Index: qemu-1.2.0/console.h
8=================================================================== 8===================================================================
9--- qemu-0.14.0.orig/console.h 9--- qemu-1.2.0.orig/console.h 2012-09-06 14:12:23.371832381 -0700
10+++ qemu-0.14.0/console.h 10+++ qemu-1.2.0/console.h 2012-09-06 14:12:23.627832390 -0700
11@@ -171,6 +171,12 @@ struct DisplayAllocator { 11@@ -171,6 +171,12 @@
12 void (*free_displaysurface)(DisplaySurface *surface); 12 void (*free_displaysurface)(DisplaySurface *surface);
13 }; 13 };
14 14
@@ -21,7 +21,7 @@ Index: qemu-0.14.0/console.h
21 struct DisplayState { 21 struct DisplayState {
22 struct DisplaySurface *surface; 22 struct DisplaySurface *surface;
23 void *opaque; 23 void *opaque;
24@@ -178,6 +184,7 @@ struct DisplayState { 24@@ -178,6 +184,7 @@
25 25
26 struct DisplayAllocator* allocator; 26 struct DisplayAllocator* allocator;
27 struct DisplayChangeListener* listeners; 27 struct DisplayChangeListener* listeners;
@@ -29,7 +29,7 @@ Index: qemu-0.14.0/console.h
29 29
30 void (*mouse_set)(int x, int y, int on); 30 void (*mouse_set)(int x, int y, int on);
31 void (*cursor_define)(QEMUCursor *cursor); 31 void (*cursor_define)(QEMUCursor *cursor);
32@@ -229,6 +236,12 @@ static inline void register_displaychang 32@@ -233,6 +240,12 @@
33 ds->listeners = dcl; 33 ds->listeners = dcl;
34 } 34 }
35 35
@@ -42,47 +42,35 @@ Index: qemu-0.14.0/console.h
42 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) 42 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
43 { 43 {
44 struct DisplayChangeListener *dcl = s->listeners; 44 struct DisplayChangeListener *dcl = s->listeners;
45Index: qemu-0.14.0/hw/vmware_vga.c 45Index: qemu-1.2.0/hw/vmware_vga.c
46=================================================================== 46===================================================================
47--- qemu-0.14.0.orig/hw/vmware_vga.c 47--- qemu-1.2.0.orig/hw/vmware_vga.c 2012-09-06 14:12:23.371832381 -0700
48+++ qemu-0.14.0/hw/vmware_vga.c 48+++ qemu-1.2.0/hw/vmware_vga.c 2012-09-06 14:18:05.595845288 -0700
49@@ -1001,8 +1001,9 @@ static void vmsvga_update_display(void * 49@@ -1081,6 +1081,8 @@
50 } 50 static void vmsvga_init(struct vmsvga_state_s *s,
51 } 51 MemoryRegion *address_space, MemoryRegion *io)
52
53-static void vmsvga_reset(struct vmsvga_state_s *s)
54+static void vmsvga_reset(void *parm)
55 {
56+ struct vmsvga_state_s *s = (struct vmsvga_state_s *)parm;
57 s->index = 0;
58 s->enable = 0;
59 s->config = 0;
60@@ -1207,6 +1208,8 @@ static const VMStateDescription vmstate_
61
62 static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size)
63 { 52 {
64+ DisplayPostCallback *dpc; 53+ DisplayPostCallback *dpc;
65+ 54+
66 s->scratch_size = SVGA_SCRATCH_SIZE; 55 s->scratch_size = SVGA_SCRATCH_SIZE;
67 s->scratch = qemu_malloc(s->scratch_size * 4); 56 s->scratch = g_malloc(s->scratch_size * 4);
68 57
69@@ -1224,7 +1227,10 @@ static void vmsvga_init(struct vmsvga_st 58@@ -1098,6 +1100,10 @@
70 vga_init(&s->vga); 59 vga_common_init(&s->vga);
60 vga_init(&s->vga, address_space, io, true);
71 vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga); 61 vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
72 62+ dpc = g_malloc0(sizeof(DisplayPostCallback));
73- vmsvga_reset(s);
74+ dpc = qemu_mallocz(sizeof(DisplayPostCallback));
75+ dpc->postcall = vmsvga_reset; 63+ dpc->postcall = vmsvga_reset;
76+ dpc->parm = s; 64+ dpc->parm = s;
77+ register_displaypostcallback(s->vga.ds, dpc); 65+ register_displaypostcallback(s->vga.ds, dpc);
78 }
79 66
80 static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int region_num, 67 s->depth = ds_get_bits_per_pixel(s->vga.ds);
81Index: qemu-0.14.0/qemu-common.h 68 s->bypp = ds_get_bytes_per_pixel(s->vga.ds);
69Index: qemu-1.2.0/qemu-common.h
82=================================================================== 70===================================================================
83--- qemu-0.14.0.orig/qemu-common.h 71--- qemu-1.2.0.orig/qemu-common.h 2012-09-06 14:12:23.371832381 -0700
84+++ qemu-0.14.0/qemu-common.h 72+++ qemu-1.2.0/qemu-common.h 2012-09-06 14:12:23.643832391 -0700
85@@ -241,6 +241,7 @@ typedef struct DisplayState DisplayState 73@@ -250,6 +250,7 @@
86 typedef struct DisplayChangeListener DisplayChangeListener; 74 typedef struct DisplayChangeListener DisplayChangeListener;
87 typedef struct DisplaySurface DisplaySurface; 75 typedef struct DisplaySurface DisplaySurface;
88 typedef struct DisplayAllocator DisplayAllocator; 76 typedef struct DisplayAllocator DisplayAllocator;
@@ -90,19 +78,19 @@ Index: qemu-0.14.0/qemu-common.h
90 typedef struct PixelFormat PixelFormat; 78 typedef struct PixelFormat PixelFormat;
91 typedef struct TextConsole TextConsole; 79 typedef struct TextConsole TextConsole;
92 typedef TextConsole QEMUConsole; 80 typedef TextConsole QEMUConsole;
93Index: qemu-0.14.0/vl.c 81Index: qemu-1.2.0/vl.c
94=================================================================== 82===================================================================
95--- qemu-0.14.0.orig/vl.c 83--- qemu-1.2.0.orig/vl.c 2012-09-06 14:12:23.371832381 -0700
96+++ qemu-0.14.0/vl.c 84+++ qemu-1.2.0/vl.c 2012-09-06 14:17:32.635844142 -0700
97@@ -1920,6 +1920,7 @@ int main(int argc, char **argv, char **e 85@@ -2352,6 +2352,7 @@
98 char boot_devices[33] = "cad"; /* default to HD->floppy->CD-ROM */ 86 char boot_devices[33] = "cad"; /* default to HD->floppy->CD-ROM */
99 DisplayState *ds; 87 DisplayState *ds;
100 DisplayChangeListener *dcl; 88 DisplayChangeListener *dcl;
101+ DisplayPostCallback *dpc; 89+ DisplayPostCallback *dpc;
102 int cyls, heads, secs, translation; 90 int cyls, heads, secs, translation;
103 QemuOpts *hda_opts = NULL, *opts; 91 QemuOpts *hda_opts = NULL, *opts, *machine_opts;
104 QemuOptsList *olist; 92 QemuOptsList *olist;
105@@ -3101,6 +3102,13 @@ int main(int argc, char **argv, char **e 93@@ -3699,6 +3700,13 @@
106 94
107 /* display setup */ 95 /* display setup */
108 dpy_resize(ds); 96 dpy_resize(ds);
diff --git a/meta/recipes-devtools/qemu/qemu_0.15.1.bb b/meta/recipes-devtools/qemu/qemu_1.2.0.bb
index f4c86f0c63..55ac532535 100644
--- a/meta/recipes-devtools/qemu/qemu_0.15.1.bb
+++ b/meta/recipes-devtools/qemu/qemu_1.2.0.bb
@@ -3,13 +3,8 @@ require qemu.inc
3LIC_FILES_CHKSUM = "file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \ 3LIC_FILES_CHKSUM = "file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \
4 file://COPYING.LIB;endline=24;md5=c04def7ae38850e7d3ef548588159913" 4 file://COPYING.LIB;endline=24;md5=c04def7ae38850e7d3ef548588159913"
5 5
6PR = "r11"
7
8FILESPATH = "${FILE_DIRNAME}/qemu-${PV}"
9FILESDIR = "${WORKDIR}"
10
11SRC_URI = "\ 6SRC_URI = "\
12 http://wiki.qemu.org/download/qemu-${PV}.tar.gz \ 7 http://wiki.qemu.org/download/qemu-${PV}.tar.bz2 \
13 file://powerpc_rom.bin \ 8 file://powerpc_rom.bin \
14 file://no-strip.patch \ 9 file://no-strip.patch \
15 file://linker-flags.patch \ 10 file://linker-flags.patch \
@@ -18,16 +13,9 @@ SRC_URI = "\
18 file://fallback-to-safe-mmap_min_addr.patch \ 13 file://fallback-to-safe-mmap_min_addr.patch \
19 file://larger_default_ram_size.patch \ 14 file://larger_default_ram_size.patch \
20 file://arm-bgr.patch \ 15 file://arm-bgr.patch \
21 file://a4d1f142542935b90d2eb30f3aead4edcf455fe6.patch \
22 file://0001-ppc64-Fix-linker-script.patch \
23 file://ppc-s500-set-invalid-mask.patch \
24 file://hw-pl031-Actually-raise-interrupt-on-timer-expiry.patch \
25 " 16 "
26 17SRC_URI[md5sum] = "78eb1e984f4532aa9f2bdd3c127b5b61"
27SRC_URI[md5sum] = "34f17737baaf1b3495c89cd6d4a607ed" 18SRC_URI[sha256sum] = "c8b84420d9f4869397f84cad2dabd9a475b7723d619a924a873740353e9df936"
28SRC_URI[sha256sum] = "7705b14d9b8e4df4a0b1790980e618084261e8daef0672a1aa7a830a0f3db5ba"
29
30S = "${WORKDIR}/qemu-${PV}"
31 19
32do_configure_prepend_virtclass-nativesdk() { 20do_configure_prepend_virtclass-nativesdk() {
33 if [ "${@base_contains('DISTRO_FEATURES', 'x11', 'x11', '', d)}" = "" ] ; then 21 if [ "${@base_contains('DISTRO_FEATURES', 'x11', 'x11', '', d)}" = "" ] ; then
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-05-10 00:25:21 +0000