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authorKhem Raj <raj.khem@gmail.com>2018-12-17 11:40:04 -0800
committerRichard Purdie <richard.purdie@linuxfoundation.org>2018-12-18 16:19:34 +0000
commit195c763eff990cd6d45813ba56005bd3e5dda5ba (patch)
tree970ecffd93ba09ee375f836caa0d59db0c8224c6 /meta/recipes-core/libxcrypt/files
parentd59c162a3303a2b31f1df3680c25fdd86551eac4 (diff)
downloadpoky-195c763eff990cd6d45813ba56005bd3e5dda5ba.tar.gz
libxcrypt: Upgrade to 4.4.1 release
License-Update: New files added to existing list Add -Wno-error=missing-attributes to compiler flags, this helps in compiling with gcc 9.0, eventually, the code should be fixed Add a patch to fix x32 build (From OE-Core rev: 59be9254df9ffeda594b21af8be433564c898474) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-core/libxcrypt/files')
-rw-r--r--meta/recipes-core/libxcrypt/files/0001-Add-x32-specific-inline-asm.patch42
1 files changed, 42 insertions, 0 deletions
diff --git a/meta/recipes-core/libxcrypt/files/0001-Add-x32-specific-inline-asm.patch b/meta/recipes-core/libxcrypt/files/0001-Add-x32-specific-inline-asm.patch
new file mode 100644
index 0000000000..9e31b03561
--- /dev/null
+++ b/meta/recipes-core/libxcrypt/files/0001-Add-x32-specific-inline-asm.patch
@@ -0,0 +1,42 @@
1From 7d01f2acf6fde6341a68a91f9b343841cc424af7 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Mon, 17 Dec 2018 11:33:35 -0800
4Subject: [PATCH] Add x32 specific inline asm
5
6Upstream-Status: Pending [https://github.com/besser82/libxcrypt/issues/74#issuecomment-447966455]
7
8Signed-off-by: Khem Raj <raj.khem@gmail.com>
9---
10 alg-yescrypt-opt.c | 9 +++++++--
11 1 file changed, 7 insertions(+), 2 deletions(-)
12
13diff --git a/alg-yescrypt-opt.c b/alg-yescrypt-opt.c
14index 5dbd822..060caf4 100644
15--- a/alg-yescrypt-opt.c
16+++ b/alg-yescrypt-opt.c
17@@ -528,6 +528,11 @@ static volatile uint64_t Smask2var = Smask2;
18 #undef MAYBE_MEMORY_BARRIER
19 #define MAYBE_MEMORY_BARRIER \
20 __asm__("" : : : "memory");
21+#ifdef __ILP32__ /* x32 */
22+#define REGISTER_PREFIX "e"
23+#else
24+#define REGISTER_PREFIX "r"
25+#endif
26 #define PWXFORM_SIMD(X) { \
27 __m128i H; \
28 __asm__( \
29@@ -537,8 +542,8 @@ static volatile uint64_t Smask2var = Smask2;
30 "pmuludq %1, %0\n\t" \
31 "movl %%eax, %%ecx\n\t" \
32 "shrq $0x20, %%rax\n\t" \
33- "paddq (%3,%%rcx), %0\n\t" \
34- "pxor (%4,%%rax), %0\n\t" \
35+ "paddq (%3,%%" REGISTER_PREFIX "cx), %0\n\t" \
36+ "pxor (%4,%%" REGISTER_PREFIX "ax), %0\n\t" \
37 : "+x" (X), "=x" (H) \
38 : "d" (Smask2), "S" (S0), "D" (S1) \
39 : "cc", "ax", "cx"); \
40--
412.20.1
42