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author | Khem Raj <raj.khem@gmail.com> | 2015-03-18 02:05:06 +0000 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2015-08-16 22:40:53 +0100 |
commit | cb7368c110553dcb972480abc4a59b975677f7df (patch) | |
tree | 2ffd1b35c59f320e2141bc3016ca1777ffa4d412 /meta/recipes-core/glibc/glibc/eglibc-ppc8xx-cache-line-workaround.patch | |
parent | 0183d7c4067fdf171a4420477e965dca58f6d7d3 (diff) | |
download | poky-cb7368c110553dcb972480abc4a59b975677f7df.tar.gz |
glibc: Upgrade 2.21 -> 2.22
- git'ify the OE patches
- add_resource_h_to_wait_h.patch - dropped, we do not support that old
perf anymore
- mips-rld-map-check.patch - Dropped because binutils is fixed for it
see https://sourceware.org/ml/binutils/2011-12/msg00112.html
- initgroups_keys.patch - Folded into
0026-eglibc-Forward-port-eglibc-options-groups-support.patch
Change-Id: Ib8e731b212f52b8ff12e2180babbc19970fb1ef1
(From OE-Core rev: 6ea08396dbb628140fd3289fc9fb19df97914326)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-core/glibc/glibc/eglibc-ppc8xx-cache-line-workaround.patch')
-rw-r--r-- | meta/recipes-core/glibc/glibc/eglibc-ppc8xx-cache-line-workaround.patch | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/meta/recipes-core/glibc/glibc/eglibc-ppc8xx-cache-line-workaround.patch b/meta/recipes-core/glibc/glibc/eglibc-ppc8xx-cache-line-workaround.patch deleted file mode 100644 index bb83d6d36e..0000000000 --- a/meta/recipes-core/glibc/glibc/eglibc-ppc8xx-cache-line-workaround.patch +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | 2007-06-13 Nathan Sidwell <nathan@codesourcery.com> | ||
2 | Mark Shinwell <shinwell@codesourcery.com> | ||
3 | |||
4 | * sysdeps/unix/sysv/linux/powerpc/libc-start.c | ||
5 | (__libc_start_main): Detect 8xx parts and clear | ||
6 | __cache_line_size if detected. | ||
7 | * sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | ||
8 | (DL_PLATFORM_AUXV): Likewise. | ||
9 | |||
10 | Upstream-Status: Pending | ||
11 | |||
12 | Index: git/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | ||
13 | =================================================================== | ||
14 | --- git.orig/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c 2014-08-27 18:49:23.996070587 +0000 | ||
15 | +++ git/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c 2014-08-27 18:49:27.332070587 +0000 | ||
16 | @@ -24,9 +24,21 @@ | ||
17 | /* Scan the Aux Vector for the "Data Cache Block Size" entry. If found | ||
18 | verify that the static extern __cache_line_size is defined by checking | ||
19 | for not NULL. If it is defined then assign the cache block size | ||
20 | - value to __cache_line_size. */ | ||
21 | + value to __cache_line_size. This is used by memset to | ||
22 | + optimize setting to zero. We have to detect 8xx processors, which | ||
23 | + have buggy dcbz implementations that cannot report page faults | ||
24 | + correctly. That requires reading SPR, which is a privileged | ||
25 | + operation. Fortunately 2.2.18 and later emulates PowerPC mfspr | ||
26 | + reads from the PVR register. */ | ||
27 | #define DL_PLATFORM_AUXV \ | ||
28 | case AT_DCACHEBSIZE: \ | ||
29 | + if (__LINUX_KERNEL_VERSION >= 0x020218) \ | ||
30 | + { \ | ||
31 | + unsigned pvr = 0; \ | ||
32 | + asm ("mfspr %0, 287" : "=r" (pvr)); \ | ||
33 | + if ((pvr & 0xffff0000) == 0x00500000) \ | ||
34 | + break; \ | ||
35 | + } \ | ||
36 | __cache_line_size = av->a_un.a_val; \ | ||
37 | break; | ||
38 | |||
39 | Index: git/sysdeps/unix/sysv/linux/powerpc/libc-start.c | ||
40 | =================================================================== | ||
41 | --- git.orig/sysdeps/unix/sysv/linux/powerpc/libc-start.c 2014-08-27 18:49:23.996070587 +0000 | ||
42 | +++ git/sysdeps/unix/sysv/linux/powerpc/libc-start.c 2014-08-27 18:49:27.332070587 +0000 | ||
43 | @@ -68,11 +68,24 @@ | ||
44 | rtld_fini = NULL; | ||
45 | } | ||
46 | |||
47 | - /* Initialize the __cache_line_size variable from the aux vector. */ | ||
48 | + /* Initialize the __cache_line_size variable from the aux vector. | ||
49 | + This is used by memset to optimize setting to zero. We have to | ||
50 | + detect 8xx processors, which have buggy dcbz implementations that | ||
51 | + cannot report page faults correctly. That requires reading SPR, | ||
52 | + which is a privileged operation. Fortunately 2.2.18 and later | ||
53 | + emulates PowerPC mfspr reads from the PVR register. */ | ||
54 | for (ElfW (auxv_t) * av = auxvec; av->a_type != AT_NULL; ++av) | ||
55 | switch (av->a_type) | ||
56 | { | ||
57 | case AT_DCACHEBSIZE: | ||
58 | + if (__LINUX_KERNEL_VERSION >= 0x020218) | ||
59 | + { | ||
60 | + unsigned pvr = 0; | ||
61 | + | ||
62 | + asm ("mfspr %0, 287" : "=r" (pvr) :); | ||
63 | + if ((pvr & 0xffff0000) == 0x00500000) | ||
64 | + break; | ||
65 | + } | ||
66 | __cache_line_size = av->a_un.a_val; | ||
67 | break; | ||
68 | } | ||