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| author | Martin Jansa <martin.jansa@gmail.com> | 2013-04-24 15:42:12 +0200 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2013-04-29 14:45:06 +0100 |
| commit | 60589dd60ce0e088a2976b98ed8b914b26a83a03 (patch) | |
| tree | 77a67e8e4f61b80e17fa02a889e2965d2cf1f946 /meta/conf/machine/include/tune-ppce500v2.inc | |
| parent | 46b021c931684325e4e46712087756354d4459b4 (diff) | |
| download | poky-60589dd60ce0e088a2976b98ed8b914b26a83a03.tar.gz | |
conf/machine: use .= instead of += in TUNE_CCARGS
* number of TUNE_CCARGS conditionals is important if we add
extra space with each one in "else" branch
I'm building for 2 MACHINEs one is cortexa9, second is cortexa8
few months ago we added TUNE_CCARGS[vardepvalue] in bitbake.conf
http://git.openembedded.org/openembedded-core/commit/?id=03f1e34ea3ce80931e9c3cd2ab22824f28a7233b
which fixed some cases (like mentioned tune-xscale and tune-arm926ejs)
where both had unused TUNE_CCARGS when common DEFAULTTUNE was used.
with cortexa[89] it's different, because cortexa9 has one extra TUNE_CCARGS
TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "cortexa9", "-mtune=cortex-a9", "", d)}"
which adds extra *space* even when not used because of '+=' and as result:
$ bitbake-diffsigs tmp-eglibc/sstate-diff/1366797730/*/armv7*/adapterbase/*do_configure*
basehash changed from f986789fb8fb3579ed6a3492cc8a8d10 to c851b5f838d945ee13072e9ad6725dca
Variable TUNE_CCARGS value changed from
' -march=armv7-a -mthumb-interwork -mfloat-abi=softfp -mfpu=neon '
to
' -march=armv7-a -mthumb-interwork -mfloat-abi=softfp -mfpu=neon '
Hash for dependent task gcc-runtime_4.7.bb.do_populate_sysroot changed from bdeabf7a86958b9110b566344b7916de to 2be5618e6bc8c57ec9db5659bf217915
Hash for dependent task eglibc_2.17.bb.do_populate_sysroot changed from b4f40fc62dde684acd0a574532a55360 to 97fcb426603d4a1c1099c0504d2ebf7d
Hash for dependent task glib-2.0_2.34.3.bb.do_populate_sysroot changed from fd2f90b83098c34e88d649d70f6ea4f5 to ebd740bb94ea3eb0a914efda6fc82c4a
(From OE-Core rev: b7430ff83760ac29079d20dc7c62f498a0a9d55d)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/conf/machine/include/tune-ppce500v2.inc')
| -rw-r--r-- | meta/conf/machine/include/tune-ppce500v2.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/meta/conf/machine/include/tune-ppce500v2.inc b/meta/conf/machine/include/tune-ppce500v2.inc index 3fe47da584..d014d70a6e 100644 --- a/meta/conf/machine/include/tune-ppce500v2.inc +++ b/meta/conf/machine/include/tune-ppce500v2.inc | |||
| @@ -3,10 +3,10 @@ DEFAULTTUNE ?= "ppce500v2" | |||
| 3 | require conf/machine/include/powerpc/arch-powerpc.inc | 3 | require conf/machine/include/powerpc/arch-powerpc.inc |
| 4 | 4 | ||
| 5 | TUNEVALID[ppce500v2] = "Enable ppce500v2 specific processor optimizations" | 5 | TUNEVALID[ppce500v2] = "Enable ppce500v2 specific processor optimizations" |
| 6 | TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "ppce500v2", "-mcpu=8548", "", d)}" | 6 | TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce500v2", " -mcpu=8548", "", d)}" |
| 7 | 7 | ||
| 8 | TUNEVALID[spe] = "Enable SPE ABI extensions" | 8 | TUNEVALID[spe] = "Enable SPE ABI extensions" |
| 9 | TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500v2", "spe" ], "-mabi=spe -mspe -mfloat-gprs=double", "", d)}" | 9 | TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500v2", "spe" ], " -mabi=spe -mspe -mfloat-gprs=double", "", d)}" |
| 10 | TARGET_FPU .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500v2" , "spe" ], "ppc-efd", "", d)}" | 10 | TARGET_FPU .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500v2" , "spe" ], "ppc-efd", "", d)}" |
| 11 | 11 | ||
| 12 | # spe is defined potentially in two places, so we want to be sure it will | 12 | # spe is defined potentially in two places, so we want to be sure it will |