arch-arm*: add better support for gcc march extensions

GCC has the ability to pass extensions to the march parameter, which
expand the funcationality of the march.  For example
"-march=armv7ve+simd" adds SIMD to ARMv7.  Currently, there is no way to
expand the march setting without modifying each instance, as you can't
guarantee the ordering when using the existing TUNE_CCARGS.  By
introducing two new variables, TUNE_CCARGS_MARCH and
TUNE_CCARGS_MARCH_OPT, we can enforce that these two go together.

Also, expand existing and create new feature files that use these
variables to expand the functionality.

(From OE-Core rev: 794eb617bfd1997e7a3498812c63a20c58a10554)

Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>

1 files changed, 5 insertions, 0 deletions

diff --git a/meta/conf/machine/include/arm/feature-arm-neon.inc b/meta/conf/machine/include/arm/feature-arm-neon.inc
index eaddd054ce..174b9b9f2a 100644
--- a/meta/conf/machine/include/arm/feature-arm-neon.inc
+++ b/meta/conf/machine/include/arm/feature-arm-neon.inc
@@ -19,3 +19,8 @@ TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', [ 'vfpv4', 'neon' ],
 
 TUNEVALID[vfpv4d16] = "Enable Vector Floating Point Version 4 with 16 registers (vfpv4-d16) unit."
 TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfpv4d16', ' vfpv4-d16', '', d)}"
+
+TUNEVALID[vfpv5spd16] = "Enable Vector Floating Point Version 5, Single Precision. with 16 registers (fpv5-sp-d16) unit."
+TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfpv5spd16', 'fpv5-sp-d16', '', d)}"
+
+TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', [ 'vfpv3d16', 'vfpv5spd16' ], '+fp', '', d)}"