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author | Pgowda <pgowda.cve@gmail.com> | 2021-12-20 22:00:46 -0800 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2022-01-14 09:34:04 +0000 |
commit | a0681701f8b5a8a2dc87302fee324e8390187604 (patch) | |
tree | 6d60ce47b3018a51577e5640f34b84cd23573e02 | |
parent | 38103229305e6575a96d350dee8fc13113b370d1 (diff) | |
download | poky-a0681701f8b5a8a2dc87302fee324e8390187604.tar.gz |
gcc: add support for Neoverse N2 CPU
This patch backports the AArch32 support for Arm's Neoverse N2 CPU.
Upstream-Status: Backport
[https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=d7e8411f6a333d4054894ad3b23f23415a525230]
(From OE-Core rev: 2f5f021dc576b2fcf38c8203992ee86d25f53f30)
Signed-off-by: pgowda <pgowda.cve@gmail.com>
Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
-rw-r--r-- | meta/recipes-devtools/gcc/gcc-10.2.inc | 1 | ||||
-rw-r--r-- | meta/recipes-devtools/gcc/gcc/0038-arm-neoverse-n2-support.patch | 88 |
2 files changed, 89 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-10.2.inc b/meta/recipes-devtools/gcc/gcc-10.2.inc index 656c43258c..e7e3395c55 100644 --- a/meta/recipes-devtools/gcc/gcc-10.2.inc +++ b/meta/recipes-devtools/gcc/gcc-10.2.inc | |||
@@ -74,6 +74,7 @@ SRC_URI = "\ | |||
74 | file://0002-CVE-2021-35465.patch \ | 74 | file://0002-CVE-2021-35465.patch \ |
75 | file://0003-CVE-2021-35465.patch \ | 75 | file://0003-CVE-2021-35465.patch \ |
76 | file://0004-CVE-2021-35465.patch \ | 76 | file://0004-CVE-2021-35465.patch \ |
77 | file://0038-arm-neoverse-n2-support.patch \ | ||
77 | file://0039-arm64-neoverse-n2-support.patch \ | 78 | file://0039-arm64-neoverse-n2-support.patch \ |
78 | file://0001-CVE-2021-42574.patch \ | 79 | file://0001-CVE-2021-42574.patch \ |
79 | file://0002-CVE-2021-42574.patch \ | 80 | file://0002-CVE-2021-42574.patch \ |
diff --git a/meta/recipes-devtools/gcc/gcc/0038-arm-neoverse-n2-support.patch b/meta/recipes-devtools/gcc/gcc/0038-arm-neoverse-n2-support.patch new file mode 100644 index 0000000000..3e42266b81 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0038-arm-neoverse-n2-support.patch | |||
@@ -0,0 +1,88 @@ | |||
1 | From d7e8411f6a333d4054894ad3b23f23415a525230 Mon Sep 17 00:00:00 2001 | ||
2 | From: Alex Coplan <alex.coplan@arm.com> | ||
3 | Date: Fri, 2 Oct 2020 16:06:15 +0100 | ||
4 | Subject: [PATCH] arm: Add support for Neoverse N2 CPU | ||
5 | |||
6 | This patch backports the AArch32 support for Arm's Neoverse N2 CPU to | ||
7 | GCC 10. | ||
8 | |||
9 | gcc/ChangeLog: | ||
10 | |||
11 | * config/arm/arm-cpus.in (neoverse-n2): New. | ||
12 | * config/arm/arm-tables.opt: Regenerate. | ||
13 | * config/arm/arm-tune.md: Regenerate. | ||
14 | * doc/invoke.texi: Document support for Neoverse N2. | ||
15 | |||
16 | Upstream-Status: Backport [https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=d7e8411f6a333d4054894ad3b23f23415a525230] | ||
17 | |||
18 | Signed-off-by: pgowda <pgowda.cve@gmail.com> | ||
19 | --- | ||
20 | gcc/config/arm/arm-cpus.in | 12 ++++++++++++ | ||
21 | gcc/config/arm/arm-tables.opt | 3 +++ | ||
22 | gcc/config/arm/arm-tune.md | 5 +++-- | ||
23 | gcc/doc/invoke.texi | 6 +++--- | ||
24 | 4 files changed, 21 insertions(+), 5 deletions(-) | ||
25 | |||
26 | diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in | ||
27 | --- a/gcc/config/arm/arm-cpus.in 2021-12-20 20:24:59.912159845 -0800 | ||
28 | +++ b/gcc/config/arm/arm-cpus.in 2021-12-20 21:00:04.417003845 -0800 | ||
29 | @@ -1481,6 +1481,18 @@ begin cpu cortex-a76.cortex-a55 | ||
30 | costs cortex_a57 | ||
31 | end cpu cortex-a76.cortex-a55 | ||
32 | |||
33 | +# Armv8.5 A-profile Architecture Processors | ||
34 | +begin cpu neoverse-n2 | ||
35 | + cname neoversen2 | ||
36 | + tune for cortex-a57 | ||
37 | + tune flags LDSCHED | ||
38 | + architecture armv8.5-a+fp16+bf16+i8mm | ||
39 | + option crypto add FP_ARMv8 CRYPTO | ||
40 | + costs cortex_a57 | ||
41 | + vendor 41 | ||
42 | + part 0xd49 | ||
43 | +end cpu neoverse-n2 | ||
44 | + | ||
45 | # V8 M-profile implementations. | ||
46 | begin cpu cortex-m23 | ||
47 | cname cortexm23 | ||
48 | diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt | ||
49 | --- a/gcc/config/arm/arm-tables.opt 2020-07-22 23:35:54.688795958 -0700 | ||
50 | +++ b/gcc/config/arm/arm-tables.opt 2021-12-20 21:00:04.421003776 -0800 | ||
51 | @@ -253,6 +253,9 @@ EnumValue | ||
52 | Enum(processor_type) String(cortex-m23) Value( TARGET_CPU_cortexm23) | ||
53 | |||
54 | EnumValue | ||
55 | +Enum(processor_type) String(neoverse-n2) Value( TARGET_CPU_neoversen2) | ||
56 | + | ||
57 | +EnumValue | ||
58 | Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33) | ||
59 | |||
60 | EnumValue | ||
61 | diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md | ||
62 | --- a/gcc/config/arm/arm-tune.md 2020-07-22 23:35:54.684795913 -0700 | ||
63 | +++ b/gcc/config/arm/arm-tune.md 2021-12-20 21:02:44.630260284 -0800 | ||
64 | @@ -46,6 +46,6 @@ | ||
65 | cortexa73cortexa53,cortexa55,cortexa75, | ||
66 | cortexa76,cortexa76ae,cortexa77, | ||
67 | neoversen1,cortexa75cortexa55,cortexa76cortexa55, | ||
68 | - cortexm23,cortexm33,cortexm35p, | ||
69 | - cortexm55,cortexr52" | ||
70 | + neoversen2,cortexm23,cortexm33, | ||
71 | + cortexm35p,cortexm55,cortexr52" | ||
72 | (const (symbol_ref "((enum attr_tune) arm_tune)"))) | ||
73 | diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi | ||
74 | --- a/gcc/doc/invoke.texi 2021-12-20 20:24:59.916159782 -0800 | ||
75 | +++ b/gcc/doc/invoke.texi 2021-12-20 21:03:41.337290704 -0800 | ||
76 | @@ -18857,9 +18857,9 @@ Permissible names are: @samp{arm7tdmi}, | ||
77 | @samp{cortex-m35p}, @samp{cortex-m55}, | ||
78 | @samp{cortex-m1.small-multiply}, @samp{cortex-m0.small-multiply}, | ||
79 | @samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, @samp{marvell-pj4}, | ||
80 | -@samp{neoverse-n1}, @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, | ||
81 | -@samp{ep9312}, @samp{fa526}, @samp{fa626}, @samp{fa606te}, @samp{fa626te}, | ||
82 | -@samp{fmp626}, @samp{fa726te}, @samp{xgene1}. | ||
83 | +@samp{neoverse-n1}, @samp{neoverse-n2}, @samp{xscale}, @samp{iwmmxt}, | ||
84 | +@samp{iwmmxt2}, @samp{ep9312}, @samp{fa526}, @samp{fa626}, @samp{fa606te}, | ||
85 | +@samp{fa626te}, @samp{fmp626}, @samp{fa726te}, @samp{xgene1}. | ||
86 | |||
87 | Additionally, this option can specify that GCC should tune the performance | ||
88 | of the code for a big.LITTLE system. Permissible names are: | ||