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From 843b73643718b0776462bce6aba6b2c6fdb33d85 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 28 Nov 2018 14:00:29 +0530
Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
It was adjusting only lower 16bits.
---
bfd/elf32-microblaze.c | 4 ++--
bfd/elf64-microblaze.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
index 035e71f311..2d8c062a42 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd,
sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
efix = calc_fixup (target_address, 0, sec);
irel->r_addend -= (efix - sfix);
- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
- + INST_WORD_SIZE, irel->r_addend);
+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
+ irel->r_addend);
}
break;
}
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
index 184b7d560d..ef6a87062b 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
@@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd,
sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
efix = calc_fixup (target_address, 0, sec);
irel->r_addend -= (efix - sfix);
- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
- + INST_WORD_SIZE, irel->r_addend);
+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
+ irel->r_addend);
}
break;
}
--
2.17.1
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