diff options
Diffstat (limited to 'recipes-devtools/gcc')
13 files changed, 0 insertions, 1001 deletions
diff --git a/recipes-devtools/gcc/files/0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch b/recipes-devtools/gcc/files/0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch deleted file mode 100644 index d6549cad..00000000 --- a/recipes-devtools/gcc/files/0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch +++ /dev/null | |||
@@ -1,158 +0,0 @@ | |||
1 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> | ||
2 | Subject: [PATCH 1/8] [Patch, microblaze]: Enable DWARF exception handling | ||
3 | support. | ||
4 | |||
5 | Changelog | ||
6 | |||
7 | 2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com> | ||
8 | David Holsgrove <david.holsgrove@xilinx.com> | ||
9 | |||
10 | * common/config/microblaze/microblaze-common.c: Remove | ||
11 | TARGET_EXCEPT_UNWIND_INFO definition. | ||
12 | * config/microblaze/microblaze-protos.h: Add | ||
13 | microblaze_eh_return prototype. | ||
14 | * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register, | ||
15 | microblaze_expand_epilogue, microblaze_return_addr): Handle | ||
16 | calls_eh_return | ||
17 | (microblaze_eh_return): New function. | ||
18 | * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET, | ||
19 | EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX, | ||
20 | ASM_PREFERRED_EH_DATA_FORMAT | ||
21 | * gcc/config/microblaze/microblaze.md: Define eh_return pattern. | ||
22 | |||
23 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
24 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | ||
25 | Upstream-Status: Pending | ||
26 | |||
27 | diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c | ||
28 | index 07a71fb..6c25a76 100644 | ||
29 | --- a/gcc/common/config/microblaze/microblaze-common.c | ||
30 | +++ b/gcc/common/config/microblaze/microblaze-common.c | ||
31 | @@ -37,7 +37,4 @@ static const struct default_options microblaze_option_optimization_table[] = | ||
32 | #undef TARGET_OPTION_OPTIMIZATION_TABLE | ||
33 | #define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table | ||
34 | |||
35 | -#undef TARGET_EXCEPT_UNWIND_INFO | ||
36 | -#define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info | ||
37 | - | ||
38 | struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; | ||
39 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h | ||
40 | index 34be76f..201390b 100644 | ||
41 | --- a/gcc/config/microblaze/microblaze-protos.h | ||
42 | +++ b/gcc/config/microblaze/microblaze-protos.h | ||
43 | @@ -54,6 +54,7 @@ extern bool microblaze_tls_referenced_p (rtx); | ||
44 | extern int symbol_mentioned_p (rtx); | ||
45 | extern int label_mentioned_p (rtx); | ||
46 | extern bool microblaze_cannot_force_const_mem (enum machine_mode, rtx); | ||
47 | +extern void microblaze_eh_return (rtx op0); | ||
48 | #endif /* RTX_CODE */ | ||
49 | |||
50 | /* Declare functions in microblaze-c.c. */ | ||
51 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
52 | index c121c2b..5f4bc60 100644 | ||
53 | --- a/gcc/config/microblaze/microblaze.c | ||
54 | +++ b/gcc/config/microblaze/microblaze.c | ||
55 | @@ -1896,6 +1896,11 @@ microblaze_must_save_register (int regno) | ||
56 | if (frame_pointer_needed && (regno == HARD_FRAME_POINTER_REGNUM)) | ||
57 | return 1; | ||
58 | |||
59 | + if (crtl->calls_eh_return | ||
60 | + && regno == MB_ABI_SUB_RETURN_ADDR_REGNUM) { | ||
61 | + return 1; | ||
62 | + } | ||
63 | + | ||
64 | if (!crtl->is_leaf) | ||
65 | { | ||
66 | if (regno == MB_ABI_SUB_RETURN_ADDR_REGNUM) | ||
67 | @@ -1923,6 +1928,13 @@ microblaze_must_save_register (int regno) | ||
68 | return 1; | ||
69 | } | ||
70 | |||
71 | + if (crtl->calls_eh_return | ||
72 | + && (regno == EH_RETURN_DATA_REGNO (0) | ||
73 | + || regno == EH_RETURN_DATA_REGNO (1))) | ||
74 | + { | ||
75 | + return 1; | ||
76 | + } | ||
77 | + | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | @@ -2939,6 +2951,12 @@ microblaze_expand_epilogue (void) | ||
82 | emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx)); | ||
83 | } | ||
84 | |||
85 | + if (crtl->calls_eh_return) | ||
86 | + emit_insn (gen_addsi3 (stack_pointer_rtx, | ||
87 | + stack_pointer_rtx, | ||
88 | + gen_rtx_raw_REG (SImode, | ||
89 | + MB_EH_STACKADJ_REGNUM))); | ||
90 | + | ||
91 | emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST + | ||
92 | MB_ABI_SUB_RETURN_ADDR_REGNUM))); | ||
93 | } | ||
94 | @@ -3166,10 +3184,13 @@ microblaze_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) | ||
95 | if (count != 0) | ||
96 | return NULL_RTX; | ||
97 | |||
98 | - return gen_rtx_PLUS (Pmode, | ||
99 | - get_hard_reg_initial_val (Pmode, | ||
100 | - MB_ABI_SUB_RETURN_ADDR_REGNUM), | ||
101 | - GEN_INT (8)); | ||
102 | + return get_hard_reg_initial_val (Pmode, | ||
103 | + MB_ABI_SUB_RETURN_ADDR_REGNUM); | ||
104 | +} | ||
105 | + | ||
106 | +void microblaze_eh_return (rtx op0) | ||
107 | +{ | ||
108 | + emit_insn (gen_movsi(gen_rtx_MEM(Pmode, stack_pointer_rtx), op0)); | ||
109 | } | ||
110 | |||
111 | /* Queue an .ident string in the queue of top-level asm statements. | ||
112 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
113 | index bc4d9a1..074b78e 100644 | ||
114 | --- a/gcc/config/microblaze/microblaze.h | ||
115 | +++ b/gcc/config/microblaze/microblaze.h | ||
116 | @@ -184,6 +184,21 @@ extern enum pipeline_type microblaze_pipe; | ||
117 | #define INCOMING_RETURN_ADDR_RTX \ | ||
118 | gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM) | ||
119 | |||
120 | +/* Specifies the offset from INCOMING_RETURN_ADDR_RTX and the actual return PC. */ | ||
121 | +#define RETURN_ADDR_OFFSET (8) | ||
122 | + | ||
123 | +/* Describe how we implement __builtin_eh_return. */ | ||
124 | +#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? MB_ABI_FIRST_ARG_REGNUM + (N) : INVALID_REGNUM) | ||
125 | + | ||
126 | +#define MB_EH_STACKADJ_REGNUM MB_ABI_INT_RETURN_VAL2_REGNUM | ||
127 | +#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, MB_EH_STACKADJ_REGNUM) | ||
128 | + | ||
129 | +/* Select a format to encode pointers in exception handling data. CODE | ||
130 | + is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is | ||
131 | + true if the symbol may be affected by dynamic relocations. */ | ||
132 | +#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ | ||
133 | + ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr) | ||
134 | + | ||
135 | /* Use DWARF 2 debugging information by default. */ | ||
136 | #define DWARF2_DEBUGGING_INFO | ||
137 | #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG | ||
138 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
139 | index 3618cad..4e7fe3b 100644 | ||
140 | --- a/gcc/config/microblaze/microblaze.md | ||
141 | +++ b/gcc/config/microblaze/microblaze.md | ||
142 | @@ -2221,3 +2221,13 @@ | ||
143 | [(set_attr "type" "arith") | ||
144 | (set_attr "mode" "SI") | ||
145 | (set_attr "length" "4")]) | ||
146 | + | ||
147 | +; This is used in compiling the unwind routines. | ||
148 | +(define_expand "eh_return" | ||
149 | + [(use (match_operand 0 "general_operand" ""))] | ||
150 | + "" | ||
151 | + " | ||
152 | +{ | ||
153 | + microblaze_eh_return(operands[0]); | ||
154 | + DONE; | ||
155 | +}") | ||
156 | -- | ||
157 | 1.7.5.4 | ||
158 | |||
diff --git a/recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch b/recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch deleted file mode 100644 index aefa13b0..00000000 --- a/recipes-devtools/gcc/files/0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch +++ /dev/null | |||
@@ -1,157 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH 2/8] [Patch, microblaze]: Add 4 byte implementation for | ||
3 | atomic builtin | ||
4 | |||
5 | By providing this initial atomic implementation, gcc is able to generate the other atomic | ||
6 | builtins by using a __sync_compare_and_swap loop | ||
7 | |||
8 | Add __sync_lock_test_and_set 4 byte atomic builtin | ||
9 | |||
10 | Changelog | ||
11 | |||
12 | 2013-03-18 David Holsgrove <david.holsgrove@xilinx.com> | ||
13 | |||
14 | * gcc/config/microblaze/sync.md: New file. | ||
15 | * gcc/config/microblaze/microblaze.md: Add UNSPEC_SYNC_CAS, | ||
16 | UNSPEC_SYNC_XCHG and include sync.md. | ||
17 | * gcc/config/microblaze/microblaze.c: Add print_operand 'y'. | ||
18 | * gcc/config/microblaze/constraints.md: Add memory_contraint | ||
19 | 'Q' which is a single register. | ||
20 | |||
21 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
22 | Upstream-Status: Pending | ||
23 | |||
24 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md | ||
25 | index c6fbc98..c9c1649 100644 | ||
26 | --- a/gcc/config/microblaze/constraints.md | ||
27 | +++ b/gcc/config/microblaze/constraints.md | ||
28 | @@ -70,3 +70,8 @@ | ||
29 | "Double word operand." | ||
30 | (and (match_code "mem") | ||
31 | (match_test "double_memory_operand (op, GET_MODE (op))"))) | ||
32 | + | ||
33 | +(define_memory_constraint "Q" | ||
34 | + "Memory operand which is a single register." | ||
35 | + (and (match_code "mem") | ||
36 | + (match_test "GET_CODE ( XEXP (op, 0)) == REG"))) | ||
37 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
38 | index 5f4bc60..1562e60 100644 | ||
39 | --- a/gcc/config/microblaze/microblaze.c | ||
40 | +++ b/gcc/config/microblaze/microblaze.c | ||
41 | @@ -2130,6 +2130,7 @@ microblaze_initial_elimination_offset (int from, int to) | ||
42 | 't' print 't' for EQ, 'f' for NE | ||
43 | 'm' Print 1<<operand. | ||
44 | 'i' Print 'i' if MEM operand has immediate value | ||
45 | + 'y' Print 'y' if MEM operand is single register | ||
46 | 'o' Print operand address+4 | ||
47 | '?' Print 'd' if we use a branch with delay slot instead of normal branch. | ||
48 | 'h' Print high word of const_double (int or float) value as hex | ||
49 | @@ -2300,6 +2301,15 @@ print_operand (FILE * file, rtx op, int letter) | ||
50 | rtx op4 = adjust_address (op, GET_MODE (op), 4); | ||
51 | output_address (XEXP (op4, 0)); | ||
52 | } | ||
53 | + else if (letter == 'y') | ||
54 | + { | ||
55 | + rtx mem_reg = XEXP (op, 0); | ||
56 | + if (GET_CODE (mem_reg) == REG) | ||
57 | + { | ||
58 | + register int regnum = REGNO (mem_reg); | ||
59 | + fprintf (file, "%s", reg_names[regnum]); | ||
60 | + } | ||
61 | + } | ||
62 | else | ||
63 | output_address (XEXP (op, 0)); | ||
64 | |||
65 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
66 | index 4e7fe3b..55cc730 100644 | ||
67 | --- a/gcc/config/microblaze/microblaze.md | ||
68 | +++ b/gcc/config/microblaze/microblaze.md | ||
69 | @@ -41,6 +41,8 @@ | ||
70 | (UNSPEC_CMP 104) ;; signed compare | ||
71 | (UNSPEC_CMPU 105) ;; unsigned compare | ||
72 | (UNSPEC_TLS 106) ;; jump table | ||
73 | + (UNSPEC_SYNC_CAS 107) ;; Represent atomic compare swap. | ||
74 | + (UNSPEC_SYNC_XCHG 108) ;; Represent atomic exchange. | ||
75 | ]) | ||
76 | |||
77 | |||
78 | @@ -2231,3 +2233,5 @@ | ||
79 | microblaze_eh_return(operands[0]); | ||
80 | DONE; | ||
81 | }") | ||
82 | + | ||
83 | +(include "sync.md") | ||
84 | diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md | ||
85 | new file mode 100644 | ||
86 | index 0000000..0923825 | ||
87 | --- /dev/null | ||
88 | +++ b/gcc/config/microblaze/sync.md | ||
89 | @@ -0,0 +1,65 @@ | ||
90 | +;; Machine description for Xilinx MicroBlaze synchronization instructions. | ||
91 | +;; Copyright (C) 2011, 2012 | ||
92 | +;; Free Software Foundation, Inc. | ||
93 | +;; | ||
94 | +;; This file is part of GCC. | ||
95 | +;; | ||
96 | +;; GCC is free software; you can redistribute it and/or modify | ||
97 | +;; it under the terms of the GNU General Public License as published by | ||
98 | +;; the Free Software Foundation; either version 3, or (at your option) | ||
99 | +;; any later version. | ||
100 | +;; | ||
101 | +;; GCC is distributed in the hope that it will be useful, | ||
102 | +;; but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
103 | +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
104 | +;; GNU General Public License for more details. | ||
105 | +;; | ||
106 | +;; You should have received a copy of the GNU General Public License | ||
107 | +;; along with GCC; see the file COPYING3. If not see | ||
108 | +;; <http://www.gnu.org/licenses/>. | ||
109 | + | ||
110 | + | ||
111 | +(define_insn "sync_compare_and_swapsi" | ||
112 | + [(set (match_operand:SI 0 "register_operand" "=&d") ;; retval | ||
113 | + (match_operand:SI 1 "nonimmediate_operand" "+Q")) ;; mem | ||
114 | + (set (match_dup 1) | ||
115 | + (unspec | ||
116 | + [(match_operand:SI 2 "register_operand" "d") ;; oldval | ||
117 | + (match_operand:SI 3 "register_operand" "d")] ;; newval | ||
118 | + UNSPEC_SYNC_CAS)) | ||
119 | + (clobber (match_scratch:SI 4 "=&d"))] ;; scratch | ||
120 | + "" | ||
121 | + { | ||
122 | + output_asm_insn ("addc \tr0,r0,r0", operands); | ||
123 | + output_asm_insn ("lwx \t%0,%y1,r0", operands); | ||
124 | + output_asm_insn ("addic\t%4,r0,0", operands); | ||
125 | + output_asm_insn ("bnei \t%4,.-8", operands); | ||
126 | + output_asm_insn ("cmp \t%4,%0,%2", operands); | ||
127 | + output_asm_insn ("bnei \t%4,.+16", operands); | ||
128 | + output_asm_insn ("swx \t%3,%y1,r0", operands); | ||
129 | + output_asm_insn ("addic\t%4,r0,0", operands); | ||
130 | + output_asm_insn ("bnei \t%4,.-28", operands); | ||
131 | + return ""; | ||
132 | + } | ||
133 | +) | ||
134 | + | ||
135 | +(define_insn "sync_test_and_setsi" | ||
136 | + [(set (match_operand:SI 0 "register_operand" "=&d") ;; retval | ||
137 | + (match_operand:SI 1 "nonimmediate_operand" "+Q")) ;; mem | ||
138 | + (set (match_dup 1) | ||
139 | + (unspec | ||
140 | + [(match_operand:SI 2 "register_operand" "d")] ;; value | ||
141 | + UNSPEC_SYNC_XCHG)) | ||
142 | + (clobber (match_scratch:SI 3 "=&d"))] ;; scratch | ||
143 | + "" | ||
144 | + { | ||
145 | + output_asm_insn ("addc \tr0,r0,r0", operands); | ||
146 | + output_asm_insn ("lwx \t%0,%y1,r0", operands); | ||
147 | + output_asm_insn ("addic\t%3,r0,0", operands); | ||
148 | + output_asm_insn ("bnei \t%3,.-8", operands); | ||
149 | + output_asm_insn ("swx \t%2,%y1,r0", operands); | ||
150 | + output_asm_insn ("addic\t%3,r0,0", operands); | ||
151 | + output_asm_insn ("bnei \t%3,.-20", operands); | ||
152 | + return ""; | ||
153 | + } | ||
154 | +) | ||
155 | -- | ||
156 | 1.7.5.4 | ||
157 | |||
diff --git a/recipes-devtools/gcc/files/0003-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch b/recipes-devtools/gcc/files/0003-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch deleted file mode 100644 index 998dfa03..00000000 --- a/recipes-devtools/gcc/files/0003-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH 3/8] [Patch, microblaze]: Extend jump insn to accept bri to | ||
3 | SYMBOL_REFS | ||
4 | |||
5 | Current insn checks if operand is a REG - if so, uses br | ||
6 | else it bri to %l0 - using a label_ref print operand | ||
7 | |||
8 | Check if operand is a SYMBOL_REF, and if so, use %0 | ||
9 | |||
10 | Changelog | ||
11 | |||
12 | 2013-03-18 David Holsgrove <david.holsgrove@xilinx.com> | ||
13 | |||
14 | * gcc/config/microblaze/microblaze.md (jump): | ||
15 | Account for jumps to SYMBOL_REFs. | ||
16 | |||
17 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
18 | Upstream-Status: Pending | ||
19 | |||
20 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
21 | index 55cc730..49d8f01 100644 | ||
22 | --- a/gcc/config/microblaze/microblaze.md | ||
23 | +++ b/gcc/config/microblaze/microblaze.md | ||
24 | @@ -1729,6 +1729,8 @@ | ||
25 | { | ||
26 | if (GET_CODE (operands[0]) == REG) | ||
27 | return "br%?\t%0"; | ||
28 | + else if (GET_CODE (operands[0]) == SYMBOL_REF) | ||
29 | + return "bri%?\t%0"; | ||
30 | else | ||
31 | return "bri%?\t%l0"; | ||
32 | } | ||
33 | -- | ||
34 | 1.7.5.4 | ||
35 | |||
diff --git a/recipes-devtools/gcc/files/0005-Patch-microblaze-Add-fstack-usage-support.patch b/recipes-devtools/gcc/files/0005-Patch-microblaze-Add-fstack-usage-support.patch deleted file mode 100644 index ee3cb9db..00000000 --- a/recipes-devtools/gcc/files/0005-Patch-microblaze-Add-fstack-usage-support.patch +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH 5/8] [Patch, microblaze]: Add -fstack-usage support | ||
3 | |||
4 | Changelog | ||
5 | |||
6 | 2013-03-18 David Holsgrove <david.holsgrove@xilinx.com> | ||
7 | |||
8 | * gcc/config/microblaze/microblaze.c (microblaze_expand_prologue): | ||
9 | Add check for flag_stack_usage to enable -fstack-usage support | ||
10 | |||
11 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
12 | Upstream-Status: Pending | ||
13 | |||
14 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
15 | index 7418e49..4417289 100644 | ||
16 | --- a/gcc/config/microblaze/microblaze.c | ||
17 | +++ b/gcc/config/microblaze/microblaze.c | ||
18 | @@ -2790,6 +2790,9 @@ microblaze_expand_prologue (void) | ||
19 | |||
20 | fsiz = compute_frame_size (get_frame_size ()); | ||
21 | |||
22 | + if (flag_stack_usage) | ||
23 | + current_function_static_stack_size = fsiz; | ||
24 | + | ||
25 | /* If this function is a varargs function, store any registers that | ||
26 | would normally hold arguments ($5 - $10) on the stack. */ | ||
27 | if (((TYPE_ARG_TYPES (fntype) != 0 | ||
28 | -- | ||
29 | 1.7.5.4 | ||
30 | |||
diff --git a/recipes-devtools/gcc/files/0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch b/recipes-devtools/gcc/files/0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch deleted file mode 100644 index 923756a5..00000000 --- a/recipes-devtools/gcc/files/0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> | ||
2 | Subject: [PATCH 6/8] [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED | ||
3 | |||
4 | MicroBlaze doesn't have restrictions that would force us to | ||
5 | reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. | ||
6 | Fixes an ICE when compiling OpenSSL for linux. | ||
7 | |||
8 | Changelog | ||
9 | |||
10 | 2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com> | ||
11 | |||
12 | * gcc/config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED | ||
13 | definition. | ||
14 | |||
15 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> | ||
16 | Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@xilinx.com> | ||
17 | Upstream-Status: Pending | ||
18 | |||
19 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
20 | index 074b78e..add69e8 100644 | ||
21 | --- a/gcc/config/microblaze/microblaze.h | ||
22 | +++ b/gcc/config/microblaze/microblaze.h | ||
23 | @@ -422,9 +422,6 @@ extern enum reg_class microblaze_regno_to_class[]; | ||
24 | || GET_MODE (X) == VOIDmode) \ | ||
25 | ? (GR_REGS) : (CLASS)))) | ||
26 | |||
27 | -#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ | ||
28 | - (GET_MODE_CLASS (MODE) == MODE_INT) | ||
29 | - | ||
30 | /* Stack layout; function entry, exit and calling. */ | ||
31 | |||
32 | #define STACK_GROWS_DOWNWARD | ||
33 | -- | ||
34 | 1.7.5.4 | ||
35 | |||
diff --git a/recipes-devtools/gcc/files/0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch b/recipes-devtools/gcc/files/0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch deleted file mode 100644 index 33aee3a7..00000000 --- a/recipes-devtools/gcc/files/0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH 7/8] [Patch, microblaze]: Add SIZE_TYPE and PTRDIFF_TYPE to | ||
3 | microblaze.h | ||
4 | |||
5 | Fixes warnings like; | ||
6 | |||
7 | warning: format '%zX' expects argument of type 'size_t', | ||
8 | but argument 3 has type 'unsigned int' [-Wformat] | ||
9 | |||
10 | Changelog | ||
11 | |||
12 | 2013-03-18 David Holsgrove <david.holsgrove@xilinx.com> | ||
13 | |||
14 | * gcc/config/microblaze/microblaze.h: Define SIZE_TYPE | ||
15 | and PTRDIFF_TYPE. | ||
16 | |||
17 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
18 | Upstream-Status: Pending | ||
19 | |||
20 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
21 | index add69e8..367e986 100644 | ||
22 | --- a/gcc/config/microblaze/microblaze.h | ||
23 | +++ b/gcc/config/microblaze/microblaze.h | ||
24 | @@ -228,6 +228,12 @@ extern enum pipeline_type microblaze_pipe; | ||
25 | #define STRICT_ALIGNMENT 1 | ||
26 | #define PCC_BITFIELD_TYPE_MATTERS 1 | ||
27 | |||
28 | +#undef SIZE_TYPE | ||
29 | +#define SIZE_TYPE "unsigned int" | ||
30 | + | ||
31 | +#undef PTRDIFF_TYPE | ||
32 | +#define PTRDIFF_TYPE "int" | ||
33 | + | ||
34 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | ||
35 | ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ | ||
36 | && (ALIGN) < BITS_PER_WORD \ | ||
37 | -- | ||
38 | 1.7.5.4 | ||
39 | |||
diff --git a/recipes-devtools/gcc/files/0008-Patch-microblaze-Add-branch_compare-instruction.patch b/recipes-devtools/gcc/files/0008-Patch-microblaze-Add-branch_compare-instruction.patch deleted file mode 100644 index 4da74f3f..00000000 --- a/recipes-devtools/gcc/files/0008-Patch-microblaze-Add-branch_compare-instruction.patch +++ /dev/null | |||
@@ -1,224 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH 8/8] [Patch, microblaze]: Add branch_compare instruction | ||
3 | |||
4 | To facilitate optimization pass understanding of the conditional | ||
5 | branch for microblaze, remove the UNSPEC'd signed_compare / | ||
6 | unsigned_compare instructions, and replace with a complete | ||
7 | branch_compare which will output_asm_insn the correct cmp/cmpu | ||
8 | depending on comparison code and signed / unsigned. | ||
9 | |||
10 | We then return the correct branch instruction. | ||
11 | |||
12 | cbranchsi now calls an expanded microblaze_expand_conditional_branch | ||
13 | function which will carry out compare against zero, compare EQ/NE, | ||
14 | and all other compares appropriately. | ||
15 | |||
16 | -funroll-loops optimization pass can now proceed | ||
17 | |||
18 | Changelog | ||
19 | |||
20 | 2013-03-19 David Holsgrove <david.holsgrove@xilinx.com> | ||
21 | |||
22 | * gcc/config/microblaze/predicates.md: Add cmp_op predicate. | ||
23 | * gcc/config/microblaze/microblaze.md: Add branch_compare | ||
24 | instruction which uses cmp_op predicate and emits cmp insn | ||
25 | before branch. | ||
26 | * gcc/config/microblaze/microblaze.c | ||
27 | (microblaze_emit_compare): Rename to | ||
28 | microblaze_expand_conditional_branch and consolidate logic. | ||
29 | (microblaze_expand_conditional_branch): emit branch_compare | ||
30 | insn instead of handling cmp op separate from branch insn. | ||
31 | |||
32 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
33 | Upstream-Status: Pending | ||
34 | |||
35 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
36 | index 4417289..84b58bf 100644 | ||
37 | --- a/gcc/config/microblaze/microblaze.c | ||
38 | +++ b/gcc/config/microblaze/microblaze.c | ||
39 | @@ -3336,65 +3336,45 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) | ||
40 | emit_move_insn (mem, fnaddr); | ||
41 | } | ||
42 | |||
43 | -/* Emit instruction to perform compare. | ||
44 | - cmp is (compare_op op0 op1). */ | ||
45 | -static rtx | ||
46 | -microblaze_emit_compare (enum machine_mode mode, rtx cmp, enum rtx_code *cmp_code) | ||
47 | +/* Generate conditional branch -- first, generate test condition, | ||
48 | + second, generate correct branch instruction. */ | ||
49 | + | ||
50 | +void | ||
51 | +microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[]) | ||
52 | { | ||
53 | - rtx cmp_op0 = XEXP (cmp, 0); | ||
54 | - rtx cmp_op1 = XEXP (cmp, 1); | ||
55 | + enum rtx_code code = GET_CODE (operands[0]); | ||
56 | + rtx cmp_op0 = operands[1]; | ||
57 | + rtx cmp_op1 = operands[2]; | ||
58 | + rtx label1 = operands[3]; | ||
59 | rtx comp_reg = gen_reg_rtx (SImode); | ||
60 | - enum rtx_code code = *cmp_code; | ||
61 | - | ||
62 | + rtx condition; | ||
63 | + | ||
64 | gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG)); | ||
65 | |||
66 | /* If comparing against zero, just test source reg. */ | ||
67 | - if (cmp_op1 == const0_rtx) | ||
68 | - return cmp_op0; | ||
69 | + if (cmp_op1 == const0_rtx) | ||
70 | + { | ||
71 | + comp_reg = cmp_op0; | ||
72 | + condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx); | ||
73 | + emit_jump_insn (gen_condjump (condition, label1)); | ||
74 | + } | ||
75 | |||
76 | - if (code == EQ || code == NE) | ||
77 | + else if (code == EQ || code == NE) | ||
78 | { | ||
79 | /* Use xor for equal/not-equal comparison. */ | ||
80 | emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1)); | ||
81 | + condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx); | ||
82 | + emit_jump_insn (gen_condjump (condition, label1)); | ||
83 | } | ||
84 | - else if (code == GT || code == GTU || code == LE || code == LEU) | ||
85 | - { | ||
86 | - /* MicroBlaze compare is not symmetrical. */ | ||
87 | - /* Swap argument order. */ | ||
88 | - cmp_op1 = force_reg (mode, cmp_op1); | ||
89 | - if (code == GT || code == LE) | ||
90 | - emit_insn (gen_signed_compare (comp_reg, cmp_op0, cmp_op1)); | ||
91 | - else | ||
92 | - emit_insn (gen_unsigned_compare (comp_reg, cmp_op0, cmp_op1)); | ||
93 | - /* Translate test condition. */ | ||
94 | - *cmp_code = swap_condition (code); | ||
95 | - } | ||
96 | - else /* if (code == GE || code == GEU || code == LT || code == LTU) */ | ||
97 | + else | ||
98 | { | ||
99 | + /* Generate compare and branch in single instruction. */ | ||
100 | cmp_op1 = force_reg (mode, cmp_op1); | ||
101 | - if (code == GE || code == LT) | ||
102 | - emit_insn (gen_signed_compare (comp_reg, cmp_op1, cmp_op0)); | ||
103 | - else | ||
104 | - emit_insn (gen_unsigned_compare (comp_reg, cmp_op1, cmp_op0)); | ||
105 | + condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1); | ||
106 | + emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1)); | ||
107 | } | ||
108 | - | ||
109 | - return comp_reg; | ||
110 | } | ||
111 | |||
112 | -/* Generate conditional branch -- first, generate test condition, | ||
113 | - second, generate correct branch instruction. */ | ||
114 | - | ||
115 | -void | ||
116 | -microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[]) | ||
117 | -{ | ||
118 | - enum rtx_code code = GET_CODE (operands[0]); | ||
119 | - rtx comp; | ||
120 | - rtx condition; | ||
121 | - | ||
122 | - comp = microblaze_emit_compare (mode, operands[0], &code); | ||
123 | - condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp, const0_rtx); | ||
124 | - emit_jump_insn (gen_condjump (condition, operands[3])); | ||
125 | -} | ||
126 | |||
127 | void | ||
128 | microblaze_expand_conditional_branch_sf (rtx operands[]) | ||
129 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
130 | index 49d8f01..9c1e1a3 100644 | ||
131 | --- a/gcc/config/microblaze/microblaze.md | ||
132 | +++ b/gcc/config/microblaze/microblaze.md | ||
133 | @@ -1624,28 +1624,6 @@ | ||
134 | (set_attr "length" "4")] | ||
135 | ) | ||
136 | |||
137 | -(define_insn "signed_compare" | ||
138 | - [(set (match_operand:SI 0 "register_operand" "=d") | ||
139 | - (unspec | ||
140 | - [(match_operand:SI 1 "register_operand" "d") | ||
141 | - (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMP))] | ||
142 | - "" | ||
143 | - "cmp\t%0,%1,%2" | ||
144 | - [(set_attr "type" "arith") | ||
145 | - (set_attr "mode" "SI") | ||
146 | - (set_attr "length" "4")]) | ||
147 | - | ||
148 | -(define_insn "unsigned_compare" | ||
149 | - [(set (match_operand:SI 0 "register_operand" "=d") | ||
150 | - (unspec | ||
151 | - [(match_operand:SI 1 "register_operand" "d") | ||
152 | - (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMPU))] | ||
153 | - "" | ||
154 | - "cmpu\t%0,%1,%2" | ||
155 | - [(set_attr "type" "arith") | ||
156 | - (set_attr "mode" "SI") | ||
157 | - (set_attr "length" "4")]) | ||
158 | - | ||
159 | ;;---------------------------------------------------------------- | ||
160 | ;; Setting a register from an floating point comparison. | ||
161 | ;;---------------------------------------------------------------- | ||
162 | @@ -1719,6 +1697,47 @@ | ||
163 | (set_attr "length" "4")] | ||
164 | ) | ||
165 | |||
166 | +(define_insn "branch_compare" | ||
167 | + [(set (pc) | ||
168 | + (if_then_else (match_operator:SI 0 "cmp_op" | ||
169 | + [(match_operand:SI 1 "register_operand" "d") | ||
170 | + (match_operand:SI 2 "register_operand" "d") | ||
171 | + ]) | ||
172 | + (label_ref (match_operand 3)) | ||
173 | + (pc))) | ||
174 | + (clobber(reg:SI R_TMP))] | ||
175 | + "" | ||
176 | + { | ||
177 | + operands[4] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); | ||
178 | + enum rtx_code code = GET_CODE (operands[0]); | ||
179 | + | ||
180 | + if (code == GT || code == LE) | ||
181 | + { | ||
182 | + output_asm_insn ("cmp\tr18,%z1,%z2", operands); | ||
183 | + code = swap_condition (code); | ||
184 | + } | ||
185 | + else if (code == GTU || code == LEU) | ||
186 | + { | ||
187 | + output_asm_insn ("cmpu\tr18,%z1,%z2", operands); | ||
188 | + code = swap_condition (code); | ||
189 | + } | ||
190 | + else if (code == GE || code == LT) | ||
191 | + { | ||
192 | + output_asm_insn ("cmp\tr18,%z2,%z1", operands); | ||
193 | + } | ||
194 | + else if (code == GEU || code == LTU) | ||
195 | + { | ||
196 | + output_asm_insn ("cmpu\tr18,%z2,%z1", operands); | ||
197 | + } | ||
198 | + | ||
199 | + operands[0] = gen_rtx_fmt_ee (signed_condition (code), SImode, operands[4], const0_rtx); | ||
200 | + return "b%C0i%?\tr18,%3"; | ||
201 | + } | ||
202 | + [(set_attr "type" "branch") | ||
203 | + (set_attr "mode" "none") | ||
204 | + (set_attr "length" "12")] | ||
205 | +) | ||
206 | + | ||
207 | ;;---------------------------------------------------------------- | ||
208 | ;; Unconditional branches | ||
209 | ;;---------------------------------------------------------------- | ||
210 | diff --git a/gcc/config/microblaze/predicates.md b/gcc/config/microblaze/predicates.md | ||
211 | index 5fd1bd4..2c23291 100644 | ||
212 | --- a/gcc/config/microblaze/predicates.md | ||
213 | +++ b/gcc/config/microblaze/predicates.md | ||
214 | @@ -119,3 +119,7 @@ | ||
215 | ;; Test for valid PIC call operand | ||
216 | (define_predicate "call_insn_plt_operand" | ||
217 | (match_test "PLT_ADDR_P (op)")) | ||
218 | + | ||
219 | +;; Return if the code of this rtx pattern is a comparison. | ||
220 | +(define_predicate "cmp_op" | ||
221 | + (match_code "gt,ge,gtu,geu,lt,le,ltu,leu")) | ||
222 | -- | ||
223 | 1.7.5.4 | ||
224 | |||
diff --git a/recipes-devtools/gcc/files/0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch b/recipes-devtools/gcc/files/0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch deleted file mode 100644 index efd127de..00000000 --- a/recipes-devtools/gcc/files/0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | From 0462b5fb1e91183c16e204e1a6cf436ef0d8d0f8 Mon Sep 17 00:00:00 2001 | ||
2 | From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> | ||
3 | Date: Sun, 23 Feb 2014 18:44:27 +0000 | ||
4 | Subject: [PATCH] 2014-02-23 David Holsgrove <david.holsgrove@xilinx.com> | ||
5 | |||
6 | * /config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk | ||
7 | and define TARGET_ASM_OUTPUT_MI_THUNK and | ||
8 | TARGET_ASM_CAN_OUTPUT_MI_THUNK. | ||
9 | |||
10 | Upstream-Status: Backport | ||
11 | --- | ||
12 | gcc/config/microblaze/microblaze.c | 73 ++++++++++++++++++++++++++++++++++++++ | ||
13 | 2 files changed, 79 insertions(+) | ||
14 | |||
15 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
16 | index 985d26a..ba8109b 100644 | ||
17 | --- a/gcc/config/microblaze/microblaze.c | ||
18 | +++ b/gcc/config/microblaze/microblaze.c | ||
19 | @@ -3087,6 +3087,73 @@ expand_pic_symbol_ref (enum machine_mode mode ATTRIBUTE_UNUSED, rtx op) | ||
20 | return result; | ||
21 | } | ||
22 | |||
23 | +static void | ||
24 | +microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, | ||
25 | + HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, | ||
26 | + tree function) | ||
27 | +{ | ||
28 | + rtx this_rtx, insn, funexp; | ||
29 | + | ||
30 | + reload_completed = 1; | ||
31 | + epilogue_completed = 1; | ||
32 | + | ||
33 | + /* Mark the end of the (empty) prologue. */ | ||
34 | + emit_note (NOTE_INSN_PROLOGUE_END); | ||
35 | + | ||
36 | + /* Find the "this" pointer. If the function returns a structure, | ||
37 | + the structure return pointer is in MB_ABI_FIRST_ARG_REGNUM. */ | ||
38 | + if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function)) | ||
39 | + this_rtx = gen_rtx_REG (Pmode, (MB_ABI_FIRST_ARG_REGNUM + 1)); | ||
40 | + else | ||
41 | + this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM); | ||
42 | + | ||
43 | + /* Apply the constant offset, if required. */ | ||
44 | + if (delta) | ||
45 | + emit_insn (gen_addsi3 (this_rtx, this_rtx, GEN_INT (delta))); | ||
46 | + | ||
47 | + /* Apply the offset from the vtable, if required. */ | ||
48 | + if (vcall_offset) | ||
49 | + { | ||
50 | + rtx vcall_offset_rtx = GEN_INT (vcall_offset); | ||
51 | + rtx temp1 = gen_rtx_REG (Pmode, MB_ABI_TEMP1_REGNUM); | ||
52 | + | ||
53 | + emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx)); | ||
54 | + | ||
55 | + rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx); | ||
56 | + emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc)); | ||
57 | + | ||
58 | + emit_insn (gen_addsi3 (this_rtx, this_rtx, temp1)); | ||
59 | + } | ||
60 | + | ||
61 | + /* Generate a tail call to the target function. */ | ||
62 | + if (!TREE_USED (function)) | ||
63 | + { | ||
64 | + assemble_external (function); | ||
65 | + TREE_USED (function) = 1; | ||
66 | + } | ||
67 | + | ||
68 | + funexp = XEXP (DECL_RTL (function), 0); | ||
69 | + rtx temp2 = gen_rtx_REG (Pmode, MB_ABI_TEMP2_REGNUM); | ||
70 | + | ||
71 | + if (flag_pic) | ||
72 | + emit_move_insn (temp2, expand_pic_symbol_ref (Pmode, funexp)); | ||
73 | + else | ||
74 | + emit_move_insn (temp2, funexp); | ||
75 | + | ||
76 | + emit_insn (gen_indirect_jump (temp2)); | ||
77 | + | ||
78 | + /* Run just enough of rest_of_compilation. This sequence was | ||
79 | + "borrowed" from rs6000.c. */ | ||
80 | + insn = get_insns (); | ||
81 | + shorten_branches (insn); | ||
82 | + final_start_function (insn, file, 1); | ||
83 | + final (insn, file, 1); | ||
84 | + final_end_function (); | ||
85 | + | ||
86 | + reload_completed = 0; | ||
87 | + epilogue_completed = 0; | ||
88 | +} | ||
89 | + | ||
90 | bool | ||
91 | microblaze_expand_move (enum machine_mode mode, rtx operands[]) | ||
92 | { | ||
93 | @@ -3504,6 +3571,12 @@ microblaze_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x | ||
94 | #undef TARGET_SECONDARY_RELOAD | ||
95 | #define TARGET_SECONDARY_RELOAD microblaze_secondary_reload | ||
96 | |||
97 | +#undef TARGET_ASM_OUTPUT_MI_THUNK | ||
98 | +#define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk | ||
99 | + | ||
100 | +#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK | ||
101 | +#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true | ||
102 | + | ||
103 | #undef TARGET_SCHED_ADJUST_COST | ||
104 | #define TARGET_SCHED_ADJUST_COST microblaze_adjust_cost | ||
105 | |||
106 | -- | ||
107 | 1.9.0 | ||
108 | |||
diff --git a/recipes-devtools/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch b/recipes-devtools/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch deleted file mode 100644 index b39dc4db..00000000 --- a/recipes-devtools/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH] [Patch, microblaze]: Fix bswaphi2 implementation | ||
3 | |||
4 | MicroBlaze insn swaph swaps the contents of register rA | ||
5 | as two halfwords placing result in rD; | ||
6 | |||
7 | (rD)[0:15] <- (rA)[16:31] | ||
8 | (rD)[16:31] <- (rA)[0:15] | ||
9 | |||
10 | gcc bswaphi2 is intended to reverse the order of the bytes | ||
11 | in the half integer in rA | ||
12 | |||
13 | (rD)[8:15] <- (rA)[0:7] | ||
14 | (rD)[7:0] <- (rA)[8:15] | ||
15 | (rD)[24:31] <- (rA)[16:23] | ||
16 | (rD)[16:23] <- (rA)[24:31] | ||
17 | |||
18 | Correct microblaze bswaphi2 insn pattern to be a | ||
19 | swapb followed by swaph | ||
20 | |||
21 | Reported-by: Nathan Rossi <nathan.rossi@xilinx.com> | ||
22 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
23 | Upstream-Status: Pending | ||
24 | --- | ||
25 | gcc/config/microblaze/microblaze.md | 3 ++- | ||
26 | 1 files changed, 2 insertions(+), 1 deletions(-) | ||
27 | |||
28 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
29 | index ae4ade7..c7485fc 100644 | ||
30 | --- a/gcc/config/microblaze/microblaze.md | ||
31 | +++ b/gcc/config/microblaze/microblaze.md | ||
32 | @@ -367,7 +367,8 @@ | ||
33 | [(set (match_operand:HI 0 "register_operand" "=r") | ||
34 | (bswap:HI (match_operand:HI 1 "register_operand" "r")))] | ||
35 | "TARGET_REORDER" | ||
36 | - "swaph %0, %1" | ||
37 | + "swapb %0, %1 | ||
38 | + swaph %0, %0" | ||
39 | ) | ||
40 | |||
41 | ;;---------------------------------------------------------------- | ||
42 | -- | ||
43 | 1.7.1 | ||
44 | |||
diff --git a/recipes-devtools/gcc/files/Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch b/recipes-devtools/gcc/files/Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch deleted file mode 100644 index 934e7fa9..00000000 --- a/recipes-devtools/gcc/files/Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
2 | Subject: [PATCH] [Patch, microblaze]: cstoresf4, add mode and | ||
3 | ordered_comparison_operator | ||
4 | |||
5 | Add SImode to comparison operator, prevents ICE during combine | ||
6 | rtl pass with error message; | ||
7 | |||
8 | internal compiler error: in simplify_subreg, at simplify-rtx.c:5725 | ||
9 | |||
10 | Use ordered_comparison_operator predicate to limit operators to | ||
11 | those fcmp can handle, and letting compiler reorder insns to | ||
12 | accomodate unordered as necessary | ||
13 | |||
14 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
15 | Upstream-Status: Pending | ||
16 | --- | ||
17 | gcc/config/microblaze/microblaze.md | 4 ++-- | ||
18 | 1 file changed, 2 insertions(+), 2 deletions(-) | ||
19 | |||
20 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
21 | index 786dabb..e9b032b 100644 | ||
22 | --- a/gcc/config/microblaze/microblaze.md | ||
23 | +++ b/gcc/config/microblaze/microblaze.md | ||
24 | @@ -1650,7 +1650,7 @@ | ||
25 | ;;---------------------------------------------------------------- | ||
26 | (define_insn "cstoresf4" | ||
27 | [(set (match_operand:SI 0 "register_operand" "=r") | ||
28 | - (match_operator 1 "comparison_operator" | ||
29 | + (match_operator:SI 1 "ordered_comparison_operator" | ||
30 | [(match_operand:SF 2 "register_operand" "r") | ||
31 | (match_operand:SF 3 "register_operand" "r")]))] | ||
32 | "TARGET_HARD_FLOAT" | ||
33 | @@ -1679,7 +1679,7 @@ | ||
34 | |||
35 | (define_expand "cbranchsf4" | ||
36 | [(set (pc) | ||
37 | - (if_then_else (match_operator 0 "comparison_operator" | ||
38 | + (if_then_else (match_operator 0 "ordered_comparison_operator" | ||
39 | [(match_operand:SF 1 "register_operand") | ||
40 | (match_operand:SF 2 "register_operand")]) | ||
41 | (label_ref (match_operand 3 "")) | ||
42 | -- | ||
43 | 1.7.9.5 | ||
44 | |||
diff --git a/recipes-devtools/gcc/files/gcc-Cherry-pick-mainline-patch-to-resolve-MB-k.patch b/recipes-devtools/gcc/files/gcc-Cherry-pick-mainline-patch-to-resolve-MB-k.patch deleted file mode 100644 index 1cdc4029..00000000 --- a/recipes-devtools/gcc/files/gcc-Cherry-pick-mainline-patch-to-resolve-MB-k.patch +++ /dev/null | |||
@@ -1,110 +0,0 @@ | |||
1 | Subject: Cherry-pick mainline patch to resolve MB kernel panic | ||
2 | |||
3 | Cherry-pick backend optimization patch from gcc HEAD which 'resolves' a kernel | ||
4 | panic for microblaze when compiled with -Os | ||
5 | |||
6 | Upstream HEAD (soon to be gcc 4.9) does not exhibt this error any longer, | ||
7 | and this patch when applied as a workaround on the 4.8 branch also hides the | ||
8 | kernel panic resulting from incorrect branch-delay slot filling. | ||
9 | |||
10 | * tree-ssa-threadedge.c (thread_around_empty_block): Remove | ||
11 | checks for the number of predecessors and successors allowed. | ||
12 | * tree-ssa-threadupdate.c (mark_threaded_blocks): Ignore requests | ||
13 | which require copying a joiner block if there is a request which | ||
14 | is a subpath that requires no joiner block copying. | ||
15 | |||
16 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
17 | Upstream-Status: Backport | ||
18 | --- | ||
19 | gcc/tree-ssa-threadedge.c | 8 ------- | ||
20 | gcc/tree-ssa-threadupdate.c | 49 ++++++++++++++++++++++++++++++++++++++----- | ||
21 | 2 files changed, 44 insertions(+), 13 deletions(-) | ||
22 | |||
23 | diff --git a/gcc/tree-ssa-threadedge.c b/gcc/tree-ssa-threadedge.c | ||
24 | index b31e961..ab58ae8 100644 | ||
25 | --- a/gcc/tree-ssa-threadedge.c | ||
26 | +++ b/gcc/tree-ssa-threadedge.c | ||
27 | @@ -761,14 +761,6 @@ thread_around_empty_block (edge taken_edge, | ||
28 | gimple stmt; | ||
29 | tree cond; | ||
30 | |||
31 | - /* This block must have a single predecessor (E->dest). */ | ||
32 | - if (!single_pred_p (bb)) | ||
33 | - return NULL; | ||
34 | - | ||
35 | - /* This block must have more than one successor. */ | ||
36 | - if (single_succ_p (bb)) | ||
37 | - return NULL; | ||
38 | - | ||
39 | /* This block can have no PHI nodes. This is overly conservative. */ | ||
40 | if (!gsi_end_p (gsi_start_phis (bb))) | ||
41 | return NULL; | ||
42 | diff --git a/gcc/tree-ssa-threadupdate.c b/gcc/tree-ssa-threadupdate.c | ||
43 | index 0e4cbc9..cf8df8e 100644 | ||
44 | --- a/gcc/tree-ssa-threadupdate.c | ||
45 | +++ b/gcc/tree-ssa-threadupdate.c | ||
46 | @@ -1146,17 +1146,56 @@ mark_threaded_blocks (bitmap threaded_blocks) | ||
47 | edge e; | ||
48 | edge_iterator ei; | ||
49 | |||
50 | + /* It is possible to have jump threads in which one is a subpath | ||
51 | + of the other. ie, (A, B), (B, C), (C, D) where B is a joiner | ||
52 | + block and (B, C), (C, D) where no joiner block exists. | ||
53 | + | ||
54 | + When this occurs ignore the jump thread request with the joiner | ||
55 | + block. It's totally subsumed by the simpler jump thread request. | ||
56 | + | ||
57 | + This results in less block copying, simpler CFGs. More improtantly, | ||
58 | + when we duplicate the joiner block, B, in this case we will create | ||
59 | + a new threading opportunity that we wouldn't be able to optimize | ||
60 | + until the next jump threading iteration. | ||
61 | + | ||
62 | + So first convert the jump thread requests which do not require a | ||
63 | + joiner block. */ | ||
64 | for (i = 0; i < threaded_edges.length (); i += 3) | ||
65 | { | ||
66 | edge e = threaded_edges[i]; | ||
67 | - edge *x = XNEWVEC (edge, 2); | ||
68 | |||
69 | - e->aux = x; | ||
70 | - THREAD_TARGET (e) = threaded_edges[i + 1]; | ||
71 | - THREAD_TARGET2 (e) = threaded_edges[i + 2]; | ||
72 | - bitmap_set_bit (tmp, e->dest->index); | ||
73 | + if (threaded_edges[i + 2] == NULL) | ||
74 | + { | ||
75 | + edge *x = XNEWVEC (edge, 2); | ||
76 | + | ||
77 | + e->aux = x; | ||
78 | + THREAD_TARGET (e) = threaded_edges[i + 1]; | ||
79 | + THREAD_TARGET2 (e) = NULL; | ||
80 | + bitmap_set_bit (tmp, e->dest->index); | ||
81 | + } | ||
82 | } | ||
83 | |||
84 | + | ||
85 | + /* Now iterate again, converting cases where we threaded through | ||
86 | + a joiner block, but ignoring those where we have already | ||
87 | + threaded through the joiner block. */ | ||
88 | + for (i = 0; i < threaded_edges.length (); i += 3) | ||
89 | + { | ||
90 | + edge e = threaded_edges[i]; | ||
91 | + | ||
92 | + if (threaded_edges[i + 2] != NULL | ||
93 | + && threaded_edges[i + 1]->aux == NULL) | ||
94 | + { | ||
95 | + edge *x = XNEWVEC (edge, 2); | ||
96 | + | ||
97 | + e->aux = x; | ||
98 | + THREAD_TARGET (e) = threaded_edges[i + 1]; | ||
99 | + THREAD_TARGET2 (e) = threaded_edges[i + 2]; | ||
100 | + bitmap_set_bit (tmp, e->dest->index); | ||
101 | + } | ||
102 | + } | ||
103 | + | ||
104 | + | ||
105 | /* If optimizing for size, only thread through block if we don't have | ||
106 | to duplicate it or it's an otherwise empty redirection block. */ | ||
107 | if (optimize_function_for_size_p (cfun)) | ||
108 | -- | ||
109 | 1.7.9.5 | ||
110 | |||
diff --git a/recipes-devtools/gcc/gcc-microblaze-4.8.inc b/recipes-devtools/gcc/gcc-microblaze-4.8.inc deleted file mode 100644 index f0578dbd..00000000 --- a/recipes-devtools/gcc/gcc-microblaze-4.8.inc +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | |||
2 | # Add MicroBlaze Patches | ||
3 | FILESEXTRAPATHS_append := "${THISDIR}/files:" | ||
4 | SRC_URI_append += " \ | ||
5 | file://0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch \ | ||
6 | file://0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch \ | ||
7 | file://0003-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch \ | ||
8 | file://0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch \ | ||
9 | file://0005-Patch-microblaze-Add-fstack-usage-support.patch \ | ||
10 | file://0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch \ | ||
11 | file://0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch \ | ||
12 | file://0008-Patch-microblaze-Add-branch_compare-instruction.patch \ | ||
13 | file://Patch-microblaze-Fix-bswaphi2-implementation.patch \ | ||
14 | file://Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch \ | ||
15 | file://gcc-Cherry-pick-mainline-patch-to-resolve-MB-k.patch \ | ||
16 | " | ||
diff --git a/recipes-devtools/gcc/gcc-source_4.8.bbappend b/recipes-devtools/gcc/gcc-source_4.8.bbappend deleted file mode 100644 index e28b4dd0..00000000 --- a/recipes-devtools/gcc/gcc-source_4.8.bbappend +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | require gcc-microblaze-4.8.inc | ||