diff options
Diffstat (limited to 'meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch')
-rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch new file mode 100644 index 00000000..98310b36 --- /dev/null +++ b/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch | |||
@@ -0,0 +1,72 @@ | |||
1 | From c7e5c253b1e7800bc5ec8cc69850118ed938e22f Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Tue, 17 Jan 2017 18:18:41 +0530 | ||
4 | Subject: [PATCH 25/63] [Patch, microblaze]: Update ashlsi3 & movsf patterns | ||
5 | This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand | ||
6 | of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal | ||
7 | patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our | ||
8 | instruction doesn't support so using gen_int_mode function | ||
9 | |||
10 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | ||
11 | :Ajit Agarwal <ajitkum@xilinx.com> | ||
12 | |||
13 | ChangeLog: | ||
14 | 2016-01-07 Nagaraju Mekala <nmekala@xilix.com> | ||
15 | Ajit Agarwal <ajitkum@xilinx.com> | ||
16 | |||
17 | *microblaze.md (ashlsi3_with_mul_nodelay, | ||
18 | ashlsi3_with_mul_delay, | ||
19 | movsf_internal): | ||
20 | Updated the patterns to use gen_int_mode function | ||
21 | *microblaze.c (print_operand): | ||
22 | updated the 'F' case to use "unsinged int" instead | ||
23 | of HOST_WIDE_INT_PRINT_HEX | ||
24 | --- | ||
25 | gcc/config/microblaze/microblaze.c | 2 +- | ||
26 | gcc/config/microblaze/microblaze.md | 10 ++++++++-- | ||
27 | 2 files changed, 9 insertions(+), 3 deletions(-) | ||
28 | |||
29 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
30 | index 0ce9d13..7669668 100644 | ||
31 | --- a/gcc/config/microblaze/microblaze.c | ||
32 | +++ b/gcc/config/microblaze/microblaze.c | ||
33 | @@ -2608,7 +2608,7 @@ print_operand (FILE * file, rtx op, int letter) | ||
34 | unsigned long value_long; | ||
35 | REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), | ||
36 | value_long); | ||
37 | - fprintf (file, HOST_WIDE_INT_PRINT_HEX, value_long); | ||
38 | + fprintf (file, "0x%08x", (unsigned int) value_long); | ||
39 | } | ||
40 | else | ||
41 | { | ||
42 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
43 | index 216219b..4bc209c 100644 | ||
44 | --- a/gcc/config/microblaze/microblaze.md | ||
45 | +++ b/gcc/config/microblaze/microblaze.md | ||
46 | @@ -1368,7 +1368,10 @@ | ||
47 | (match_operand:SI 2 "immediate_operand" "I")))] | ||
48 | "!TARGET_SOFT_MUL | ||
49 | && ((1 << INTVAL (operands[2])) <= 32767 && (1 << INTVAL (operands[2])) >= -32768)" | ||
50 | - "muli\t%0,%1,%m2" | ||
51 | + { | ||
52 | + operands[2] = gen_int_mode (1 << INTVAL (operands[2]), SImode); | ||
53 | + return "muli\t%0,%1,%2"; | ||
54 | + } | ||
55 | ;; This MUL will not generate an imm. Can go into a delay slot. | ||
56 | [(set_attr "type" "arith") | ||
57 | (set_attr "mode" "SI") | ||
58 | @@ -1380,7 +1383,10 @@ | ||
59 | (ashift:SI (match_operand:SI 1 "register_operand" "d") | ||
60 | (match_operand:SI 2 "immediate_operand" "I")))] | ||
61 | "!TARGET_SOFT_MUL" | ||
62 | - "muli\t%0,%1,%m2" | ||
63 | + { | ||
64 | + operands[2] = gen_int_mode (1 << INTVAL (operands[2]), SImode); | ||
65 | + return "muli\t%0,%1,%2"; | ||
66 | + } | ||
67 | ;; This MUL will generate an IMM. Cannot go into a delay slot | ||
68 | [(set_attr "type" "no_delay_arith") | ||
69 | (set_attr "mode" "SI") | ||
70 | -- | ||
71 | 2.7.4 | ||
72 | |||