diff options
Diffstat (limited to 'meta-xilinx-bsp/recipes-bsp/device-tree')
4 files changed, 0 insertions, 550 deletions
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend index 83f8c57b..9ab3f24e 100644 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend +++ b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend | |||
@@ -4,12 +4,6 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:" | |||
4 | COMPATIBLE_MACHINE:qemu-zynq7 = ".*" | 4 | COMPATIBLE_MACHINE:qemu-zynq7 = ".*" |
5 | SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts" | 5 | SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts" |
6 | 6 | ||
7 | COMPATIBLE_MACHINE:kc705-microblazeel = ".*" | ||
8 | SRC_URI:append:kc705-microblazeel = " \ | ||
9 | file://kc705-microblazeel.dts \ | ||
10 | file://pl.dtsi \ | ||
11 | file://system-conf.dtsi \ | ||
12 | " | ||
13 | SRC_URI:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' file://pnc.dtsi', '', d)}" | 7 | SRC_URI:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' file://pnc.dtsi', '', d)}" |
14 | 8 | ||
15 | do_configure:append() { | 9 | do_configure:append() { |
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts deleted file mode 100644 index 45e488c1..00000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /dts-v1/; | ||
2 | /include/ "pl.dtsi" | ||
3 | /include/ "system-conf.dtsi" | ||
4 | / { | ||
5 | hard-reset-gpios = <&reset_gpio 0 1>; | ||
6 | aliases { | ||
7 | ethernet0 = &axi_ethernet; | ||
8 | i2c0 = &iic_main; | ||
9 | serial0 = &rs232_uart; | ||
10 | }; | ||
11 | memory { | ||
12 | device_type = "memory"; | ||
13 | reg = <0x80000000 0x40000000>; | ||
14 | }; | ||
15 | }; | ||
16 | |||
17 | &iic_main { | ||
18 | i2cswitch@74 { | ||
19 | compatible = "nxp,pca9548"; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <0>; | ||
22 | reg = <0x74>; | ||
23 | i2c@0 { | ||
24 | #address-cells = <1>; | ||
25 | #size-cells = <0>; | ||
26 | reg = <0>; | ||
27 | si570: clock-generator@5d { | ||
28 | #clock-cells = <0>; | ||
29 | compatible = "silabs,si570"; | ||
30 | temperature-stability = <50>; | ||
31 | reg = <0x5d>; | ||
32 | factory-fout = <156250000>; | ||
33 | clock-frequency = <148500000>; | ||
34 | }; | ||
35 | }; | ||
36 | i2c@3 { | ||
37 | #address-cells = <1>; | ||
38 | #size-cells = <0>; | ||
39 | reg = <3>; | ||
40 | eeprom@54 { | ||
41 | compatible = "at,24c08"; | ||
42 | reg = <0x54>; | ||
43 | }; | ||
44 | }; | ||
45 | }; | ||
46 | }; | ||
47 | |||
48 | &axi_ethernet { | ||
49 | phy-handle = <&phy0>; | ||
50 | axi_ethernet_mdio: mdio { | ||
51 | phy0: phy@7 { | ||
52 | device_type = "ethernet-phy"; | ||
53 | reg = <7>; | ||
54 | }; | ||
55 | }; | ||
56 | }; | ||
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi deleted file mode 100644 index 43bc2ab7..00000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi +++ /dev/null | |||
@@ -1,445 +0,0 @@ | |||
1 | / { | ||
2 | #address-cells = <1>; | ||
3 | #size-cells = <1>; | ||
4 | compatible = "xlnx,microblaze"; | ||
5 | model = "Xilinx MicroBlaze"; | ||
6 | cpus { | ||
7 | #address-cells = <1>; | ||
8 | #cpus = <1>; | ||
9 | #size-cells = <0>; | ||
10 | microblaze_0: cpu@0 { | ||
11 | bus-handle = <&amba_pl>; | ||
12 | clock-frequency = <200000000>; | ||
13 | clocks = <&clk_cpu>; | ||
14 | compatible = "xlnx,microblaze-10.0"; | ||
15 | d-cache-baseaddr = <0x0000000080000000>; | ||
16 | d-cache-highaddr = <0x00000000bfffffff>; | ||
17 | d-cache-line-size = <0x20>; | ||
18 | d-cache-size = <0x4000>; | ||
19 | device_type = "cpu"; | ||
20 | i-cache-baseaddr = <0x0000000080000000>; | ||
21 | i-cache-highaddr = <0x00000000bfffffff>; | ||
22 | i-cache-line-size = <0x10>; | ||
23 | i-cache-size = <0x4000>; | ||
24 | interrupt-handle = <µblaze_0_axi_intc>; | ||
25 | model = "microblaze,10.0"; | ||
26 | timebase-frequency = <200000000>; | ||
27 | xlnx,addr-size = <0x20>; | ||
28 | xlnx,addr-tag-bits = <0x10>; | ||
29 | xlnx,allow-dcache-wr = <0x1>; | ||
30 | xlnx,allow-icache-wr = <0x1>; | ||
31 | xlnx,area-optimized = <0x0>; | ||
32 | xlnx,async-interrupt = <0x1>; | ||
33 | xlnx,async-wakeup = <0x3>; | ||
34 | xlnx,avoid-primitives = <0x0>; | ||
35 | xlnx,base-vectors = <0x0000000000000000>; | ||
36 | xlnx,branch-target-cache-size = <0x0>; | ||
37 | xlnx,cache-byte-size = <0x4000>; | ||
38 | xlnx,d-axi = <0x1>; | ||
39 | xlnx,d-lmb = <0x1>; | ||
40 | xlnx,d-lmb-mon = <0x0>; | ||
41 | xlnx,daddr-size = <0x20>; | ||
42 | xlnx,data-size = <0x20>; | ||
43 | xlnx,dc-axi-mon = <0x0>; | ||
44 | xlnx,dcache-addr-tag = <0x10>; | ||
45 | xlnx,dcache-always-used = <0x1>; | ||
46 | xlnx,dcache-byte-size = <0x4000>; | ||
47 | xlnx,dcache-data-width = <0x0>; | ||
48 | xlnx,dcache-force-tag-lutram = <0x0>; | ||
49 | xlnx,dcache-line-len = <0x8>; | ||
50 | xlnx,dcache-use-writeback = <0x0>; | ||
51 | xlnx,dcache-victims = <0x0>; | ||
52 | xlnx,debug-counter-width = <0x20>; | ||
53 | xlnx,debug-enabled = <0x1>; | ||
54 | xlnx,debug-event-counters = <0x5>; | ||
55 | xlnx,debug-external-trace = <0x0>; | ||
56 | xlnx,debug-interface = <0x0>; | ||
57 | xlnx,debug-latency-counters = <0x1>; | ||
58 | xlnx,debug-profile-size = <0x0>; | ||
59 | xlnx,debug-trace-async-reset = <0x0>; | ||
60 | xlnx,debug-trace-size = <0x2000>; | ||
61 | xlnx,div-zero-exception = <0x1>; | ||
62 | xlnx,dp-axi-mon = <0x0>; | ||
63 | xlnx,dynamic-bus-sizing = <0x0>; | ||
64 | xlnx,ecc-use-ce-exception = <0x0>; | ||
65 | xlnx,edge-is-positive = <0x1>; | ||
66 | xlnx,enable-discrete-ports = <0x0>; | ||
67 | xlnx,endianness = <0x1>; | ||
68 | xlnx,fault-tolerant = <0x0>; | ||
69 | xlnx,fpu-exception = <0x0>; | ||
70 | xlnx,freq = <0xbebc200>; | ||
71 | xlnx,fsl-exception = <0x0>; | ||
72 | xlnx,fsl-links = <0x0>; | ||
73 | xlnx,i-axi = <0x0>; | ||
74 | xlnx,i-lmb = <0x1>; | ||
75 | xlnx,i-lmb-mon = <0x0>; | ||
76 | xlnx,iaddr-size = <0x20>; | ||
77 | xlnx,ic-axi-mon = <0x0>; | ||
78 | xlnx,icache-always-used = <0x1>; | ||
79 | xlnx,icache-data-width = <0x0>; | ||
80 | xlnx,icache-force-tag-lutram = <0x0>; | ||
81 | xlnx,icache-line-len = <0x4>; | ||
82 | xlnx,icache-streams = <0x1>; | ||
83 | xlnx,icache-victims = <0x8>; | ||
84 | xlnx,ill-opcode-exception = <0x1>; | ||
85 | xlnx,imprecise-exceptions = <0x0>; | ||
86 | xlnx,instr-size = <0x20>; | ||
87 | xlnx,interconnect = <0x2>; | ||
88 | xlnx,interrupt-is-edge = <0x0>; | ||
89 | xlnx,interrupt-mon = <0x0>; | ||
90 | xlnx,ip-axi-mon = <0x0>; | ||
91 | xlnx,lockstep-master = <0x0>; | ||
92 | xlnx,lockstep-select = <0x0>; | ||
93 | xlnx,lockstep-slave = <0x0>; | ||
94 | xlnx,mmu-dtlb-size = <0x4>; | ||
95 | xlnx,mmu-itlb-size = <0x2>; | ||
96 | xlnx,mmu-privileged-instr = <0x0>; | ||
97 | xlnx,mmu-tlb-access = <0x3>; | ||
98 | xlnx,mmu-zones = <0x2>; | ||
99 | xlnx,num-sync-ff-clk = <0x2>; | ||
100 | xlnx,num-sync-ff-clk-debug = <0x2>; | ||
101 | xlnx,num-sync-ff-clk-irq = <0x1>; | ||
102 | xlnx,num-sync-ff-dbg-clk = <0x1>; | ||
103 | xlnx,num-sync-ff-dbg-trace-clk = <0x2>; | ||
104 | xlnx,number-of-pc-brk = <0x1>; | ||
105 | xlnx,number-of-rd-addr-brk = <0x0>; | ||
106 | xlnx,number-of-wr-addr-brk = <0x0>; | ||
107 | xlnx,opcode-0x0-illegal = <0x1>; | ||
108 | xlnx,optimization = <0x0>; | ||
109 | xlnx,pc-width = <0x20>; | ||
110 | xlnx,piaddr-size = <0x20>; | ||
111 | xlnx,pvr = <0x2>; | ||
112 | xlnx,pvr-user1 = <0x00>; | ||
113 | xlnx,pvr-user2 = <0x00000000>; | ||
114 | xlnx,reset-msr = <0x00000000>; | ||
115 | xlnx,reset-msr-bip = <0x0>; | ||
116 | xlnx,reset-msr-dce = <0x0>; | ||
117 | xlnx,reset-msr-ee = <0x0>; | ||
118 | xlnx,reset-msr-eip = <0x0>; | ||
119 | xlnx,reset-msr-ice = <0x0>; | ||
120 | xlnx,reset-msr-ie = <0x0>; | ||
121 | xlnx,sco = <0x0>; | ||
122 | xlnx,trace = <0x0>; | ||
123 | xlnx,unaligned-exceptions = <0x1>; | ||
124 | xlnx,use-barrel = <0x1>; | ||
125 | xlnx,use-branch-target-cache = <0x0>; | ||
126 | xlnx,use-config-reset = <0x0>; | ||
127 | xlnx,use-dcache = <0x1>; | ||
128 | xlnx,use-div = <0x1>; | ||
129 | xlnx,use-ext-brk = <0x0>; | ||
130 | xlnx,use-ext-nm-brk = <0x0>; | ||
131 | xlnx,use-extended-fsl-instr = <0x0>; | ||
132 | xlnx,use-fpu = <0x0>; | ||
133 | xlnx,use-hw-mul = <0x2>; | ||
134 | xlnx,use-icache = <0x1>; | ||
135 | xlnx,use-interrupt = <0x2>; | ||
136 | xlnx,use-mmu = <0x3>; | ||
137 | xlnx,use-msr-instr = <0x1>; | ||
138 | xlnx,use-non-secure = <0x0>; | ||
139 | xlnx,use-pcmp-instr = <0x1>; | ||
140 | xlnx,use-reorder-instr = <0x1>; | ||
141 | xlnx,use-stack-protection = <0x0>; | ||
142 | }; | ||
143 | }; | ||
144 | clocks { | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | clk_cpu: clk_cpu@0 { | ||
148 | #clock-cells = <0>; | ||
149 | clock-frequency = <200000000>; | ||
150 | clock-output-names = "clk_cpu"; | ||
151 | compatible = "fixed-clock"; | ||
152 | reg = <0>; | ||
153 | }; | ||
154 | clk_bus_0: clk_bus_0@1 { | ||
155 | #clock-cells = <0>; | ||
156 | clock-frequency = <200000000>; | ||
157 | clock-output-names = "clk_bus_0"; | ||
158 | compatible = "fixed-clock"; | ||
159 | reg = <1>; | ||
160 | }; | ||
161 | }; | ||
162 | amba_pl: amba_pl { | ||
163 | #address-cells = <1>; | ||
164 | #size-cells = <1>; | ||
165 | compatible = "simple-bus"; | ||
166 | ranges ; | ||
167 | axi_ethernet: ethernet@40c00000 { | ||
168 | axistream-connected = <&axi_ethernet_dma>; | ||
169 | axistream-control-connected = <&axi_ethernet_dma>; | ||
170 | clock-frequency = <100000000>; | ||
171 | compatible = "xlnx,axi-ethernet-1.00.a"; | ||
172 | device_type = "network"; | ||
173 | interrupt-parent = <µblaze_0_axi_intc>; | ||
174 | interrupts = <4 2>; | ||
175 | phy-mode = "gmii"; | ||
176 | reg = <0x40c00000 0x40000>; | ||
177 | xlnx = <0x0>; | ||
178 | xlnx,axiliteclkrate = <0x0>; | ||
179 | xlnx,axisclkrate = <0x0>; | ||
180 | xlnx,clockselection = <0x0>; | ||
181 | xlnx,enableasyncsgmii = <0x0>; | ||
182 | xlnx,gt-type = <0x0>; | ||
183 | xlnx,gtinex = <0x0>; | ||
184 | xlnx,gtlocation = <0x0>; | ||
185 | xlnx,gtrefclksrc = <0x0>; | ||
186 | xlnx,include-dre ; | ||
187 | xlnx,instantiatebitslice0 = <0x0>; | ||
188 | xlnx,phy-type = <0x1>; | ||
189 | xlnx,phyaddr = <0x1>; | ||
190 | xlnx,rable = <0x0>; | ||
191 | xlnx,rxcsum = <0x0>; | ||
192 | xlnx,rxlane0-placement = <0x0>; | ||
193 | xlnx,rxlane1-placement = <0x0>; | ||
194 | xlnx,rxmem = <0x1000>; | ||
195 | xlnx,rxnibblebitslice0used = <0x0>; | ||
196 | xlnx,tx-in-upper-nibble = <0x1>; | ||
197 | xlnx,txcsum = <0x0>; | ||
198 | xlnx,txlane0-placement = <0x0>; | ||
199 | xlnx,txlane1-placement = <0x0>; | ||
200 | axi_ethernet_mdio: mdio { | ||
201 | #address-cells = <1>; | ||
202 | #size-cells = <0>; | ||
203 | }; | ||
204 | }; | ||
205 | axi_ethernet_dma: dma@41e00000 { | ||
206 | #dma-cells = <1>; | ||
207 | axistream-connected = <&axi_ethernet>; | ||
208 | axistream-control-connected = <&axi_ethernet>; | ||
209 | clock-frequency = <200000000>; | ||
210 | clock-names = "s_axi_lite_aclk"; | ||
211 | clocks = <&clk_bus_0>; | ||
212 | compatible = "xlnx,eth-dma"; | ||
213 | interrupt-parent = <µblaze_0_axi_intc>; | ||
214 | interrupts = <3 2 2 2>; | ||
215 | reg = <0x41e00000 0x10000>; | ||
216 | xlnx,include-dre ; | ||
217 | }; | ||
218 | axi_timer_0: timer@41c00000 { | ||
219 | clock-frequency = <200000000>; | ||
220 | clocks = <&clk_bus_0>; | ||
221 | compatible = "xlnx,xps-timer-1.00.a"; | ||
222 | interrupt-parent = <µblaze_0_axi_intc>; | ||
223 | interrupts = <5 2>; | ||
224 | reg = <0x41c00000 0x10000>; | ||
225 | xlnx,count-width = <0x20>; | ||
226 | xlnx,gen0-assert = <0x1>; | ||
227 | xlnx,gen1-assert = <0x1>; | ||
228 | xlnx,one-timer-only = <0x0>; | ||
229 | xlnx,trig0-assert = <0x1>; | ||
230 | xlnx,trig1-assert = <0x1>; | ||
231 | }; | ||
232 | calib_complete_gpio: gpio@40010000 { | ||
233 | #gpio-cells = <2>; | ||
234 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
235 | gpio-controller ; | ||
236 | reg = <0x40010000 0x10000>; | ||
237 | xlnx,all-inputs = <0x1>; | ||
238 | xlnx,all-inputs-2 = <0x0>; | ||
239 | xlnx,all-outputs = <0x0>; | ||
240 | xlnx,all-outputs-2 = <0x0>; | ||
241 | xlnx,dout-default = <0x00000000>; | ||
242 | xlnx,dout-default-2 = <0x00000000>; | ||
243 | xlnx,gpio-width = <0x1>; | ||
244 | xlnx,gpio2-width = <0x20>; | ||
245 | xlnx,interrupt-present = <0x0>; | ||
246 | xlnx,is-dual = <0x0>; | ||
247 | xlnx,tri-default = <0xFFFFFFFF>; | ||
248 | xlnx,tri-default-2 = <0xFFFFFFFF>; | ||
249 | }; | ||
250 | dip_switches_4bits: gpio@40020000 { | ||
251 | #gpio-cells = <2>; | ||
252 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
253 | gpio-controller ; | ||
254 | reg = <0x40020000 0x10000>; | ||
255 | xlnx,all-inputs = <0x1>; | ||
256 | xlnx,all-inputs-2 = <0x0>; | ||
257 | xlnx,all-outputs = <0x0>; | ||
258 | xlnx,all-outputs-2 = <0x0>; | ||
259 | xlnx,dout-default = <0x00000000>; | ||
260 | xlnx,dout-default-2 = <0x00000000>; | ||
261 | xlnx,gpio-width = <0x4>; | ||
262 | xlnx,gpio2-width = <0x20>; | ||
263 | xlnx,interrupt-present = <0x0>; | ||
264 | xlnx,is-dual = <0x0>; | ||
265 | xlnx,tri-default = <0xFFFFFFFF>; | ||
266 | xlnx,tri-default-2 = <0xFFFFFFFF>; | ||
267 | }; | ||
268 | iic_main: i2c@40800000 { | ||
269 | #address-cells = <1>; | ||
270 | #size-cells = <0>; | ||
271 | clock-frequency = <200000000>; | ||
272 | clocks = <&clk_bus_0>; | ||
273 | compatible = "xlnx,xps-iic-2.00.a"; | ||
274 | interrupt-parent = <µblaze_0_axi_intc>; | ||
275 | interrupts = <1 2>; | ||
276 | reg = <0x40800000 0x10000>; | ||
277 | }; | ||
278 | led_8bits: gpio@40030000 { | ||
279 | #gpio-cells = <2>; | ||
280 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
281 | gpio-controller ; | ||
282 | reg = <0x40030000 0x10000>; | ||
283 | xlnx,all-inputs = <0x0>; | ||
284 | xlnx,all-inputs-2 = <0x0>; | ||
285 | xlnx,all-outputs = <0x1>; | ||
286 | xlnx,all-outputs-2 = <0x0>; | ||
287 | xlnx,dout-default = <0x00000000>; | ||
288 | xlnx,dout-default-2 = <0x00000000>; | ||
289 | xlnx,gpio-width = <0x8>; | ||
290 | xlnx,gpio2-width = <0x20>; | ||
291 | xlnx,interrupt-present = <0x0>; | ||
292 | xlnx,is-dual = <0x0>; | ||
293 | xlnx,tri-default = <0xFFFFFFFF>; | ||
294 | xlnx,tri-default-2 = <0xFFFFFFFF>; | ||
295 | }; | ||
296 | linear_flash: flash@60000000 { | ||
297 | bank-width = <2>; | ||
298 | compatible = "cfi-flash"; | ||
299 | reg = <0x60000000 0x8000000>; | ||
300 | xlnx,axi-clk-period-ps = <0x1388>; | ||
301 | xlnx,include-datawidth-matching-0 = <0x1>; | ||
302 | xlnx,include-datawidth-matching-1 = <0x1>; | ||
303 | xlnx,include-datawidth-matching-2 = <0x1>; | ||
304 | xlnx,include-datawidth-matching-3 = <0x1>; | ||
305 | xlnx,include-negedge-ioregs = <0x0>; | ||
306 | xlnx,lflash-period-ps = <0x1388>; | ||
307 | xlnx,linear-flash-sync-burst = <0x0>; | ||
308 | xlnx,max-mem-width = <0x10>; | ||
309 | xlnx,mem-a-lsb = <0x0>; | ||
310 | xlnx,mem-a-msb = <0x1f>; | ||
311 | xlnx,mem0-type = <0x2>; | ||
312 | xlnx,mem0-width = <0x10>; | ||
313 | xlnx,mem1-type = <0x0>; | ||
314 | xlnx,mem1-width = <0x10>; | ||
315 | xlnx,mem2-type = <0x0>; | ||
316 | xlnx,mem2-width = <0x10>; | ||
317 | xlnx,mem3-type = <0x0>; | ||
318 | xlnx,mem3-width = <0x10>; | ||
319 | xlnx,num-banks-mem = <0x1>; | ||
320 | xlnx,page-size = <0x10>; | ||
321 | xlnx,parity-type-mem-0 = <0x0>; | ||
322 | xlnx,parity-type-mem-1 = <0x0>; | ||
323 | xlnx,parity-type-mem-2 = <0x0>; | ||
324 | xlnx,parity-type-mem-3 = <0x0>; | ||
325 | xlnx,port-diff = <0x0>; | ||
326 | xlnx,s-axi-en-reg = <0x0>; | ||
327 | xlnx,s-axi-mem-addr-width = <0x20>; | ||
328 | xlnx,s-axi-mem-data-width = <0x20>; | ||
329 | xlnx,s-axi-mem-id-width = <0x1>; | ||
330 | xlnx,s-axi-reg-addr-width = <0x5>; | ||
331 | xlnx,s-axi-reg-data-width = <0x20>; | ||
332 | xlnx,synch-pipedelay-0 = <0x1>; | ||
333 | xlnx,synch-pipedelay-1 = <0x1>; | ||
334 | xlnx,synch-pipedelay-2 = <0x1>; | ||
335 | xlnx,synch-pipedelay-3 = <0x1>; | ||
336 | xlnx,tavdv-ps-mem-0 = <0x1fbd0>; | ||
337 | xlnx,tavdv-ps-mem-1 = <0x3a98>; | ||
338 | xlnx,tavdv-ps-mem-2 = <0x3a98>; | ||
339 | xlnx,tavdv-ps-mem-3 = <0x3a98>; | ||
340 | xlnx,tcedv-ps-mem-0 = <0x1fbd0>; | ||
341 | xlnx,tcedv-ps-mem-1 = <0x3a98>; | ||
342 | xlnx,tcedv-ps-mem-2 = <0x3a98>; | ||
343 | xlnx,tcedv-ps-mem-3 = <0x3a98>; | ||
344 | xlnx,thzce-ps-mem-0 = <0x88b8>; | ||
345 | xlnx,thzce-ps-mem-1 = <0x1b58>; | ||
346 | xlnx,thzce-ps-mem-2 = <0x1b58>; | ||
347 | xlnx,thzce-ps-mem-3 = <0x1b58>; | ||
348 | xlnx,thzoe-ps-mem-0 = <0x1b58>; | ||
349 | xlnx,thzoe-ps-mem-1 = <0x1b58>; | ||
350 | xlnx,thzoe-ps-mem-2 = <0x1b58>; | ||
351 | xlnx,thzoe-ps-mem-3 = <0x1b58>; | ||
352 | xlnx,tlzwe-ps-mem-0 = <0xc350>; | ||
353 | xlnx,tlzwe-ps-mem-1 = <0x0>; | ||
354 | xlnx,tlzwe-ps-mem-2 = <0x0>; | ||
355 | xlnx,tlzwe-ps-mem-3 = <0x0>; | ||
356 | xlnx,tpacc-ps-flash-0 = <0x61a8>; | ||
357 | xlnx,tpacc-ps-flash-1 = <0x61a8>; | ||
358 | xlnx,tpacc-ps-flash-2 = <0x61a8>; | ||
359 | xlnx,tpacc-ps-flash-3 = <0x61a8>; | ||
360 | xlnx,twc-ps-mem-0 = <0x11170>; | ||
361 | xlnx,twc-ps-mem-1 = <0x3a98>; | ||
362 | xlnx,twc-ps-mem-2 = <0x3a98>; | ||
363 | xlnx,twc-ps-mem-3 = <0x3a98>; | ||
364 | xlnx,twp-ps-mem-0 = <0x13880>; | ||
365 | xlnx,twp-ps-mem-1 = <0x2ee0>; | ||
366 | xlnx,twp-ps-mem-2 = <0x2ee0>; | ||
367 | xlnx,twp-ps-mem-3 = <0x2ee0>; | ||
368 | xlnx,twph-ps-mem-0 = <0x13880>; | ||
369 | xlnx,twph-ps-mem-1 = <0x2ee0>; | ||
370 | xlnx,twph-ps-mem-2 = <0x2ee0>; | ||
371 | xlnx,twph-ps-mem-3 = <0x2ee0>; | ||
372 | xlnx,use-startup = <0x0>; | ||
373 | xlnx,use-startup-int = <0x0>; | ||
374 | xlnx,wr-rec-time-mem-0 = <0x186a0>; | ||
375 | xlnx,wr-rec-time-mem-1 = <0x6978>; | ||
376 | xlnx,wr-rec-time-mem-2 = <0x6978>; | ||
377 | xlnx,wr-rec-time-mem-3 = <0x6978>; | ||
378 | }; | ||
379 | microblaze_0_axi_intc: interrupt-controller@41200000 { | ||
380 | #interrupt-cells = <2>; | ||
381 | compatible = "xlnx,xps-intc-1.00.a"; | ||
382 | interrupt-controller ; | ||
383 | reg = <0x41200000 0x10000>; | ||
384 | xlnx,kind-of-intr = <0x0>; | ||
385 | xlnx,num-intr-inputs = <0x6>; | ||
386 | }; | ||
387 | push_buttons_5bits: gpio@40040000 { | ||
388 | #gpio-cells = <2>; | ||
389 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
390 | gpio-controller ; | ||
391 | reg = <0x40040000 0x10000>; | ||
392 | xlnx,all-inputs = <0x1>; | ||
393 | xlnx,all-inputs-2 = <0x0>; | ||
394 | xlnx,all-outputs = <0x0>; | ||
395 | xlnx,all-outputs-2 = <0x0>; | ||
396 | xlnx,dout-default = <0x00000000>; | ||
397 | xlnx,dout-default-2 = <0x00000000>; | ||
398 | xlnx,gpio-width = <0x5>; | ||
399 | xlnx,gpio2-width = <0x20>; | ||
400 | xlnx,interrupt-present = <0x0>; | ||
401 | xlnx,is-dual = <0x0>; | ||
402 | xlnx,tri-default = <0xFFFFFFFF>; | ||
403 | xlnx,tri-default-2 = <0xFFFFFFFF>; | ||
404 | }; | ||
405 | reset_gpio: gpio@40000000 { | ||
406 | #gpio-cells = <2>; | ||
407 | compatible = "xlnx,xps-gpio-1.00.a"; | ||
408 | gpio-controller ; | ||
409 | reg = <0x40000000 0x10000>; | ||
410 | xlnx,all-inputs = <0x0>; | ||
411 | xlnx,all-inputs-2 = <0x0>; | ||
412 | xlnx,all-outputs = <0x1>; | ||
413 | xlnx,all-outputs-2 = <0x0>; | ||
414 | xlnx,dout-default = <0x00000000>; | ||
415 | xlnx,dout-default-2 = <0x00000000>; | ||
416 | xlnx,gpio-width = <0x1>; | ||
417 | xlnx,gpio2-width = <0x20>; | ||
418 | xlnx,interrupt-present = <0x0>; | ||
419 | xlnx,is-dual = <0x0>; | ||
420 | xlnx,tri-default = <0xFFFFFFFF>; | ||
421 | xlnx,tri-default-2 = <0xFFFFFFFF>; | ||
422 | }; | ||
423 | rs232_uart: serial@44a00000 { | ||
424 | clock-frequency = <200000000>; | ||
425 | clocks = <&clk_bus_0>; | ||
426 | compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a"; | ||
427 | current-speed = <115200>; | ||
428 | device_type = "serial"; | ||
429 | interrupt-parent = <µblaze_0_axi_intc>; | ||
430 | interrupts = <0 2>; | ||
431 | port-number = <0>; | ||
432 | reg = <0x44a00000 0x10000>; | ||
433 | reg-offset = <0x1000>; | ||
434 | reg-shift = <2>; | ||
435 | xlnx,external-xin-clk-hz = <0x17d7840>; | ||
436 | xlnx,external-xin-clk-hz-d = <0x19>; | ||
437 | xlnx,has-external-rclk = <0x0>; | ||
438 | xlnx,has-external-xin = <0x0>; | ||
439 | xlnx,is-a-16550 = <0x1>; | ||
440 | xlnx,s-axi-aclk-freq-hz-d = "200.0"; | ||
441 | xlnx,use-modem-ports = <0x1>; | ||
442 | xlnx,use-user-ports = <0x1>; | ||
443 | }; | ||
444 | }; | ||
445 | }; | ||
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi deleted file mode 100644 index 09b26c6a..00000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * CAUTION: This file is automatically generated by PetaLinux SDK. | ||
3 | * DO NOT modify this file | ||
4 | */ | ||
5 | |||
6 | |||
7 | / { | ||
8 | chosen { | ||
9 | bootargs = "console=ttyS0,115200 earlyprintk"; | ||
10 | stdout-path = "serial0:115200n8"; | ||
11 | }; | ||
12 | }; | ||
13 | |||
14 | &axi_ethernet { | ||
15 | local-mac-address = [00 0a 35 00 22 01]; | ||
16 | }; | ||
17 | |||
18 | &linear_flash { | ||
19 | reg = <0x60000000 0x08000000>; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | partition@0x00000000 { | ||
23 | label = "fpga"; | ||
24 | reg = <0x00000000 0x00b00000>; | ||
25 | }; | ||
26 | partition@0x00b00000 { | ||
27 | label = "boot"; | ||
28 | reg = <0x00b00000 0x00080000>; | ||
29 | }; | ||
30 | partition@0x00b80000 { | ||
31 | label = "bootenv"; | ||
32 | reg = <0x00b80000 0x00020000>; | ||
33 | }; | ||
34 | partition@0x00ba0000 { | ||
35 | label = "kernel"; | ||
36 | reg = <0x00ba0000 0x00c00000>; | ||
37 | }; | ||
38 | partition@0x017a0000 { | ||
39 | label = "spare"; | ||
40 | reg = <0x017a0000 0x00000000>; | ||
41 | }; | ||
42 | }; | ||
43 | |||