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-rw-r--r--meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch359
1 files changed, 0 insertions, 359 deletions
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch
deleted file mode 100644
index 6f5e0b6c..00000000
--- a/meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch
+++ /dev/null
@@ -1,359 +0,0 @@
1From 070b7b1f35dedc41b1ba9a228d701485b2239ac0 Mon Sep 17 00:00:00 2001
2From: Nagaraju Mekala <nmekala@xilix.com>
3Date: Sun, 30 Sep 2018 16:31:26 +0530
4Subject: [PATCH 15/52] MB-X initial commit code cleanup is needed.
5
6Conflicts:
7 bfd/elf32-microblaze.c
8 gas/config/tc-microblaze.c
9 opcodes/microblaze-opcm.h
10---
11 bfd/bfd-in2.h | 10 +++
12 bfd/elf32-microblaze.c | 59 +++++++++++++-
13 bfd/elf64-microblaze.c | 61 ++++++++++++++-
14 bfd/libbfd.h | 2 +
15 bfd/reloc.c | 12 +++
16 gas/config/tc-microblaze.c | 154 ++++++++++++++++++++++++++++++-------
17 include/elf/microblaze.h | 2 +
18 opcodes/microblaze-opc.h | 10 +--
19 opcodes/microblaze-opcm.h | 4 +-
20 9 files changed, 278 insertions(+), 36 deletions(-)
21
22Index: gdb-9.2/bfd/bfd-in2.h
23===================================================================
24--- gdb-9.2.orig/bfd/bfd-in2.h
25+++ gdb-9.2/bfd/bfd-in2.h
26@@ -5374,11 +5374,21 @@ done here - only used for relaxing */
27 BFD_RELOC_MICROBLAZE_64_NONE,
28
29 /* This is a 64 bit reloc that stores the 32 bit pc relative
30+ * +value in two words (with an imml instruction). No relocation is
31+ * +done here - only used for relaxing */
32+ BFD_RELOC_MICROBLAZE_64,
33+
34+/* This is a 64 bit reloc that stores the 32 bit pc relative
35 value in two words (with an imm instruction). The relocation is
36 PC-relative GOT offset */
37 BFD_RELOC_MICROBLAZE_64_GOTPC,
38
39 /* This is a 64 bit reloc that stores the 32 bit pc relative
40+value in two words (with an imml instruction). The relocation is
41+PC-relative GOT offset */
42+ BFD_RELOC_MICROBLAZE_64_GPC,
43+
44+/* This is a 64 bit reloc that stores the 32 bit pc relative
45 value in two words (with an imm instruction). The relocation is
46 GOT offset */
47 BFD_RELOC_MICROBLAZE_64_GOT,
48Index: gdb-9.2/bfd/elf32-microblaze.c
49===================================================================
50--- gdb-9.2.orig/bfd/elf32-microblaze.c
51+++ gdb-9.2/bfd/elf32-microblaze.c
52@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_h
53 0x0000ffff, /* Dest Mask. */
54 TRUE), /* PC relative offset? */
55
56+ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */
57+ 0, /* Rightshift. */
58+ 2, /* Size (0 = byte, 1 = short, 2 = long). */
59+ 16, /* Bitsize. */
60+ TRUE, /* PC_relative. */
61+ 0, /* Bitpos. */
62+ complain_overflow_dont, /* Complain on overflow. */
63+ bfd_elf_generic_reloc,/* Special Function. */
64+ "R_MICROBLAZE_IMML_64", /* Name. */
65+ FALSE, /* Partial Inplace. */
66+ 0, /* Source Mask. */
67+ 0x0000ffff, /* Dest Mask. */
68+ FALSE), /* PC relative offset? */
69+
70 /* A 64 bit relocation. Table entry not really used. */
71 HOWTO (R_MICROBLAZE_64, /* Type. */
72 0, /* Rightshift. */
73@@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_h
74 0x0000ffff, /* Dest Mask. */
75 TRUE), /* PC relative offset? */
76
77+ /* A 64 bit GOTPC relocation. Table-entry not really used. */
78+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */
79+ 0, /* Rightshift. */
80+ 2, /* Size (0 = byte, 1 = short, 2 = long). */
81+ 16, /* Bitsize. */
82+ TRUE, /* PC_relative. */
83+ 0, /* Bitpos. */
84+ complain_overflow_dont, /* Complain on overflow. */
85+ bfd_elf_generic_reloc, /* Special Function. */
86+ "R_MICROBLAZE_GPC_64", /* Name. */
87+ FALSE, /* Partial Inplace. */
88+ 0, /* Source Mask. */
89+ 0x0000ffff, /* Dest Mask. */
90+ TRUE), /* PC relative offset? */
91+
92 /* A 64 bit GOT relocation. Table-entry not really used. */
93 HOWTO (R_MICROBLAZE_GOT_64, /* Type. */
94 0, /* Rightshift. */
95@@ -619,9 +648,15 @@ microblaze_elf_reloc_type_lookup (bfd *
96 case BFD_RELOC_VTABLE_ENTRY:
97 microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
98 break;
99+ case BFD_RELOC_MICROBLAZE_64:
100+ microblaze_reloc = R_MICROBLAZE_IMML_64;
101+ break;
102 case BFD_RELOC_MICROBLAZE_64_GOTPC:
103 microblaze_reloc = R_MICROBLAZE_GOTPC_64;
104 break;
105+ case BFD_RELOC_MICROBLAZE_64_GPC:
106+ microblaze_reloc = R_MICROBLAZE_GPC_64;
107+ break;
108 case BFD_RELOC_MICROBLAZE_64_GOT:
109 microblaze_reloc = R_MICROBLAZE_GOT_64;
110 break;
111@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *ou
112 if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
113 {
114 relocation += addend;
115- if (r_type == R_MICROBLAZE_32)
116+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
117 bfd_put_32 (input_bfd, relocation, contents + offset);
118 else
119 {
120@@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd,
121 irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
122 }
123 break;
124+ case R_MICROBLAZE_IMML_64:
125+ {
126+ /* This was a PC-relative instruction that was
127+ completely resolved. */
128+ int sfix, efix;
129+ unsigned int val;
130+ bfd_vma target_address;
131+ target_address = irel->r_addend + irel->r_offset;
132+ sfix = calc_fixup (irel->r_offset, 0, sec);
133+ efix = calc_fixup (target_address, 0, sec);
134+
135+ /* Validate the in-band val. */
136+ val = bfd_get_32 (abfd, contents + irel->r_offset);
137+ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
138+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
139+ }
140+ irel->r_addend -= (efix - sfix);
141+ /* Should use HOWTO. */
142+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
143+ irel->r_addend);
144+ }
145+ break;
146 case R_MICROBLAZE_NONE:
147 case R_MICROBLAZE_32_NONE:
148 {
149Index: gdb-9.2/bfd/elf64-microblaze.c
150===================================================================
151--- gdb-9.2.orig/bfd/elf64-microblaze.c
152+++ gdb-9.2/bfd/elf64-microblaze.c
153@@ -117,6 +117,21 @@ static reloc_howto_type microblaze_elf_h
154 TRUE), /* PC relative offset? */
155
156 /* A 64 bit relocation. Table entry not really used. */
157+ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */
158+ 0, /* Rightshift. */
159+ 4, /* Size (0 = byte, 1 = short, 2 = long). */
160+ 64, /* Bitsize. */
161+ TRUE, /* PC_relative. */
162+ 0, /* Bitpos. */
163+ complain_overflow_dont, /* Complain on overflow. */
164+ bfd_elf_generic_reloc,/* Special Function. */
165+ "R_MICROBLAZE_IMML_64", /* Name. */
166+ FALSE, /* Partial Inplace. */
167+ 0, /* Source Mask. */
168+ 0x0000ffff, /* Dest Mask. */
169+ TRUE), /* PC relative offset? */
170+
171+ /* A 64 bit relocation. Table entry not really used. */
172 HOWTO (R_MICROBLAZE_64, /* Type. */
173 0, /* Rightshift. */
174 2, /* Size (0 = byte, 1 = short, 2 = long). */
175@@ -265,6 +280,21 @@ static reloc_howto_type microblaze_elf_h
176 0x0000ffff, /* Dest Mask. */
177 TRUE), /* PC relative offset? */
178
179+ /* A 64 bit GOTPC relocation. Table-entry not really used. */
180+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */
181+ 0, /* Rightshift. */
182+ 2, /* Size (0 = byte, 1 = short, 2 = long). */
183+ 16, /* Bitsize. */
184+ TRUE, /* PC_relative. */
185+ 0, /* Bitpos. */
186+ complain_overflow_dont, /* Complain on overflow. */
187+ bfd_elf_generic_reloc, /* Special Function. */
188+ "R_MICROBLAZE_GPC_64", /* Name. */
189+ FALSE, /* Partial Inplace. */
190+ 0, /* Source Mask. */
191+ 0x0000ffff, /* Dest Mask. */
192+ TRUE), /* PC relative offset? */
193+
194 /* A 64 bit GOT relocation. Table-entry not really used. */
195 HOWTO (R_MICROBLAZE_GOT_64, /* Type. */
196 0, /* Rightshift. */
197@@ -589,9 +619,15 @@ microblaze_elf_reloc_type_lookup (bfd *
198 case BFD_RELOC_VTABLE_ENTRY:
199 microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
200 break;
201+ case BFD_RELOC_MICROBLAZE_64:
202+ microblaze_reloc = R_MICROBLAZE_IMML_64;
203+ break;
204 case BFD_RELOC_MICROBLAZE_64_GOTPC:
205 microblaze_reloc = R_MICROBLAZE_GOTPC_64;
206 break;
207+ case BFD_RELOC_MICROBLAZE_64_GPC:
208+ microblaze_reloc = R_MICROBLAZE_GPC_64;
209+ break;
210 case BFD_RELOC_MICROBLAZE_64_GOT:
211 microblaze_reloc = R_MICROBLAZE_GOT_64;
212 break;
213@@ -1172,6 +1208,7 @@ microblaze_elf_relocate_section (bfd *ou
214 break; /* Do nothing. */
215
216 case (int) R_MICROBLAZE_GOTPC_64:
217+ case (int) R_MICROBLAZE_GPC_64:
218 relocation = htab->sgotplt->output_section->vma
219 + htab->sgotplt->output_offset;
220 relocation -= (input_section->output_section->vma
221@@ -1443,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *ou
222 if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
223 {
224 relocation += addend;
225- if (r_type == R_MICROBLAZE_32)
226+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
227 bfd_put_32 (input_bfd, relocation, contents + offset);
228 else
229 {
230@@ -1889,6 +1926,28 @@ microblaze_elf_relax_section (bfd *abfd,
231 irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
232 }
233 break;
234+ case R_MICROBLAZE_IMML_64:
235+ {
236+ /* This was a PC-relative instruction that was
237+ completely resolved. */
238+ int sfix, efix;
239+ unsigned int val;
240+ bfd_vma target_address;
241+ target_address = irel->r_addend + irel->r_offset;
242+ sfix = calc_fixup (irel->r_offset, 0, sec);
243+ efix = calc_fixup (target_address, 0, sec);
244+
245+ /* Validate the in-band val. */
246+ val = bfd_get_32 (abfd, contents + irel->r_offset);
247+ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
248+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
249+ }
250+ irel->r_addend -= (efix - sfix);
251+ /* Should use HOWTO. */
252+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
253+ irel->r_addend);
254+ }
255+ break;
256 case R_MICROBLAZE_NONE:
257 case R_MICROBLAZE_32_NONE:
258 {
259Index: gdb-9.2/bfd/libbfd.h
260===================================================================
261--- gdb-9.2.orig/bfd/libbfd.h
262+++ gdb-9.2/bfd/libbfd.h
263@@ -2905,7 +2905,9 @@ static const char *const bfd_reloc_code_
264 "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
265 "BFD_RELOC_MICROBLAZE_32_NONE",
266 "BFD_RELOC_MICROBLAZE_64_NONE",
267+ "BFD_RELOC_MICROBLAZE_64",
268 "BFD_RELOC_MICROBLAZE_64_GOTPC",
269+ "BFD_RELOC_MICROBLAZE_64_GPC",
270 "BFD_RELOC_MICROBLAZE_64_GOT",
271 "BFD_RELOC_MICROBLAZE_64_PLT",
272 "BFD_RELOC_MICROBLAZE_64_GOTOFF",
273Index: gdb-9.2/bfd/reloc.c
274===================================================================
275--- gdb-9.2.orig/bfd/reloc.c
276+++ gdb-9.2/bfd/reloc.c
277@@ -6815,6 +6815,12 @@ ENUMDOC
278 ENUM
279 BFD_RELOC_MICROBLAZE_64_NONE
280 ENUMDOC
281+ This is a 32 bit reloc that stores the 32 bit pc relative
282+ value in two words (with an imml instruction). No relocation is
283+ done here - only used for relaxing
284+ENUM
285+ BFD_RELOC_MICROBLAZE_64
286+ENUMDOC
287 This is a 64 bit reloc that stores the 32 bit pc relative
288 value in two words (with an imm instruction). No relocation is
289 done here - only used for relaxing
290@@ -6822,6 +6828,12 @@ ENUM
291 BFD_RELOC_MICROBLAZE_64_GOTPC
292 ENUMDOC
293 This is a 64 bit reloc that stores the 32 bit pc relative
294+ value in two words (with an imml instruction). No relocation is
295+ done here - only used for relaxing
296+ENUM
297+ BFD_RELOC_MICROBLAZE_64_GPC
298+ENUMDOC
299+ This is a 64 bit reloc that stores the 32 bit pc relative
300 value in two words (with an imm instruction). The relocation is
301 PC-relative GOT offset
302 ENUM
303Index: gdb-9.2/include/elf/microblaze.h
304===================================================================
305--- gdb-9.2.orig/include/elf/microblaze.h
306+++ gdb-9.2/include/elf/microblaze.h
307@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_relo
308 RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
309 RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
310 RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
311+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
312+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */
313
314 END_RELOC_NUMBERS (R_MICROBLAZE_max)
315
316Index: gdb-9.2/opcodes/microblaze-opc.h
317===================================================================
318--- gdb-9.2.orig/opcodes/microblaze-opc.h
319+++ gdb-9.2/opcodes/microblaze-opc.h
320@@ -282,10 +282,10 @@ struct op_code_struct
321 {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
322 {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
323 {"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst },
324- {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst },
325+ {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, mbi_fadd, arithmetic_inst },
326 {"frsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst },
327- {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst },
328- {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst },
329+ {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, mbi_fmul, arithmetic_inst },
330+ {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, mbi_fdiv, arithmetic_inst },
331 {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
332 {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
333 {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
334@@ -538,8 +538,8 @@ struct op_code_struct
335 {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst },
336 {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst },
337 {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst },
338- {"lli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */
339- {"sli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */
340+ {"lli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */
341+ {"sli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */
342 {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */
343 {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
344 {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
345Index: gdb-9.2/opcodes/microblaze-opcm.h
346===================================================================
347--- gdb-9.2.orig/opcodes/microblaze-opcm.h
348+++ gdb-9.2/opcodes/microblaze-opcm.h
349@@ -40,8 +40,8 @@ enum microblaze_instr
350 imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
351 brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
352 bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
353- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
354- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
355+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
356+ sbi, shi, swi, sli, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
357 fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
358 fint, fsqrt,
359 tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-15 00:21:29 +0000