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-rw-r--r--meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch146
1 files changed, 146 insertions, 0 deletions
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch
new file mode 100644
index 00000000..298765dc
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch
@@ -0,0 +1,146 @@
1From e94d406c9fa0d7b99532bd8cf4b2a4580cdb02b7 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Tue, 17 Jan 2017 17:04:37 +0530
4Subject: [PATCH 16/54] Add cbranchsi4_reg This patch optimizes the generation
5 of pcmpne/pcmpeq instruction if the compare instruction has no immediate
6 values.For the immediate values the xor instruction is generated
7
8Signed-off-by: Nagaraju Mekala <nmekala@xilix.com>
9Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com>
10
11ChangeLog:
122015-01-13 Nagaraju Mekala <nmekala@xilix.com>
13 Ajit Agarwal <ajitkum@xilinx.com>
14
15 *microblaze.md (cbranchsi4_reg): New
16 *microblaze.c (microblaze_expand_conditional_branch_reg): New
17
18Conflicts:
19
20 gcc/config/microblaze/microblaze-protos.h
21---
22 gcc/config/microblaze/microblaze-protos.h | 2 +-
23 gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 2 +-
24 gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 2 +-
25 gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 2 +-
26 gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 2 +-
27 gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 14 +++++++-------
28 gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 12 ++++++------
29 7 files changed, 18 insertions(+), 18 deletions(-)
30
31diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
32index 31a6515176b..41557af0f3c 100644
33--- a/gcc/config/microblaze/microblaze-protos.h
34+++ b/gcc/config/microblaze/microblaze-protos.h
35@@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *);
36 extern bool microblaze_expand_move (machine_mode, rtx *);
37 extern bool microblaze_expand_block_move (rtx, rtx, rtx, rtx);
38 extern void microblaze_expand_divide (rtx *);
39-extern void microblaze_expand_conditional_branch (machine_mode, rtx *);
40+extern void microblaze_expand_conditional_branch (enum machine_mode, rtx *);
41 extern void microblaze_expand_conditional_branch_reg (machine_mode, rtx *);
42 extern void microblaze_expand_conditional_branch_sf (rtx *);
43 extern int microblaze_can_use_return_insn (void);
44diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
45index 4041a241391..ccc6a461cd9 100644
46--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
47+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c
48@@ -6,5 +6,5 @@ void float_func ()
49 {
50 /* { dg-final { scan-assembler "fcmp\.(le|gt)\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
51 if (f2 <= f3)
52- print ("le");
53+ f2 = f3;
54 }
55diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
56index 3902b839db9..1dd5fe6c539 100644
57--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
58+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c
59@@ -6,5 +6,5 @@ void float_func ()
60 {
61 /* { dg-final { scan-assembler "fcmp\.(lt|ge)\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
62 if (f2 < f3)
63- print ("lt");
64+ f2 = f3;
65 }
66diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
67index 8555974dda5..d6f80fb0ec3 100644
68--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
69+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c
70@@ -6,5 +6,5 @@ void float_func ()
71 {
72 /* { dg-final { scan-assembler "fcmp\.(eq|ne)\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
73 if (f2 == f3)
74- print ("eq");
75+ f1 = f2 + f3;
76 }
77diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
78index 79cc5f9dd8e..d1177249552 100644
79--- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
80+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c
81@@ -5,5 +5,5 @@ void float_func(float f1, float f2, float f3)
82 /* { dg-final { scan-assembler "fcmp\.eq\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
83 /* { dg-final { scan-assembler "fcmp\.le\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
84 if(f1==f2 && f1<=f3)
85- print ("f1 eq f2 && f1 le f3");
86+ f2 = f3;
87 }
88diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c
89index ebfb170ecee..75822977ef8 100644
90--- a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c
91+++ b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c
92@@ -5,17 +5,17 @@ volatile float f1, f2, f3;
93 void float_func ()
94 {
95 /* { dg-final { scan-assembler-not "fcmp" } } */
96- if (f2 <= f3)
97- print ("le");
98+ if (f2 <= f3)
99+ f1 = f3;
100 else if (f2 == f3)
101- print ("eq");
102+ f1 = f3;
103 else if (f2 < f3)
104- print ("lt");
105+ f1 = f3;
106 else if (f2 > f3)
107- print ("gt");
108+ f1 = f3;
109 else if (f2 >= f3)
110- print ("ge");
111+ f1 = f3;
112 else if (f2 != f3)
113- print ("ne");
114+ f1 = f3;
115
116 }
117diff --git a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c
118index 1d6ba807b12..532c035adfd 100644
119--- a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c
120+++ b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c
121@@ -74,16 +74,16 @@ void float_cmp_func ()
122 {
123 /* { dg-final { scan-assembler-not "fcmp" } } */
124 if (f2 <= f3)
125- print ("le");
126+ f1 = f3;
127 else if (f2 == f3)
128- print ("eq");
129+ f1 = f3;
130 else if (f2 < f3)
131- print ("lt");
132+ f1 = f3;
133 else if (f2 > f3)
134- print ("gt");
135+ f1 = f3;
136 else if (f2 >= f3)
137- print ("ge");
138+ f1 = f3;
139 else if (f2 != f3)
140- print ("ne");
141+ f1 = f3;
142
143 }
144--
1452.34.1
146
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