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1# Build Instructions to create firmware recipes using fpgamanager_custom bbclass
2
3* [Introduction](#introduction)
4* [How to create a firmware recipe app](#how-to-create-a-firmware-recipe-app)
5* [Test Procedure on Target](#test-procedure-on-target)
6 * [Loading PL bitstream or pdi and dt overlay](#loading-pl-bitstream-or-pdi-and-dt-overlay)
7 * [Testing PL functionality](#testing-pl-functionality)
8 * [Unloading PL bitstream or pdi and dt overlay](#unloading-pl-bitstream-or-pdi-and-dt-overlay)
9* [References](#references)
10
11> **Note:** This README will be deprecated in 2024.1 release. User sthould start
12> using [DFx User DTS README](README.dfx.user.dts.md)
13
14## Introduction
15This readme describes the build instructions to create firmware recipes using
16fpgamanager_custom.bbclass for dynamic configuration. This bitbake class supports
17following use cases.
18
19> **Note:** Refer https://github.com/Xilinx/dfx-mgr/blob/master/README.md for
20> shell.json and accel.json file content.
21
22* **Zynq-7000 and ZynqMP**:
23 * Design: Vivado flat design.
24 * Input files to firmware recipes: .bit, .dtsi or dtbo and shell.json (optional)
25 * Usage Examples:
26```
27SRC_URI = " \
28 file://<flat_design_pl>.bit \
29 file://<flat_design_pl>.dtsi \
30 file://shell.json \
31 "
32```
33
34```
35SRC_URI = " \
36 file://<flat_design_pl>.bit \
37 file://<flat_design_pl>.dtbo \
38 file://shell.json \
39 "
40```
41
42* **ZynqMP and Versal**:
43 * Design: Vivado DFx design.
44 * Input files to firmware recipes: .bit(ZynqMP) or .pdi(Versal), .dtsi or dtbo
45 shell.json or accel.json (optional) and .xclbin (optional).
46 * Usage Examples:
47
48```
49# ZynqMP DFx Static
50SRC_URI = " \
51 file://<dfx_design_static_pl>.bit \
52 file://<dfx_design_static_pl>.dtsi \
53 file://shell.json \
54 file://<dfx_design_static_pl>.xclbin \
55 "
56```
57
58```
59# ZynqMP DFx Static
60SRC_URI = " \
61 file://<dfx_design_static_pl>.bit \
62 file://<dfx_design_static_pl>.dtbo \
63 file://shell.json \
64 file://<dfx_design_static_pl>.xclbin \
65 "
66```
67
68```
69# ZynqMP DFx RP
70SRC_URI = " \
71 file://<dfx_design_rp_rm_pl>.bit \
72 file://<dfx_design_rp_rm_pl>.dtsi \
73 file://accel.json \
74 file://<dfx_design_rp_rm_pl>.xclbin \
75 "
76```
77
78```
79# ZynqMP DFx RP
80SRC_URI = " \
81 file://<dfx_design_rp_rm_pl>.bit \
82 file://<dfx_design_rp_rm_pl>.dtbo \
83 file://accel.json \
84 file://<dfx_design_rp_rm_pl>.xclbin \
85 "
86```
87```
88# Versal DFx Static
89SRC_URI = " \
90 file://<dfx_design_static_pl>.pdi \
91 file://<dfx_design_static_pl>.dtsi \
92 file://shell.json \
93 file://<dfx_design_static_pl>.xclbin \
94 "
95```
96
97```
98# Versal DFx Static
99SRC_URI = " \
100 file://<dfx_design_static_pl>.pdi \
101 file://<dfx_design_static_pl>.dtbo \
102 file://shell.json \
103 file://<dfx_design_static_pl>.xclbin \
104 "
105```
106
107```
108# Versal DFx RP
109SRC_URI = " \
110 file://<dfx_design_rp_rm_pl>.pdi \
111 file://<dfx_design_rp_rm_pl>.dtsi \
112 file://accel.json \
113 file://<dfx_design_rp_rm_pl>.xclbin \
114 "
115```
116
117```
118# Versal DFx RP
119SRC_URI = " \
120 file://<dfx_design_rp_rm_pl>.pdi \
121 file://<dfx_design_rp_rm_pl>.dtbo \
122 file://accel.json \
123 file://<dfx_design_rp_rm_pl>.xclbin \
124 "
125```
126---
127
128## How to create a firmware recipe app
129
1301. Follow [Building Instructions](../README.building.md) upto step 4.
1312. Create recipes-firmware directory in meta layer and copy the .bit/pdi,
132 .dtsi/dtbo, .json and .xclbin file to these directories.
133```
134$ mkdir -p <meta-layer>/recipes-firmware/<recipes-firmware-app>/files
135$ cp -r <path-to-files>/*.{bit or pdi, dtsi or dtbo, shell.json or accel.json and .xclbin} <meta-layer>/recipes-firmware/<firmware-app-name>/files
136```
1373. Now create the recipes for flat or static or partial firmware using recipetool.
138```
139$ recipetool create -o <meta-layer>/recipes-firmware/<firmware-app-name>/firmware-app-name.bb file:///<meta-layer>/recipes-firmware/<firmware-app-name>/files
140```
1414. Modify the recipe and inherit fpgamanager_custom bbclass as shown below.
142```
143SUMMARY = "Full Bitstream loading zcu111-pl-demo firmware using fpgamanager_custom bbclass"
144LICENSE = "MIT"
145LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
146
147inherit fpgamanager_custom
148
149SRC_URI = "\
150 file://zcu111-pl-demo.bit \
151 file://zcu111-pl-demo.dtsi \
152 "
153
154COMPATIBLE_MACHINE ?= "^$"
155COMPATIBLE_MACHINE:zynqmp = "zynqmp"
156```
1575. Add firmware-recipe app to image and enable fpga-overlay machine features to
158 local.conf as shown below.
159> **Note:** fpga-manager-script provides fpgautil tool to load .bit/pdi and dtbo
160> at runtime linux.
161```
162MACHINE_FEATURES += "fpga-overlay"
163IMAGE_INSTALL:append = " \
164 firmware-app-name \
165 fpga-manager-script \
166 "
167```
1686. Follow [Building Instructions](../README.building.md) and continue from step 5.
1697. Once images are built firmware app files will be installed on target_rootfs.
170```
171# <target_rootfs>/lib/firmware/xilinx/firmware-app-name
172```
173---
174
175## Test Procedure on Target
176* Once Linux boots on target, use fpgautil command to load .bit or .pdi and
177 corresponding dt overlay as shown below.
178> **Note:** firmware can be loaded only with sudo or root permissions.
179---
180
181### Loading PL bitstream or pdi and dt overlay
182
183* ZynqMP
184```
185yocto-zynqmp-generic-20231:~$ sudo su
186yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
187 CPU0 CPU1 CPU2 CPU3
188 11: 13309 13021 13673 14170 GICv2 30 Level arch_timer
189 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
190 15: 0 0 0 0 GICv2 175 Level arm-pmu
191 16: 0 0 0 0 GICv2 176 Level arm-pmu
192 17: 0 0 0 0 GICv2 177 Level arm-pmu
193 18: 0 0 0 0 GICv2 178 Level arm-pmu
194 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
195 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
196 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
197 22: 0 0 0 0 GICv2 88 Level ams-irq
198 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
199 24: 327 0 0 0 GICv2 53 Level xuartps
200 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
201 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
202 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
203 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
204 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
205 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
206 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
207 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
208 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
209 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
210 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
211 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
212 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
213 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
214 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
215 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
216 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
217 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
218 45: 76 0 0 0 GICv2 95 Level eth0, eth0
219 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
220 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
221 48: 501 0 0 0 GICv2 50 Level cdns-i2c
222 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
223 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
224 52: 548 0 0 0 GICv2 81 Level mmc0
225 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
226 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
227 55: 0 0 0 0 zynq-gpio 22 Edge sw19
228IPI0: 64 25 87 38 Rescheduling interrupts
229IPI1: 1933 6579 1096 5686 Function call interrupts
230IPI2: 0 0 0 0 CPU stop interrupts
231IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
232IPI4: 0 0 0 0 Timer broadcast interrupts
233IPI5: 0 0 0 0 IRQ work interrupts
234IPI6: 0 0 0 0 CPU wake-up interrupts
235Err: 0
236yocto-zynqmp-generic-20231:/home/petalinux# tree /lib/firmware/
237/lib/firmware/
238`-- xilinx
239 `-- zcu111-pl-demo
240 |-- zcu111-pl-demo.bit.bin
241 `-- zcu111-pl-demo.dtbo
242
2432 directories, 2 files
244yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo
245[ 91.039773] fpga_manager fpga0: writing zcu111-pl-demo.bit to Xilinx ZynqMP FPGA Manager
246[ 91.528214] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/firmware-name
247[ 91.538354] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/pid
248[ 91.547598] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/resets
249[ 91.557087] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/uid
250[ 91.566804] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/afi0
251[ 91.576312] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/clocking0
252[ 91.586255] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_0
253[ 91.596280] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/misc_clk_0
254[ 91.606300] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_1
255[ 91.616325] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_2
256[ 91.626342] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0
257[ 91.636705] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ddr4_0
258[ 91.661849] gpio gpiochip3: (a0000000.gpio): not an immutable chip, please consider fixing it!
259[ 91.662020] gpio gpiochip4: (a0010000.gpio): not an immutable chip, please consider fixing it!
260[ 91.863492] a0030000.serial: ttyUL0 at MMIO 0xa0030000 (irq = 58, base_baud = 0) is a uartlite
261[ 91.876674] uartlite a0030000.serial: Runtime PM usage count underflow!
262[ 91.906539] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input1
263Time taken to load BIN is 901.000000 Milli Seconds
264BIN FILE loaded through FPGA manager successfully
265yocto-zynqmp-generic-20231:/home/petalinux#
266```
267* Versal (DFx Static)
268```
269yocto-vck190-dfx-2023:~$ sudo su
270root@yocto-vck190-dfx-2023:~#
271root@yocto-vck190-dfx-2023:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
272[ 257.555571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config
273[ 257.565879] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
274[ 257.574670] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
275[ 257.583599] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR0
276[ 257.593434] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR1
277[ 257.603268] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR2
278[ 257.613100] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_axi_bram_ctrl_0
279[ 257.624762] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp1
280[ 257.636589] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp2
281[ 257.648415] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp3
282[ 257.663234] of-fpga-region fpga:fpga-PR0: FPGA Region probed
283[ 257.669135] of-fpga-region fpga:fpga-PR1: FPGA Region probed
284[ 257.675022] of-fpga-region fpga:fpga-PR2: FPGA Region probed
285root@yocto-vck190-dfx-2023:~#
286```
287* Versal (DFx RP)
288```
289root@yocto-vck190-dfx-2023:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
290[ 273.511455] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager
291[284052.461]Loading PDI from DDR
292[284052.566]Monolithic/Master Device
293[284055.847]3.365 ms: PDI initialization time
294[284059.809]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700002
295[284065.432]---Loading Partition#: 0x0, Id: 0x103
296[284069.829] 0.033 ms for Partition#: 0x0, Size: 1312 Bytes
297[284074.973]---Loading Partition#: 0x1, Id: 0x105
298[284079.344] 0.007 ms for Partition#: 0x1, Size: 160 Bytes
299[284084.430]---Loading Partition#: 0x2, Id: 0x205
300[284088.844] 0.049 ms for Partition#: 0x2, Size: 960 Bytes
301[284093.887]---Loading Partition#: 0x3, Id: 0x203
302[284098.280] 0.030 ms for Partition#: 0x3, Size: 688 Bytes
303[284103.342]---Loading Partition#: 0x4, Id: 0x303
304[284108.863] 1.156 ms for Partition#: 0x4, Size: 209440 Bytes
305[284113.052]---Loading Partition#: 0x5, Id: 0x305
306[284117.712] 0.296 ms for Partition#: 0x5, Size: 3536 Bytes
307[284122.594]---Loading Partition#: 0x6, Id: 0x403
308[284126.991] 0.034 ms for Partition#: 0x6, Size: 8096 Bytes
309[284132.136]---Loading Partition#: 0x7, Id: 0x405
310[284136.507] 0.007 ms for Partition#: 0x7, Size: 160 Bytes
311[284141.636]Subsystem PDI Load: Done
312[ 273.615503] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/firmware-name
313[ 273.627382] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/fpga-bridges
314[ 273.636953] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/partial-fpga-config
315[ 273.647241] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/rp1_axi_gpio_0
316[ 273.660826] gpio gpiochip1: (a4010000.gpio): not an immutable chip, please consider fixing it!
317[ 273.670490] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input0
318Time taken to load BIN is 171.000000 Milli Seconds
319BIN FILE loaded through FPGA manager successfully
320root@yocto-vck190-dfx-2023:~#
321```
322---
323
324### Testing PL functionality
325
326* This examples uses PL GPIO DIP switches and Push buttons to capture interrupts.
327* Verify PL GPIO DIP switches and Push buttons are registered.
328* Move the DIP Switches ON/OFF and verify the interrupt counts.
329```
330yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
331 CPU0 CPU1 CPU2 CPU3
332 11: 23303 22971 24203 24990 GICv2 30 Level arch_timer
333 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
334 15: 0 0 0 0 GICv2 175 Level arm-pmu
335 16: 0 0 0 0 GICv2 176 Level arm-pmu
336 17: 0 0 0 0 GICv2 177 Level arm-pmu
337 18: 0 0 0 0 GICv2 178 Level arm-pmu
338 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
339 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
340 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
341 22: 0 0 0 0 GICv2 88 Level ams-irq
342 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
343 24: 515 0 0 0 GICv2 53 Level xuartps
344 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
345 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
346 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
347 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
348 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
349 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
350 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
351 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
352 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
353 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
354 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
355 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
356 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
357 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
358 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
359 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
360 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
361 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
362 45: 110 0 0 0 GICv2 95 Level eth0, eth0
363 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
364 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
365 48: 501 0 0 0 GICv2 50 Level cdns-i2c
366 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
367 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
368 52: 548 0 0 0 GICv2 81 Level mmc0
369 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
370 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
371 55: 0 0 0 0 zynq-gpio 22 Edge sw19
372 59: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
373 60: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
374 61: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
375 62: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
376 63: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
377 64: 0 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
378 65: 0 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
379 66: 0 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
380 67: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
381 68: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
382 69: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
383 70: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
384 71: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
385IPI0: 64 25 87 38 Rescheduling interrupts
386IPI1: 2066 6747 1212 5791 Function call interrupts
387IPI2: 0 0 0 0 CPU stop interrupts
388IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
389IPI4: 0 0 0 0 Timer broadcast interrupts
390IPI5: 0 0 0 0 IRQ work interrupts
391IPI6: 0 0 0 0 CPU wake-up interrupts
392Err: 0
393yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
394 CPU0 CPU1 CPU2 CPU3
395 11: 28169 27725 29250 30190 GICv2 30 Level arch_timer
396 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
397 15: 0 0 0 0 GICv2 175 Level arm-pmu
398 16: 0 0 0 0 GICv2 176 Level arm-pmu
399 17: 0 0 0 0 GICv2 177 Level arm-pmu
400 18: 0 0 0 0 GICv2 178 Level arm-pmu
401 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
402 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
403 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
404 22: 0 0 0 0 GICv2 88 Level ams-irq
405 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
406 24: 603 0 0 0 GICv2 53 Level xuartps
407 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
408 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
409 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
410 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
411 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
412 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
413 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
414 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
415 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
416 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
417 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
418 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
419 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
420 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
421 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
422 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
423 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
424 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
425 45: 134 0 0 0 GICv2 95 Level eth0, eth0
426 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
427 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
428 48: 501 0 0 0 GICv2 50 Level cdns-i2c
429 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
430 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
431 52: 548 0 0 0 GICv2 81 Level mmc0
432 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
433 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
434 55: 0 0 0 0 zynq-gpio 22 Edge sw19
435 59: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
436 60: 4 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
437 61: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
438 62: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
439 63: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
440 64: 2 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
441 65: 2 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
442 66: 4 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
443 67: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
444 68: 2 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
445 69: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
446 70: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
447 71: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
448IPI0: 64 26 87 38 Rescheduling interrupts
449IPI1: 2163 6791 1243 5866 Function call interrupts
450IPI2: 0 0 0 0 CPU stop interrupts
451IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
452IPI4: 0 0 0 0 Timer broadcast interrupts
453IPI5: 0 0 0 0 IRQ work interrupts
454IPI6: 0 0 0 0 CPU wake-up interrupts
455Err: 0
456yocto-zynqmp-generic-20231:/home/petalinux#
457```
458---
459
460### Unloading PL bitstream or pdi and dt overlay
461* Zynq or ZynqMP
462```
463yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -R
464```
465* Versal (DFx RP)
466```
467root@yocto-vck190-dfx-2023:~# fpgautil -R -n PR0
468```
469* Versal (DFx Static)
470```
471root@yocto-vck190-dfx-2023:~# fpgautil -R -n Full
472```
473---
474
475## References
476* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841645/Solution+Zynq+PL+Programming+With+FPGA+Manager
477* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming
478* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1188397412/Solution+Versal+PL+Programming
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