diff options
173 files changed, 3249 insertions, 6967 deletions
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc index ed6e75b2..e10c34ff 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc +++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc | |||
@@ -1,54 +1,44 @@ | |||
1 | FILESEXTRAPATHS_append := ":${THISDIR}/binutils" | 1 | FILESEXTRAPATHS_append := ":${THISDIR}/binutils" |
2 | 2 | ||
3 | SRC_URI_append = " \ | 3 | SRC_URI_append = " \ |
4 | file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ | 4 | file://0001-sim-Allow-microblaze-architecture.patch \ |
5 | file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \ | 5 | file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ |
6 | file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \ | 6 | file://0003-Add-mlittle-endian-and-mbig-endian-flags.patch \ |
7 | file://0004-Fix-relaxation-of-assembler-resolved-references.patch \ | 7 | file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \ |
8 | file://0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch \ | 8 | file://0005-Fix-relaxation-of-assembler-resolved-references.patch \ |
9 | file://0006-upstream-change-to-garbage-collection-sweep-causes-m.patch \ | 9 | file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \ |
10 | file://0007-Fix-bug-in-TLSTPREL-Relocation.patch \ | 10 | file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \ |
11 | file://0008-Added-Address-extension-instructions.patch \ | 11 | file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \ |
12 | file://0009-fixing-the-MAX_OPCODES-to-correct-value.patch \ | 12 | file://0009-Added-Address-extension-instructions.patch \ |
13 | file://0010-Add-new-bit-field-instructions.patch \ | 13 | file://0010-Add-new-bit-field-instructions.patch \ |
14 | file://0011-fixing-the-imm-bug.patch \ | 14 | file://0011-fixing-the-imm-bug.patch \ |
15 | file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \ | 15 | file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \ |
16 | file://0013-fixing-the-constant-range-check-issue.patch \ | 16 | file://0013-fixing-the-constant-range-check-issue.patch \ |
17 | file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \ | 17 | file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \ |
18 | file://0015-intial-commit-of-MB-64-bit.patch \ | 18 | file://0015-intial-commit-of-MB-64-bit.patch \ |
19 | file://0016-MB-X-initial-commit.patch \ | 19 | file://0016-MB-X-initial-commit.patch \ |
20 | file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \ | 20 | file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \ |
21 | file://0018-Added-relocations-for-MB-X.patch \ | 21 | file://0018-Added-relocations-for-MB-X.patch \ |
22 | file://0019-Fixed-MB-x-relocation-issues.patch \ | 22 | file://0019-Update-MB-x.patch \ |
23 | file://0020-Fixing-the-branch-related-issues.patch \ | 23 | file://0020-Various-fixes.patch \ |
24 | file://0021-Fixed-address-computation-issues-with-64bit-address.patch \ | 24 | file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \ |
25 | file://0022-Adding-new-relocation-to-support-64bit-rodata.patch \ | 25 | file://0022-fixing-the-.bss-relocation-issue.patch \ |
26 | file://0023-fixing-the-.bss-relocation-issue.patch \ | 26 | file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \ |
27 | file://0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \ | 27 | file://0024-Revert-ld-Remove-unused-expression-state.patch \ |
28 | file://0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch \ | 28 | file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \ |
29 | file://0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch \ | 29 | file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \ |
30 | file://0027-Revert-ld-Remove-unused-expression-state.patch \ | 30 | file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \ |
31 | file://0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch \ | 31 | file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \ |
32 | file://0029-fixing-the-long-long-long-mingw-toolchain-issue.patch \ | 32 | file://0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \ |
33 | file://0030-Added-support-to-new-arithmetic-single-register-inst.patch \ | 33 | file://0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch \ |
34 | file://0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \ | 34 | file://0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch \ |
35 | file://0032-Add-initial-port-of-linux-gdbserver.patch \ | 35 | file://0032-gas-revert-moving-of-md_pseudo_table-from-const.patch \ |
36 | file://0033-Initial-port-of-core-reading-support.patch \ | 36 | file://0033-Fix-various-compile-warnings.patch \ |
37 | file://0034-Fix-debug-message-when-register-is-unavailable.patch \ | 37 | file://0034-Add-initial-port-of-linux-gdbserver.patch \ |
38 | file://0035-revert-master-rebase-changes-to-gdbserver.patch \ | 38 | file://0035-Initial-port-of-core-reading-support.patch \ |
39 | file://0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch \ | 39 | file://0036-Fix-debug-message-when-register-is-unavailable.patch \ |
40 | file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \ | 40 | file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \ |
41 | file://0038-Initial-support-for-native-gdb.patch \ | 41 | file://0038-Initial-support-for-native-gdb.patch \ |
42 | file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \ | 42 | file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \ |
43 | file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \ | 43 | file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \ |
44 | file://0041-patch-MicroBlaze-porting-GDB-for-linux.patch \ | 44 | " |
45 | file://0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \ | ||
46 | file://0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \ | ||
47 | file://0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch \ | ||
48 | file://0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \ | ||
49 | file://0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch \ | ||
50 | file://0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch \ | ||
51 | file://0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch \ | ||
52 | file://0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch \ | ||
53 | file://0050-Fix-i386-md_pseudo_table.patch \ | ||
54 | " | ||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch new file mode 100644 index 00000000..9671968a --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch | |||
@@ -0,0 +1,40 @@ | |||
1 | From 501b60af6b36fc69987e1610645742f5593a6da2 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
3 | Date: Thu, 6 Aug 2020 15:37:52 -0500 | ||
4 | Subject: [PATCH 01/40] sim: Allow microblaze* architecture | ||
5 | |||
6 | Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
7 | --- | ||
8 | sim/configure | 2 +- | ||
9 | sim/configure.tgt | 2 +- | ||
10 | 2 files changed, 2 insertions(+), 2 deletions(-) | ||
11 | |||
12 | diff --git a/sim/configure b/sim/configure | ||
13 | index 72f95cd5c7a..9e28cc78687 100755 | ||
14 | --- a/sim/configure | ||
15 | +++ b/sim/configure | ||
16 | @@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64" | ||
17 | |||
18 | |||
19 | ;; | ||
20 | - microblaze-*-*) | ||
21 | + microblaze*-*-*) | ||
22 | |||
23 | sim_arch=microblaze | ||
24 | subdirs="$subdirs microblaze" | ||
25 | diff --git a/sim/configure.tgt b/sim/configure.tgt | ||
26 | index 8a8e03d96f4..f6743fe8d41 100644 | ||
27 | --- a/sim/configure.tgt | ||
28 | +++ b/sim/configure.tgt | ||
29 | @@ -59,7 +59,7 @@ case "${target}" in | ||
30 | mcore-*-*) | ||
31 | SIM_ARCH(mcore) | ||
32 | ;; | ||
33 | - microblaze-*-*) | ||
34 | + microblaze*-*-*) | ||
35 | SIM_ARCH(microblaze) | ||
36 | ;; | ||
37 | mips*-*-*) | ||
38 | -- | ||
39 | 2.17.1 | ||
40 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch index e0de79fd..039bfc96 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 247ead894f7079a4ededf2b48a65ffa6e78e2222 Mon Sep 17 00:00:00 2001 | 1 | From b8e39d2a6b83d0f0a14d4bfeafd47a37d746f159 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | 2 | From: David Holsgrove <david.holsgrove@xilinx.com> |
3 | Date: Wed, 8 May 2013 11:03:36 +1000 | 3 | Date: Wed, 8 May 2013 11:03:36 +1000 |
4 | Subject: [PATCH 01/43] Add wdc.ext.clear and wdc.ext.flush insns | 4 | Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns |
5 | 5 | ||
6 | Added two new instructions, wdc.ext.clear and wdc.ext.flush, | 6 | Added two new instructions, wdc.ext.clear and wdc.ext.flush, |
7 | to enable MicroBlaze to flush an external cache, which is | 7 | to enable MicroBlaze to flush an external cache, which is |
@@ -15,7 +15,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
15 | 2 files changed, 6 insertions(+), 3 deletions(-) | 15 | 2 files changed, 6 insertions(+), 3 deletions(-) |
16 | 16 | ||
17 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 17 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
18 | index 62ee3c9a4d..865151f95b 100644 | 18 | index 27d8684df04..b6c5016e4d2 100644 |
19 | --- a/opcodes/microblaze-opc.h | 19 | --- a/opcodes/microblaze-opc.h |
20 | +++ b/opcodes/microblaze-opc.h | 20 | +++ b/opcodes/microblaze-opc.h |
21 | @@ -91,6 +91,7 @@ | 21 | @@ -91,6 +91,7 @@ |
@@ -46,7 +46,7 @@ index 62ee3c9a4d..865151f95b 100644 | |||
46 | {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, | 46 | {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, |
47 | {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, | 47 | {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, |
48 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 48 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
49 | index 5a2d3b0c8b..42f3dd3be5 100644 | 49 | index aa53dfe6bb5..795c57b5ff6 100644 |
50 | --- a/opcodes/microblaze-opcm.h | 50 | --- a/opcodes/microblaze-opcm.h |
51 | +++ b/opcodes/microblaze-opcm.h | 51 | +++ b/opcodes/microblaze-opcm.h |
52 | @@ -33,8 +33,8 @@ enum microblaze_instr | 52 | @@ -33,8 +33,8 @@ enum microblaze_instr |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch index 98e40c0e..2d4d65e4 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 7163824e07ade3ad2dc24e888265d27e0bc87869 Mon Sep 17 00:00:00 2001 | 1 | From d2a03159f8643b1c6a2db5d95c478540cc6ca6c4 Mon Sep 17 00:00:00 2001 |
2 | From: nagaraju <nmekala@xilix.com> | 2 | From: nagaraju <nmekala@xilix.com> |
3 | Date: Tue, 19 Mar 2013 17:18:23 +0530 | 3 | Date: Tue, 19 Mar 2013 17:18:23 +0530 |
4 | Subject: [PATCH 02/43] Add mlittle-endian and mbig-endian flags | 4 | Subject: [PATCH 03/40] Add mlittle-endian and mbig-endian flags |
5 | 5 | ||
6 | Added support in gas for mlittle-endian and mbig-endian flags | 6 | Added support in gas for mlittle-endian and mbig-endian flags |
7 | as options. | 7 | as options. |
@@ -16,7 +16,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
16 | 1 file changed, 9 insertions(+) | 16 | 1 file changed, 9 insertions(+) |
17 | 17 | ||
18 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 18 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
19 | index ab90c6b20f..c92e9ce563 100644 | 19 | index ae5d36dc9c3..34eeb972357 100644 |
20 | --- a/gas/config/tc-microblaze.c | 20 | --- a/gas/config/tc-microblaze.c |
21 | +++ b/gas/config/tc-microblaze.c | 21 | +++ b/gas/config/tc-microblaze.c |
22 | @@ -37,6 +37,8 @@ | 22 | @@ -37,6 +37,8 @@ |
@@ -28,7 +28,7 @@ index ab90c6b20f..c92e9ce563 100644 | |||
28 | 28 | ||
29 | void microblaze_generate_symbol (char *sym); | 29 | void microblaze_generate_symbol (char *sym); |
30 | static bfd_boolean check_spl_reg (unsigned *); | 30 | static bfd_boolean check_spl_reg (unsigned *); |
31 | @@ -1845,6 +1847,8 @@ struct option md_longopts[] = | 31 | @@ -1842,6 +1844,8 @@ struct option md_longopts[] = |
32 | { | 32 | { |
33 | {"EB", no_argument, NULL, OPTION_EB}, | 33 | {"EB", no_argument, NULL, OPTION_EB}, |
34 | {"EL", no_argument, NULL, OPTION_EL}, | 34 | {"EL", no_argument, NULL, OPTION_EL}, |
@@ -37,7 +37,7 @@ index ab90c6b20f..c92e9ce563 100644 | |||
37 | { NULL, no_argument, NULL, 0} | 37 | { NULL, no_argument, NULL, 0} |
38 | }; | 38 | }; |
39 | 39 | ||
40 | @@ -2498,9 +2502,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) | 40 | @@ -2494,9 +2498,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) |
41 | switch (c) | 41 | switch (c) |
42 | { | 42 | { |
43 | case OPTION_EB: | 43 | case OPTION_EB: |
@@ -49,7 +49,7 @@ index ab90c6b20f..c92e9ce563 100644 | |||
49 | target_big_endian = 0; | 49 | target_big_endian = 0; |
50 | break; | 50 | break; |
51 | default: | 51 | default: |
52 | @@ -2515,6 +2521,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) | 52 | @@ -2511,6 +2517,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) |
53 | /* fprintf(stream, _("\ | 53 | /* fprintf(stream, _("\ |
54 | MicroBlaze options:\n\ | 54 | MicroBlaze options:\n\ |
55 | -noSmall Data in the comm and data sections do not go into the small data section\n")); */ | 55 | -noSmall Data in the comm and data sections do not go into the small data section\n")); */ |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch index 445f5dd8..f7b9c7b0 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 2b9eec7fdfae66c5500baef444559976d1b20e0b Mon Sep 17 00:00:00 2001 | 1 | From a8d621e5ab335e6e61de0f081036b4705071fb74 Mon Sep 17 00:00:00 2001 |
2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> | 2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> |
3 | Date: Fri, 22 Jun 2012 01:20:20 +0200 | 3 | Date: Fri, 22 Jun 2012 01:20:20 +0200 |
4 | Subject: [PATCH 03/43] Disable the warning message for eh_frame_hdr | 4 | Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr |
5 | 5 | ||
6 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 6 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | |||
9 | 1 file changed, 3 insertions(+) | 9 | 1 file changed, 3 insertions(+) |
10 | 10 | ||
11 | diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c | 11 | diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c |
12 | index a13e81ebb8..1824ba6e5b 100644 | 12 | index 7a129b00f8d..d5e4a5c062d 100644 |
13 | --- a/bfd/elf-eh-frame.c | 13 | --- a/bfd/elf-eh-frame.c |
14 | +++ b/bfd/elf-eh-frame.c | 14 | +++ b/bfd/elf-eh-frame.c |
15 | @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, | 15 | @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, |
@@ -24,8 +24,8 @@ index a13e81ebb8..1824ba6e5b 100644 | |||
24 | abfd, sec); | 24 | abfd, sec); |
25 | +} | 25 | +} |
26 | hdr_info->u.dwarf.table = FALSE; | 26 | hdr_info->u.dwarf.table = FALSE; |
27 | if (sec_info) | 27 | free (sec_info); |
28 | free (sec_info); | 28 | success: |
29 | -- | 29 | -- |
30 | 2.17.1 | 30 | 2.17.1 |
31 | 31 | ||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch index d1b754c3..14a4f329 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-relaxation-of-assembler-resolved-references.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch | |||
@@ -1,18 +1,18 @@ | |||
1 | From ababe1df64146c616455eb1af4cf8fd21eb6f42c Mon Sep 17 00:00:00 2001 | 1 | From c4ce6cb47613293e02837fc00c2c2ebfcdd596f6 Mon Sep 17 00:00:00 2001 |
2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> | 2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> |
3 | Date: Tue, 14 Feb 2012 01:00:22 +0100 | 3 | Date: Tue, 14 Feb 2012 01:00:22 +0100 |
4 | Subject: [PATCH 04/43] Fix relaxation of assembler resolved references | 4 | Subject: [PATCH 05/40] Fix relaxation of assembler resolved references |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/elf32-microblaze.c | 38 ++++++++++++++++++++++++++++++++++++++ | 7 | bfd/elf32-microblaze.c | 41 ++++++++++++++++++++++++++++++++++++++ |
8 | gas/config/tc-microblaze.c | 1 + | 8 | gas/config/tc-microblaze.c | 1 + |
9 | 2 files changed, 39 insertions(+) | 9 | 2 files changed, 42 insertions(+) |
10 | 10 | ||
11 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 11 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
12 | index e3c8027248..359484dd5e 100644 | 12 | index 693fc71f730..09dedc46106 100644 |
13 | --- a/bfd/elf32-microblaze.c | 13 | --- a/bfd/elf32-microblaze.c |
14 | +++ b/bfd/elf32-microblaze.c | 14 | +++ b/bfd/elf32-microblaze.c |
15 | @@ -1973,6 +1973,44 @@ microblaze_elf_relax_section (bfd *abfd, | 15 | @@ -1969,6 +1969,47 @@ microblaze_elf_relax_section (bfd *abfd, |
16 | irelscanend = irelocs + o->reloc_count; | 16 | irelscanend = irelocs + o->reloc_count; |
17 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 17 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
18 | { | 18 | { |
@@ -45,9 +45,12 @@ index e3c8027248..359484dd5e 100644 | |||
45 | + elf_section_data (o)->this_hdr.contents = ocontents; | 45 | + elf_section_data (o)->this_hdr.contents = ocontents; |
46 | + } | 46 | + } |
47 | + } | 47 | + } |
48 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend | ||
49 | + + isym->st_value, sec); | ||
50 | + val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); | 48 | + val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); |
49 | + if (val != irelscan->r_addend) { | ||
50 | + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); | ||
51 | + } | ||
52 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend | ||
53 | + + isym->st_value, 0, sec); | ||
51 | + microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 54 | + microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
52 | + irelscan->r_addend); | 55 | + irelscan->r_addend); |
53 | + } | 56 | + } |
@@ -58,10 +61,10 @@ index e3c8027248..359484dd5e 100644 | |||
58 | { | 61 | { |
59 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 62 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
60 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 63 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
61 | index c92e9ce563..3e728400b7 100644 | 64 | index 34eeb972357..d01653aeef9 100644 |
62 | --- a/gas/config/tc-microblaze.c | 65 | --- a/gas/config/tc-microblaze.c |
63 | +++ b/gas/config/tc-microblaze.c | 66 | +++ b/gas/config/tc-microblaze.c |
64 | @@ -2205,6 +2205,7 @@ md_apply_fix (fixS * fixP, | 67 | @@ -2201,6 +2201,7 @@ md_apply_fix (fixS * fixP, |
65 | else | 68 | else |
66 | fixP->fx_r_type = BFD_RELOC_NONE; | 69 | fixP->fx_r_type = BFD_RELOC_NONE; |
67 | fixP->fx_addsy = section_symbol (absolute_section); | 70 | fixP->fx_addsy = section_symbol (absolute_section); |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch index ac13e6e3..308a453e 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch | |||
@@ -1,10 +1,12 @@ | |||
1 | From e9837b5aec42b084c93868095b409f9a6a81b570 Mon Sep 17 00:00:00 2001 | 1 | From 77c9dd2085e5a9e116cd8d8b4fbc1387c93d26d8 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 6 Feb 2017 15:53:08 +0530 | 3 | Date: Mon, 6 Feb 2017 15:53:08 +0530 |
4 | Subject: [PATCH 05/43] [LOCAL]: Fixup debug_loc sections after linker | 4 | Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker |
5 | relaxation Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing reloc | 5 | relaxation |
6 | info from the assembler to the linker when the linker manages to fully | 6 | |
7 | resolve a local symbol reference. | 7 | Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing |
8 | reloc info from the assembler to the linker when the linker | ||
9 | manages to fully resolve a local symbol reference. | ||
8 | 10 | ||
9 | This is a workaround for design flaws in the assembler to | 11 | This is a workaround for design flaws in the assembler to |
10 | linker interface with regards to linker relaxation. | 12 | linker interface with regards to linker relaxation. |
@@ -12,46 +14,39 @@ linker interface with regards to linker relaxation. | |||
12 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 14 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
13 | Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> | 15 | Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> |
14 | --- | 16 | --- |
15 | bfd/bfd-in2.h | 9 +++++-- | 17 | bfd/bfd-in2.h | 5 +++++ |
16 | bfd/elf32-microblaze.c | 53 ++++++++++++++++++++++++++++---------- | 18 | bfd/elf32-microblaze.c | 39 +++++++++++++++++++++++++++++++------- |
17 | bfd/libbfd.h | 1 + | 19 | bfd/libbfd.h | 1 + |
18 | bfd/reloc.c | 6 +++++ | 20 | bfd/reloc.c | 6 ++++++ |
19 | binutils/readelf.c | 4 +++ | 21 | binutils/readelf.c | 4 ++++ |
20 | gas/config/tc-microblaze.c | 5 +++- | 22 | gas/config/tc-microblaze.c | 3 +++ |
21 | include/elf/microblaze.h | 2 ++ | 23 | include/elf/microblaze.h | 1 + |
22 | 7 files changed, 64 insertions(+), 16 deletions(-) | 24 | 7 files changed, 52 insertions(+), 7 deletions(-) |
23 | 25 | ||
24 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 26 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
25 | index e25da50aaf..721531886a 100644 | 27 | index 35ef4d755bb..3fdbf8ed755 100644 |
26 | --- a/bfd/bfd-in2.h | 28 | --- a/bfd/bfd-in2.h |
27 | +++ b/bfd/bfd-in2.h | 29 | +++ b/bfd/bfd-in2.h |
28 | @@ -5866,10 +5866,15 @@ value relative to the read-write small data area anchor */ | 30 | @@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor */ |
29 | expressions of the form "Symbol Op Symbol" */ | 31 | expressions of the form "Symbol Op Symbol" */ |
30 | BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, | 32 | BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, |
31 | 33 | ||
32 | -/* This is a 64 bit reloc that stores the 32 bit pc relative | ||
33 | +/* This is a 32 bit reloc that stores the 32 bit pc relative | 34 | +/* This is a 32 bit reloc that stores the 32 bit pc relative |
34 | value in two words (with an imm instruction). No relocation is | 35 | +value in two words (with an imm instruction). No relocation is |
35 | done here - only used for relaxing */ | 36 | +done here - only used for relaxing */ |
36 | - BFD_RELOC_MICROBLAZE_64_NONE, | ||
37 | + BFD_RELOC_MICROBLAZE_32_NONE, | 37 | + BFD_RELOC_MICROBLAZE_32_NONE, |
38 | + | 38 | + |
39 | +/* This is a 64 bit reloc that stores the 32 bit pc relative | ||
40 | + * +value in two words (with an imm instruction). No relocation is | ||
41 | + * +done here - only used for relaxing */ | ||
42 | + BFD_RELOC_MICROBLAZE_64_NONE, | ||
43 | |||
44 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 39 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
45 | value in two words (with an imm instruction). The relocation is | 40 | value in two words (with an imm instruction). No relocation is |
41 | done here - only used for relaxing */ | ||
46 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 42 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
47 | index 359484dd5e..1c69c269c7 100644 | 43 | index 09dedc46106..1be1ead2f41 100644 |
48 | --- a/bfd/elf32-microblaze.c | 44 | --- a/bfd/elf32-microblaze.c |
49 | +++ b/bfd/elf32-microblaze.c | 45 | +++ b/bfd/elf32-microblaze.c |
50 | @@ -176,7 +176,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 46 | @@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
51 | 0x0000ffff, /* Dest Mask. */ | 47 | 0x0000ffff, /* Dest Mask. */ |
52 | FALSE), /* PC relative offset? */ | 48 | FALSE), /* PC relative offset? */ |
53 | 49 | ||
54 | - /* This reloc does nothing. Used for relaxation. */ | ||
55 | + HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ | 50 | + HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ |
56 | + 0, /* Rightshift. */ | 51 | + 0, /* Rightshift. */ |
57 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ | 52 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ |
@@ -66,10 +61,9 @@ index 359484dd5e..1c69c269c7 100644 | |||
66 | + 0, /* Dest Mask. */ | 61 | + 0, /* Dest Mask. */ |
67 | + FALSE), /* PC relative offset? */ | 62 | + FALSE), /* PC relative offset? */ |
68 | + | 63 | + |
69 | + /* This reloc does nothing. Used for relaxation. */ | 64 | /* This reloc does nothing. Used for relaxation. */ |
70 | HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ | 65 | HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ |
71 | 0, /* Rightshift. */ | 66 | 0, /* Rightshift. */ |
72 | 3, /* Size (0 = byte, 1 = short, 2 = long). */ | ||
73 | @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, | 67 | @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
74 | case BFD_RELOC_NONE: | 68 | case BFD_RELOC_NONE: |
75 | microblaze_reloc = R_MICROBLAZE_NONE; | 69 | microblaze_reloc = R_MICROBLAZE_NONE; |
@@ -80,7 +74,7 @@ index 359484dd5e..1c69c269c7 100644 | |||
80 | case BFD_RELOC_MICROBLAZE_64_NONE: | 74 | case BFD_RELOC_MICROBLAZE_64_NONE: |
81 | microblaze_reloc = R_MICROBLAZE_64_NONE; | 75 | microblaze_reloc = R_MICROBLAZE_64_NONE; |
82 | break; | 76 | break; |
83 | @@ -1918,6 +1935,7 @@ microblaze_elf_relax_section (bfd *abfd, | 77 | @@ -1914,14 +1931,22 @@ microblaze_elf_relax_section (bfd *abfd, |
84 | } | 78 | } |
85 | break; | 79 | break; |
86 | case R_MICROBLAZE_NONE: | 80 | case R_MICROBLAZE_NONE: |
@@ -88,7 +82,9 @@ index 359484dd5e..1c69c269c7 100644 | |||
88 | { | 82 | { |
89 | /* This was a PC-relative instruction that was | 83 | /* This was a PC-relative instruction that was |
90 | completely resolved. */ | 84 | completely resolved. */ |
91 | @@ -1926,12 +1944,18 @@ microblaze_elf_relax_section (bfd *abfd, | 85 | int sfix, efix; |
86 | + unsigned int val; | ||
87 | bfd_vma target_address; | ||
92 | target_address = irel->r_addend + irel->r_offset; | 88 | target_address = irel->r_addend + irel->r_offset; |
93 | sfix = calc_fixup (irel->r_offset, 0, sec); | 89 | sfix = calc_fixup (irel->r_offset, 0, sec); |
94 | efix = calc_fixup (target_address, 0, sec); | 90 | efix = calc_fixup (target_address, 0, sec); |
@@ -101,20 +97,12 @@ index 359484dd5e..1c69c269c7 100644 | |||
101 | irel->r_addend -= (efix - sfix); | 97 | irel->r_addend -= (efix - sfix); |
102 | /* Should use HOWTO. */ | 98 | /* Should use HOWTO. */ |
103 | microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, | 99 | microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, |
104 | irel->r_addend); | 100 | @@ -1969,12 +1994,16 @@ microblaze_elf_relax_section (bfd *abfd, |
105 | - } | ||
106 | - break; | ||
107 | + } | ||
108 | + break; | ||
109 | case R_MICROBLAZE_64_NONE: | ||
110 | { | ||
111 | /* This was a PC-relative 64-bit instruction that was | ||
112 | @@ -1973,12 +1997,16 @@ microblaze_elf_relax_section (bfd *abfd, | ||
113 | irelscanend = irelocs + o->reloc_count; | 101 | irelscanend = irelocs + o->reloc_count; |
114 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 102 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
115 | { | 103 | { |
116 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) | 104 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) |
117 | + if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) | 105 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) |
118 | { | 106 | { |
119 | unsigned int val; | 107 | unsigned int val; |
120 | 108 | ||
@@ -127,22 +115,12 @@ index 359484dd5e..1c69c269c7 100644 | |||
127 | /* This was a PC-relative instruction that was completely resolved. */ | 115 | /* This was a PC-relative instruction that was completely resolved. */ |
128 | if (ocontents == NULL) | 116 | if (ocontents == NULL) |
129 | { | 117 | { |
130 | @@ -1999,18 +2027,17 @@ microblaze_elf_relax_section (bfd *abfd, | 118 | @@ -2002,14 +2031,10 @@ microblaze_elf_relax_section (bfd *abfd, |
131 | (file_ptr) 0, | 119 | if (val != irelscan->r_addend) { |
132 | o->rawsize)) | 120 | fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); |
133 | goto error_return; | 121 | } |
134 | - elf_section_data (o)->this_hdr.contents = ocontents; | 122 | - irelscan->r_addend -= calc_fixup (irelscan->r_addend |
135 | - } | 123 | - + isym->st_value, 0, sec); |
136 | - } | ||
137 | - irelscan->r_addend -= calc_fixup (irelscan->r_addend | ||
138 | - + isym->st_value, sec); | ||
139 | + elf_section_data (o)->this_hdr.contents = ocontents; | ||
140 | + } | ||
141 | + } | ||
142 | val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); | ||
143 | + if (val != irelscan->r_addend) { | ||
144 | + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); | ||
145 | + } | ||
146 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); | 124 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); |
147 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 125 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
148 | irelscan->r_addend); | 126 | irelscan->r_addend); |
@@ -153,20 +131,20 @@ index 359484dd5e..1c69c269c7 100644 | |||
153 | if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) | 131 | if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
154 | { | 132 | { |
155 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 133 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
156 | @@ -2070,7 +2097,7 @@ microblaze_elf_relax_section (bfd *abfd, | 134 | @@ -2069,7 +2094,7 @@ microblaze_elf_relax_section (bfd *abfd, |
157 | elf_section_data (o)->this_hdr.contents = ocontents; | 135 | elf_section_data (o)->this_hdr.contents = ocontents; |
158 | } | 136 | } |
159 | } | 137 | } |
160 | - irelscan->r_addend -= calc_fixup (irel->r_addend | 138 | - irelscan->r_addend -= calc_fixup (irel->r_addend |
161 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend | 139 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend |
162 | + isym->st_value, | 140 | + isym->st_value, |
163 | 0, | 141 | 0, |
164 | sec); | 142 | sec); |
165 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 143 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
166 | index 36284d71a9..feb9fada1e 100644 | 144 | index b97534fc9fe..c1551b92405 100644 |
167 | --- a/bfd/libbfd.h | 145 | --- a/bfd/libbfd.h |
168 | +++ b/bfd/libbfd.h | 146 | +++ b/bfd/libbfd.h |
169 | @@ -2901,6 +2901,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 147 | @@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
170 | "BFD_RELOC_MICROBLAZE_32_ROSDA", | 148 | "BFD_RELOC_MICROBLAZE_32_ROSDA", |
171 | "BFD_RELOC_MICROBLAZE_32_RWSDA", | 149 | "BFD_RELOC_MICROBLAZE_32_RWSDA", |
172 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 150 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
@@ -175,10 +153,10 @@ index 36284d71a9..feb9fada1e 100644 | |||
175 | "BFD_RELOC_MICROBLAZE_64_GOTPC", | 153 | "BFD_RELOC_MICROBLAZE_64_GOTPC", |
176 | "BFD_RELOC_MICROBLAZE_64_GOT", | 154 | "BFD_RELOC_MICROBLAZE_64_GOT", |
177 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 155 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
178 | index e6446a7809..87753ae4f0 100644 | 156 | index 9aba84ca81e..9b39b419415 100644 |
179 | --- a/bfd/reloc.c | 157 | --- a/bfd/reloc.c |
180 | +++ b/bfd/reloc.c | 158 | +++ b/bfd/reloc.c |
181 | @@ -6795,6 +6795,12 @@ ENUM | 159 | @@ -6858,6 +6858,12 @@ ENUM |
182 | ENUMDOC | 160 | ENUMDOC |
183 | This is a 32 bit reloc for the microblaze to handle | 161 | This is a 32 bit reloc for the microblaze to handle |
184 | expressions of the form "Symbol Op Symbol" | 162 | expressions of the form "Symbol Op Symbol" |
@@ -192,10 +170,10 @@ index e6446a7809..87753ae4f0 100644 | |||
192 | BFD_RELOC_MICROBLAZE_64_NONE | 170 | BFD_RELOC_MICROBLAZE_64_NONE |
193 | ENUMDOC | 171 | ENUMDOC |
194 | diff --git a/binutils/readelf.c b/binutils/readelf.c | 172 | diff --git a/binutils/readelf.c b/binutils/readelf.c |
195 | index b13eb6a43b..da6252c128 100644 | 173 | index 6057515a89b..04704d22fef 100644 |
196 | --- a/binutils/readelf.c | 174 | --- a/binutils/readelf.c |
197 | +++ b/binutils/readelf.c | 175 | +++ b/binutils/readelf.c |
198 | @@ -13019,6 +13019,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type) | 176 | @@ -13406,6 +13406,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type) |
199 | || reloc_type == 32 /* R_AVR_DIFF32. */); | 177 | || reloc_type == 32 /* R_AVR_DIFF32. */); |
200 | case EM_METAG: | 178 | case EM_METAG: |
201 | return reloc_type == 3; /* R_METAG_NONE. */ | 179 | return reloc_type == 3; /* R_METAG_NONE. */ |
@@ -207,38 +185,35 @@ index b13eb6a43b..da6252c128 100644 | |||
207 | return (reloc_type == 0 /* R_XTENSA_NONE. */ | 185 | return (reloc_type == 0 /* R_XTENSA_NONE. */ |
208 | || reloc_type == 204 /* R_NDS32_DIFF8. */ | 186 | || reloc_type == 204 /* R_NDS32_DIFF8. */ |
209 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 187 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
210 | index 3e728400b7..fa665b4e25 100644 | 188 | index d01653aeef9..74a63abeb0c 100644 |
211 | --- a/gas/config/tc-microblaze.c | 189 | --- a/gas/config/tc-microblaze.c |
212 | +++ b/gas/config/tc-microblaze.c | 190 | +++ b/gas/config/tc-microblaze.c |
213 | @@ -2201,7 +2201,9 @@ md_apply_fix (fixS * fixP, | 191 | @@ -2198,6 +2198,8 @@ md_apply_fix (fixS * fixP, |
214 | /* This fixup has been resolved. Create a reloc in case the linker | ||
215 | moves code around due to relaxing. */ | 192 | moves code around due to relaxing. */ |
216 | if (fixP->fx_r_type == BFD_RELOC_64_PCREL) | 193 | if (fixP->fx_r_type == BFD_RELOC_64_PCREL) |
217 | - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | 194 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; |
218 | + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | ||
219 | + else if (fixP->fx_r_type == BFD_RELOC_32) | 195 | + else if (fixP->fx_r_type == BFD_RELOC_32) |
220 | + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; | 196 | + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; |
221 | else | 197 | else |
222 | fixP->fx_r_type = BFD_RELOC_NONE; | 198 | fixP->fx_r_type = BFD_RELOC_NONE; |
223 | fixP->fx_addsy = section_symbol (absolute_section); | 199 | fixP->fx_addsy = section_symbol (absolute_section); |
224 | @@ -2426,6 +2428,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) | 200 | @@ -2422,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
225 | switch (fixp->fx_r_type) | 201 | switch (fixp->fx_r_type) |
226 | { | 202 | { |
227 | case BFD_RELOC_NONE: | 203 | case BFD_RELOC_NONE: |
228 | + case BFD_RELOC_MICROBLAZE_32_NONE: | 204 | + case BFD_RELOC_MICROBLAZE_32_NONE: |
229 | case BFD_RELOC_MICROBLAZE_64_NONE: | 205 | case BFD_RELOC_MICROBLAZE_64_NONE: |
230 | case BFD_RELOC_32: | 206 | case BFD_RELOC_32: |
231 | case BFD_RELOC_MICROBLAZE_32_LO: | 207 | case BFD_RELOC_MICROBLAZE_32_LO: |
232 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h | 208 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h |
233 | index 830b5ad446..6ee0966444 100644 | 209 | index 2fec296967b..55f34f72b0d 100644 |
234 | --- a/include/elf/microblaze.h | 210 | --- a/include/elf/microblaze.h |
235 | +++ b/include/elf/microblaze.h | 211 | +++ b/include/elf/microblaze.h |
236 | @@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) | 212 | @@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) |
237 | RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ | 213 | RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ |
238 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ | 214 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ |
239 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ | 215 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ |
240 | + RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) | 216 | + RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) |
241 | + | ||
242 | END_RELOC_NUMBERS (R_MICROBLAZE_max) | 217 | END_RELOC_NUMBERS (R_MICROBLAZE_max) |
243 | 218 | ||
244 | /* Global base address names. */ | 219 | /* Global base address names. */ |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch index 97d692c7..4319f1d7 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 403d6e82742452be4e3f3010c8d9989f0a490c0b Mon Sep 17 00:00:00 2001 | 1 | From 3f743710f53d86ed5e53d97b3b1b06d7a8cbcdc1 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | 2 | From: David Holsgrove <david.holsgrove@xilinx.com> |
3 | Date: Wed, 27 Feb 2013 13:56:11 +1000 | 3 | Date: Wed, 27 Feb 2013 13:56:11 +1000 |
4 | Subject: [PATCH 06/43] upstream change to garbage collection sweep causes mb | 4 | Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb |
5 | regression | 5 | regression |
6 | 6 | ||
7 | Upstream change for PR13177 now clears the def_regular during gc_sweep of a | 7 | Upstream change for PR13177 now clears the def_regular during gc_sweep of a |
@@ -23,10 +23,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
23 | 1 file changed, 1 deletion(-) | 23 | 1 file changed, 1 deletion(-) |
24 | 24 | ||
25 | diff --git a/bfd/elflink.c b/bfd/elflink.c | 25 | diff --git a/bfd/elflink.c b/bfd/elflink.c |
26 | index e50c0e4b38..09d43e3ca5 100644 | 26 | index 998b72f2281..2daf8fdf6a8 100644 |
27 | --- a/bfd/elflink.c | 27 | --- a/bfd/elflink.c |
28 | +++ b/bfd/elflink.c | 28 | +++ b/bfd/elflink.c |
29 | @@ -6187,7 +6187,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) | 29 | @@ -6372,7 +6372,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) |
30 | 30 | ||
31 | inf = (struct elf_gc_sweep_symbol_info *) data; | 31 | inf = (struct elf_gc_sweep_symbol_info *) data; |
32 | (*inf->hide_symbol) (inf->info, h, TRUE); | 32 | (*inf->hide_symbol) (inf->info, h, TRUE); |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch index 49534b4e..4ab7681e 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Fix-bug-in-TLSTPREL-Relocation.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 072a8968c50b2ebd93e225a6b959916f9d60b493 Mon Sep 17 00:00:00 2001 | 1 | From 481dd44f36e7df691037201d9865482debbb397d Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 15 Jun 2015 16:50:30 +0530 | 3 | Date: Mon, 15 Jun 2015 16:50:30 +0530 |
4 | Subject: [PATCH 07/43] Fix bug in TLSTPREL Relocation | 4 | Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation |
5 | 5 | ||
6 | Fixed the problem related to the fixup/relocations TLSTPREL. | 6 | Fixed the problem related to the fixup/relocations TLSTPREL. |
7 | When the fixup is applied the addend is not added at the correct offset | 7 | When the fixup is applied the addend is not added at the correct offset |
@@ -13,10 +13,10 @@ big & little-endian compilers | |||
13 | 1 file changed, 2 insertions(+), 2 deletions(-) | 13 | 1 file changed, 2 insertions(+), 2 deletions(-) |
14 | 14 | ||
15 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 15 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
16 | index 1c69c269c7..d19a6dca84 100644 | 16 | index 1be1ead2f41..ec1944c6faf 100644 |
17 | --- a/bfd/elf32-microblaze.c | 17 | --- a/bfd/elf32-microblaze.c |
18 | +++ b/bfd/elf32-microblaze.c | 18 | +++ b/bfd/elf32-microblaze.c |
19 | @@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 19 | @@ -1447,9 +1447,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
20 | relocation += addend; | 20 | relocation += addend; |
21 | relocation -= dtprel_base(info); | 21 | relocation -= dtprel_base(info); |
22 | bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, | 22 | bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch index 51fcee90..c5bd3b2d 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-Address-extension-instructions.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 4674056da6bafa8168c0a680498b958f3a39be94 Mon Sep 17 00:00:00 2001 | 1 | From fa85df88dc229f7f8f0bc09cd0995d05f49c03b7 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 18 Jan 2016 12:28:21 +0530 | 3 | Date: Mon, 18 Jan 2016 12:28:21 +0530 |
4 | Subject: [PATCH 08/43] Added Address extension instructions | 4 | Subject: [PATCH 09/40] Added Address extension instructions |
5 | 5 | ||
6 | This patch adds the support of new instructions which are required | 6 | This patch adds the support of new instructions which are required |
7 | for supporting Address extension feature. | 7 | for supporting Address extension feature. |
@@ -13,17 +13,27 @@ ChangeLog: | |||
13 | 13 | ||
14 | *microblaze-opc.h (op_code_struct): Update | 14 | *microblaze-opc.h (op_code_struct): Update |
15 | Added new instructions | 15 | Added new instructions |
16 | Set MAX_OPCODES to matching value | ||
16 | *microblaze-opcm.h (microblaze_instr): Update | 17 | *microblaze-opcm.h (microblaze_instr): Update |
17 | Added new instructions | 18 | Added new instructions |
18 | --- | 19 | --- |
19 | opcodes/microblaze-opc.h | 11 +++++++++++ | 20 | opcodes/microblaze-opc.h | 13 ++++++++++++- |
20 | opcodes/microblaze-opcm.h | 10 +++++----- | 21 | opcodes/microblaze-opcm.h | 10 +++++----- |
21 | 2 files changed, 16 insertions(+), 5 deletions(-) | 22 | 2 files changed, 17 insertions(+), 6 deletions(-) |
22 | 23 | ||
23 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 24 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
24 | index 865151f95b..330f1040e7 100644 | 25 | index b6c5016e4d2..c7a506b845a 100644 |
25 | --- a/opcodes/microblaze-opc.h | 26 | --- a/opcodes/microblaze-opc.h |
26 | +++ b/opcodes/microblaze-opc.h | 27 | +++ b/opcodes/microblaze-opc.h |
28 | @@ -102,7 +102,7 @@ | ||
29 | #define DELAY_SLOT 1 | ||
30 | #define NO_DELAY_SLOT 0 | ||
31 | |||
32 | -#define MAX_OPCODES 291 | ||
33 | +#define MAX_OPCODES 299 | ||
34 | |||
35 | struct op_code_struct | ||
36 | { | ||
27 | @@ -178,8 +178,11 @@ struct op_code_struct | 37 | @@ -178,8 +178,11 @@ struct op_code_struct |
28 | {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, | 38 | {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, |
29 | {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, | 39 | {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, |
@@ -71,7 +81,7 @@ index 865151f95b..330f1040e7 100644 | |||
71 | {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, | 81 | {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, |
72 | {"", 0, 0, 0, 0, 0, 0, 0, 0}, | 82 | {"", 0, 0, 0, 0, 0, 0, 0, 0}, |
73 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 83 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
74 | index 42f3dd3be5..1c39dbf50b 100644 | 84 | index 795c57b5ff6..b05e319862e 100644 |
75 | --- a/opcodes/microblaze-opcm.h | 85 | --- a/opcodes/microblaze-opcm.h |
76 | +++ b/opcodes/microblaze-opcm.h | 86 | +++ b/opcodes/microblaze-opcm.h |
77 | @@ -33,13 +33,13 @@ enum microblaze_instr | 87 | @@ -33,13 +33,13 @@ enum microblaze_instr |
@@ -90,7 +100,7 @@ index 42f3dd3be5..1c39dbf50b 100644 | |||
90 | - shr, sw, swr, swx, lbui, lhui, lwi, | 100 | - shr, sw, swr, swx, lbui, lhui, lwi, |
91 | + bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, | 101 | + bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, |
92 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, | 102 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, |
93 | sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | 103 | sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
94 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, | 104 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, |
95 | fint, fsqrt, | 105 | fint, fsqrt, |
96 | -- | 106 | -- |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch deleted file mode 100644 index d93ccd20..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-fixing-the-MAX_OPCODES-to-correct-value.patch +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | From 7651a2f7ab486e26981cb5e032bf578d0951ff4a Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju Mekala <nmekala@xilix.com> | ||
3 | Date: Thu, 28 Jan 2016 14:07:34 +0530 | ||
4 | Subject: [PATCH 09/43] fixing the MAX_OPCODES to correct value | ||
5 | |||
6 | --- | ||
7 | opcodes/microblaze-opc.h | 2 +- | ||
8 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
9 | |||
10 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | ||
11 | index 330f1040e7..2a6b841232 100644 | ||
12 | --- a/opcodes/microblaze-opc.h | ||
13 | +++ b/opcodes/microblaze-opc.h | ||
14 | @@ -102,7 +102,7 @@ | ||
15 | #define DELAY_SLOT 1 | ||
16 | #define NO_DELAY_SLOT 0 | ||
17 | |||
18 | -#define MAX_OPCODES 291 | ||
19 | +#define MAX_OPCODES 299 | ||
20 | |||
21 | struct op_code_struct | ||
22 | { | ||
23 | -- | ||
24 | 2.17.1 | ||
25 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch index 901c53e6..1612c11c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 7e9e123337f2d441b213ea9d0be07e9049241f64 Mon Sep 17 00:00:00 2001 | 1 | From 0034d6b5231a0a72c5f9fc47ba4c8eba0c35ff39 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 18 Jul 2016 12:24:28 +0530 | 3 | Date: Mon, 18 Jul 2016 12:24:28 +0530 |
4 | Subject: [PATCH 10/43] Add new bit-field instructions | 4 | Subject: [PATCH 10/40] Add new bit-field instructions |
5 | 5 | ||
6 | This patches adds new bsefi and bsifi instructions. | 6 | This patches adds new bsefi and bsifi instructions. |
7 | BSEFI- The instruction shall extract a bit field from a | 7 | BSEFI- The instruction shall extract a bit field from a |
@@ -14,13 +14,13 @@ The rest of the bits in the destination register shall be unchanged | |||
14 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 14 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
15 | --- | 15 | --- |
16 | gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++- | 16 | gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++- |
17 | opcodes/microblaze-dis.c | 16 +++++++++ | 17 | opcodes/microblaze-dis.c | 17 +++++++++ |
18 | opcodes/microblaze-opc.h | 12 ++++++- | 18 | opcodes/microblaze-opc.h | 12 ++++++- |
19 | opcodes/microblaze-opcm.h | 6 +++- | 19 | opcodes/microblaze-opcm.h | 6 +++- |
20 | 4 files changed, 102 insertions(+), 3 deletions(-) | 20 | 4 files changed, 103 insertions(+), 3 deletions(-) |
21 | 21 | ||
22 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 22 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
23 | index fa665b4e25..71bb888ab8 100644 | 23 | index 74a63abeb0c..765abfb3885 100644 |
24 | --- a/gas/config/tc-microblaze.c | 24 | --- a/gas/config/tc-microblaze.c |
25 | +++ b/gas/config/tc-microblaze.c | 25 | +++ b/gas/config/tc-microblaze.c |
26 | @@ -917,7 +917,7 @@ md_assemble (char * str) | 26 | @@ -917,7 +917,7 @@ md_assemble (char * str) |
@@ -110,41 +110,42 @@ index fa665b4e25..71bb888ab8 100644 | |||
110 | if (strcmp (op_end, "")) | 110 | if (strcmp (op_end, "")) |
111 | op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ | 111 | op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ |
112 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 112 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
113 | index f691740dfd..f8aaf27873 100644 | 113 | index be1534c257c..52c9068805f 100644 |
114 | --- a/opcodes/microblaze-dis.c | 114 | --- a/opcodes/microblaze-dis.c |
115 | +++ b/opcodes/microblaze-dis.c | 115 | +++ b/opcodes/microblaze-dis.c |
116 | @@ -73,6 +73,18 @@ get_field_imm5_mbar (long instr) | 116 | @@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) |
117 | return(strdup(tmpstr)); | 117 | return p; |
118 | } | 118 | } |
119 | 119 | ||
120 | +static char * | 120 | +static char * |
121 | +get_field_imm5width (long instr) | 121 | +get_field_imm5width (struct string_buf *buf, long instr) |
122 | +{ | 122 | +{ |
123 | + char tmpstr[25]; | 123 | + char *p = strbuf (buf); |
124 | + | 124 | + |
125 | + if (instr & 0x00004000) | 125 | + if (instr & 0x00004000) |
126 | + sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ | 126 | + sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ |
127 | + else | 127 | + else |
128 | + sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ | 128 | + sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ |
129 | + return (strdup (tmpstr)); | 129 | + return p; |
130 | +} | 130 | +} |
131 | + | 131 | + |
132 | static char * | 132 | static char * |
133 | get_field_rfsl (long instr) | 133 | get_field_rfsl (struct string_buf *buf, long instr) |
134 | { | 134 | { |
135 | @@ -396,6 +408,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 135 | @@ -428,6 +440,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
136 | /* For mbar 16 or sleep insn. */ | 136 | case INST_TYPE_NONE: |
137 | case INST_TYPE_NONE: | 137 | break; |
138 | break; | 138 | /* For tuqula instruction */ |
139 | + /* For bit field insns. */ | 139 | + /* For bit field insns. */ |
140 | + case INST_TYPE_RD_R1_IMM5_IMM5: | 140 | + case INST_TYPE_RD_R1_IMM5_IMM5: |
141 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst)); | 141 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); |
142 | + break; | 142 | + break; |
143 | /* For tuqula instruction */ | 143 | + /* For tuqula instruction */ |
144 | case INST_TYPE_RD: | 144 | case INST_TYPE_RD: |
145 | print_func (stream, "\t%s", get_field_rd (inst)); | 145 | print_func (stream, "\t%s", get_field_rd (&buf, inst)); |
146 | break; | ||
146 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 147 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
147 | index 2a6b841232..ce8ac351b5 100644 | 148 | index c7a506b845a..f61f4ef66d9 100644 |
148 | --- a/opcodes/microblaze-opc.h | 149 | --- a/opcodes/microblaze-opc.h |
149 | +++ b/opcodes/microblaze-opc.h | 150 | +++ b/opcodes/microblaze-opc.h |
150 | @@ -59,6 +59,9 @@ | 151 | @@ -59,6 +59,9 @@ |
@@ -195,7 +196,7 @@ index 2a6b841232..ce8ac351b5 100644 | |||
195 | #endif /* MICROBLAZE_OPC */ | 196 | #endif /* MICROBLAZE_OPC */ |
196 | 197 | ||
197 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 198 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
198 | index 1c39dbf50b..28662694cd 100644 | 199 | index b05e319862e..fa921c90c98 100644 |
199 | --- a/opcodes/microblaze-opcm.h | 200 | --- a/opcodes/microblaze-opcm.h |
200 | +++ b/opcodes/microblaze-opcm.h | 201 | +++ b/opcodes/microblaze-opcm.h |
201 | @@ -29,7 +29,7 @@ enum microblaze_instr | 202 | @@ -29,7 +29,7 @@ enum microblaze_instr |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch index 4c1b0c25..fcb9c8ae 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch | |||
@@ -1,18 +1,18 @@ | |||
1 | From 8b2e8fe916066bb1caa99abc67f8cde3ebd41c70 Mon Sep 17 00:00:00 2001 | 1 | From 75e55d8ebf3cd780fe69c066163ab2da7ac204f2 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 10 Jul 2017 16:07:28 +0530 | 3 | Date: Mon, 10 Jul 2017 16:07:28 +0530 |
4 | Subject: [PATCH 11/43] fixing the imm bug. with relax option imm -1 is also | 4 | Subject: [PATCH 11/40] fixing the imm bug. |
5 | getting removed this is corrected now. | ||
6 | 5 | ||
6 | with relax option imm -1 is also getting removed this is corrected now. | ||
7 | --- | 7 | --- |
8 | bfd/elf32-microblaze.c | 3 +-- | 8 | bfd/elf32-microblaze.c | 3 +-- |
9 | 1 file changed, 1 insertion(+), 2 deletions(-) | 9 | 1 file changed, 1 insertion(+), 2 deletions(-) |
10 | 10 | ||
11 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 11 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
12 | index d19a6dca84..d001437b3f 100644 | 12 | index ec1944c6faf..cf4a7fdba33 100644 |
13 | --- a/bfd/elf32-microblaze.c | 13 | --- a/bfd/elf32-microblaze.c |
14 | +++ b/bfd/elf32-microblaze.c | 14 | +++ b/bfd/elf32-microblaze.c |
15 | @@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd, | 15 | @@ -1865,8 +1865,7 @@ microblaze_elf_relax_section (bfd *abfd, |
16 | else | 16 | else |
17 | symval += irel->r_addend; | 17 | symval += irel->r_addend; |
18 | 18 | ||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch index ad4db430..02cc1259 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 2a7b66bbc0473c6cbe6653a48818962b5b411ef2 Mon Sep 17 00:00:00 2001 | 1 | From 5432f81ba9d7c17b20ff576c7c09ae78f4fe6e9c Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Fri, 29 Sep 2017 18:00:23 +0530 | 3 | Date: Fri, 29 Sep 2017 18:00:23 +0530 |
4 | Subject: [PATCH 12/43] [Patch,Microblaze]: fixed bug in GCC so that It will | 4 | Subject: [PATCH 12/40] [Patch,Microblaze]: fixed bug in GCC so that It will |
5 | support .long 0U and .long 0u | 5 | support .long 0U and .long 0u |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,10 +9,10 @@ Subject: [PATCH 12/43] [Patch,Microblaze]: fixed bug in GCC so that It will | |||
9 | 1 file changed, 9 insertions(+) | 9 | 1 file changed, 9 insertions(+) |
10 | 10 | ||
11 | diff --git a/gas/expr.c b/gas/expr.c | 11 | diff --git a/gas/expr.c b/gas/expr.c |
12 | index ee85bda1cc..b502418b71 100644 | 12 | index 6f8ccb82303..0e34ca53d9b 100644 |
13 | --- a/gas/expr.c | 13 | --- a/gas/expr.c |
14 | +++ b/gas/expr.c | 14 | +++ b/gas/expr.c |
15 | @@ -810,6 +810,15 @@ operand (expressionS *expressionP, enum expr_mode mode) | 15 | @@ -803,6 +803,15 @@ operand (expressionS *expressionP, enum expr_mode mode) |
16 | break; | 16 | break; |
17 | } | 17 | } |
18 | } | 18 | } |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch index 323b7bde..accff214 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch | |||
@@ -1,15 +1,15 @@ | |||
1 | From 59a9a1a913b7dfa424792c907001413c1ddd320c Mon Sep 17 00:00:00 2001 | 1 | From 6337e24a220dca86b71efcc10c5ffed6bf11bc22 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 16 Oct 2017 15:44:23 +0530 | 3 | Date: Mon, 16 Oct 2017 15:44:23 +0530 |
4 | Subject: [PATCH 13/43] fixing the constant range check issue sample error: not | 4 | Subject: [PATCH 13/40] fixing the constant range check issue |
5 | in range ffffffff80000000..7fffffff, not ffffffff70000000 | ||
6 | 5 | ||
6 | sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000 | ||
7 | --- | 7 | --- |
8 | gas/config/tc-microblaze.c | 2 +- | 8 | gas/config/tc-microblaze.c | 2 +- |
9 | 1 file changed, 1 insertion(+), 1 deletion(-) | 9 | 1 file changed, 1 insertion(+), 1 deletion(-) |
10 | 10 | ||
11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
12 | index 71bb888ab8..16b10d00a9 100644 | 12 | index 765abfb3885..5810a74a5fc 100644 |
13 | --- a/gas/config/tc-microblaze.c | 13 | --- a/gas/config/tc-microblaze.c |
14 | +++ b/gas/config/tc-microblaze.c | 14 | +++ b/gas/config/tc-microblaze.c |
15 | @@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) | 15 | @@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch index 1a3e0130..cdbe65a6 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 00b7561a868b08dab952b9b9f4a01118195aeb29 Mon Sep 17 00:00:00 2001 | 1 | From e7e06edfb6c24a993603c9100f8ab8c29999ef90 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 21 Feb 2018 12:32:02 +0530 | 3 | Date: Wed, 21 Feb 2018 12:32:02 +0530 |
4 | Subject: [PATCH 14/43] [Patch,Microblaze]: Compiler will give error messages | 4 | Subject: [PATCH 14/40] [Patch,Microblaze]: Compiler will give error messages |
5 | in more detail for mxl-gp-opt flag.. | 5 | in more detail for mxl-gp-opt flag.. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,10 +9,10 @@ Subject: [PATCH 14/43] [Patch,Microblaze]: Compiler will give error messages | |||
9 | 1 file changed, 12 insertions(+) | 9 | 1 file changed, 12 insertions(+) |
10 | 10 | ||
11 | diff --git a/ld/ldmain.c b/ld/ldmain.c | 11 | diff --git a/ld/ldmain.c b/ld/ldmain.c |
12 | index 77cdbd0dd2..517d85baef 100644 | 12 | index 08be9030cb5..613d748fefd 100644 |
13 | --- a/ld/ldmain.c | 13 | --- a/ld/ldmain.c |
14 | +++ b/ld/ldmain.c | 14 | +++ b/ld/ldmain.c |
15 | @@ -1446,6 +1446,18 @@ reloc_overflow (struct bfd_link_info *info, | 15 | @@ -1515,6 +1515,18 @@ reloc_overflow (struct bfd_link_info *info, |
16 | break; | 16 | break; |
17 | case bfd_link_hash_defined: | 17 | case bfd_link_hash_defined: |
18 | case bfd_link_hash_defweak: | 18 | case bfd_link_hash_defweak: |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch index d0f96eca..9f228015 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 9aeae734291f8aaeb449c1403561b71de1ea3bea Mon Sep 17 00:00:00 2001 | 1 | From a7626e576d867c6c9c8321f00cf5e17dc31c52b8 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sun, 30 Sep 2018 16:28:28 +0530 | 3 | Date: Sun, 30 Sep 2018 16:28:28 +0530 |
4 | Subject: [PATCH 15/43] intial commit of MB 64-bit | 4 | Subject: [PATCH 15/40] intial commit of MB 64-bit |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/Makefile.am | 2 + | 7 | bfd/Makefile.am | 2 + |
@@ -9,78 +9,79 @@ Subject: [PATCH 15/43] intial commit of MB 64-bit | |||
9 | bfd/config.bfd | 4 + | 9 | bfd/config.bfd | 4 + |
10 | bfd/configure | 2 + | 10 | bfd/configure | 2 + |
11 | bfd/configure.ac | 2 + | 11 | bfd/configure.ac | 2 + |
12 | bfd/cpu-microblaze.c | 52 +- | 12 | bfd/cpu-microblaze.c | 55 +- |
13 | bfd/elf64-microblaze.c | 3584 ++++++++++++++++++++++++++++ | 13 | bfd/doc/Makefile.in | 1 + |
14 | bfd/elf64-microblaze.c | 3560 ++++++++++++++++++++++++++++ | ||
14 | bfd/targets.c | 6 + | 15 | bfd/targets.c | 6 + |
15 | gas/config/tc-microblaze.c | 274 ++- | 16 | gas/config/tc-microblaze.c | 274 ++- |
16 | gas/config/tc-microblaze.h | 4 +- | 17 | gas/config/tc-microblaze.h | 4 +- |
17 | include/elf/common.h | 1 + | 18 | include/elf/common.h | 1 + |
18 | ld/Makefile.am | 8 + | 19 | ld/Makefile.am | 4 + |
19 | ld/Makefile.in | 10 + | 20 | ld/Makefile.in | 7 + |
20 | ld/configure.tgt | 3 + | 21 | ld/configure.tgt | 3 + |
21 | ld/emulparams/elf64microblaze.sh | 23 + | 22 | ld/emulparams/elf64microblaze.sh | 23 + |
22 | ld/emulparams/elf64microblazeel.sh | 23 + | 23 | ld/emulparams/elf64microblazeel.sh | 23 + |
23 | opcodes/microblaze-dis.c | 39 +- | 24 | opcodes/microblaze-dis.c | 43 +- |
24 | opcodes/microblaze-opc.h | 162 +- | 25 | opcodes/microblaze-opc.h | 162 +- |
25 | opcodes/microblaze-opcm.h | 20 +- | 26 | opcodes/microblaze-opcm.h | 20 +- |
26 | 19 files changed, 4181 insertions(+), 41 deletions(-) | 27 | 20 files changed, 4156 insertions(+), 43 deletions(-) |
27 | create mode 100644 bfd/elf64-microblaze.c | 28 | create mode 100644 bfd/elf64-microblaze.c |
28 | create mode 100644 ld/emulparams/elf64microblaze.sh | 29 | create mode 100644 ld/emulparams/elf64microblaze.sh |
29 | create mode 100644 ld/emulparams/elf64microblazeel.sh | 30 | create mode 100644 ld/emulparams/elf64microblazeel.sh |
30 | 31 | ||
31 | diff --git a/bfd/Makefile.am b/bfd/Makefile.am | 32 | diff --git a/bfd/Makefile.am b/bfd/Makefile.am |
32 | index a9191555ad..c5fd250812 100644 | 33 | index c88c4480001..9e12b34038c 100644 |
33 | --- a/bfd/Makefile.am | 34 | --- a/bfd/Makefile.am |
34 | +++ b/bfd/Makefile.am | 35 | +++ b/bfd/Makefile.am |
35 | @@ -570,6 +570,7 @@ BFD64_BACKENDS = \ | 36 | @@ -552,6 +552,7 @@ BFD64_BACKENDS = \ |
36 | elf64-riscv.lo \ | 37 | elf64-ia64.lo \ |
37 | elfxx-riscv.lo \ | 38 | elf64-ia64-vms.lo \ |
38 | elf64-s390.lo \ | 39 | elfxx-ia64.lo \ |
39 | + elf64-microblaze.lo \ | 40 | + elf64-microblaze.lo \ |
40 | elf64-sparc.lo \ | 41 | elfn32-mips.lo \ |
41 | elf64-tilegx.lo \ | 42 | elf64-mips.lo \ |
42 | elf64-x86-64.lo \ | 43 | elfxx-mips.lo \ |
43 | @@ -603,6 +604,7 @@ BFD64_BACKENDS_CFILES = \ | 44 | @@ -591,6 +592,7 @@ BFD64_BACKENDS_CFILES = \ |
44 | elf64-nfp.c \ | 45 | elf64-gen.c \ |
45 | elf64-ppc.c \ | 46 | elf64-hppa.c \ |
46 | elf64-s390.c \ | 47 | elf64-ia64-vms.c \ |
47 | + elf64-microblaze.c \ | 48 | + elf64-microblaze.c \ |
48 | elf64-sparc.c \ | 49 | elf64-mips.c \ |
49 | elf64-tilegx.c \ | 50 | elf64-mmix.c \ |
50 | elf64-x86-64.c \ | 51 | elf64-nfp.c \ |
51 | diff --git a/bfd/Makefile.in b/bfd/Makefile.in | 52 | diff --git a/bfd/Makefile.in b/bfd/Makefile.in |
52 | index 896df52042..fd457cba1e 100644 | 53 | index d0d14c6ab32..5c12b706616 100644 |
53 | --- a/bfd/Makefile.in | 54 | --- a/bfd/Makefile.in |
54 | +++ b/bfd/Makefile.in | 55 | +++ b/bfd/Makefile.in |
55 | @@ -995,6 +995,7 @@ BFD64_BACKENDS = \ | 56 | @@ -978,6 +978,7 @@ BFD64_BACKENDS = \ |
56 | elf64-riscv.lo \ | 57 | elf64-ia64.lo \ |
57 | elfxx-riscv.lo \ | 58 | elf64-ia64-vms.lo \ |
58 | elf64-s390.lo \ | 59 | elfxx-ia64.lo \ |
59 | + elf64-microblaze.lo \ | 60 | + elf64-microblaze.lo \ |
60 | elf64-sparc.lo \ | 61 | elfn32-mips.lo \ |
61 | elf64-tilegx.lo \ | 62 | elf64-mips.lo \ |
62 | elf64-x86-64.lo \ | 63 | elfxx-mips.lo \ |
63 | @@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \ | 64 | @@ -1017,6 +1018,7 @@ BFD64_BACKENDS_CFILES = \ |
64 | elf64-nfp.c \ | 65 | elf64-gen.c \ |
65 | elf64-ppc.c \ | 66 | elf64-hppa.c \ |
66 | elf64-s390.c \ | 67 | elf64-ia64-vms.c \ |
67 | + elf64-microblaze.c \ | 68 | + elf64-microblaze.c \ |
68 | elf64-sparc.c \ | 69 | elf64-mips.c \ |
69 | elf64-tilegx.c \ | 70 | elf64-mmix.c \ |
70 | elf64-x86-64.c \ | 71 | elf64-nfp.c \ |
71 | @@ -1494,6 +1496,7 @@ distclean-compile: | 72 | @@ -1495,6 +1497,7 @@ distclean-compile: |
72 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ | 73 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@ |
73 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ | 74 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@ |
74 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ | 75 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@ |
75 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ | 76 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ |
76 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ | 77 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@ |
77 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ | 78 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@ |
78 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ | 79 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@ |
79 | diff --git a/bfd/config.bfd b/bfd/config.bfd | 80 | diff --git a/bfd/config.bfd b/bfd/config.bfd |
80 | index 0e1ddb659c..93d210643d 100644 | 81 | index 14523caf0c5..437c03bb9d9 100644 |
81 | --- a/bfd/config.bfd | 82 | --- a/bfd/config.bfd |
82 | +++ b/bfd/config.bfd | 83 | +++ b/bfd/config.bfd |
83 | @@ -850,11 +850,15 @@ case "${targ}" in | 84 | @@ -825,11 +825,15 @@ case "${targ}" in |
84 | microblazeel*-*) | 85 | microblazeel*-*) |
85 | targ_defvec=microblaze_elf32_le_vec | 86 | targ_defvec=microblaze_elf32_le_vec |
86 | targ_selvecs=microblaze_elf32_vec | 87 | targ_selvecs=microblaze_elf32_vec |
@@ -97,36 +98,36 @@ index 0e1ddb659c..93d210643d 100644 | |||
97 | 98 | ||
98 | #ifdef BFD64 | 99 | #ifdef BFD64 |
99 | diff --git a/bfd/configure b/bfd/configure | 100 | diff --git a/bfd/configure b/bfd/configure |
100 | index 04786696dc..d455abe7c5 100755 | 101 | index 5ab3e856bc2..982ecd254a8 100755 |
101 | --- a/bfd/configure | 102 | --- a/bfd/configure |
102 | +++ b/bfd/configure | 103 | +++ b/bfd/configure |
103 | @@ -14847,6 +14847,8 @@ do | 104 | @@ -14828,6 +14828,8 @@ do |
104 | rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; | 105 | metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;; |
105 | s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; | 106 | microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
106 | s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; | 107 | microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
107 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 108 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
108 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 109 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
109 | score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 110 | mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
110 | score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 111 | mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
111 | sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; | 112 | mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
112 | diff --git a/bfd/configure.ac b/bfd/configure.ac | 113 | diff --git a/bfd/configure.ac b/bfd/configure.ac |
113 | index eda38ea086..f01c3362fe 100644 | 114 | index 8e86f8399ce..38e80148171 100644 |
114 | --- a/bfd/configure.ac | 115 | --- a/bfd/configure.ac |
115 | +++ b/bfd/configure.ac | 116 | +++ b/bfd/configure.ac |
116 | @@ -615,6 +615,8 @@ do | 117 | @@ -564,6 +564,8 @@ do |
117 | rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; | 118 | metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;; |
118 | s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; | 119 | microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
119 | s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; | 120 | microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
120 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 121 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
121 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 122 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
122 | score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 123 | mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
123 | score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 124 | mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
124 | sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; | 125 | mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
125 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c | 126 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c |
126 | index 9bc2eb3de9..c91ba46f75 100644 | 127 | index 05a3f767e22..f94dc2c177b 100644 |
127 | --- a/bfd/cpu-microblaze.c | 128 | --- a/bfd/cpu-microblaze.c |
128 | +++ b/bfd/cpu-microblaze.c | 129 | +++ b/bfd/cpu-microblaze.c |
129 | @@ -23,7 +23,24 @@ | 130 | @@ -23,7 +23,25 @@ |
130 | #include "bfd.h" | 131 | #include "bfd.h" |
131 | #include "libbfd.h" | 132 | #include "libbfd.h" |
132 | 133 | ||
@@ -147,15 +148,16 @@ index 9bc2eb3de9..c91ba46f75 100644 | |||
147 | + bfd_default_compatible, /* Architecture comparison function. */ | 148 | + bfd_default_compatible, /* Architecture comparison function. */ |
148 | + bfd_default_scan, /* String to architecture conversion. */ | 149 | + bfd_default_scan, /* String to architecture conversion. */ |
149 | + bfd_arch_default_fill, /* Default fill. */ | 150 | + bfd_arch_default_fill, /* Default fill. */ |
150 | + &bfd_microblaze_arch[1] /* Next in list. */ | 151 | + &bfd_microblaze_arch[1], /* Next in list. */ |
152 | + 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
151 | +}, | 153 | +}, |
152 | { | 154 | { |
153 | 32, /* 32 bits in a word. */ | 155 | 32, /* Bits in a word. */ |
154 | 32, /* 32 bits in an address. */ | 156 | 32, /* Bits in an address. */ |
155 | @@ -38,4 +55,37 @@ const bfd_arch_info_type bfd_microblaze_arch = | 157 | @@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch = |
156 | bfd_default_scan, /* String to architecture conversion. */ | ||
157 | bfd_arch_default_fill, /* Default fill. */ | 158 | bfd_arch_default_fill, /* Default fill. */ |
158 | NULL /* Next in list. */ | 159 | NULL, /* Next in list. */ |
160 | 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
159 | +} | 161 | +} |
160 | +#else | 162 | +#else |
161 | +{ | 163 | +{ |
@@ -171,7 +173,8 @@ index 9bc2eb3de9..c91ba46f75 100644 | |||
171 | + bfd_default_compatible, /* Architecture comparison function. */ | 173 | + bfd_default_compatible, /* Architecture comparison function. */ |
172 | + bfd_default_scan, /* String to architecture conversion. */ | 174 | + bfd_default_scan, /* String to architecture conversion. */ |
173 | + bfd_arch_default_fill, /* Default fill. */ | 175 | + bfd_arch_default_fill, /* Default fill. */ |
174 | + &bfd_microblaze_arch[1] /* Next in list. */ | 176 | + &bfd_microblaze_arch[1], /* Next in list. */ |
177 | + 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
175 | +}, | 178 | +}, |
176 | +{ | 179 | +{ |
177 | + 64, /* 32 bits in a word. */ | 180 | + 64, /* 32 bits in a word. */ |
@@ -186,16 +189,29 @@ index 9bc2eb3de9..c91ba46f75 100644 | |||
186 | + bfd_default_compatible, /* Architecture comparison function. */ | 189 | + bfd_default_compatible, /* Architecture comparison function. */ |
187 | + bfd_default_scan, /* String to architecture conversion. */ | 190 | + bfd_default_scan, /* String to architecture conversion. */ |
188 | + bfd_arch_default_fill, /* Default fill. */ | 191 | + bfd_arch_default_fill, /* Default fill. */ |
189 | + NULL /* Next in list. */ | 192 | + NULL, /* Next in list. */ |
193 | + 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
190 | +} | 194 | +} |
191 | +#endif | 195 | +#endif |
192 | }; | 196 | }; |
197 | diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in | ||
198 | index 2c1ddd45b8d..a976b24d0bf 100644 | ||
199 | --- a/bfd/doc/Makefile.in | ||
200 | +++ b/bfd/doc/Makefile.in | ||
201 | @@ -375,6 +375,7 @@ pdfdir = @pdfdir@ | ||
202 | prefix = @prefix@ | ||
203 | program_transform_name = @program_transform_name@ | ||
204 | psdir = @psdir@ | ||
205 | +runstatedir = @runstatedir@ | ||
206 | sbindir = @sbindir@ | ||
207 | sharedstatedir = @sharedstatedir@ | ||
208 | srcdir = @srcdir@ | ||
193 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 209 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
194 | new file mode 100644 | 210 | new file mode 100644 |
195 | index 0000000000..0f43ae6ea8 | 211 | index 00000000000..fa4b95e47e0 |
196 | --- /dev/null | 212 | --- /dev/null |
197 | +++ b/bfd/elf64-microblaze.c | 213 | +++ b/bfd/elf64-microblaze.c |
198 | @@ -0,0 +1,3584 @@ | 214 | @@ -0,0 +1,3560 @@ |
199 | +/* Xilinx MicroBlaze-specific support for 32-bit ELF | 215 | +/* Xilinx MicroBlaze-specific support for 32-bit ELF |
200 | + | 216 | + |
201 | + Copyright (C) 2009-2016 Free Software Foundation, Inc. | 217 | + Copyright (C) 2009-2016 Free Software Foundation, Inc. |
@@ -853,7 +869,7 @@ index 0000000000..0f43ae6ea8 | |||
853 | + | 869 | + |
854 | +/* Set the howto pointer for a RCE ELF reloc. */ | 870 | +/* Set the howto pointer for a RCE ELF reloc. */ |
855 | + | 871 | + |
856 | +static void | 872 | +static bfd_boolean |
857 | +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, | 873 | +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, |
858 | + arelent * cache_ptr, | 874 | + arelent * cache_ptr, |
859 | + Elf_Internal_Rela * dst) | 875 | + Elf_Internal_Rela * dst) |
@@ -867,13 +883,14 @@ index 0000000000..0f43ae6ea8 | |||
867 | + r_type = ELF64_R_TYPE (dst->r_info); | 883 | + r_type = ELF64_R_TYPE (dst->r_info); |
868 | + if (r_type >= R_MICROBLAZE_max) | 884 | + if (r_type >= R_MICROBLAZE_max) |
869 | + { | 885 | + { |
870 | + (*_bfd_error_handler) (_("%B: unrecognised MicroBlaze reloc number: %d"), | 886 | + (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"), |
871 | + abfd, r_type); | 887 | + abfd, r_type); |
872 | + bfd_set_error (bfd_error_bad_value); | 888 | + bfd_set_error (bfd_error_bad_value); |
873 | + r_type = R_MICROBLAZE_NONE; | 889 | + return FALSE; |
874 | + } | 890 | + } |
875 | + | 891 | + |
876 | + cache_ptr->howto = microblaze_elf_howto_table [r_type]; | 892 | + cache_ptr->howto = microblaze_elf_howto_table [r_type]; |
893 | + return TRUE; | ||
877 | +} | 894 | +} |
878 | + | 895 | + |
879 | +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ | 896 | +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ |
@@ -1272,7 +1289,7 @@ index 0000000000..0f43ae6ea8 | |||
1272 | + /* Only relocate if the symbol is defined. */ | 1289 | + /* Only relocate if the symbol is defined. */ |
1273 | + if (sec) | 1290 | + if (sec) |
1274 | + { | 1291 | + { |
1275 | + name = bfd_get_section_name (sec->owner, sec); | 1292 | + name = bfd_section_name (sec); |
1276 | + | 1293 | + |
1277 | + if (strcmp (name, ".sdata2") == 0 | 1294 | + if (strcmp (name, ".sdata2") == 0 |
1278 | + || strcmp (name, ".sbss2") == 0) | 1295 | + || strcmp (name, ".sbss2") == 0) |
@@ -1301,7 +1318,7 @@ index 0000000000..0f43ae6ea8 | |||
1301 | + bfd_get_filename (input_bfd), | 1318 | + bfd_get_filename (input_bfd), |
1302 | + sym_name, | 1319 | + sym_name, |
1303 | + microblaze_elf_howto_table[(int) r_type]->name, | 1320 | + microblaze_elf_howto_table[(int) r_type]->name, |
1304 | + bfd_get_section_name (sec->owner, sec)); | 1321 | + bfd_section_name (sec)); |
1305 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ | 1322 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ |
1306 | + ret = FALSE; | 1323 | + ret = FALSE; |
1307 | + continue; | 1324 | + continue; |
@@ -1317,7 +1334,7 @@ index 0000000000..0f43ae6ea8 | |||
1317 | + /* Only relocate if the symbol is defined. */ | 1334 | + /* Only relocate if the symbol is defined. */ |
1318 | + if (sec) | 1335 | + if (sec) |
1319 | + { | 1336 | + { |
1320 | + name = bfd_get_section_name (sec->owner, sec); | 1337 | + name = bfd_section_name (sec); |
1321 | + | 1338 | + |
1322 | + if (strcmp (name, ".sdata") == 0 | 1339 | + if (strcmp (name, ".sdata") == 0 |
1323 | + || strcmp (name, ".sbss") == 0) | 1340 | + || strcmp (name, ".sbss") == 0) |
@@ -1346,7 +1363,7 @@ index 0000000000..0f43ae6ea8 | |||
1346 | + bfd_get_filename (input_bfd), | 1363 | + bfd_get_filename (input_bfd), |
1347 | + sym_name, | 1364 | + sym_name, |
1348 | + microblaze_elf_howto_table[(int) r_type]->name, | 1365 | + microblaze_elf_howto_table[(int) r_type]->name, |
1349 | + bfd_get_section_name (sec->owner, sec)); | 1366 | + bfd_section_name (sec)); |
1350 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ | 1367 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ |
1351 | + ret = FALSE; | 1368 | + ret = FALSE; |
1352 | + continue; | 1369 | + continue; |
@@ -1408,6 +1425,7 @@ index 0000000000..0f43ae6ea8 | |||
1408 | + goto dogot; | 1425 | + goto dogot; |
1409 | + case (int) R_MICROBLAZE_TLSLD: | 1426 | + case (int) R_MICROBLAZE_TLSLD: |
1410 | + tls_type = (TLS_TLS | TLS_LD); | 1427 | + tls_type = (TLS_TLS | TLS_LD); |
1428 | + /* Fall through. */ | ||
1411 | + dogot: | 1429 | + dogot: |
1412 | + case (int) R_MICROBLAZE_GOT_64: | 1430 | + case (int) R_MICROBLAZE_GOT_64: |
1413 | + { | 1431 | + { |
@@ -1708,7 +1726,7 @@ index 0000000000..0f43ae6ea8 | |||
1708 | + { | 1726 | + { |
1709 | + BFD_FAIL (); | 1727 | + BFD_FAIL (); |
1710 | + (*_bfd_error_handler) | 1728 | + (*_bfd_error_handler) |
1711 | + (_("%B: probably compiled without -fPIC?"), | 1729 | + (_("%pB: probably compiled without -fPIC?"), |
1712 | + input_bfd); | 1730 | + input_bfd); |
1713 | + bfd_set_error (bfd_error_bad_value); | 1731 | + bfd_set_error (bfd_error_bad_value); |
1714 | + return FALSE; | 1732 | + return FALSE; |
@@ -1762,7 +1780,7 @@ index 0000000000..0f43ae6ea8 | |||
1762 | + name = (bfd_elf_string_from_elf_section | 1780 | + name = (bfd_elf_string_from_elf_section |
1763 | + (input_bfd, symtab_hdr->sh_link, sym->st_name)); | 1781 | + (input_bfd, symtab_hdr->sh_link, sym->st_name)); |
1764 | + if (name == NULL || *name == '\0') | 1782 | + if (name == NULL || *name == '\0') |
1765 | + name = bfd_section_name (input_bfd, sec); | 1783 | + name = bfd_section_name (sec); |
1766 | + } | 1784 | + } |
1767 | + | 1785 | + |
1768 | + if (errmsg != NULL) | 1786 | + if (errmsg != NULL) |
@@ -1807,21 +1825,6 @@ index 0000000000..0f43ae6ea8 | |||
1807 | + return ret; | 1825 | + return ret; |
1808 | +} | 1826 | +} |
1809 | + | 1827 | + |
1810 | +/* Merge backend specific data from an object file to the output | ||
1811 | + object file when linking. | ||
1812 | + | ||
1813 | + Note: We only use this hook to catch endian mismatches. */ | ||
1814 | +static bfd_boolean | ||
1815 | +microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | ||
1816 | +{ | ||
1817 | + /* Check if we have the same endianess. */ | ||
1818 | + if (! _bfd_generic_verify_endian_match (ibfd, obfd)) | ||
1819 | + return FALSE; | ||
1820 | + | ||
1821 | + return TRUE; | ||
1822 | +} | ||
1823 | + | ||
1824 | + | ||
1825 | +/* Calculate fixup value for reference. */ | 1828 | +/* Calculate fixup value for reference. */ |
1826 | + | 1829 | + |
1827 | +static int | 1830 | +static int |
@@ -2138,7 +2141,7 @@ index 0000000000..0f43ae6ea8 | |||
2138 | + irelscanend = irelocs + o->reloc_count; | 2141 | + irelscanend = irelocs + o->reloc_count; |
2139 | + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 2142 | + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
2140 | + { | 2143 | + { |
2141 | + if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) | 2144 | + if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) |
2142 | + { | 2145 | + { |
2143 | + unsigned int val; | 2146 | + unsigned int val; |
2144 | + | 2147 | + |
@@ -2497,17 +2500,6 @@ index 0000000000..0f43ae6ea8 | |||
2497 | + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); | 2500 | + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
2498 | +} | 2501 | +} |
2499 | + | 2502 | + |
2500 | +/* Update the got entry reference counts for the section being removed. */ | ||
2501 | + | ||
2502 | +static bfd_boolean | ||
2503 | +microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED, | ||
2504 | + struct bfd_link_info * info ATTRIBUTE_UNUSED, | ||
2505 | + asection * sec ATTRIBUTE_UNUSED, | ||
2506 | + const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED) | ||
2507 | +{ | ||
2508 | + return TRUE; | ||
2509 | +} | ||
2510 | + | ||
2511 | +/* PIC support. */ | 2503 | +/* PIC support. */ |
2512 | + | 2504 | + |
2513 | +#define PLT_ENTRY_SIZE 16 | 2505 | +#define PLT_ENTRY_SIZE 16 |
@@ -2540,13 +2532,13 @@ index 0000000000..0f43ae6ea8 | |||
2540 | + if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL) | 2532 | + if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL) |
2541 | + htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got"); | 2533 | + htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got"); |
2542 | + if (htab->srelgot == NULL | 2534 | + if (htab->srelgot == NULL |
2543 | + || ! bfd_set_section_flags (dynobj, htab->srelgot, SEC_ALLOC | 2535 | + || ! bfd_set_section_flags (htab->srelgot, SEC_ALLOC |
2544 | + | SEC_LOAD | 2536 | + | SEC_LOAD |
2545 | + | SEC_HAS_CONTENTS | 2537 | + | SEC_HAS_CONTENTS |
2546 | + | SEC_IN_MEMORY | 2538 | + | SEC_IN_MEMORY |
2547 | + | SEC_LINKER_CREATED | 2539 | + | SEC_LINKER_CREATED |
2548 | + | SEC_READONLY) | 2540 | + | SEC_READONLY) |
2549 | + || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2)) | 2541 | + || ! bfd_set_section_alignment (htab->srelgot, 2)) |
2550 | + return FALSE; | 2542 | + return FALSE; |
2551 | + return TRUE; | 2543 | + return TRUE; |
2552 | +} | 2544 | +} |
@@ -2627,7 +2619,7 @@ index 0000000000..0f43ae6ea8 | |||
2627 | + | 2619 | + |
2628 | + /* PR15323, ref flags aren't set for references in the same | 2620 | + /* PR15323, ref flags aren't set for references in the same |
2629 | + object. */ | 2621 | + object. */ |
2630 | + h->root.non_ir_ref = 1; | 2622 | + h->root.non_ir_ref_regular = 1; |
2631 | + } | 2623 | + } |
2632 | + | 2624 | + |
2633 | + switch (r_type) | 2625 | + switch (r_type) |
@@ -2663,6 +2655,7 @@ index 0000000000..0f43ae6ea8 | |||
2663 | + tls_type |= (TLS_TLS | TLS_LD); | 2655 | + tls_type |= (TLS_TLS | TLS_LD); |
2664 | + dogottls: | 2656 | + dogottls: |
2665 | + sec->has_tls_reloc = 1; | 2657 | + sec->has_tls_reloc = 1; |
2658 | + /* Fall through. */ | ||
2666 | + case R_MICROBLAZE_GOT_64: | 2659 | + case R_MICROBLAZE_GOT_64: |
2667 | + if (htab->sgot == NULL) | 2660 | + if (htab->sgot == NULL) |
2668 | + { | 2661 | + { |
@@ -2936,12 +2929,12 @@ index 0000000000..0f43ae6ea8 | |||
2936 | + /* If this is a weak symbol, and there is a real definition, the | 2929 | + /* If this is a weak symbol, and there is a real definition, the |
2937 | + processor independent code will have arranged for us to see the | 2930 | + processor independent code will have arranged for us to see the |
2938 | + real definition first, and we can just use the same value. */ | 2931 | + real definition first, and we can just use the same value. */ |
2939 | + if (h->u.weakdef != NULL) | 2932 | + if (h->is_weakalias) |
2940 | + { | 2933 | + { |
2941 | + BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined | 2934 | + struct elf_link_hash_entry *def = weakdef (h); |
2942 | + || h->u.weakdef->root.type == bfd_link_hash_defweak); | 2935 | + BFD_ASSERT (def->root.type == bfd_link_hash_defined); |
2943 | + h->root.u.def.section = h->u.weakdef->root.u.def.section; | 2936 | + h->root.u.def.section = def->root.u.def.section; |
2944 | + h->root.u.def.value = h->u.weakdef->root.u.def.value; | 2937 | + h->root.u.def.value = def->root.u.def.value; |
2945 | + return TRUE; | 2938 | + return TRUE; |
2946 | + } | 2939 | + } |
2947 | + | 2940 | + |
@@ -3013,9 +3006,9 @@ index 0000000000..0f43ae6ea8 | |||
3013 | + sdynbss = htab->sdynbss; | 3006 | + sdynbss = htab->sdynbss; |
3014 | + /* Apply the required alignment. */ | 3007 | + /* Apply the required alignment. */ |
3015 | + sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two)); | 3008 | + sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two)); |
3016 | + if (power_of_two > bfd_get_section_alignment (dynobj, sdynbss)) | 3009 | + if (power_of_two > bfd_section_alignment (sdynbss)) |
3017 | + { | 3010 | + { |
3018 | + if (! bfd_set_section_alignment (dynobj, sdynbss, power_of_two)) | 3011 | + if (! bfd_set_section_alignment (sdynbss, power_of_two)) |
3019 | + return FALSE; | 3012 | + return FALSE; |
3020 | + } | 3013 | + } |
3021 | + | 3014 | + |
@@ -3362,7 +3355,7 @@ index 0000000000..0f43ae6ea8 | |||
3362 | + | 3355 | + |
3363 | + /* It's OK to base decisions on the section name, because none | 3356 | + /* It's OK to base decisions on the section name, because none |
3364 | + of the dynobj section names depend upon the input files. */ | 3357 | + of the dynobj section names depend upon the input files. */ |
3365 | + name = bfd_get_section_name (dynobj, s); | 3358 | + name = bfd_section_name (s); |
3366 | + | 3359 | + |
3367 | + if (strncmp (name, ".rela", 5) == 0) | 3360 | + if (strncmp (name, ".rela", 5) == 0) |
3368 | + { | 3361 | + { |
@@ -3730,7 +3723,7 @@ index 0000000000..0f43ae6ea8 | |||
3730 | + put into .sbss. */ | 3723 | + put into .sbss. */ |
3731 | + *secp = bfd_make_section_old_way (abfd, ".sbss"); | 3724 | + *secp = bfd_make_section_old_way (abfd, ".sbss"); |
3732 | + if (*secp == NULL | 3725 | + if (*secp == NULL |
3733 | + || ! bfd_set_section_flags (abfd, *secp, SEC_IS_COMMON)) | 3726 | + || ! bfd_set_section_flags (*secp, SEC_IS_COMMON)) |
3734 | + return FALSE; | 3727 | + return FALSE; |
3735 | + | 3728 | + |
3736 | + *valp = sym->st_size; | 3729 | + *valp = sym->st_size; |
@@ -3757,11 +3750,10 @@ index 0000000000..0f43ae6ea8 | |||
3757 | +#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name | 3750 | +#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name |
3758 | +#define elf_backend_relocate_section microblaze_elf_relocate_section | 3751 | +#define elf_backend_relocate_section microblaze_elf_relocate_section |
3759 | +#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section | 3752 | +#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section |
3760 | +#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data | 3753 | +#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match |
3761 | +#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup | 3754 | +#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup |
3762 | + | 3755 | + |
3763 | +#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook | 3756 | +#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook |
3764 | +#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook | ||
3765 | +#define elf_backend_check_relocs microblaze_elf_check_relocs | 3757 | +#define elf_backend_check_relocs microblaze_elf_check_relocs |
3766 | +#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol | 3758 | +#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol |
3767 | +#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create | 3759 | +#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create |
@@ -3781,10 +3773,10 @@ index 0000000000..0f43ae6ea8 | |||
3781 | + | 3773 | + |
3782 | +#include "elf64-target.h" | 3774 | +#include "elf64-target.h" |
3783 | diff --git a/bfd/targets.c b/bfd/targets.c | 3775 | diff --git a/bfd/targets.c b/bfd/targets.c |
3784 | index 158168cb3b..ef567a30c8 100644 | 3776 | index 0732c5e4292..1ec226b2f47 100644 |
3785 | --- a/bfd/targets.c | 3777 | --- a/bfd/targets.c |
3786 | +++ b/bfd/targets.c | 3778 | +++ b/bfd/targets.c |
3787 | @@ -706,6 +706,8 @@ extern const bfd_target mep_elf32_le_vec; | 3779 | @@ -782,6 +782,8 @@ extern const bfd_target mep_elf32_le_vec; |
3788 | extern const bfd_target metag_elf32_vec; | 3780 | extern const bfd_target metag_elf32_vec; |
3789 | extern const bfd_target microblaze_elf32_vec; | 3781 | extern const bfd_target microblaze_elf32_vec; |
3790 | extern const bfd_target microblaze_elf32_le_vec; | 3782 | extern const bfd_target microblaze_elf32_le_vec; |
@@ -3793,7 +3785,7 @@ index 158168cb3b..ef567a30c8 100644 | |||
3793 | extern const bfd_target mips_ecoff_be_vec; | 3785 | extern const bfd_target mips_ecoff_be_vec; |
3794 | extern const bfd_target mips_ecoff_le_vec; | 3786 | extern const bfd_target mips_ecoff_le_vec; |
3795 | extern const bfd_target mips_ecoff_bele_vec; | 3787 | extern const bfd_target mips_ecoff_bele_vec; |
3796 | @@ -1073,6 +1075,10 @@ static const bfd_target * const _bfd_target_vector[] = | 3788 | @@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_target_vector[] = |
3797 | 3789 | ||
3798 | &metag_elf32_vec, | 3790 | &metag_elf32_vec, |
3799 | 3791 | ||
@@ -3805,7 +3797,7 @@ index 158168cb3b..ef567a30c8 100644 | |||
3805 | 3797 | ||
3806 | &mips_ecoff_be_vec, | 3798 | &mips_ecoff_be_vec, |
3807 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 3799 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
3808 | index 16b10d00a9..c79434785a 100644 | 3800 | index 5810a74a5fc..ffbb843d33e 100644 |
3809 | --- a/gas/config/tc-microblaze.c | 3801 | --- a/gas/config/tc-microblaze.c |
3810 | +++ b/gas/config/tc-microblaze.c | 3802 | +++ b/gas/config/tc-microblaze.c |
3811 | @@ -35,10 +35,13 @@ | 3803 | @@ -35,10 +35,13 @@ |
@@ -4153,7 +4145,7 @@ index 16b10d00a9..c79434785a 100644 | |||
4153 | 4145 | ||
4154 | default: | 4146 | default: |
4155 | as_fatal (_("unimplemented opcode \"%s\""), name); | 4147 | as_fatal (_("unimplemented opcode \"%s\""), name); |
4156 | @@ -1918,6 +2142,7 @@ struct option md_longopts[] = | 4148 | @@ -1915,6 +2139,7 @@ struct option md_longopts[] = |
4157 | {"EL", no_argument, NULL, OPTION_EL}, | 4149 | {"EL", no_argument, NULL, OPTION_EL}, |
4158 | {"mlittle-endian", no_argument, NULL, OPTION_LITTLE}, | 4150 | {"mlittle-endian", no_argument, NULL, OPTION_LITTLE}, |
4159 | {"mbig-endian", no_argument, NULL, OPTION_BIG}, | 4151 | {"mbig-endian", no_argument, NULL, OPTION_BIG}, |
@@ -4161,7 +4153,7 @@ index 16b10d00a9..c79434785a 100644 | |||
4161 | { NULL, no_argument, NULL, 0} | 4153 | { NULL, no_argument, NULL, 0} |
4162 | }; | 4154 | }; |
4163 | 4155 | ||
4164 | @@ -2569,6 +2794,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) | 4156 | @@ -2565,6 +2790,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
4165 | return rel; | 4157 | return rel; |
4166 | } | 4158 | } |
4167 | 4159 | ||
@@ -4180,7 +4172,7 @@ index 16b10d00a9..c79434785a 100644 | |||
4180 | int | 4172 | int |
4181 | md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) | 4173 | md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) |
4182 | { | 4174 | { |
4183 | @@ -2582,6 +2819,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) | 4175 | @@ -2578,6 +2815,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) |
4184 | case OPTION_LITTLE: | 4176 | case OPTION_LITTLE: |
4185 | target_big_endian = 0; | 4177 | target_big_endian = 0; |
4186 | break; | 4178 | break; |
@@ -4191,7 +4183,7 @@ index 16b10d00a9..c79434785a 100644 | |||
4191 | default: | 4183 | default: |
4192 | return 0; | 4184 | return 0; |
4193 | } | 4185 | } |
4194 | @@ -2597,6 +2838,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) | 4186 | @@ -2593,6 +2834,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) |
4195 | fprintf (stream, _(" MicroBlaze specific assembler options:\n")); | 4187 | fprintf (stream, _(" MicroBlaze specific assembler options:\n")); |
4196 | fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); | 4188 | fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); |
4197 | fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); | 4189 | fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); |
@@ -4200,7 +4192,7 @@ index 16b10d00a9..c79434785a 100644 | |||
4200 | 4192 | ||
4201 | 4193 | ||
4202 | diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h | 4194 | diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h |
4203 | index ca9dbb861f..9d38d2ced5 100644 | 4195 | index 01cb3e894f7..7435a70ef5e 100644 |
4204 | --- a/gas/config/tc-microblaze.h | 4196 | --- a/gas/config/tc-microblaze.h |
4205 | +++ b/gas/config/tc-microblaze.h | 4197 | +++ b/gas/config/tc-microblaze.h |
4206 | @@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[]; | 4198 | @@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[]; |
@@ -4215,10 +4207,10 @@ index ca9dbb861f..9d38d2ced5 100644 | |||
4215 | #define ELF_TC_SPECIAL_SECTIONS \ | 4207 | #define ELF_TC_SPECIAL_SECTIONS \ |
4216 | { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ | 4208 | { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ |
4217 | diff --git a/include/elf/common.h b/include/elf/common.h | 4209 | diff --git a/include/elf/common.h b/include/elf/common.h |
4218 | index 996acf9703..2f1e5be366 100644 | 4210 | index 4d94c4fd5b3..f709a01816c 100644 |
4219 | --- a/include/elf/common.h | 4211 | --- a/include/elf/common.h |
4220 | +++ b/include/elf/common.h | 4212 | +++ b/include/elf/common.h |
4221 | @@ -339,6 +339,7 @@ | 4213 | @@ -340,6 +340,7 @@ |
4222 | #define EM_RISCV 243 /* RISC-V */ | 4214 | #define EM_RISCV 243 /* RISC-V */ |
4223 | #define EM_LANAI 244 /* Lanai 32-bit processor. */ | 4215 | #define EM_LANAI 244 /* Lanai 32-bit processor. */ |
4224 | #define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */ | 4216 | #define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */ |
@@ -4227,71 +4219,71 @@ index 996acf9703..2f1e5be366 100644 | |||
4227 | #define EM_CSKY 252 /* C-SKY processor family. */ | 4219 | #define EM_CSKY 252 /* C-SKY processor family. */ |
4228 | 4220 | ||
4229 | diff --git a/ld/Makefile.am b/ld/Makefile.am | 4221 | diff --git a/ld/Makefile.am b/ld/Makefile.am |
4230 | index c2c798b4fe..b272f537e4 100644 | 4222 | index 02c4fc16395..d063e2d32c5 100644 |
4231 | --- a/ld/Makefile.am | 4223 | --- a/ld/Makefile.am |
4232 | +++ b/ld/Makefile.am | 4224 | +++ b/ld/Makefile.am |
4233 | @@ -422,6 +422,8 @@ ALL_64_EMULATION_SOURCES = \ | 4225 | @@ -416,6 +416,8 @@ ALL_64_EMULATION_SOURCES = \ |
4234 | eelf32ltsmipn32.c \ | 4226 | eelf32ltsmipn32.c \ |
4235 | eelf32ltsmipn32_fbsd.c \ | 4227 | eelf32ltsmipn32_fbsd.c \ |
4236 | eelf32mipswindiss.c \ | 4228 | eelf32mipswindiss.c \ |
4237 | + eelf64microblazeel.c \ | 4229 | + eelf64microblazeel.c \ |
4238 | + eelf64microblaze.c \ | 4230 | + eelf64microblaze.c \ |
4239 | eelf64_aix.c \ | 4231 | eelf64_aix.c \ |
4232 | eelf64bpf.c \ | ||
4240 | eelf64_ia64.c \ | 4233 | eelf64_ia64.c \ |
4241 | eelf64_ia64_fbsd.c \ | 4234 | @@ -898,6 +900,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) |
4242 | @@ -1702,6 +1704,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \ | 4235 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@ |
4243 | $(srcdir)/emulparams/elf_nacl.sh \ | 4236 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@ |
4244 | $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} | 4237 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@ |
4245 | 4238 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@ | |
4246 | +eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \ | 4239 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@ |
4247 | + $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} | 4240 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@ |
4248 | + | 4241 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@ |
4249 | +eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \ | 4242 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@ |
4250 | + $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} | ||
4251 | + | ||
4252 | eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \ | ||
4253 | $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} | ||
4254 | |||
4255 | diff --git a/ld/Makefile.in b/ld/Makefile.in | 4243 | diff --git a/ld/Makefile.in b/ld/Makefile.in |
4256 | index fc687fc516..1a530ad729 100644 | 4244 | index 2fe12e14f63..01ebb051faa 100644 |
4257 | --- a/ld/Makefile.in | 4245 | --- a/ld/Makefile.in |
4258 | +++ b/ld/Makefile.in | 4246 | +++ b/ld/Makefile.in |
4259 | @@ -907,6 +907,8 @@ ALL_64_EMULATION_SOURCES = \ | 4247 | @@ -515,6 +515,7 @@ pdfdir = @pdfdir@ |
4248 | prefix = @prefix@ | ||
4249 | program_transform_name = @program_transform_name@ | ||
4250 | psdir = @psdir@ | ||
4251 | +runstatedir = @runstatedir@ | ||
4252 | sbindir = @sbindir@ | ||
4253 | sharedstatedir = @sharedstatedir@ | ||
4254 | srcdir = @srcdir@ | ||
4255 | @@ -898,6 +899,8 @@ ALL_64_EMULATION_SOURCES = \ | ||
4260 | eelf32ltsmipn32.c \ | 4256 | eelf32ltsmipn32.c \ |
4261 | eelf32ltsmipn32_fbsd.c \ | 4257 | eelf32ltsmipn32_fbsd.c \ |
4262 | eelf32mipswindiss.c \ | 4258 | eelf32mipswindiss.c \ |
4263 | + eelf64microblazeel.c \ | 4259 | + eelf64microblazeel.c \ |
4264 | + eelf64microblaze.c \ | 4260 | + eelf64microblaze.c \ |
4265 | eelf64_aix.c \ | 4261 | eelf64_aix.c \ |
4262 | eelf64bpf.c \ | ||
4266 | eelf64_ia64.c \ | 4263 | eelf64_ia64.c \ |
4267 | eelf64_ia64_fbsd.c \ | 4264 | @@ -1360,6 +1363,8 @@ distclean-compile: |
4268 | @@ -1355,6 +1357,8 @@ distclean-compile: | 4265 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Po@am__quote@ |
4269 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xc16xs.Po@am__quote@ | 4266 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@ |
4270 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@ | 4267 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@ |
4271 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@ | ||
4272 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@ | ||
4273 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@ | 4268 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@ |
4274 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@ | 4269 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@ |
4275 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@ | 4270 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@ |
4276 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@ | 4271 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc.Po@am__quote@ |
4277 | @@ -3306,6 +3310,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \ | 4272 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc_fbsd.Po@am__quote@ |
4278 | $(srcdir)/emulparams/elf_nacl.sh \ | 4273 | @@ -2493,6 +2498,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) |
4279 | $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} | 4274 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@ |
4280 | 4275 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@ | |
4281 | +eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \ | 4276 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@ |
4282 | + $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} | 4277 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@ |
4283 | + | 4278 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@ |
4284 | +eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \ | 4279 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@ |
4285 | + $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} | 4280 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@ |
4286 | + | 4281 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@ |
4287 | eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \ | ||
4288 | $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} | ||
4289 | |||
4290 | diff --git a/ld/configure.tgt b/ld/configure.tgt | 4282 | diff --git a/ld/configure.tgt b/ld/configure.tgt |
4291 | index beba17ef51..5109799f2b 100644 | 4283 | index 87c7d9a4cad..801d27c9e3f 100644 |
4292 | --- a/ld/configure.tgt | 4284 | --- a/ld/configure.tgt |
4293 | +++ b/ld/configure.tgt | 4285 | +++ b/ld/configure.tgt |
4294 | @@ -423,6 +423,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux" | 4286 | @@ -469,6 +469,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux" |
4295 | microblazeel*) targ_emul=elf32microblazeel | 4287 | microblazeel*) targ_emul=elf32microblazeel |
4296 | targ_extra_emuls=elf32microblaze | 4288 | targ_extra_emuls=elf32microblaze |
4297 | ;; | 4289 | ;; |
@@ -4303,7 +4295,7 @@ index beba17ef51..5109799f2b 100644 | |||
4303 | ;; | 4295 | ;; |
4304 | diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh | 4296 | diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh |
4305 | new file mode 100644 | 4297 | new file mode 100644 |
4306 | index 0000000000..9c7b0eb708 | 4298 | index 00000000000..7b4c7c411bd |
4307 | --- /dev/null | 4299 | --- /dev/null |
4308 | +++ b/ld/emulparams/elf64microblaze.sh | 4300 | +++ b/ld/emulparams/elf64microblaze.sh |
4309 | @@ -0,0 +1,23 @@ | 4301 | @@ -0,0 +1,23 @@ |
@@ -4328,11 +4320,11 @@ index 0000000000..9c7b0eb708 | |||
4328 | +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} | 4320 | +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} |
4329 | +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' | 4321 | +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' |
4330 | + | 4322 | + |
4331 | +TEMPLATE_NAME=elf32 | 4323 | +TEMPLATE_NAME=elf |
4332 | +#GENERATE_SHLIB_SCRIPT=yes | 4324 | +#GENERATE_SHLIB_SCRIPT=yes |
4333 | diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh | 4325 | diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh |
4334 | new file mode 100644 | 4326 | new file mode 100644 |
4335 | index 0000000000..9c7b0eb708 | 4327 | index 00000000000..7b4c7c411bd |
4336 | --- /dev/null | 4328 | --- /dev/null |
4337 | +++ b/ld/emulparams/elf64microblazeel.sh | 4329 | +++ b/ld/emulparams/elf64microblazeel.sh |
4338 | @@ -0,0 +1,23 @@ | 4330 | @@ -0,0 +1,23 @@ |
@@ -4357,104 +4349,108 @@ index 0000000000..9c7b0eb708 | |||
4357 | +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} | 4349 | +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} |
4358 | +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' | 4350 | +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' |
4359 | + | 4351 | + |
4360 | +TEMPLATE_NAME=elf32 | 4352 | +TEMPLATE_NAME=elf |
4361 | +#GENERATE_SHLIB_SCRIPT=yes | 4353 | +#GENERATE_SHLIB_SCRIPT=yes |
4362 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 4354 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
4363 | index f8aaf27873..20ea6a885a 100644 | 4355 | index 52c9068805f..a03f5b7a55b 100644 |
4364 | --- a/opcodes/microblaze-dis.c | 4356 | --- a/opcodes/microblaze-dis.c |
4365 | +++ b/opcodes/microblaze-dis.c | 4357 | +++ b/opcodes/microblaze-dis.c |
4366 | @@ -33,6 +33,7 @@ | 4358 | @@ -33,6 +33,7 @@ |
4367 | #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW) | 4359 | #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) |
4368 | #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW) | 4360 | #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) |
4369 | #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) | 4361 | #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) |
4370 | +#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) | 4362 | +#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) |
4371 | #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) | 4363 | #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) |
4372 | 4364 | ||
4373 | 4365 | #define NUM_STRBUFS 3 | |
4374 | @@ -56,11 +57,20 @@ get_field_imm (long instr) | 4366 | @@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr) |
4375 | } | 4367 | } |
4376 | 4368 | ||
4377 | static char * | 4369 | static char * |
4378 | -get_field_imm5 (long instr) | 4370 | -get_field_imm5 (struct string_buf *buf, long instr) |
4379 | +get_field_imml (long instr) | 4371 | +get_field_imml (struct string_buf *buf, long instr) |
4380 | { | 4372 | { |
4381 | char tmpstr[25]; | 4373 | char *p = strbuf (buf); |
4382 | 4374 | ||
4383 | - sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); | 4375 | - sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); |
4384 | + sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); | 4376 | + sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); |
4385 | + return (strdup (tmpstr)); | 4377 | + return p; |
4386 | +} | 4378 | +} |
4387 | + | 4379 | + |
4388 | +static char * | 4380 | +static char * |
4389 | +get_field_imms (long instr) | 4381 | +get_field_imms (struct string_buf *buf, long instr) |
4390 | +{ | 4382 | +{ |
4391 | + char tmpstr[25]; | 4383 | + char *p = strbuf (buf); |
4392 | + | 4384 | + |
4393 | + sprintf (tmpstr, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); | 4385 | + sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); |
4394 | return (strdup (tmpstr)); | 4386 | return p; |
4395 | } | 4387 | } |
4396 | 4388 | ||
4397 | @@ -74,14 +84,14 @@ get_field_imm5_mbar (long instr) | 4389 | @@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) |
4398 | } | 4390 | } |
4399 | 4391 | ||
4400 | static char * | 4392 | static char * |
4401 | -get_field_imm5width (long instr) | 4393 | -get_field_imm5width (struct string_buf *buf, long instr) |
4402 | +get_field_immw (long instr) | 4394 | +get_field_immw (struct string_buf *buf, long instr) |
4403 | { | 4395 | { |
4404 | char tmpstr[25]; | 4396 | char *p = strbuf (buf); |
4405 | 4397 | ||
4406 | if (instr & 0x00004000) | 4398 | if (instr & 0x00004000) |
4407 | - sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ | 4399 | - sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ |
4408 | + sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ | 4400 | + sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ |
4409 | else | 4401 | else |
4410 | - sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ | 4402 | - sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ |
4411 | + sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ | 4403 | + sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ |
4412 | return (strdup (tmpstr)); | 4404 | return p; |
4413 | } | 4405 | } |
4414 | 4406 | ||
4415 | @@ -286,9 +296,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 4407 | @@ -308,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
4416 | } | 4408 | } |
4417 | } | 4409 | } |
4418 | break; | 4410 | break; |
4419 | - case INST_TYPE_RD_R1_IMM5: | 4411 | - case INST_TYPE_RD_R1_IMM5: |
4420 | + case INST_TYPE_RD_R1_IMML: | 4412 | + case INST_TYPE_RD_R1_IMML: |
4421 | + print_func (stream, "\t%s, %s, %s", get_field_rd (inst), | 4413 | print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), |
4422 | + get_field_r1(inst), get_field_imm (inst)); | 4414 | - get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst)); |
4415 | + get_field_r1(&buf, inst), get_field_imm (&buf, inst)); | ||
4423 | + /* TODO: Also print symbol */ | 4416 | + /* TODO: Also print symbol */ |
4417 | + break; | ||
4424 | + case INST_TYPE_RD_R1_IMMS: | 4418 | + case INST_TYPE_RD_R1_IMMS: |
4425 | print_func (stream, "\t%s, %s, %s", get_field_rd (inst), | 4419 | + print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), |
4426 | - get_field_r1(inst), get_field_imm5 (inst)); | 4420 | + get_field_r1(&buf, inst), get_field_imms (&buf, inst)); |
4427 | + get_field_r1(inst), get_field_imms (inst)); | ||
4428 | break; | 4421 | break; |
4429 | case INST_TYPE_RD_RFSL: | 4422 | case INST_TYPE_RD_RFSL: |
4430 | print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst)); | 4423 | print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), |
4431 | @@ -386,6 +400,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 4424 | @@ -414,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
4432 | } | 4425 | } |
4433 | } | 4426 | } |
4434 | break; | 4427 | break; |
4428 | - case INST_TYPE_RD_R2: | ||
4429 | - print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), | ||
4430 | - get_field_r2 (&buf, inst)); | ||
4435 | + case INST_TYPE_IMML: | 4431 | + case INST_TYPE_IMML: |
4436 | + print_func (stream, "\t%s", get_field_imml (inst)); | 4432 | + print_func (stream, "\t%s", get_field_imml (&buf, inst)); |
4437 | + /* TODO: Also print symbol */ | 4433 | + /* TODO: Also print symbol */ |
4438 | + break; | 4434 | + break; |
4439 | case INST_TYPE_RD_R2: | 4435 | + case INST_TYPE_RD_R2: |
4440 | print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst)); | 4436 | + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); |
4437 | break; | ||
4438 | case INST_TYPE_R2: | ||
4439 | print_func (stream, "\t%s", get_field_r2 (&buf, inst)); | ||
4440 | @@ -441,8 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | ||
4441 | break; | 4441 | break; |
4442 | @@ -409,9 +427,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 4442 | /* For tuqula instruction */ |
4443 | case INST_TYPE_NONE: | ||
4444 | break; | ||
4445 | /* For bit field insns. */ | 4443 | /* For bit field insns. */ |
4446 | - case INST_TYPE_RD_R1_IMM5_IMM5: | 4444 | - case INST_TYPE_RD_R1_IMM5_IMM5: |
4447 | - print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst)); | 4445 | - print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); |
4448 | - break; | ||
4449 | + case INST_TYPE_RD_R1_IMMW_IMMS: | 4446 | + case INST_TYPE_RD_R1_IMMW_IMMS: |
4450 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst), get_field_r1(inst), | 4447 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), |
4451 | + get_field_immw (inst), get_field_imms (inst)); | 4448 | + get_field_immw (&buf, inst), get_field_imms (&buf, inst)); |
4452 | + break; | 4449 | break; |
4453 | /* For tuqula instruction */ | 4450 | /* For tuqula instruction */ |
4454 | case INST_TYPE_RD: | 4451 | case INST_TYPE_RD: |
4455 | print_func (stream, "\t%s", get_field_rd (inst)); | ||
4456 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 4452 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
4457 | index ce8ac351b5..985834b8df 100644 | 4453 | index f61f4ef66d9..61eaa39b3eb 100644 |
4458 | --- a/opcodes/microblaze-opc.h | 4454 | --- a/opcodes/microblaze-opc.h |
4459 | +++ b/opcodes/microblaze-opc.h | 4455 | +++ b/opcodes/microblaze-opc.h |
4460 | @@ -40,7 +40,7 @@ | 4456 | @@ -40,7 +40,7 @@ |
@@ -4682,7 +4678,7 @@ index ce8ac351b5..985834b8df 100644 | |||
4682 | #endif /* MICROBLAZE_OPC */ | 4678 | #endif /* MICROBLAZE_OPC */ |
4683 | 4679 | ||
4684 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 4680 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
4685 | index 28662694cd..076dbcd0b3 100644 | 4681 | index fa921c90c98..1dcd3dca3d1 100644 |
4686 | --- a/opcodes/microblaze-opcm.h | 4682 | --- a/opcodes/microblaze-opcm.h |
4687 | +++ b/opcodes/microblaze-opcm.h | 4683 | +++ b/opcodes/microblaze-opcm.h |
4688 | @@ -25,6 +25,7 @@ | 4684 | @@ -25,6 +25,7 @@ |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch index 0c3da95a..06a8f70a 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch | |||
@@ -1,32 +1,32 @@ | |||
1 | From bcd4263219c9756b9c1c1df64c6fef1311057fac Mon Sep 17 00:00:00 2001 | 1 | From 49a85544705ec3057f0a1f32807b7b986127cec1 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sun, 30 Sep 2018 16:31:26 +0530 | 3 | Date: Sun, 30 Sep 2018 16:31:26 +0530 |
4 | Subject: [PATCH 16/43] MB-X initial commit code cleanup is needed. | 4 | Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed. |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/bfd-in2.h | 10 +++ | 7 | bfd/bfd-in2.h | 10 +++ |
8 | bfd/elf32-microblaze.c | 65 +++++++++++++++- | 8 | bfd/elf32-microblaze.c | 63 +++++++++++++++++- |
9 | bfd/elf64-microblaze.c | 61 ++++++++++++++- | 9 | bfd/elf64-microblaze.c | 59 +++++++++++++++++ |
10 | bfd/libbfd.h | 2 + | 10 | bfd/libbfd.h | 2 + |
11 | bfd/reloc.c | 12 +++ | 11 | bfd/reloc.c | 12 ++++ |
12 | gas/config/tc-microblaze.c | 152 ++++++++++++++++++++++++++++++------- | 12 | gas/config/tc-microblaze.c | 127 +++++++++++++++++++++++++++---------- |
13 | include/elf/microblaze.h | 2 + | 13 | include/elf/microblaze.h | 2 + |
14 | opcodes/microblaze-opc.h | 4 +- | 14 | opcodes/microblaze-opc.h | 4 +- |
15 | opcodes/microblaze-opcm.h | 4 +- | 15 | opcodes/microblaze-opcm.h | 4 +- |
16 | 9 files changed, 277 insertions(+), 35 deletions(-) | 16 | 9 files changed, 243 insertions(+), 40 deletions(-) |
17 | 17 | ||
18 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 18 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
19 | index 721531886a..4f777059d8 100644 | 19 | index 3fdbf8ed755..c55092c9ec7 100644 |
20 | --- a/bfd/bfd-in2.h | 20 | --- a/bfd/bfd-in2.h |
21 | +++ b/bfd/bfd-in2.h | 21 | +++ b/bfd/bfd-in2.h |
22 | @@ -5876,11 +5876,21 @@ done here - only used for relaxing */ | 22 | @@ -5438,11 +5438,21 @@ value in two words (with an imm instruction). No relocation is |
23 | * +done here - only used for relaxing */ | 23 | done here - only used for relaxing */ |
24 | BFD_RELOC_MICROBLAZE_64_NONE, | 24 | BFD_RELOC_MICROBLAZE_64_NONE, |
25 | 25 | ||
26 | +/* This is a 64 bit reloc that stores the 32 bit pc relative | 26 | +/* This is a 64 bit reloc that stores the 32 bit pc relative |
27 | + * +value in two words (with an imml instruction). No relocation is | 27 | +value in two words (with an imml instruction). No relocation is |
28 | + * +done here - only used for relaxing */ | 28 | +done here - only used for relaxing */ |
29 | + BFD_RELOC_MICROBLAZE_64, | 29 | + BFD_RELOC_MICROBLAZE_64, |
30 | + | 30 | + |
31 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 31 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
32 | value in two words (with an imm instruction). The relocation is | 32 | value in two words (with an imm instruction). The relocation is |
@@ -42,7 +42,7 @@ index 721531886a..4f777059d8 100644 | |||
42 | value in two words (with an imm instruction). The relocation is | 42 | value in two words (with an imm instruction). The relocation is |
43 | GOT offset */ | 43 | GOT offset */ |
44 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 44 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
45 | index d001437b3f..035e71f311 100644 | 45 | index cf4a7fdba33..e1a66f57e79 100644 |
46 | --- a/bfd/elf32-microblaze.c | 46 | --- a/bfd/elf32-microblaze.c |
47 | +++ b/bfd/elf32-microblaze.c | 47 | +++ b/bfd/elf32-microblaze.c |
48 | @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 48 | @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -68,7 +68,7 @@ index d001437b3f..035e71f311 100644 | |||
68 | 0, /* Rightshift. */ | 68 | 0, /* Rightshift. */ |
69 | @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 69 | @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
70 | 0x0000ffff, /* Dest Mask. */ | 70 | 0x0000ffff, /* Dest Mask. */ |
71 | TRUE), /* PC relative offset? */ | 71 | TRUE), /* PC relative offset? */ |
72 | 72 | ||
73 | + /* A 64 bit GOTPC relocation. Table-entry not really used. */ | 73 | + /* A 64 bit GOTPC relocation. Table-entry not really used. */ |
74 | + HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ | 74 | + HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ |
@@ -104,23 +104,14 @@ index d001437b3f..035e71f311 100644 | |||
104 | case BFD_RELOC_MICROBLAZE_64_GOT: | 104 | case BFD_RELOC_MICROBLAZE_64_GOT: |
105 | microblaze_reloc = R_MICROBLAZE_GOT_64; | 105 | microblaze_reloc = R_MICROBLAZE_GOT_64; |
106 | break; | 106 | break; |
107 | @@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 107 | @@ -1929,6 +1964,28 @@ microblaze_elf_relax_section (bfd *abfd, |
108 | if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) | ||
109 | { | ||
110 | relocation += addend; | ||
111 | - if (r_type == R_MICROBLAZE_32) | ||
112 | + if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) | ||
113 | bfd_put_32 (input_bfd, relocation, contents + offset); | ||
114 | else | ||
115 | { | ||
116 | @@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd, | ||
117 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); | 108 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); |
118 | } | 109 | } |
119 | break; | 110 | break; |
120 | + case R_MICROBLAZE_IMML_64: | 111 | + case R_MICROBLAZE_IMML_64: |
121 | + { | 112 | + { |
122 | + /* This was a PC-relative instruction that was | 113 | + /* This was a PC-relative instruction that was |
123 | + completely resolved. */ | 114 | + completely resolved. */ |
124 | + int sfix, efix; | 115 | + int sfix, efix; |
125 | + unsigned int val; | 116 | + unsigned int val; |
126 | + bfd_vma target_address; | 117 | + bfd_vma target_address; |
@@ -142,21 +133,21 @@ index d001437b3f..035e71f311 100644 | |||
142 | case R_MICROBLAZE_NONE: | 133 | case R_MICROBLAZE_NONE: |
143 | case R_MICROBLAZE_32_NONE: | 134 | case R_MICROBLAZE_32_NONE: |
144 | { | 135 | { |
145 | @@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd, | 136 | @@ -2034,9 +2091,9 @@ microblaze_elf_relax_section (bfd *abfd, |
146 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 137 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
147 | irelscan->r_addend); | 138 | irelscan->r_addend); |
148 | } | 139 | } |
149 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) | 140 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
150 | - { | 141 | - { |
151 | - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 142 | - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
152 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) | 143 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
153 | + { | 144 | + { |
154 | + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 145 | + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
155 | 146 | ||
156 | /* Look at the reloc only if the value has been resolved. */ | 147 | /* Look at the reloc only if the value has been resolved. */ |
157 | if (isym->st_shndx == shndx | 148 | if (isym->st_shndx == shndx |
158 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 149 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
159 | index 0f43ae6ea8..56a45f2a05 100644 | 150 | index fa4b95e47e0..d55700fc513 100644 |
160 | --- a/bfd/elf64-microblaze.c | 151 | --- a/bfd/elf64-microblaze.c |
161 | +++ b/bfd/elf64-microblaze.c | 152 | +++ b/bfd/elf64-microblaze.c |
162 | @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 153 | @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -219,7 +210,7 @@ index 0f43ae6ea8..56a45f2a05 100644 | |||
219 | case BFD_RELOC_MICROBLAZE_64_GOT: | 210 | case BFD_RELOC_MICROBLAZE_64_GOT: |
220 | microblaze_reloc = R_MICROBLAZE_GOT_64; | 211 | microblaze_reloc = R_MICROBLAZE_GOT_64; |
221 | break; | 212 | break; |
222 | @@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 213 | @@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
223 | break; /* Do nothing. */ | 214 | break; /* Do nothing. */ |
224 | 215 | ||
225 | case (int) R_MICROBLAZE_GOTPC_64: | 216 | case (int) R_MICROBLAZE_GOTPC_64: |
@@ -227,23 +218,14 @@ index 0f43ae6ea8..56a45f2a05 100644 | |||
227 | relocation = htab->sgotplt->output_section->vma | 218 | relocation = htab->sgotplt->output_section->vma |
228 | + htab->sgotplt->output_offset; | 219 | + htab->sgotplt->output_offset; |
229 | relocation -= (input_section->output_section->vma | 220 | relocation -= (input_section->output_section->vma |
230 | @@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 221 | @@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd, |
231 | if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) | ||
232 | { | ||
233 | relocation += addend; | ||
234 | - if (r_type == R_MICROBLAZE_32) | ||
235 | + if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) | ||
236 | bfd_put_32 (input_bfd, relocation, contents + offset); | ||
237 | else | ||
238 | { | ||
239 | @@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd, | ||
240 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); | 222 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); |
241 | } | 223 | } |
242 | break; | 224 | break; |
243 | + case R_MICROBLAZE_IMML_64: | 225 | + case R_MICROBLAZE_IMML_64: |
244 | + { | 226 | + { |
245 | + /* This was a PC-relative instruction that was | 227 | + /* This was a PC-relative instruction that was |
246 | + completely resolved. */ | 228 | + completely resolved. */ |
247 | + int sfix, efix; | 229 | + int sfix, efix; |
248 | + unsigned int val; | 230 | + unsigned int val; |
249 | + bfd_vma target_address; | 231 | + bfd_vma target_address; |
@@ -266,10 +248,10 @@ index 0f43ae6ea8..56a45f2a05 100644 | |||
266 | case R_MICROBLAZE_32_NONE: | 248 | case R_MICROBLAZE_32_NONE: |
267 | { | 249 | { |
268 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 250 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
269 | index feb9fada1e..450653f2d8 100644 | 251 | index c1551b92405..b4aace6a70d 100644 |
270 | --- a/bfd/libbfd.h | 252 | --- a/bfd/libbfd.h |
271 | +++ b/bfd/libbfd.h | 253 | +++ b/bfd/libbfd.h |
272 | @@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 254 | @@ -2969,7 +2969,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
273 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 255 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
274 | "BFD_RELOC_MICROBLAZE_32_NONE", | 256 | "BFD_RELOC_MICROBLAZE_32_NONE", |
275 | "BFD_RELOC_MICROBLAZE_64_NONE", | 257 | "BFD_RELOC_MICROBLAZE_64_NONE", |
@@ -280,10 +262,10 @@ index feb9fada1e..450653f2d8 100644 | |||
280 | "BFD_RELOC_MICROBLAZE_64_PLT", | 262 | "BFD_RELOC_MICROBLAZE_64_PLT", |
281 | "BFD_RELOC_MICROBLAZE_64_GOTOFF", | 263 | "BFD_RELOC_MICROBLAZE_64_GOTOFF", |
282 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 264 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
283 | index 87753ae4f0..ccf29f54cf 100644 | 265 | index 9b39b419415..0e8a24e9cb0 100644 |
284 | --- a/bfd/reloc.c | 266 | --- a/bfd/reloc.c |
285 | +++ b/bfd/reloc.c | 267 | +++ b/bfd/reloc.c |
286 | @@ -6803,12 +6803,24 @@ ENUMDOC | 268 | @@ -6866,12 +6866,24 @@ ENUMDOC |
287 | done here - only used for relaxing | 269 | done here - only used for relaxing |
288 | ENUM | 270 | ENUM |
289 | BFD_RELOC_MICROBLAZE_64_NONE | 271 | BFD_RELOC_MICROBLAZE_64_NONE |
@@ -309,7 +291,7 @@ index 87753ae4f0..ccf29f54cf 100644 | |||
309 | This is a 64 bit reloc that stores the 32 bit pc relative | 291 | This is a 64 bit reloc that stores the 32 bit pc relative |
310 | value in two words (with an imm instruction). The relocation is | 292 | value in two words (with an imm instruction). The relocation is |
311 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 293 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
312 | index c79434785a..3f90b7c892 100644 | 294 | index ffbb843d33e..b8250e4cded 100644 |
313 | --- a/gas/config/tc-microblaze.c | 295 | --- a/gas/config/tc-microblaze.c |
314 | +++ b/gas/config/tc-microblaze.c | 296 | +++ b/gas/config/tc-microblaze.c |
315 | @@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; | 297 | @@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
@@ -320,16 +302,17 @@ index c79434785a..3f90b7c892 100644 | |||
320 | 302 | ||
321 | /* Initialize the relax table. */ | 303 | /* Initialize the relax table. */ |
322 | const relax_typeS md_relax_table[] = | 304 | const relax_typeS md_relax_table[] = |
323 | @@ -117,6 +118,8 @@ const relax_typeS md_relax_table[] = | 305 | @@ -116,7 +117,8 @@ const relax_typeS md_relax_table[] = |
306 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */ | ||
324 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ | 307 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ |
325 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ | 308 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ |
326 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ | 309 | - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ |
327 | +// { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ | 310 | + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */ |
328 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */ | 311 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */ |
329 | }; | 312 | }; |
330 | 313 | ||
331 | static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ | 314 | static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ |
332 | @@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] = | 315 | @@ -396,7 +398,8 @@ const pseudo_typeS md_pseudo_table[] = |
333 | {"data32", cons, 4}, /* Same as word. */ | 316 | {"data32", cons, 4}, /* Same as word. */ |
334 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ | 317 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ |
335 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ | 318 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ |
@@ -339,7 +322,7 @@ index c79434785a..3f90b7c892 100644 | |||
339 | {"weakext", microblaze_s_weakext, 0}, | 322 | {"weakext", microblaze_s_weakext, 0}, |
340 | {"rodata", microblaze_s_rdata, 0}, | 323 | {"rodata", microblaze_s_rdata, 0}, |
341 | {"sdata2", microblaze_s_rdata, 1}, | 324 | {"sdata2", microblaze_s_rdata, 1}, |
342 | @@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] = | 325 | @@ -405,6 +408,7 @@ const pseudo_typeS md_pseudo_table[] = |
343 | {"sbss", microblaze_s_bss, 1}, | 326 | {"sbss", microblaze_s_bss, 1}, |
344 | {"text", microblaze_s_text, 0}, | 327 | {"text", microblaze_s_text, 0}, |
345 | {"word", cons, 4}, | 328 | {"word", cons, 4}, |
@@ -347,7 +330,7 @@ index c79434785a..3f90b7c892 100644 | |||
347 | {"frame", s_ignore, 0}, | 330 | {"frame", s_ignore, 0}, |
348 | {"mask", s_ignore, 0}, /* Emitted by gcc. */ | 331 | {"mask", s_ignore, 0}, /* Emitted by gcc. */ |
349 | {NULL, NULL, 0} | 332 | {NULL, NULL, 0} |
350 | @@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len) | 333 | @@ -898,7 +902,7 @@ check_got (int * got_type, int * got_len) |
351 | extern bfd_reloc_code_real_type | 334 | extern bfd_reloc_code_real_type |
352 | parse_cons_expression_microblaze (expressionS *exp, int size) | 335 | parse_cons_expression_microblaze (expressionS *exp, int size) |
353 | { | 336 | { |
@@ -356,7 +339,7 @@ index c79434785a..3f90b7c892 100644 | |||
356 | { | 339 | { |
357 | /* Handle @GOTOFF et.al. */ | 340 | /* Handle @GOTOFF et.al. */ |
358 | char *save, *gotfree_copy; | 341 | char *save, *gotfree_copy; |
359 | @@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) | 342 | @@ -930,6 +934,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) |
360 | 343 | ||
361 | static const char * str_microblaze_ro_anchor = "RO"; | 344 | static const char * str_microblaze_ro_anchor = "RO"; |
362 | static const char * str_microblaze_rw_anchor = "RW"; | 345 | static const char * str_microblaze_rw_anchor = "RW"; |
@@ -364,41 +347,7 @@ index c79434785a..3f90b7c892 100644 | |||
364 | 347 | ||
365 | static bfd_boolean | 348 | static bfd_boolean |
366 | check_spl_reg (unsigned * reg) | 349 | check_spl_reg (unsigned * reg) |
367 | @@ -1174,6 +1180,33 @@ md_assemble (char * str) | 350 | @@ -1926,6 +1931,7 @@ md_assemble (char * str) |
368 | inst |= (immed << IMM_LOW) & IMM_MASK; | ||
369 | } | ||
370 | } | ||
371 | +#if 0 //revisit | ||
372 | + else if (streq (name, "lli") || streq (name, "sli")) | ||
373 | + { | ||
374 | + temp = immed & 0xFFFFFFFFFFFF8000; | ||
375 | + if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000)) | ||
376 | + { | ||
377 | + /* Needs an immediate inst. */ | ||
378 | + opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | ||
379 | + if (opcode1 == NULL) | ||
380 | + { | ||
381 | + as_bad (_("unknown opcode \"%s\""), "imml"); | ||
382 | + return; | ||
383 | + } | ||
384 | + | ||
385 | + inst1 = opcode1->bit_sequence; | ||
386 | + inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; | ||
387 | + output[0] = INST_BYTE0 (inst1); | ||
388 | + output[1] = INST_BYTE1 (inst1); | ||
389 | + output[2] = INST_BYTE2 (inst1); | ||
390 | + output[3] = INST_BYTE3 (inst1); | ||
391 | + output = frag_more (isize); | ||
392 | + } | ||
393 | + inst |= (reg1 << RD_LOW) & RD_MASK; | ||
394 | + inst |= (reg2 << RA_LOW) & RA_MASK; | ||
395 | + inst |= (immed << IMM_LOW) & IMM_MASK; | ||
396 | + } | ||
397 | +#endif | ||
398 | else | ||
399 | { | ||
400 | temp = immed & 0xFFFF8000; | ||
401 | @@ -1926,6 +1959,7 @@ md_assemble (char * str) | ||
402 | if (exp.X_op != O_constant) | 351 | if (exp.X_op != O_constant) |
403 | { | 352 | { |
404 | char *opc = NULL; | 353 | char *opc = NULL; |
@@ -406,7 +355,7 @@ index c79434785a..3f90b7c892 100644 | |||
406 | relax_substateT subtype; | 355 | relax_substateT subtype; |
407 | 356 | ||
408 | if (exp.X_md != 0) | 357 | if (exp.X_md != 0) |
409 | @@ -1939,7 +1973,7 @@ md_assemble (char * str) | 358 | @@ -1939,7 +1945,7 @@ md_assemble (char * str) |
410 | subtype, /* PC-relative or not. */ | 359 | subtype, /* PC-relative or not. */ |
411 | exp.X_add_symbol, | 360 | exp.X_add_symbol, |
412 | exp.X_add_number, | 361 | exp.X_add_number, |
@@ -415,7 +364,7 @@ index c79434785a..3f90b7c892 100644 | |||
415 | immedl = 0L; | 364 | immedl = 0L; |
416 | } | 365 | } |
417 | else | 366 | else |
418 | @@ -1977,7 +2011,7 @@ md_assemble (char * str) | 367 | @@ -1977,7 +1983,7 @@ md_assemble (char * str) |
419 | reg1 = 0; | 368 | reg1 = 0; |
420 | } | 369 | } |
421 | if (strcmp (op_end, "")) | 370 | if (strcmp (op_end, "")) |
@@ -424,17 +373,17 @@ index c79434785a..3f90b7c892 100644 | |||
424 | else | 373 | else |
425 | as_fatal (_("Error in statement syntax")); | 374 | as_fatal (_("Error in statement syntax")); |
426 | 375 | ||
427 | @@ -1987,7 +2021,8 @@ md_assemble (char * str) | 376 | @@ -1987,7 +1993,8 @@ md_assemble (char * str) |
428 | 377 | ||
429 | if (exp.X_op != O_constant) | 378 | if (exp.X_op != O_constant) |
430 | { | 379 | { |
431 | - char *opc = NULL; | 380 | - char *opc = NULL; |
432 | + //char *opc = NULL; | 381 | + //char *opc = NULL; |
433 | + char *opc = str_microblaze_64; | 382 | + char *opc = strdup(str_microblaze_64); |
434 | relax_substateT subtype; | 383 | relax_substateT subtype; |
435 | 384 | ||
436 | if (exp.X_md != 0) | 385 | if (exp.X_md != 0) |
437 | @@ -2001,14 +2036,13 @@ md_assemble (char * str) | 386 | @@ -2001,14 +2008,13 @@ md_assemble (char * str) |
438 | subtype, /* PC-relative or not. */ | 387 | subtype, /* PC-relative or not. */ |
439 | exp.X_add_symbol, | 388 | exp.X_add_symbol, |
440 | exp.X_add_number, | 389 | exp.X_add_number, |
@@ -450,7 +399,7 @@ index c79434785a..3f90b7c892 100644 | |||
450 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | 399 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); |
451 | if (opcode1 == NULL) | 400 | if (opcode1 == NULL) |
452 | { | 401 | { |
453 | @@ -2187,13 +2221,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, | 402 | @@ -2184,13 +2190,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, |
454 | fragP->fr_fix += INST_WORD_SIZE * 2; | 403 | fragP->fr_fix += INST_WORD_SIZE * 2; |
455 | fragP->fr_var = 0; | 404 | fragP->fr_var = 0; |
456 | break; | 405 | break; |
@@ -475,7 +424,7 @@ index c79434785a..3f90b7c892 100644 | |||
475 | fragP->fr_fix += INST_WORD_SIZE * 2; | 424 | fragP->fr_fix += INST_WORD_SIZE * 2; |
476 | fragP->fr_var = 0; | 425 | fragP->fr_var = 0; |
477 | break; | 426 | break; |
478 | @@ -2416,22 +2460,38 @@ md_apply_fix (fixS * fixP, | 427 | @@ -2412,22 +2428,38 @@ md_apply_fix (fixS * fixP, |
479 | case BFD_RELOC_64_PCREL: | 428 | case BFD_RELOC_64_PCREL: |
480 | case BFD_RELOC_64: | 429 | case BFD_RELOC_64: |
481 | case BFD_RELOC_MICROBLAZE_64_TEXTREL: | 430 | case BFD_RELOC_MICROBLAZE_64_TEXTREL: |
@@ -526,7 +475,7 @@ index c79434785a..3f90b7c892 100644 | |||
526 | buf[0] = INST_BYTE0 (inst1); | 475 | buf[0] = INST_BYTE0 (inst1); |
527 | buf[1] = INST_BYTE1 (inst1); | 476 | buf[1] = INST_BYTE1 (inst1); |
528 | buf[2] = INST_BYTE2 (inst1); | 477 | buf[2] = INST_BYTE2 (inst1); |
529 | @@ -2460,6 +2520,7 @@ md_apply_fix (fixS * fixP, | 478 | @@ -2456,6 +2488,7 @@ md_apply_fix (fixS * fixP, |
530 | /* Fall through. */ | 479 | /* Fall through. */ |
531 | 480 | ||
532 | case BFD_RELOC_MICROBLAZE_64_GOTPC: | 481 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
@@ -534,7 +483,7 @@ index c79434785a..3f90b7c892 100644 | |||
534 | case BFD_RELOC_MICROBLAZE_64_GOT: | 483 | case BFD_RELOC_MICROBLAZE_64_GOT: |
535 | case BFD_RELOC_MICROBLAZE_64_PLT: | 484 | case BFD_RELOC_MICROBLAZE_64_PLT: |
536 | case BFD_RELOC_MICROBLAZE_64_GOTOFF: | 485 | case BFD_RELOC_MICROBLAZE_64_GOTOFF: |
537 | @@ -2467,12 +2528,16 @@ md_apply_fix (fixS * fixP, | 486 | @@ -2463,12 +2496,16 @@ md_apply_fix (fixS * fixP, |
538 | /* Add an imm instruction. First save the current instruction. */ | 487 | /* Add an imm instruction. First save the current instruction. */ |
539 | for (i = 0; i < INST_WORD_SIZE; i++) | 488 | for (i = 0; i < INST_WORD_SIZE; i++) |
540 | buf[i + INST_WORD_SIZE] = buf[i]; | 489 | buf[i + INST_WORD_SIZE] = buf[i]; |
@@ -555,22 +504,27 @@ index c79434785a..3f90b7c892 100644 | |||
555 | return; | 504 | return; |
556 | } | 505 | } |
557 | 506 | ||
558 | @@ -2496,6 +2561,8 @@ md_apply_fix (fixS * fixP, | 507 | @@ -2490,7 +2527,7 @@ md_apply_fix (fixS * fixP, |
508 | { | ||
509 | /* This fixup has been resolved. Create a reloc in case the linker | ||
559 | moves code around due to relaxing. */ | 510 | moves code around due to relaxing. */ |
560 | if (fixP->fx_r_type == BFD_RELOC_64_PCREL) | 511 | - if (fixP->fx_r_type == BFD_RELOC_64_PCREL) |
561 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | ||
562 | + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) | 512 | + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) |
563 | + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | 513 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; |
564 | else if (fixP->fx_r_type == BFD_RELOC_32) | 514 | else if (fixP->fx_r_type == BFD_RELOC_32) |
565 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; | 515 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; |
566 | else | 516 | @@ -2535,12 +2572,30 @@ md_estimate_size_before_relax (fragS * fragP, |
567 | @@ -2539,6 +2606,32 @@ md_estimate_size_before_relax (fragS * fragP, | ||
568 | as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); | 517 | as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); |
569 | abort (); | 518 | abort (); |
570 | } | 519 | } |
520 | - else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && | ||
521 | - !S_IS_WEAK (fragP->fr_symbol)) | ||
571 | + else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type | 522 | + else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type |
572 | + && !S_IS_WEAK (fragP->fr_symbol)) | 523 | + && !S_IS_WEAK (fragP->fr_symbol)) |
573 | + { | 524 | { |
525 | - fragP->fr_subtype = DEFINED_PC_OFFSET; | ||
526 | - /* Don't know now whether we need an imm instruction. */ | ||
527 | - fragP->fr_var = INST_WORD_SIZE; | ||
574 | + if (fragP->fr_opcode != NULL) { | 528 | + if (fragP->fr_opcode != NULL) { |
575 | + if(streq (fragP->fr_opcode, str_microblaze_64)) | 529 | + if(streq (fragP->fr_opcode, str_microblaze_64)) |
576 | + { | 530 | + { |
@@ -592,20 +546,10 @@ index c79434785a..3f90b7c892 100644 | |||
592 | + /* Don't know now whether we need an imm instruction. */ | 546 | + /* Don't know now whether we need an imm instruction. */ |
593 | + fragP->fr_var = INST_WORD_SIZE; | 547 | + fragP->fr_var = INST_WORD_SIZE; |
594 | + } | 548 | + } |
595 | + } | ||
596 | + #if 0 | ||
597 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && | ||
598 | !S_IS_WEAK (fragP->fr_symbol)) | ||
599 | { | ||
600 | @@ -2546,6 +2639,7 @@ md_estimate_size_before_relax (fragS * fragP, | ||
601 | /* Don't know now whether we need an imm instruction. */ | ||
602 | fragP->fr_var = INST_WORD_SIZE; | ||
603 | } | 549 | } |
604 | +#endif | ||
605 | else if (S_IS_DEFINED (fragP->fr_symbol) | 550 | else if (S_IS_DEFINED (fragP->fr_symbol) |
606 | && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) | 551 | && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) |
607 | { | 552 | @@ -2644,6 +2699,7 @@ md_estimate_size_before_relax (fragS * fragP, |
608 | @@ -2648,6 +2742,7 @@ md_estimate_size_before_relax (fragS * fragP, | ||
609 | case TLSLD_OFFSET: | 553 | case TLSLD_OFFSET: |
610 | case TLSTPREL_OFFSET: | 554 | case TLSTPREL_OFFSET: |
611 | case TLSDTPREL_OFFSET: | 555 | case TLSDTPREL_OFFSET: |
@@ -613,16 +557,16 @@ index c79434785a..3f90b7c892 100644 | |||
613 | fragP->fr_var = INST_WORD_SIZE*2; | 557 | fragP->fr_var = INST_WORD_SIZE*2; |
614 | break; | 558 | break; |
615 | case DEFINED_RO_SEGMENT: | 559 | case DEFINED_RO_SEGMENT: |
616 | @@ -2701,7 +2796,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) | 560 | @@ -2697,7 +2753,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) |
617 | else | 561 | else |
618 | { | 562 | { |
619 | /* The case where we are going to resolve things... */ | 563 | /* The case where we are going to resolve things... */ |
620 | - if (fixp->fx_r_type == BFD_RELOC_64_PCREL) | 564 | - if (fixp->fx_r_type == BFD_RELOC_64_PCREL) |
621 | + if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) | 565 | + if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) |
622 | return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; | 566 | return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; |
623 | else | 567 | else |
624 | return fixp->fx_where + fixp->fx_frag->fr_address; | 568 | return fixp->fx_where + fixp->fx_frag->fr_address; |
625 | @@ -2734,6 +2829,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) | 569 | @@ -2730,6 +2786,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
626 | case BFD_RELOC_MICROBLAZE_32_RWSDA: | 570 | case BFD_RELOC_MICROBLAZE_32_RWSDA: |
627 | case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: | 571 | case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: |
628 | case BFD_RELOC_MICROBLAZE_64_GOTPC: | 572 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
@@ -631,7 +575,7 @@ index c79434785a..3f90b7c892 100644 | |||
631 | case BFD_RELOC_MICROBLAZE_64_GOT: | 575 | case BFD_RELOC_MICROBLAZE_64_GOT: |
632 | case BFD_RELOC_MICROBLAZE_64_PLT: | 576 | case BFD_RELOC_MICROBLAZE_64_PLT: |
633 | case BFD_RELOC_MICROBLAZE_64_GOTOFF: | 577 | case BFD_RELOC_MICROBLAZE_64_GOTOFF: |
634 | @@ -2876,7 +2973,10 @@ cons_fix_new_microblaze (fragS * frag, | 578 | @@ -2872,7 +2930,10 @@ cons_fix_new_microblaze (fragS * frag, |
635 | r = BFD_RELOC_32; | 579 | r = BFD_RELOC_32; |
636 | break; | 580 | break; |
637 | case 8: | 581 | case 8: |
@@ -644,7 +588,7 @@ index c79434785a..3f90b7c892 100644 | |||
644 | default: | 588 | default: |
645 | as_bad (_("unsupported BFD relocation size %u"), size); | 589 | as_bad (_("unsupported BFD relocation size %u"), size); |
646 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h | 590 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h |
647 | index 6ee0966444..16b2736577 100644 | 591 | index 55f34f72b0d..8576e55cb8a 100644 |
648 | --- a/include/elf/microblaze.h | 592 | --- a/include/elf/microblaze.h |
649 | +++ b/include/elf/microblaze.h | 593 | +++ b/include/elf/microblaze.h |
650 | @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) | 594 | @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) |
@@ -653,11 +597,11 @@ index 6ee0966444..16b2736577 100644 | |||
653 | RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) | 597 | RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) |
654 | + RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) | 598 | + RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) |
655 | + RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ | 599 | + RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ |
656 | |||
657 | END_RELOC_NUMBERS (R_MICROBLAZE_max) | 600 | END_RELOC_NUMBERS (R_MICROBLAZE_max) |
658 | 601 | ||
602 | /* Global base address names. */ | ||
659 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 603 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
660 | index 985834b8df..9b6264b61c 100644 | 604 | index 61eaa39b3eb..f2139a6839b 100644 |
661 | --- a/opcodes/microblaze-opc.h | 605 | --- a/opcodes/microblaze-opc.h |
662 | +++ b/opcodes/microblaze-opc.h | 606 | +++ b/opcodes/microblaze-opc.h |
663 | @@ -538,8 +538,8 @@ struct op_code_struct | 607 | @@ -538,8 +538,8 @@ struct op_code_struct |
@@ -672,7 +616,7 @@ index 985834b8df..9b6264b61c 100644 | |||
672 | {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, | 616 | {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, |
673 | {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, | 617 | {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, |
674 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 618 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
675 | index 076dbcd0b3..5f2e190d23 100644 | 619 | index 1dcd3dca3d1..ad8b8ce345b 100644 |
676 | --- a/opcodes/microblaze-opcm.h | 620 | --- a/opcodes/microblaze-opcm.h |
677 | +++ b/opcodes/microblaze-opcm.h | 621 | +++ b/opcodes/microblaze-opcm.h |
678 | @@ -40,8 +40,8 @@ enum microblaze_instr | 622 | @@ -40,8 +40,8 @@ enum microblaze_instr |
@@ -680,9 +624,9 @@ index 076dbcd0b3..5f2e190d23 100644 | |||
680 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, | 624 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, |
681 | bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, | 625 | bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, |
682 | - sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, | 626 | - sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, |
683 | - sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | 627 | - sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
684 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, | 628 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, |
685 | + sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | 629 | + sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
686 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, | 630 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, |
687 | fint, fsqrt, | 631 | fint, fsqrt, |
688 | tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, | 632 | tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch index a6428534..067d9266 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch | |||
@@ -1,15 +1,16 @@ | |||
1 | From 7f6533a7c442b8966f30bbe7f0e872b1ef6a0d3f Mon Sep 17 00:00:00 2001 | 1 | From 48f658aba97d74c702b2fc5f1577d63c800b91f5 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 11 Sep 2018 13:48:33 +0530 | 3 | Date: Tue, 11 Sep 2018 13:48:33 +0530 |
4 | Subject: [PATCH 17/43] [Patch,Microblaze] : negl instruction is overriding | 4 | Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding |
5 | rsubl,fixed it by changing the instruction order... | 5 | rsubl |
6 | 6 | ||
7 | fixed it by changing the instruction order... | ||
7 | --- | 8 | --- |
8 | opcodes/microblaze-opc.h | 4 ++-- | 9 | opcodes/microblaze-opc.h | 4 ++-- |
9 | 1 file changed, 2 insertions(+), 2 deletions(-) | 10 | 1 file changed, 2 insertions(+), 2 deletions(-) |
10 | 11 | ||
11 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 12 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
12 | index 9b6264b61c..824afc0ab0 100644 | 13 | index f2139a6839b..f9709412097 100644 |
13 | --- a/opcodes/microblaze-opc.h | 14 | --- a/opcodes/microblaze-opc.h |
14 | +++ b/opcodes/microblaze-opc.h | 15 | +++ b/opcodes/microblaze-opc.h |
15 | @@ -275,9 +275,7 @@ struct op_code_struct | 16 | @@ -275,9 +275,7 @@ struct op_code_struct |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch index 99c5f62a..0ed01b79 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch | |||
@@ -1,48 +1,48 @@ | |||
1 | From 6d241a6865abf8196ba0cfa2aed7e847df087b6e Mon Sep 17 00:00:00 2001 | 1 | From 90d732c25cb6b55b33837e1d23d6850e4cbe10f7 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 11 Sep 2018 17:30:17 +0530 | 3 | Date: Tue, 11 Sep 2018 17:30:17 +0530 |
4 | Subject: [PATCH 18/43] Added relocations for MB-X | 4 | Subject: [PATCH 18/40] Added relocations for MB-X |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/bfd-in2.h | 11 +++-- | 7 | bfd/bfd-in2.h | 11 +++++--- |
8 | bfd/libbfd.h | 4 +- | 8 | bfd/libbfd.h | 4 +-- |
9 | bfd/reloc.c | 26 ++++++----- | 9 | bfd/reloc.c | 26 +++++++++--------- |
10 | gas/config/tc-microblaze.c | 90 ++++++++++++++++---------------------- | 10 | gas/config/tc-microblaze.c | 54 +++++++++++++++++++++++++++----------- |
11 | 4 files changed, 62 insertions(+), 69 deletions(-) | 11 | 4 files changed, 63 insertions(+), 32 deletions(-) |
12 | 12 | ||
13 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 13 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
14 | index 4f777059d8..de46e78902 100644 | 14 | index c55092c9ec7..88f89bcdbcd 100644 |
15 | --- a/bfd/bfd-in2.h | 15 | --- a/bfd/bfd-in2.h |
16 | +++ b/bfd/bfd-in2.h | 16 | +++ b/bfd/bfd-in2.h |
17 | @@ -5872,15 +5872,20 @@ done here - only used for relaxing */ | 17 | @@ -5434,15 +5434,20 @@ done here - only used for relaxing */ |
18 | BFD_RELOC_MICROBLAZE_32_NONE, | 18 | BFD_RELOC_MICROBLAZE_32_NONE, |
19 | 19 | ||
20 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 20 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
21 | - * +value in two words (with an imm instruction). No relocation is | 21 | -value in two words (with an imm instruction). No relocation is |
22 | + * +value in two words (with an imml instruction). No relocation is | 22 | +value in two words (with an imml instruction). No relocation is |
23 | * +done here - only used for relaxing */ | 23 | done here - only used for relaxing */ |
24 | - BFD_RELOC_MICROBLAZE_64_NONE, | 24 | - BFD_RELOC_MICROBLAZE_64_NONE, |
25 | + BFD_RELOC_MICROBLAZE_64_PCREL, | 25 | + BFD_RELOC_MICROBLAZE_64_PCREL, |
26 | 26 | ||
27 | -/* This is a 64 bit reloc that stores the 32 bit pc relative | 27 | -/* This is a 64 bit reloc that stores the 32 bit pc relative |
28 | +/* This is a 64 bit reloc that stores the 32 bit relative | 28 | +/* This is a 64 bit reloc that stores the 32 bit relative |
29 | * +value in two words (with an imml instruction). No relocation is | 29 | value in two words (with an imml instruction). No relocation is |
30 | * +done here - only used for relaxing */ | 30 | done here - only used for relaxing */ |
31 | BFD_RELOC_MICROBLAZE_64, | 31 | BFD_RELOC_MICROBLAZE_64, |
32 | 32 | ||
33 | +/* This is a 64 bit reloc that stores the 32 bit pc relative | 33 | +/* This is a 64 bit reloc that stores the 32 bit pc relative |
34 | + * +value in two words (with an imm instruction). No relocation is | 34 | +value in two words (with an imm instruction). No relocation is |
35 | + * +done here - only used for relaxing */ | 35 | +done here - only used for relaxing */ |
36 | + BFD_RELOC_MICROBLAZE_64_NONE, | 36 | + BFD_RELOC_MICROBLAZE_64_NONE, |
37 | + | 37 | + |
38 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 38 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
39 | value in two words (with an imm instruction). The relocation is | 39 | value in two words (with an imm instruction). The relocation is |
40 | PC-relative GOT offset */ | 40 | PC-relative GOT offset */ |
41 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 41 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
42 | index 450653f2d8..d87a183d5e 100644 | 42 | index b4aace6a70d..b4b7ee29a30 100644 |
43 | --- a/bfd/libbfd.h | 43 | --- a/bfd/libbfd.h |
44 | +++ b/bfd/libbfd.h | 44 | +++ b/bfd/libbfd.h |
45 | @@ -2903,14 +2903,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 45 | @@ -2969,14 +2969,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
46 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 46 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
47 | "BFD_RELOC_MICROBLAZE_32_NONE", | 47 | "BFD_RELOC_MICROBLAZE_32_NONE", |
48 | "BFD_RELOC_MICROBLAZE_64_NONE", | 48 | "BFD_RELOC_MICROBLAZE_64_NONE", |
@@ -60,10 +60,10 @@ index 450653f2d8..d87a183d5e 100644 | |||
60 | "BFD_RELOC_MICROBLAZE_64_TLSGD", | 60 | "BFD_RELOC_MICROBLAZE_64_TLSGD", |
61 | "BFD_RELOC_MICROBLAZE_64_TLSLD", | 61 | "BFD_RELOC_MICROBLAZE_64_TLSLD", |
62 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 62 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
63 | index ccf29f54cf..861f2d48c0 100644 | 63 | index 0e8a24e9cb0..b5c97da3ffd 100644 |
64 | --- a/bfd/reloc.c | 64 | --- a/bfd/reloc.c |
65 | +++ b/bfd/reloc.c | 65 | +++ b/bfd/reloc.c |
66 | @@ -6803,24 +6803,12 @@ ENUMDOC | 66 | @@ -6866,24 +6866,12 @@ ENUMDOC |
67 | done here - only used for relaxing | 67 | done here - only used for relaxing |
68 | ENUM | 68 | ENUM |
69 | BFD_RELOC_MICROBLAZE_64_NONE | 69 | BFD_RELOC_MICROBLAZE_64_NONE |
@@ -88,7 +88,7 @@ index ccf29f54cf..861f2d48c0 100644 | |||
88 | ENUMDOC | 88 | ENUMDOC |
89 | This is a 64 bit reloc that stores the 32 bit pc relative | 89 | This is a 64 bit reloc that stores the 32 bit pc relative |
90 | value in two words (with an imm instruction). The relocation is | 90 | value in two words (with an imm instruction). The relocation is |
91 | @@ -6906,6 +6894,20 @@ ENUMDOC | 91 | @@ -6969,6 +6957,20 @@ ENUMDOC |
92 | value in two words (with an imm instruction). The relocation is | 92 | value in two words (with an imm instruction). The relocation is |
93 | relative offset from start of TEXT. | 93 | relative offset from start of TEXT. |
94 | 94 | ||
@@ -110,7 +110,7 @@ index ccf29f54cf..861f2d48c0 100644 | |||
110 | BFD_RELOC_AARCH64_RELOC_START | 110 | BFD_RELOC_AARCH64_RELOC_START |
111 | ENUMDOC | 111 | ENUMDOC |
112 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 112 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
113 | index 3f90b7c892..587a4d56ec 100644 | 113 | index b8250e4cded..9c8b6284fb1 100644 |
114 | --- a/gas/config/tc-microblaze.c | 114 | --- a/gas/config/tc-microblaze.c |
115 | +++ b/gas/config/tc-microblaze.c | 115 | +++ b/gas/config/tc-microblaze.c |
116 | @@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; | 116 | @@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
@@ -121,62 +121,28 @@ index 3f90b7c892..587a4d56ec 100644 | |||
121 | 121 | ||
122 | /* Initialize the relax table. */ | 122 | /* Initialize the relax table. */ |
123 | const relax_typeS md_relax_table[] = | 123 | const relax_typeS md_relax_table[] = |
124 | @@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] = | 124 | @@ -118,7 +119,8 @@ const relax_typeS md_relax_table[] = |
125 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ | ||
125 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ | 126 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ |
126 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ | 127 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */ |
127 | // { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ | 128 | - { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */ |
128 | - { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */ | 129 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }, /* 19: DEFINED_64_OFFSET. */ |
129 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */ | 130 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ |
130 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ | ||
131 | }; | 131 | }; |
132 | 132 | ||
133 | static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ | 133 | static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ |
134 | @@ -1180,33 +1182,6 @@ md_assemble (char * str) | 134 | @@ -1930,8 +1932,8 @@ md_assemble (char * str) |
135 | inst |= (immed << IMM_LOW) & IMM_MASK; | ||
136 | } | ||
137 | } | ||
138 | -#if 0 //revisit | ||
139 | - else if (streq (name, "lli") || streq (name, "sli")) | ||
140 | - { | ||
141 | - temp = immed & 0xFFFFFFFFFFFF8000; | ||
142 | - if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000)) | ||
143 | - { | ||
144 | - /* Needs an immediate inst. */ | ||
145 | - opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | ||
146 | - if (opcode1 == NULL) | ||
147 | - { | ||
148 | - as_bad (_("unknown opcode \"%s\""), "imml"); | ||
149 | - return; | ||
150 | - } | ||
151 | - | ||
152 | - inst1 = opcode1->bit_sequence; | ||
153 | - inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; | ||
154 | - output[0] = INST_BYTE0 (inst1); | ||
155 | - output[1] = INST_BYTE1 (inst1); | ||
156 | - output[2] = INST_BYTE2 (inst1); | ||
157 | - output[3] = INST_BYTE3 (inst1); | ||
158 | - output = frag_more (isize); | ||
159 | - } | ||
160 | - inst |= (reg1 << RD_LOW) & RD_MASK; | ||
161 | - inst |= (reg2 << RA_LOW) & RA_MASK; | ||
162 | - inst |= (immed << IMM_LOW) & IMM_MASK; | ||
163 | - } | ||
164 | -#endif | ||
165 | else | ||
166 | { | ||
167 | temp = immed & 0xFFFF8000; | ||
168 | @@ -1958,8 +1933,8 @@ md_assemble (char * str) | ||
169 | 135 | ||
170 | if (exp.X_op != O_constant) | 136 | if (exp.X_op != O_constant) |
171 | { | 137 | { |
172 | - char *opc = NULL; | 138 | - char *opc = NULL; |
173 | - //char *opc = str_microblaze_64; | 139 | - //char *opc = str_microblaze_64; |
174 | + //char *opc = NULL; | 140 | + //char *opc = NULL; |
175 | + char *opc = str_microblaze_64; | 141 | + char *opc = strdup(str_microblaze_64); |
176 | relax_substateT subtype; | 142 | relax_substateT subtype; |
177 | 143 | ||
178 | if (exp.X_md != 0) | 144 | if (exp.X_md != 0) |
179 | @@ -2221,13 +2196,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, | 145 | @@ -2190,13 +2192,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, |
180 | fragP->fr_fix += INST_WORD_SIZE * 2; | 146 | fragP->fr_fix += INST_WORD_SIZE * 2; |
181 | fragP->fr_var = 0; | 147 | fragP->fr_var = 0; |
182 | break; | 148 | break; |
@@ -198,7 +164,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
198 | fragP->fr_fix += INST_WORD_SIZE * 2; | 164 | fragP->fr_fix += INST_WORD_SIZE * 2; |
199 | fragP->fr_var = 0; | 165 | fragP->fr_var = 0; |
200 | break; | 166 | break; |
201 | @@ -2237,7 +2218,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, | 167 | @@ -2206,7 +2214,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, |
202 | fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC); | 168 | fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC); |
203 | else | 169 | else |
204 | fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, | 170 | fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, |
@@ -207,7 +173,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
207 | fragP->fr_fix += INST_WORD_SIZE * 2; | 173 | fragP->fr_fix += INST_WORD_SIZE * 2; |
208 | fragP->fr_var = 0; | 174 | fragP->fr_var = 0; |
209 | break; | 175 | break; |
210 | @@ -2457,14 +2438,17 @@ md_apply_fix (fixS * fixP, | 176 | @@ -2425,14 +2433,17 @@ md_apply_fix (fixS * fixP, |
211 | } | 177 | } |
212 | } | 178 | } |
213 | break; | 179 | break; |
@@ -226,7 +192,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
226 | { | 192 | { |
227 | /* Generate the imm instruction. */ | 193 | /* Generate the imm instruction. */ |
228 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | 194 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); |
229 | @@ -2477,6 +2461,10 @@ md_apply_fix (fixS * fixP, | 195 | @@ -2445,6 +2456,10 @@ md_apply_fix (fixS * fixP, |
230 | inst1 = opcode1->bit_sequence; | 196 | inst1 = opcode1->bit_sequence; |
231 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | 197 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) |
232 | inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; | 198 | inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; |
@@ -237,7 +203,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
237 | } | 203 | } |
238 | else | 204 | else |
239 | { | 205 | { |
240 | @@ -2487,7 +2475,7 @@ md_apply_fix (fixS * fixP, | 206 | @@ -2455,7 +2470,7 @@ md_apply_fix (fixS * fixP, |
241 | as_bad (_("unknown opcode \"%s\""), "imm"); | 207 | as_bad (_("unknown opcode \"%s\""), "imm"); |
242 | return; | 208 | return; |
243 | } | 209 | } |
@@ -246,7 +212,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
246 | inst1 = opcode1->bit_sequence; | 212 | inst1 = opcode1->bit_sequence; |
247 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | 213 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) |
248 | inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; | 214 | inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; |
249 | @@ -2534,7 +2522,7 @@ md_apply_fix (fixS * fixP, | 215 | @@ -2502,7 +2517,7 @@ md_apply_fix (fixS * fixP, |
250 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); | 216 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); |
251 | if (opcode1 == NULL) | 217 | if (opcode1 == NULL) |
252 | { | 218 | { |
@@ -255,16 +221,16 @@ index 3f90b7c892..587a4d56ec 100644 | |||
255 | as_bad (_("unknown opcode \"%s\""), "imml"); | 221 | as_bad (_("unknown opcode \"%s\""), "imml"); |
256 | else | 222 | else |
257 | as_bad (_("unknown opcode \"%s\""), "imm"); | 223 | as_bad (_("unknown opcode \"%s\""), "imm"); |
258 | @@ -2561,8 +2549,6 @@ md_apply_fix (fixS * fixP, | 224 | @@ -2527,7 +2542,7 @@ md_apply_fix (fixS * fixP, |
225 | { | ||
226 | /* This fixup has been resolved. Create a reloc in case the linker | ||
259 | moves code around due to relaxing. */ | 227 | moves code around due to relaxing. */ |
260 | if (fixP->fx_r_type == BFD_RELOC_64_PCREL) | ||
261 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | ||
262 | - if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) | 228 | - if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) |
263 | - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | 229 | + if (fixP->fx_r_type == BFD_RELOC_64_PCREL) |
230 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | ||
264 | else if (fixP->fx_r_type == BFD_RELOC_32) | 231 | else if (fixP->fx_r_type == BFD_RELOC_32) |
265 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; | 232 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; |
266 | else | 233 | @@ -2579,21 +2594,21 @@ md_estimate_size_before_relax (fragS * fragP, |
267 | @@ -2613,33 +2599,24 @@ md_estimate_size_before_relax (fragS * fragP, | ||
268 | if(streq (fragP->fr_opcode, str_microblaze_64)) | 234 | if(streq (fragP->fr_opcode, str_microblaze_64)) |
269 | { | 235 | { |
270 | /* Used as an absolute value. */ | 236 | /* Used as an absolute value. */ |
@@ -290,19 +256,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
290 | fragP->fr_var = INST_WORD_SIZE; | 256 | fragP->fr_var = INST_WORD_SIZE; |
291 | } | 257 | } |
292 | } | 258 | } |
293 | - #if 0 | 259 | @@ -2626,6 +2641,13 @@ md_estimate_size_before_relax (fragS * fragP, |
294 | - else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && | ||
295 | - !S_IS_WEAK (fragP->fr_symbol)) | ||
296 | - { | ||
297 | - fragP->fr_subtype = DEFINED_PC_OFFSET; | ||
298 | - /* Don't know now whether we need an imm instruction. */ | ||
299 | - fragP->fr_var = INST_WORD_SIZE; | ||
300 | - } | ||
301 | -#endif | ||
302 | else if (S_IS_DEFINED (fragP->fr_symbol) | ||
303 | && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) | ||
304 | { | ||
305 | @@ -2669,6 +2646,13 @@ md_estimate_size_before_relax (fragS * fragP, | ||
306 | /* Variable part does not change. */ | 260 | /* Variable part does not change. */ |
307 | fragP->fr_var = INST_WORD_SIZE*2; | 261 | fragP->fr_var = INST_WORD_SIZE*2; |
308 | } | 262 | } |
@@ -316,7 +270,7 @@ index 3f90b7c892..587a4d56ec 100644 | |||
316 | else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor)) | 270 | else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor)) |
317 | { | 271 | { |
318 | /* It is accessed using the small data read only anchor. */ | 272 | /* It is accessed using the small data read only anchor. */ |
319 | @@ -2743,6 +2727,7 @@ md_estimate_size_before_relax (fragS * fragP, | 273 | @@ -2700,6 +2722,7 @@ md_estimate_size_before_relax (fragS * fragP, |
320 | case TLSTPREL_OFFSET: | 274 | case TLSTPREL_OFFSET: |
321 | case TLSDTPREL_OFFSET: | 275 | case TLSDTPREL_OFFSET: |
322 | case DEFINED_64_OFFSET: | 276 | case DEFINED_64_OFFSET: |
@@ -324,16 +278,16 @@ index 3f90b7c892..587a4d56ec 100644 | |||
324 | fragP->fr_var = INST_WORD_SIZE*2; | 278 | fragP->fr_var = INST_WORD_SIZE*2; |
325 | break; | 279 | break; |
326 | case DEFINED_RO_SEGMENT: | 280 | case DEFINED_RO_SEGMENT: |
327 | @@ -2796,7 +2781,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) | 281 | @@ -2753,7 +2776,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) |
328 | else | 282 | else |
329 | { | 283 | { |
330 | /* The case where we are going to resolve things... */ | 284 | /* The case where we are going to resolve things... */ |
331 | - if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) | 285 | - if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) |
332 | + if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) | 286 | + if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) |
333 | return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; | 287 | return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; |
334 | else | 288 | else |
335 | return fixp->fx_where + fixp->fx_frag->fr_address; | 289 | return fixp->fx_where + fixp->fx_frag->fr_address; |
336 | @@ -2831,6 +2816,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) | 290 | @@ -2788,6 +2811,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
337 | case BFD_RELOC_MICROBLAZE_64_GOTPC: | 291 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
338 | case BFD_RELOC_MICROBLAZE_64_GPC: | 292 | case BFD_RELOC_MICROBLAZE_64_GPC: |
339 | case BFD_RELOC_MICROBLAZE_64: | 293 | case BFD_RELOC_MICROBLAZE_64: |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch index edbfac0c..a621fb05 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixed-MB-x-relocation-issues.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch | |||
@@ -1,28 +1,29 @@ | |||
1 | From bb6c70cfa1402a685995103ac90e7ceeccdd0991 Mon Sep 17 00:00:00 2001 | 1 | From c3e194e231529c1b642f7f1a19a2a7b1ea644bd9 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 28 Sep 2018 12:04:55 +0530 | 3 | Date: Fri, 28 Sep 2018 12:04:55 +0530 |
4 | Subject: [PATCH 19/43] -Fixed MB-x relocation issues -Added imml for required | 4 | Subject: [PATCH 19/40] Update MB-x |
5 | MB-x instructions | ||
6 | 5 | ||
6 | -Fixed MB-x relocation issues | ||
7 | -Added imml for required MB-x instructions | ||
7 | --- | 8 | --- |
8 | bfd/elf64-microblaze.c | 68 ++++++++++++++--- | 9 | bfd/elf64-microblaze.c | 68 ++++++++++-- |
9 | gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++---------- | 10 | gas/config/tc-microblaze.c | 221 +++++++++++++++++++++++++------------ |
10 | gas/tc.h | 2 +- | 11 | gas/tc.h | 2 +- |
11 | 3 files changed, 167 insertions(+), 55 deletions(-) | 12 | 3 files changed, 209 insertions(+), 82 deletions(-) |
12 | 13 | ||
13 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 14 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
14 | index 56a45f2a05..54a2461037 100644 | 15 | index d55700fc513..f8f52870639 100644 |
15 | --- a/bfd/elf64-microblaze.c | 16 | --- a/bfd/elf64-microblaze.c |
16 | +++ b/bfd/elf64-microblaze.c | 17 | +++ b/bfd/elf64-microblaze.c |
17 | @@ -1476,8 +1476,17 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 18 | @@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
18 | relocation -= (input_section->output_section->vma | 19 | relocation -= (input_section->output_section->vma |
19 | + input_section->output_offset | 20 | + input_section->output_offset |
20 | + offset + INST_WORD_SIZE); | 21 | + offset + INST_WORD_SIZE); |
21 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, | 22 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
22 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 23 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
23 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) | 24 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) |
24 | + { | 25 | + { |
25 | + insn &= ~0x00ffffff; | 26 | + insn &= ~0x00ffffff; |
26 | + insn |= (relocation >> 16) & 0xffffff; | 27 | + insn |= (relocation >> 16) & 0xffffff; |
27 | + bfd_put_32 (input_bfd, insn, | 28 | + bfd_put_32 (input_bfd, insn, |
28 | contents + offset + endian); | 29 | contents + offset + endian); |
@@ -33,7 +34,7 @@ index 56a45f2a05..54a2461037 100644 | |||
33 | bfd_put_16 (input_bfd, relocation & 0xffff, | 34 | bfd_put_16 (input_bfd, relocation & 0xffff, |
34 | contents + offset + endian + INST_WORD_SIZE); | 35 | contents + offset + endian + INST_WORD_SIZE); |
35 | } | 36 | } |
36 | @@ -1567,11 +1576,28 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 37 | @@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
37 | else | 38 | else |
38 | { | 39 | { |
39 | if (r_type == R_MICROBLAZE_64_PCREL) | 40 | if (r_type == R_MICROBLAZE_64_PCREL) |
@@ -43,7 +44,7 @@ index 56a45f2a05..54a2461037 100644 | |||
43 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, | 44 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
44 | + { | 45 | + { |
45 | + if (!input_section->output_section->vma && | 46 | + if (!input_section->output_section->vma && |
46 | + !input_section->output_offset && !offset) | 47 | + !input_section->output_offset && !offset) |
47 | + relocation -= (input_section->output_section->vma | 48 | + relocation -= (input_section->output_section->vma |
48 | + + input_section->output_offset | 49 | + + input_section->output_offset |
49 | + + offset); | 50 | + + offset); |
@@ -53,9 +54,9 @@ index 56a45f2a05..54a2461037 100644 | |||
53 | + + offset + INST_WORD_SIZE); | 54 | + + offset + INST_WORD_SIZE); |
54 | + } | 55 | + } |
55 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 56 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
56 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) | 57 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) |
57 | + { | 58 | + { |
58 | + insn &= ~0x00ffffff; | 59 | + insn &= ~0x00ffffff; |
59 | + insn |= (relocation >> 16) & 0xffffff; | 60 | + insn |= (relocation >> 16) & 0xffffff; |
60 | + bfd_put_32 (input_bfd, insn, | 61 | + bfd_put_32 (input_bfd, insn, |
61 | contents + offset + endian); | 62 | contents + offset + endian); |
@@ -66,7 +67,7 @@ index 56a45f2a05..54a2461037 100644 | |||
66 | bfd_put_16 (input_bfd, relocation & 0xffff, | 67 | bfd_put_16 (input_bfd, relocation & 0xffff, |
67 | contents + offset + endian + INST_WORD_SIZE); | 68 | contents + offset + endian + INST_WORD_SIZE); |
68 | } | 69 | } |
69 | @@ -1690,9 +1716,19 @@ static void | 70 | @@ -1677,9 +1703,19 @@ static void |
70 | microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 71 | microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
71 | { | 72 | { |
72 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); | 73 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); |
@@ -89,7 +90,7 @@ index 56a45f2a05..54a2461037 100644 | |||
89 | } | 90 | } |
90 | 91 | ||
91 | /* Read-modify-write into the bfd, an immediate value into appropriate fields of | 92 | /* Read-modify-write into the bfd, an immediate value into appropriate fields of |
92 | @@ -1704,10 +1740,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 93 | @@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
93 | unsigned long instr_lo; | 94 | unsigned long instr_lo; |
94 | 95 | ||
95 | instr_hi = bfd_get_32 (abfd, bfd_addr); | 96 | instr_hi = bfd_get_32 (abfd, bfd_addr); |
@@ -113,10 +114,10 @@ index 56a45f2a05..54a2461037 100644 | |||
113 | instr_lo &= ~0x0000ffff; | 114 | instr_lo &= ~0x0000ffff; |
114 | instr_lo |= (val & 0x0000ffff); | 115 | instr_lo |= (val & 0x0000ffff); |
115 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 116 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
116 | index 587a4d56ec..fa437b6c98 100644 | 117 | index 9c8b6284fb1..f61fdf3b90a 100644 |
117 | --- a/gas/config/tc-microblaze.c | 118 | --- a/gas/config/tc-microblaze.c |
118 | +++ b/gas/config/tc-microblaze.c | 119 | +++ b/gas/config/tc-microblaze.c |
119 | @@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) | 120 | @@ -391,7 +391,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) |
120 | Integer arg to pass to the function. */ | 121 | Integer arg to pass to the function. */ |
121 | /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, | 122 | /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, |
122 | and then in the read.c table. */ | 123 | and then in the read.c table. */ |
@@ -125,7 +126,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
125 | { | 126 | { |
126 | {"lcomm", microblaze_s_lcomm, 1}, | 127 | {"lcomm", microblaze_s_lcomm, 1}, |
127 | {"data", microblaze_s_data, 0}, | 128 | {"data", microblaze_s_data, 0}, |
128 | @@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] = | 129 | @@ -400,7 +400,7 @@ const pseudo_typeS md_pseudo_table[] = |
129 | {"data32", cons, 4}, /* Same as word. */ | 130 | {"data32", cons, 4}, /* Same as word. */ |
130 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ | 131 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ |
131 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ | 132 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ |
@@ -134,7 +135,84 @@ index 587a4d56ec..fa437b6c98 100644 | |||
134 | {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ | 135 | {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ |
135 | {"weakext", microblaze_s_weakext, 0}, | 136 | {"weakext", microblaze_s_weakext, 0}, |
136 | {"rodata", microblaze_s_rdata, 0}, | 137 | {"rodata", microblaze_s_rdata, 0}, |
137 | @@ -996,7 +996,7 @@ md_assemble (char * str) | 138 | @@ -538,30 +538,6 @@ parse_reg (char * s, unsigned * reg) |
139 | *reg = REG_SP; | ||
140 | return s + 3; | ||
141 | } | ||
142 | - else if (strncasecmp (s, "rfsl", 4) == 0) | ||
143 | - { | ||
144 | - if (ISDIGIT (s[4]) && ISDIGIT (s[5])) | ||
145 | - { | ||
146 | - tmpreg = (s[4] - '0') * 10 + s[5] - '0'; | ||
147 | - s += 6; | ||
148 | - } | ||
149 | - else if (ISDIGIT (s[4])) | ||
150 | - { | ||
151 | - tmpreg = s[4] - '0'; | ||
152 | - s += 5; | ||
153 | - } | ||
154 | - else | ||
155 | - as_bad (_("register expected, but saw '%.6s'"), s); | ||
156 | - | ||
157 | - if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM) | ||
158 | - *reg = tmpreg; | ||
159 | - else | ||
160 | - { | ||
161 | - as_bad (_("Invalid register number at '%.6s'"), s); | ||
162 | - *reg = 0; | ||
163 | - } | ||
164 | - return s; | ||
165 | - } | ||
166 | /* Stack protection registers. */ | ||
167 | else if (strncasecmp (s, "rshr", 4) == 0) | ||
168 | { | ||
169 | @@ -605,6 +581,45 @@ parse_reg (char * s, unsigned * reg) | ||
170 | return s; | ||
171 | } | ||
172 | |||
173 | +/* Same as above, but with long(er) register */ | ||
174 | +static char * | ||
175 | +parse_regl (char * s, unsigned long * reg) | ||
176 | +{ | ||
177 | + unsigned long tmpreg = 0; | ||
178 | + | ||
179 | + /* Strip leading whitespace. */ | ||
180 | + while (ISSPACE (* s)) | ||
181 | + ++ s; | ||
182 | + | ||
183 | + if (strncasecmp (s, "rfsl", 4) == 0) | ||
184 | + { | ||
185 | + if (ISDIGIT (s[4]) && ISDIGIT (s[5])) | ||
186 | + { | ||
187 | + tmpreg = (s[4] - '0') * 10 + s[5] - '0'; | ||
188 | + s += 6; | ||
189 | + } | ||
190 | + else if (ISDIGIT (s[4])) | ||
191 | + { | ||
192 | + tmpreg = s[4] - '0'; | ||
193 | + s += 5; | ||
194 | + } | ||
195 | + else | ||
196 | + as_bad (_("register expected, but saw '%.6s'"), s); | ||
197 | + | ||
198 | + if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM) | ||
199 | + *reg = tmpreg; | ||
200 | + else | ||
201 | + { | ||
202 | + as_bad (_("Invalid register number at '%.6s'"), s); | ||
203 | + *reg = 0; | ||
204 | + } | ||
205 | + return s; | ||
206 | + } | ||
207 | + as_bad (_("register expected, but saw '%.6s'"), s); | ||
208 | + *reg = 0; | ||
209 | + return s; | ||
210 | +} | ||
211 | + | ||
212 | static char * | ||
213 | parse_exp (char *s, expressionS *e) | ||
214 | { | ||
215 | @@ -995,7 +1010,7 @@ md_assemble (char * str) | ||
138 | unsigned reg2; | 216 | unsigned reg2; |
139 | unsigned reg3; | 217 | unsigned reg3; |
140 | unsigned isize; | 218 | unsigned isize; |
@@ -143,7 +221,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
143 | expressionS exp; | 221 | expressionS exp; |
144 | char name[20]; | 222 | char name[20]; |
145 | long immedl; | 223 | long immedl; |
146 | @@ -1118,8 +1118,9 @@ md_assemble (char * str) | 224 | @@ -1117,8 +1132,9 @@ md_assemble (char * str) |
147 | as_fatal (_("lmi pseudo instruction should not use a label in imm field")); | 225 | as_fatal (_("lmi pseudo instruction should not use a label in imm field")); |
148 | else if (streq (name, "smi")) | 226 | else if (streq (name, "smi")) |
149 | as_fatal (_("smi pseudo instruction should not use a label in imm field")); | 227 | as_fatal (_("smi pseudo instruction should not use a label in imm field")); |
@@ -155,7 +233,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
155 | opc = str_microblaze_ro_anchor; | 233 | opc = str_microblaze_ro_anchor; |
156 | else if (reg2 == REG_RWSDP) | 234 | else if (reg2 == REG_RWSDP) |
157 | opc = str_microblaze_rw_anchor; | 235 | opc = str_microblaze_rw_anchor; |
158 | @@ -1182,31 +1183,55 @@ md_assemble (char * str) | 236 | @@ -1181,31 +1197,55 @@ md_assemble (char * str) |
159 | inst |= (immed << IMM_LOW) & IMM_MASK; | 237 | inst |= (immed << IMM_LOW) & IMM_MASK; |
160 | } | 238 | } |
161 | } | 239 | } |
@@ -197,7 +275,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
197 | + inst |= (reg2 << RA_LOW) & RA_MASK; | 275 | + inst |= (reg2 << RA_LOW) & RA_MASK; |
198 | + inst |= (immed << IMM_LOW) & IMM_MASK; | 276 | + inst |= (immed << IMM_LOW) & IMM_MASK; |
199 | + } | 277 | + } |
200 | + else | 278 | + else |
201 | + { | 279 | + { |
202 | + temp = immed & 0xFFFF8000; | 280 | + temp = immed & 0xFFFF8000; |
203 | + if ((temp != 0) && (temp != 0xFFFF8000)) | 281 | + if ((temp != 0) && (temp != 0xFFFF8000)) |
@@ -225,7 +303,34 @@ index 587a4d56ec..fa437b6c98 100644 | |||
225 | break; | 303 | break; |
226 | 304 | ||
227 | case INST_TYPE_RD_R1_IMMS: | 305 | case INST_TYPE_RD_R1_IMMS: |
228 | @@ -1832,12 +1857,20 @@ md_assemble (char * str) | 306 | @@ -1400,7 +1440,7 @@ md_assemble (char * str) |
307 | reg1 = 0; | ||
308 | } | ||
309 | if (strcmp (op_end, "")) | ||
310 | - op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */ | ||
311 | + op_end = parse_regl (op_end + 1, &immed); /* Get rfslN. */ | ||
312 | else | ||
313 | { | ||
314 | as_fatal (_("Error in statement syntax")); | ||
315 | @@ -1454,7 +1494,7 @@ md_assemble (char * str) | ||
316 | reg1 = 0; | ||
317 | } | ||
318 | if (strcmp (op_end, "")) | ||
319 | - op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */ | ||
320 | + op_end = parse_regl (op_end + 1, &immed); /* Get rfslN. */ | ||
321 | else | ||
322 | { | ||
323 | as_fatal (_("Error in statement syntax")); | ||
324 | @@ -1472,7 +1512,7 @@ md_assemble (char * str) | ||
325 | |||
326 | case INST_TYPE_RFSL: | ||
327 | if (strcmp (op_end, "")) | ||
328 | - op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */ | ||
329 | + op_end = parse_regl (op_end + 1, &immed); /* Get rfslN. */ | ||
330 | else | ||
331 | { | ||
332 | as_fatal (_("Error in statement syntax")); | ||
333 | @@ -1831,12 +1871,20 @@ md_assemble (char * str) | ||
229 | case INST_TYPE_IMM: | 334 | case INST_TYPE_IMM: |
230 | if (streq (name, "imm")) | 335 | if (streq (name, "imm")) |
231 | as_fatal (_("An IMM instruction should not be present in the .s file")); | 336 | as_fatal (_("An IMM instruction should not be present in the .s file")); |
@@ -240,21 +345,21 @@ index 587a4d56ec..fa437b6c98 100644 | |||
240 | { | 345 | { |
241 | - char *opc = NULL; | 346 | - char *opc = NULL; |
242 | + char *opc; | 347 | + char *opc; |
243 | + if (microblaze_arch_size == 64 && (streq (name, "breai") || | 348 | + if (microblaze_arch_size == 64 && (streq (name, "breai") || |
244 | + streq (name, "breaid") || | 349 | + streq (name, "breaid") || |
245 | + streq (name, "brai") || streq (name, "braid"))) | 350 | + streq (name, "brai") || streq (name, "braid"))) |
246 | + opc = str_microblaze_64; | 351 | + opc = strdup(str_microblaze_64); |
247 | + else | 352 | + else |
248 | + opc = NULL; | 353 | + opc = NULL; |
249 | relax_substateT subtype; | 354 | relax_substateT subtype; |
250 | 355 | ||
251 | if (exp.X_md != 0) | 356 | if (exp.X_md != 0) |
252 | @@ -1860,27 +1893,54 @@ md_assemble (char * str) | 357 | @@ -1859,27 +1907,54 @@ md_assemble (char * str) |
253 | immed = exp.X_add_number; | 358 | immed = exp.X_add_number; |
254 | } | 359 | } |
255 | 360 | ||
256 | + if (microblaze_arch_size == 64 && (streq (name, "breai") || | 361 | + if (microblaze_arch_size == 64 && (streq (name, "breai") || |
257 | + streq (name, "breaid") || | 362 | + streq (name, "breaid") || |
258 | + streq (name, "brai") || streq (name, "braid"))) | 363 | + streq (name, "brai") || streq (name, "braid"))) |
259 | + { | 364 | + { |
260 | + temp = immed & 0xFFFFFF8000; | 365 | + temp = immed & 0xFFFFFF8000; |
@@ -322,7 +427,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
322 | break; | 427 | break; |
323 | 428 | ||
324 | case INST_TYPE_NONE: | 429 | case INST_TYPE_NONE: |
325 | @@ -2460,7 +2520,7 @@ md_apply_fix (fixS * fixP, | 430 | @@ -2455,7 +2530,7 @@ md_apply_fix (fixS * fixP, |
326 | 431 | ||
327 | inst1 = opcode1->bit_sequence; | 432 | inst1 = opcode1->bit_sequence; |
328 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | 433 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) |
@@ -331,13 +436,13 @@ index 587a4d56ec..fa437b6c98 100644 | |||
331 | if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) | 436 | if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) |
332 | fixP->fx_r_type = BFD_RELOC_64; | 437 | fixP->fx_r_type = BFD_RELOC_64; |
333 | if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) | 438 | if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) |
334 | @@ -2628,7 +2688,14 @@ md_estimate_size_before_relax (fragS * fragP, | 439 | @@ -2623,7 +2698,14 @@ md_estimate_size_before_relax (fragS * fragP, |
335 | } | 440 | } |
336 | else | 441 | else |
337 | { | 442 | { |
338 | - fragP->fr_subtype = UNDEFINED_PC_OFFSET; | 443 | - fragP->fr_subtype = UNDEFINED_PC_OFFSET; |
339 | + if (fragP->fr_opcode != NULL) { | 444 | + if (fragP->fr_opcode != NULL) { |
340 | + if (streq (fragP->fr_opcode, str_microblaze_64)) | 445 | + if (streq (fragP->fr_opcode, str_microblaze_64)) |
341 | + fragP->fr_subtype = DEFINED_64_PC_OFFSET; | 446 | + fragP->fr_subtype = DEFINED_64_PC_OFFSET; |
342 | + else | 447 | + else |
343 | + fragP->fr_subtype = UNDEFINED_PC_OFFSET; | 448 | + fragP->fr_subtype = UNDEFINED_PC_OFFSET; |
@@ -347,7 +452,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
347 | fragP->fr_var = INST_WORD_SIZE*2; | 452 | fragP->fr_var = INST_WORD_SIZE*2; |
348 | } | 453 | } |
349 | break; | 454 | break; |
350 | @@ -2905,6 +2972,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) | 455 | @@ -2900,6 +2982,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) |
351 | case OPTION_M64: | 456 | case OPTION_M64: |
352 | //if (arg != NULL && strcmp (arg, "64") == 0) | 457 | //if (arg != NULL && strcmp (arg, "64") == 0) |
353 | microblaze_arch_size = 64; | 458 | microblaze_arch_size = 64; |
@@ -356,7 +461,7 @@ index 587a4d56ec..fa437b6c98 100644 | |||
356 | default: | 461 | default: |
357 | return 0; | 462 | return 0; |
358 | diff --git a/gas/tc.h b/gas/tc.h | 463 | diff --git a/gas/tc.h b/gas/tc.h |
359 | index 0a50a6985b..529a73b43b 100644 | 464 | index da1738d67a8..5bdfe5c3475 100644 |
360 | --- a/gas/tc.h | 465 | --- a/gas/tc.h |
361 | +++ b/gas/tc.h | 466 | +++ b/gas/tc.h |
362 | @@ -22,7 +22,7 @@ | 467 | @@ -22,7 +22,7 @@ |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch deleted file mode 100644 index 528c9279..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixing-the-branch-related-issues.patch +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | From 8375ef893eb327ae4a5dc9207041ffc0e9bc6e2b Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju Mekala <nmekala@xilix.com> | ||
3 | Date: Sun, 30 Sep 2018 17:06:58 +0530 | ||
4 | Subject: [PATCH 20/43] Fixing the branch related issues | ||
5 | |||
6 | --- | ||
7 | bfd/elf64-microblaze.c | 2 +- | ||
8 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
9 | |||
10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | ||
11 | index 54a2461037..e9b3cf3a86 100644 | ||
12 | --- a/bfd/elf64-microblaze.c | ||
13 | +++ b/bfd/elf64-microblaze.c | ||
14 | @@ -2532,7 +2532,7 @@ microblaze_elf_check_relocs (bfd * abfd, | ||
15 | |||
16 | /* PR15323, ref flags aren't set for references in the same | ||
17 | object. */ | ||
18 | - h->root.non_ir_ref = 1; | ||
19 | + h->root.non_ir_ref_regular = 1; | ||
20 | } | ||
21 | |||
22 | switch (r_type) | ||
23 | -- | ||
24 | 2.17.1 | ||
25 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch index d62f0ed2..ad2fd5fe 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Fixed-address-computation-issues-with-64bit-address.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch | |||
@@ -1,9 +1,10 @@ | |||
1 | From 9f13e07180c09f814665676ac6c04cb7a2cd7c11 Mon Sep 17 00:00:00 2001 | 1 | From 1594b2f497822ebdb923b4ae55e81a10bfd4817d Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 9 Oct 2018 10:14:22 +0530 | 3 | Date: Tue, 9 Oct 2018 10:14:22 +0530 |
4 | Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address - | 4 | Subject: [PATCH 20/40] Various fixes |
5 | Fixed imml dissassamble issue | ||
6 | 5 | ||
6 | - Fixed address computation issues with 64bit address | ||
7 | - Fixed imml dissassamble issue | ||
7 | --- | 8 | --- |
8 | bfd/bfd-in2.h | 5 +++ | 9 | bfd/bfd-in2.h | 5 +++ |
9 | bfd/elf64-microblaze.c | 14 ++++---- | 10 | bfd/elf64-microblaze.c | 14 ++++---- |
@@ -12,23 +13,23 @@ Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address - | |||
12 | 4 files changed, 79 insertions(+), 16 deletions(-) | 13 | 4 files changed, 79 insertions(+), 16 deletions(-) |
13 | 14 | ||
14 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 15 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
15 | index de46e78902..33c9cb62d9 100644 | 16 | index 88f89bcdbcd..8902d9c7939 100644 |
16 | --- a/bfd/bfd-in2.h | 17 | --- a/bfd/bfd-in2.h |
17 | +++ b/bfd/bfd-in2.h | 18 | +++ b/bfd/bfd-in2.h |
18 | @@ -5881,6 +5881,11 @@ done here - only used for relaxing */ | 19 | @@ -5443,6 +5443,11 @@ value in two words (with an imml instruction). No relocation is |
19 | * +done here - only used for relaxing */ | 20 | done here - only used for relaxing */ |
20 | BFD_RELOC_MICROBLAZE_64, | 21 | BFD_RELOC_MICROBLAZE_64, |
21 | 22 | ||
22 | +/* This is a 64 bit reloc that stores the 32 bit relative | 23 | +/* This is a 64 bit reloc that stores the 32 bit relative |
23 | + * +value in two words (with an imml instruction). No relocation is | 24 | +value in two words (with an imml instruction). No relocation is |
24 | + * +done here - only used for relaxing */ | 25 | +done here - only used for relaxing */ |
25 | + BFD_RELOC_MICROBLAZE_EA64, | 26 | + BFD_RELOC_MICROBLAZE_EA64, |
26 | + | 27 | + |
27 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 28 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
28 | * +value in two words (with an imm instruction). No relocation is | 29 | value in two words (with an imm instruction). No relocation is |
29 | * +done here - only used for relaxing */ | 30 | done here - only used for relaxing */ |
30 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 31 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
31 | index e9b3cf3a86..40f10aac6d 100644 | 32 | index f8f52870639..17e58748a0b 100644 |
32 | --- a/bfd/elf64-microblaze.c | 33 | --- a/bfd/elf64-microblaze.c |
33 | +++ b/bfd/elf64-microblaze.c | 34 | +++ b/bfd/elf64-microblaze.c |
34 | @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 35 | @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -71,7 +72,7 @@ index e9b3cf3a86..40f10aac6d 100644 | |||
71 | microblaze_reloc = R_MICROBLAZE_IMML_64; | 72 | microblaze_reloc = R_MICROBLAZE_IMML_64; |
72 | break; | 73 | break; |
73 | case BFD_RELOC_MICROBLAZE_64_GOTPC: | 74 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
74 | @@ -1969,7 +1969,7 @@ microblaze_elf_relax_section (bfd *abfd, | 75 | @@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd, |
75 | efix = calc_fixup (target_address, 0, sec); | 76 | efix = calc_fixup (target_address, 0, sec); |
76 | 77 | ||
77 | /* Validate the in-band val. */ | 78 | /* Validate the in-band val. */ |
@@ -81,10 +82,10 @@ index e9b3cf3a86..40f10aac6d 100644 | |||
81 | fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); | 82 | fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); |
82 | } | 83 | } |
83 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 84 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
84 | index fa437b6c98..46df32e72f 100644 | 85 | index f61fdf3b90a..0dfb59ffe8b 100644 |
85 | --- a/gas/config/tc-microblaze.c | 86 | --- a/gas/config/tc-microblaze.c |
86 | +++ b/gas/config/tc-microblaze.c | 87 | +++ b/gas/config/tc-microblaze.c |
87 | @@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] = | 88 | @@ -401,7 +401,6 @@ pseudo_typeS md_pseudo_table[] = |
88 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ | 89 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ |
89 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ | 90 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ |
90 | {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ | 91 | {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ |
@@ -92,7 +93,7 @@ index fa437b6c98..46df32e72f 100644 | |||
92 | {"weakext", microblaze_s_weakext, 0}, | 93 | {"weakext", microblaze_s_weakext, 0}, |
93 | {"rodata", microblaze_s_rdata, 0}, | 94 | {"rodata", microblaze_s_rdata, 0}, |
94 | {"sdata2", microblaze_s_rdata, 1}, | 95 | {"sdata2", microblaze_s_rdata, 1}, |
95 | @@ -2479,18 +2478,74 @@ md_apply_fix (fixS * fixP, | 96 | @@ -2489,18 +2488,74 @@ md_apply_fix (fixS * fixP, |
96 | case BFD_RELOC_RVA: | 97 | case BFD_RELOC_RVA: |
97 | case BFD_RELOC_32_PCREL: | 98 | case BFD_RELOC_32_PCREL: |
98 | case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: | 99 | case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: |
@@ -142,7 +143,7 @@ index fa437b6c98..46df32e72f 100644 | |||
142 | + } | 143 | + } |
143 | + } | 144 | + } |
144 | + break; | 145 | + break; |
145 | + | 146 | + |
146 | + case BFD_RELOC_MICROBLAZE_EA64: | 147 | + case BFD_RELOC_MICROBLAZE_EA64: |
147 | /* Don't do anything if the symbol is not defined. */ | 148 | /* Don't do anything if the symbol is not defined. */ |
148 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | 149 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) |
@@ -171,16 +172,16 @@ index fa437b6c98..46df32e72f 100644 | |||
171 | buf[3] |= ((val >> 24) & 0xff); | 172 | buf[3] |= ((val >> 24) & 0xff); |
172 | buf[2] |= ((val >> 16) & 0xff); | 173 | buf[2] |= ((val >> 16) & 0xff); |
173 | buf[1] |= ((val >> 8) & 0xff); | 174 | buf[1] |= ((val >> 8) & 0xff); |
174 | @@ -2611,6 +2666,8 @@ md_apply_fix (fixS * fixP, | 175 | @@ -2621,6 +2676,8 @@ md_apply_fix (fixS * fixP, |
175 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | 176 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; |
176 | else if (fixP->fx_r_type == BFD_RELOC_32) | 177 | else if (fixP->fx_r_type == BFD_RELOC_32) |
177 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; | 178 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; |
178 | + else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64) | 179 | + else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64) |
179 | + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64; | 180 | + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64; |
180 | else | 181 | else |
181 | fixP->fx_r_type = BFD_RELOC_NONE; | 182 | fixP->fx_r_type = BFD_RELOC_NONE; |
182 | fixP->fx_addsy = section_symbol (absolute_section); | 183 | fixP->fx_addsy = section_symbol (absolute_section); |
183 | @@ -2882,6 +2939,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) | 184 | @@ -2892,6 +2949,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
184 | case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: | 185 | case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: |
185 | case BFD_RELOC_MICROBLAZE_64_GOTPC: | 186 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
186 | case BFD_RELOC_MICROBLAZE_64_GPC: | 187 | case BFD_RELOC_MICROBLAZE_64_GPC: |
@@ -188,7 +189,7 @@ index fa437b6c98..46df32e72f 100644 | |||
188 | case BFD_RELOC_MICROBLAZE_64: | 189 | case BFD_RELOC_MICROBLAZE_64: |
189 | case BFD_RELOC_MICROBLAZE_64_PCREL: | 190 | case BFD_RELOC_MICROBLAZE_64_PCREL: |
190 | case BFD_RELOC_MICROBLAZE_64_GOT: | 191 | case BFD_RELOC_MICROBLAZE_64_GOT: |
191 | @@ -3027,10 +3085,10 @@ cons_fix_new_microblaze (fragS * frag, | 192 | @@ -3037,10 +3095,10 @@ cons_fix_new_microblaze (fragS * frag, |
192 | r = BFD_RELOC_32; | 193 | r = BFD_RELOC_32; |
193 | break; | 194 | break; |
194 | case 8: | 195 | case 8: |
@@ -203,16 +204,16 @@ index fa437b6c98..46df32e72f 100644 | |||
203 | default: | 204 | default: |
204 | as_bad (_("unsupported BFD relocation size %u"), size); | 205 | as_bad (_("unsupported BFD relocation size %u"), size); |
205 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 206 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
206 | index 20ea6a885a..f679a43606 100644 | 207 | index a03f5b7a55b..fc8e79b19cf 100644 |
207 | --- a/opcodes/microblaze-dis.c | 208 | --- a/opcodes/microblaze-dis.c |
208 | +++ b/opcodes/microblaze-dis.c | 209 | +++ b/opcodes/microblaze-dis.c |
209 | @@ -61,7 +61,7 @@ get_field_imml (long instr) | 210 | @@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr) |
210 | { | 211 | { |
211 | char tmpstr[25]; | 212 | char *p = strbuf (buf); |
212 | 213 | ||
213 | - sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); | 214 | - sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); |
214 | + sprintf (tmpstr, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); | 215 | + sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); |
215 | return (strdup (tmpstr)); | 216 | return p; |
216 | } | 217 | } |
217 | 218 | ||
218 | -- | 219 | -- |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch index ec82926d..99f285f2 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0022-Adding-new-relocation-to-support-64bit-rodata.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From beeceebb05a4eeaeca697f4ba7e214485b10369a Mon Sep 17 00:00:00 2001 | 1 | From b33fdfda4af069859ebe6588a5b9774cb5a2f14d Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sat, 13 Oct 2018 21:17:01 +0530 | 3 | Date: Sat, 13 Oct 2018 21:17:01 +0530 |
4 | Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata | 4 | Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/elf64-microblaze.c | 11 +++++++-- | 7 | bfd/elf64-microblaze.c | 11 +++++++-- |
@@ -9,10 +9,10 @@ Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata | |||
9 | 2 files changed, 54 insertions(+), 6 deletions(-) | 9 | 2 files changed, 54 insertions(+), 6 deletions(-) |
10 | 10 | ||
11 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 11 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
12 | index 40f10aac6d..4d9b90647f 100644 | 12 | index 17e58748a0b..b62c47e8514 100644 |
13 | --- a/bfd/elf64-microblaze.c | 13 | --- a/bfd/elf64-microblaze.c |
14 | +++ b/bfd/elf64-microblaze.c | 14 | +++ b/bfd/elf64-microblaze.c |
15 | @@ -1461,6 +1461,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 15 | @@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
16 | case (int) R_MICROBLAZE_64_PCREL : | 16 | case (int) R_MICROBLAZE_64_PCREL : |
17 | case (int) R_MICROBLAZE_64: | 17 | case (int) R_MICROBLAZE_64: |
18 | case (int) R_MICROBLAZE_32: | 18 | case (int) R_MICROBLAZE_32: |
@@ -20,16 +20,16 @@ index 40f10aac6d..4d9b90647f 100644 | |||
20 | { | 20 | { |
21 | /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols | 21 | /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols |
22 | from removed linkonce sections, or sections discarded by | 22 | from removed linkonce sections, or sections discarded by |
23 | @@ -1470,6 +1471,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 23 | @@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
24 | relocation += addend; | 24 | relocation += addend; |
25 | if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) | 25 | if (r_type == R_MICROBLAZE_32) |
26 | bfd_put_32 (input_bfd, relocation, contents + offset); | 26 | bfd_put_32 (input_bfd, relocation, contents + offset); |
27 | + else if (r_type == R_MICROBLAZE_IMML_64) | 27 | + else if (r_type == R_MICROBLAZE_IMML_64) |
28 | + bfd_put_64 (input_bfd, relocation, contents + offset); | 28 | + bfd_put_64 (input_bfd, relocation, contents + offset); |
29 | else | 29 | else |
30 | { | 30 | { |
31 | if (r_type == R_MICROBLAZE_64_PCREL) | 31 | if (r_type == R_MICROBLAZE_64_PCREL) |
32 | @@ -1547,7 +1550,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 32 | @@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
33 | } | 33 | } |
34 | else | 34 | else |
35 | { | 35 | { |
@@ -38,7 +38,7 @@ index 40f10aac6d..4d9b90647f 100644 | |||
38 | { | 38 | { |
39 | outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); | 39 | outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); |
40 | outrel.r_addend = relocation + addend; | 40 | outrel.r_addend = relocation + addend; |
41 | @@ -1573,6 +1576,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 41 | @@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
42 | relocation += addend; | 42 | relocation += addend; |
43 | if (r_type == R_MICROBLAZE_32) | 43 | if (r_type == R_MICROBLAZE_32) |
44 | bfd_put_32 (input_bfd, relocation, contents + offset); | 44 | bfd_put_32 (input_bfd, relocation, contents + offset); |
@@ -47,7 +47,7 @@ index 40f10aac6d..4d9b90647f 100644 | |||
47 | else | 47 | else |
48 | { | 48 | { |
49 | if (r_type == R_MICROBLAZE_64_PCREL) | 49 | if (r_type == R_MICROBLAZE_64_PCREL) |
50 | @@ -2085,7 +2090,8 @@ microblaze_elf_relax_section (bfd *abfd, | 50 | @@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd, |
51 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 51 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
52 | irelscan->r_addend); | 52 | irelscan->r_addend); |
53 | } | 53 | } |
@@ -57,7 +57,7 @@ index 40f10aac6d..4d9b90647f 100644 | |||
57 | { | 57 | { |
58 | isym = isymbuf + ELF64_R_SYM (irelscan->r_info); | 58 | isym = isymbuf + ELF64_R_SYM (irelscan->r_info); |
59 | 59 | ||
60 | @@ -2591,6 +2597,7 @@ microblaze_elf_check_relocs (bfd * abfd, | 60 | @@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd, |
61 | case R_MICROBLAZE_64: | 61 | case R_MICROBLAZE_64: |
62 | case R_MICROBLAZE_64_PCREL: | 62 | case R_MICROBLAZE_64_PCREL: |
63 | case R_MICROBLAZE_32: | 63 | case R_MICROBLAZE_32: |
@@ -66,10 +66,10 @@ index 40f10aac6d..4d9b90647f 100644 | |||
66 | if (h != NULL && !bfd_link_pic (info)) | 66 | if (h != NULL && !bfd_link_pic (info)) |
67 | { | 67 | { |
68 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 68 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
69 | index 46df32e72f..c6d2e4c82d 100644 | 69 | index 0dfb59ffe8b..4bd71557ca2 100644 |
70 | --- a/gas/config/tc-microblaze.c | 70 | --- a/gas/config/tc-microblaze.c |
71 | +++ b/gas/config/tc-microblaze.c | 71 | +++ b/gas/config/tc-microblaze.c |
72 | @@ -1119,6 +1119,13 @@ md_assemble (char * str) | 72 | @@ -1133,6 +1133,13 @@ md_assemble (char * str) |
73 | as_fatal (_("smi pseudo instruction should not use a label in imm field")); | 73 | as_fatal (_("smi pseudo instruction should not use a label in imm field")); |
74 | if(streq (name, "lli") || streq (name, "sli")) | 74 | if(streq (name, "lli") || streq (name, "sli")) |
75 | opc = str_microblaze_64; | 75 | opc = str_microblaze_64; |
@@ -83,7 +83,7 @@ index 46df32e72f..c6d2e4c82d 100644 | |||
83 | else if (reg2 == REG_ROSDP) | 83 | else if (reg2 == REG_ROSDP) |
84 | opc = str_microblaze_ro_anchor; | 84 | opc = str_microblaze_ro_anchor; |
85 | else if (reg2 == REG_RWSDP) | 85 | else if (reg2 == REG_RWSDP) |
86 | @@ -1182,7 +1189,10 @@ md_assemble (char * str) | 86 | @@ -1196,7 +1203,10 @@ md_assemble (char * str) |
87 | inst |= (immed << IMM_LOW) & IMM_MASK; | 87 | inst |= (immed << IMM_LOW) & IMM_MASK; |
88 | } | 88 | } |
89 | } | 89 | } |
@@ -95,19 +95,19 @@ index 46df32e72f..c6d2e4c82d 100644 | |||
95 | { | 95 | { |
96 | temp = immed & 0xFFFFFF8000; | 96 | temp = immed & 0xFFFFFF8000; |
97 | if (temp != 0 && temp != 0xFFFFFF8000) | 97 | if (temp != 0 && temp != 0xFFFFFF8000) |
98 | @@ -1794,6 +1804,11 @@ md_assemble (char * str) | 98 | @@ -1808,6 +1818,11 @@ md_assemble (char * str) |
99 | 99 | ||
100 | if (exp.X_md != 0) | 100 | if (exp.X_md != 0) |
101 | subtype = get_imm_otype(exp.X_md); | 101 | subtype = get_imm_otype(exp.X_md); |
102 | + else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) | 102 | + else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) |
103 | + { | 103 | + { |
104 | + opc = str_microblaze_64; | 104 | + opc = strdup(str_microblaze_64); |
105 | + subtype = opcode->inst_offset_type; | 105 | + subtype = opcode->inst_offset_type; |
106 | + } | 106 | + } |
107 | else | 107 | else |
108 | subtype = opcode->inst_offset_type; | 108 | subtype = opcode->inst_offset_type; |
109 | 109 | ||
110 | @@ -1811,6 +1826,31 @@ md_assemble (char * str) | 110 | @@ -1825,6 +1840,31 @@ md_assemble (char * str) |
111 | output = frag_more (isize); | 111 | output = frag_more (isize); |
112 | immed = exp.X_add_number; | 112 | immed = exp.X_add_number; |
113 | } | 113 | } |
@@ -139,7 +139,7 @@ index 46df32e72f..c6d2e4c82d 100644 | |||
139 | 139 | ||
140 | temp = immed & 0xFFFF8000; | 140 | temp = immed & 0xFFFF8000; |
141 | if ((temp != 0) && (temp != 0xFFFF8000)) | 141 | if ((temp != 0) && (temp != 0xFFFF8000)) |
142 | @@ -1834,6 +1874,7 @@ md_assemble (char * str) | 142 | @@ -1848,6 +1888,7 @@ md_assemble (char * str) |
143 | 143 | ||
144 | inst |= (reg1 << RD_LOW) & RD_MASK; | 144 | inst |= (reg1 << RD_LOW) & RD_MASK; |
145 | inst |= (immed << IMM_LOW) & IMM_MASK; | 145 | inst |= (immed << IMM_LOW) & IMM_MASK; |
@@ -147,7 +147,7 @@ index 46df32e72f..c6d2e4c82d 100644 | |||
147 | break; | 147 | break; |
148 | 148 | ||
149 | case INST_TYPE_R2: | 149 | case INST_TYPE_R2: |
150 | @@ -3085,10 +3126,10 @@ cons_fix_new_microblaze (fragS * frag, | 150 | @@ -3095,10 +3136,10 @@ cons_fix_new_microblaze (fragS * frag, |
151 | r = BFD_RELOC_32; | 151 | r = BFD_RELOC_32; |
152 | break; | 152 | break; |
153 | case 8: | 153 | case 8: |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0023-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch index 2458df6c..48b89d64 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0023-fixing-the-.bss-relocation-issue.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch | |||
@@ -1,35 +1,35 @@ | |||
1 | From 3240839197b1c42b3cd6e77c5b3b47aa7a1378a4 Mon Sep 17 00:00:00 2001 | 1 | From 118e1717ef8421bc86bcf56c9186f065bd607efd Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Wed, 24 Oct 2018 12:34:37 +0530 | 3 | Date: Wed, 24 Oct 2018 12:34:37 +0530 |
4 | Subject: [PATCH 23/43] fixing the .bss relocation issue | 4 | Subject: [PATCH 22/40] fixing the .bss relocation issue |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/elf64-microblaze.c | 18 ++++++++++++------ | 7 | bfd/elf64-microblaze.c | 18 ++++++++++++------ |
8 | 1 file changed, 12 insertions(+), 6 deletions(-) | 8 | 1 file changed, 12 insertions(+), 6 deletions(-) |
9 | 9 | ||
10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
11 | index 4d9b90647f..184b7d560d 100644 | 11 | index b62c47e8514..cb3b40b574c 100644 |
12 | --- a/bfd/elf64-microblaze.c | 12 | --- a/bfd/elf64-microblaze.c |
13 | +++ b/bfd/elf64-microblaze.c | 13 | +++ b/bfd/elf64-microblaze.c |
14 | @@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 14 | @@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
15 | + input_section->output_offset | 15 | + input_section->output_offset |
16 | + offset + INST_WORD_SIZE); | 16 | + offset + INST_WORD_SIZE); |
17 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 17 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
18 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) | 18 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) |
19 | + if ((insn & 0xff000000) == 0xb2000000) | 19 | + if ((insn & 0xff000000) == 0xb2000000) |
20 | { | 20 | { |
21 | insn &= ~0x00ffffff; | 21 | insn &= ~0x00ffffff; |
22 | insn |= (relocation >> 16) & 0xffffff; | 22 | insn |= (relocation >> 16) & 0xffffff; |
23 | @@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 23 | @@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
24 | + offset + INST_WORD_SIZE); | 24 | + offset + INST_WORD_SIZE); |
25 | } | 25 | } |
26 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 26 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
27 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) | 27 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) |
28 | + if ((insn & 0xff000000) == 0xb2000000) | 28 | + if ((insn & 0xff000000) == 0xb2000000) |
29 | { | 29 | { |
30 | insn &= ~0x00ffffff; | 30 | insn &= ~0x00ffffff; |
31 | insn |= (relocation >> 16) & 0xffffff; | 31 | insn |= (relocation >> 16) & 0xffffff; |
32 | @@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 32 | @@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
33 | { | 33 | { |
34 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); | 34 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); |
35 | 35 | ||
@@ -38,7 +38,7 @@ index 4d9b90647f..184b7d560d 100644 | |||
38 | { | 38 | { |
39 | instr &= ~0x00ffffff; | 39 | instr &= ~0x00ffffff; |
40 | instr |= (val & 0xffffff); | 40 | instr |= (val & 0xffffff); |
41 | @@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 41 | @@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
42 | unsigned long instr_lo; | 42 | unsigned long instr_lo; |
43 | 43 | ||
44 | instr_hi = bfd_get_32 (abfd, bfd_addr); | 44 | instr_hi = bfd_get_32 (abfd, bfd_addr); |
@@ -47,7 +47,7 @@ index 4d9b90647f..184b7d560d 100644 | |||
47 | { | 47 | { |
48 | instr_hi &= ~0x00ffffff; | 48 | instr_hi &= ~0x00ffffff; |
49 | instr_hi |= (val >> 16) & 0xffffff; | 49 | instr_hi |= (val >> 16) & 0xffffff; |
50 | @@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd, | 50 | @@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd, |
51 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents | 51 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents |
52 | + irelscan->r_offset | 52 | + irelscan->r_offset |
53 | + INST_WORD_SIZE); | 53 | + INST_WORD_SIZE); |
@@ -59,7 +59,7 @@ index 4d9b90647f..184b7d560d 100644 | |||
59 | immediate |= (instr_lo & 0x0000ffff); | 59 | immediate |= (instr_lo & 0x0000ffff); |
60 | offset = calc_fixup (irelscan->r_addend, 0, sec); | 60 | offset = calc_fixup (irelscan->r_addend, 0, sec); |
61 | immediate -= offset; | 61 | immediate -= offset; |
62 | @@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd, | 62 | @@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd, |
63 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents | 63 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents |
64 | + irelscan->r_offset | 64 | + irelscan->r_offset |
65 | + INST_WORD_SIZE); | 65 | + INST_WORD_SIZE); |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch index 20752939..c84767fa 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 843b73643718b0776462bce6aba6b2c6fdb33d85 Mon Sep 17 00:00:00 2001 | 1 | From 04d4e164cec91078b1b1155bae6ae4b508758969 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Wed, 28 Nov 2018 14:00:29 +0530 | 3 | Date: Wed, 28 Nov 2018 14:00:29 +0530 |
4 | Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. | 4 | Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. |
5 | It was adjusting only lower 16bits. | 5 | It was adjusting only lower 16bits. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -10,10 +10,10 @@ Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. | |||
10 | 2 files changed, 4 insertions(+), 4 deletions(-) | 10 | 2 files changed, 4 insertions(+), 4 deletions(-) |
11 | 11 | ||
12 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 12 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
13 | index 035e71f311..2d8c062a42 100644 | 13 | index e1a66f57e79..bf09c68afd9 100644 |
14 | --- a/bfd/elf32-microblaze.c | 14 | --- a/bfd/elf32-microblaze.c |
15 | +++ b/bfd/elf32-microblaze.c | 15 | +++ b/bfd/elf32-microblaze.c |
16 | @@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd, | 16 | @@ -2019,8 +2019,8 @@ microblaze_elf_relax_section (bfd *abfd, |
17 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); | 17 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); |
18 | efix = calc_fixup (target_address, 0, sec); | 18 | efix = calc_fixup (target_address, 0, sec); |
19 | irel->r_addend -= (efix - sfix); | 19 | irel->r_addend -= (efix - sfix); |
@@ -25,10 +25,10 @@ index 035e71f311..2d8c062a42 100644 | |||
25 | break; | 25 | break; |
26 | } | 26 | } |
27 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 27 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
28 | index 184b7d560d..ef6a87062b 100644 | 28 | index cb3b40b574c..b002b414d64 100644 |
29 | --- a/bfd/elf64-microblaze.c | 29 | --- a/bfd/elf64-microblaze.c |
30 | +++ b/bfd/elf64-microblaze.c | 30 | +++ b/bfd/elf64-microblaze.c |
31 | @@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd, | 31 | @@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd, |
32 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); | 32 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); |
33 | efix = calc_fixup (target_address, 0, sec); | 33 | efix = calc_fixup (target_address, 0, sec); |
34 | irel->r_addend -= (efix - sfix); | 34 | irel->r_addend -= (efix - sfix); |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch index b0fe8231..9a8e799c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 69b77a73f4e609883cd7a0946b407becd46bf918 Mon Sep 17 00:00:00 2001 | 1 | From 7d26e7f32769e1a324a8dfd3bc3eaa2a5fbfe62a Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 27 Feb 2019 15:12:32 +0530 | 3 | Date: Wed, 27 Feb 2019 15:12:32 +0530 |
4 | Subject: [PATCH 27/43] Revert "ld: Remove unused expression state" | 4 | Subject: [PATCH 24/40] Revert "ld: Remove unused expression state" |
5 | 5 | ||
6 | This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb. | 6 | This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb. |
7 | 7 | ||
@@ -13,10 +13,10 @@ Conflicts: | |||
13 | 2 files changed, 6 insertions(+), 3 deletions(-) | 13 | 2 files changed, 6 insertions(+), 3 deletions(-) |
14 | 14 | ||
15 | diff --git a/ld/ldexp.c b/ld/ldexp.c | 15 | diff --git a/ld/ldexp.c b/ld/ldexp.c |
16 | index 60b17ef576..dac4b52450 100644 | 16 | index b4e7c41209d..dd3b058110a 100644 |
17 | --- a/ld/ldexp.c | 17 | --- a/ld/ldexp.c |
18 | +++ b/ld/ldexp.c | 18 | +++ b/ld/ldexp.c |
19 | @@ -1354,6 +1354,7 @@ static etree_type * | 19 | @@ -1360,6 +1360,7 @@ static etree_type * |
20 | exp_assop (const char *dst, | 20 | exp_assop (const char *dst, |
21 | etree_type *src, | 21 | etree_type *src, |
22 | enum node_tree_enum class, | 22 | enum node_tree_enum class, |
@@ -24,7 +24,7 @@ index 60b17ef576..dac4b52450 100644 | |||
24 | bfd_boolean hidden) | 24 | bfd_boolean hidden) |
25 | { | 25 | { |
26 | etree_type *n; | 26 | etree_type *n; |
27 | @@ -1365,6 +1366,7 @@ exp_assop (const char *dst, | 27 | @@ -1371,6 +1372,7 @@ exp_assop (const char *dst, |
28 | n->assign.type.node_class = class; | 28 | n->assign.type.node_class = class; |
29 | n->assign.src = src; | 29 | n->assign.src = src; |
30 | n->assign.dst = dst; | 30 | n->assign.dst = dst; |
@@ -32,7 +32,7 @@ index 60b17ef576..dac4b52450 100644 | |||
32 | n->assign.hidden = hidden; | 32 | n->assign.hidden = hidden; |
33 | return n; | 33 | return n; |
34 | } | 34 | } |
35 | @@ -1374,7 +1376,7 @@ exp_assop (const char *dst, | 35 | @@ -1380,7 +1382,7 @@ exp_assop (const char *dst, |
36 | etree_type * | 36 | etree_type * |
37 | exp_assign (const char *dst, etree_type *src, bfd_boolean hidden) | 37 | exp_assign (const char *dst, etree_type *src, bfd_boolean hidden) |
38 | { | 38 | { |
@@ -41,7 +41,7 @@ index 60b17ef576..dac4b52450 100644 | |||
41 | } | 41 | } |
42 | 42 | ||
43 | /* Handle --defsym command-line option. */ | 43 | /* Handle --defsym command-line option. */ |
44 | @@ -1382,7 +1384,7 @@ exp_assign (const char *dst, etree_type *src, bfd_boolean hidden) | 44 | @@ -1388,7 +1390,7 @@ exp_assign (const char *dst, etree_type *src, bfd_boolean hidden) |
45 | etree_type * | 45 | etree_type * |
46 | exp_defsym (const char *dst, etree_type *src) | 46 | exp_defsym (const char *dst, etree_type *src) |
47 | { | 47 | { |
@@ -50,7 +50,7 @@ index 60b17ef576..dac4b52450 100644 | |||
50 | } | 50 | } |
51 | 51 | ||
52 | /* Handle PROVIDE. */ | 52 | /* Handle PROVIDE. */ |
53 | @@ -1390,7 +1392,7 @@ exp_defsym (const char *dst, etree_type *src) | 53 | @@ -1396,7 +1398,7 @@ exp_defsym (const char *dst, etree_type *src) |
54 | etree_type * | 54 | etree_type * |
55 | exp_provide (const char *dst, etree_type *src, bfd_boolean hidden) | 55 | exp_provide (const char *dst, etree_type *src, bfd_boolean hidden) |
56 | { | 56 | { |
@@ -60,7 +60,7 @@ index 60b17ef576..dac4b52450 100644 | |||
60 | 60 | ||
61 | /* Handle ASSERT. */ | 61 | /* Handle ASSERT. */ |
62 | diff --git a/ld/ldexp.h b/ld/ldexp.h | 62 | diff --git a/ld/ldexp.h b/ld/ldexp.h |
63 | index 71395bc6c4..f94b00aedb 100644 | 63 | index 717e839bd41..852ac6c5889 100644 |
64 | --- a/ld/ldexp.h | 64 | --- a/ld/ldexp.h |
65 | +++ b/ld/ldexp.h | 65 | +++ b/ld/ldexp.h |
66 | @@ -66,6 +66,7 @@ typedef union etree_union { | 66 | @@ -66,6 +66,7 @@ typedef union etree_union { |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch deleted file mode 100644 index 50179787..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | From 3a5e6a9c614c3f6abcf8bf853527ef07a5370f80 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Sun, 2 Dec 2018 14:49:14 +0530 | ||
4 | Subject: [PATCH 25/43] [Patch,MicroBlaze]: fixed Build issue which are due to | ||
5 | conflicts in patches. | ||
6 | |||
7 | --- | ||
8 | bfd/elf32-microblaze.c | 1 + | ||
9 | bfd/elf64-microblaze.c | 12 ++++++------ | ||
10 | gas/config/tc-microblaze.c | 4 ++-- | ||
11 | 3 files changed, 9 insertions(+), 8 deletions(-) | ||
12 | |||
13 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | ||
14 | index 2d8c062a42..6a795c5069 100644 | ||
15 | --- a/bfd/elf32-microblaze.c | ||
16 | +++ b/bfd/elf32-microblaze.c | ||
17 | @@ -1996,6 +1996,7 @@ microblaze_elf_relax_section (bfd *abfd, | ||
18 | /* This was a PC-relative instruction that was | ||
19 | completely resolved. */ | ||
20 | int sfix, efix; | ||
21 | + unsigned int val; | ||
22 | bfd_vma target_address; | ||
23 | target_address = irel->r_addend + irel->r_offset; | ||
24 | sfix = calc_fixup (irel->r_offset, 0, sec); | ||
25 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | ||
26 | index ef6a87062b..bed534e7dd 100644 | ||
27 | --- a/bfd/elf64-microblaze.c | ||
28 | +++ b/bfd/elf64-microblaze.c | ||
29 | @@ -2854,14 +2854,14 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info, | ||
30 | /* If this is a weak symbol, and there is a real definition, the | ||
31 | processor independent code will have arranged for us to see the | ||
32 | real definition first, and we can just use the same value. */ | ||
33 | - if (h->u.weakdef != NULL) | ||
34 | + if (h->is_weakalias) | ||
35 | { | ||
36 | - BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined | ||
37 | - || h->u.weakdef->root.type == bfd_link_hash_defweak); | ||
38 | - h->root.u.def.section = h->u.weakdef->root.u.def.section; | ||
39 | - h->root.u.def.value = h->u.weakdef->root.u.def.value; | ||
40 | + struct elf_link_hash_entry *def = weakdef (h); | ||
41 | + BFD_ASSERT (def->root.type == bfd_link_hash_defined); | ||
42 | + h->root.u.def.section = def->root.u.def.section; | ||
43 | + h->root.u.def.value = def->root.u.def.value; | ||
44 | return TRUE; | ||
45 | - } | ||
46 | + } | ||
47 | |||
48 | /* This is a reference to a symbol defined by a dynamic object which | ||
49 | is not a function. */ | ||
50 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
51 | index c6d2e4c82d..b3e49f0cf0 100644 | ||
52 | --- a/gas/config/tc-microblaze.c | ||
53 | +++ b/gas/config/tc-microblaze.c | ||
54 | @@ -118,9 +118,9 @@ const relax_typeS md_relax_table[] = | ||
55 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */ | ||
56 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ | ||
57 | { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ | ||
58 | - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ | ||
59 | + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */ | ||
60 | // { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ | ||
61 | - { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */ | ||
62 | + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }, /* 19: DEFINED_64_OFFSET. */ | ||
63 | { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ | ||
64 | }; | ||
65 | |||
66 | -- | ||
67 | 2.17.1 | ||
68 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch index 664675b9..97d75650 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 7fdfff333f4982d7eb32a564aacfd2d8822c0004 Mon Sep 17 00:00:00 2001 | 1 | From 8293b0cf15d4411402a2b0b50e4c532093c5d952 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 11 Mar 2019 14:23:58 +0530 | 3 | Date: Mon, 11 Mar 2019 14:23:58 +0530 |
4 | Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing | 4 | Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing |
5 | build error for windows builds.commenting for now. | 5 | build error for windows builds.commenting for now. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,18 +9,18 @@ Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing | |||
9 | 1 file changed, 2 insertions(+) | 9 | 1 file changed, 2 insertions(+) |
10 | 10 | ||
11 | diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c | 11 | diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c |
12 | index bfe135e7fb..feb5cb37f5 100644 | 12 | index 070104c2734..8331c8759d5 100644 |
13 | --- a/bfd/elf-attrs.c | 13 | --- a/bfd/elf-attrs.c |
14 | +++ b/bfd/elf-attrs.c | 14 | +++ b/bfd/elf-attrs.c |
15 | @@ -440,6 +440,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) | 15 | @@ -442,6 +442,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) |
16 | /* PR 17512: file: 2844a11d. */ | ||
17 | if (hdr->sh_size == 0) | 16 | if (hdr->sh_size == 0) |
18 | return; | 17 | return; |
18 | |||
19 | + #if 0 | 19 | + #if 0 |
20 | if (hdr->sh_size > bfd_get_file_size (abfd)) | 20 | filesize = bfd_get_file_size (abfd); |
21 | if (filesize != 0 && hdr->sh_size > filesize) | ||
21 | { | 22 | { |
22 | /* xgettext:c-format */ | 23 | @@ -451,6 +452,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) |
23 | @@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) | ||
24 | bfd_set_error (bfd_error_invalid_operation); | 24 | bfd_set_error (bfd_error_invalid_operation); |
25 | return; | 25 | return; |
26 | } | 26 | } |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch deleted file mode 100644 index aef46b3f..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | From e7f43c3afe90faa42c09f368671972c26c2b7b38 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Tue, 26 Feb 2019 17:31:41 +0530 | ||
4 | Subject: [PATCH 26/43] [Patch,Microblaze] : changes of "PR22458, failure to | ||
5 | choose a matching ELF target" is causing "Multiple Prevailing definition | ||
6 | errors",added check for best_match elf. | ||
7 | |||
8 | --- | ||
9 | bfd/format.c | 5 +++++ | ||
10 | 1 file changed, 5 insertions(+) | ||
11 | |||
12 | diff --git a/bfd/format.c b/bfd/format.c | ||
13 | index 97a92291a8..3a74cc49d2 100644 | ||
14 | --- a/bfd/format.c | ||
15 | +++ b/bfd/format.c | ||
16 | @@ -292,7 +292,12 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) | ||
17 | |||
18 | /* Don't check the default target twice. */ | ||
19 | if (*target == &binary_vec | ||
20 | +#if !BFD_SUPPORTS_PLUGINS | ||
21 | || (!abfd->target_defaulted && *target == save_targ)) | ||
22 | +#else | ||
23 | + || (!abfd->target_defaulted && *target == save_targ) | ||
24 | + || (*target)->match_priority > best_match) | ||
25 | +#endif | ||
26 | continue; | ||
27 | |||
28 | /* If we already tried a match, the bfd is modified and may | ||
29 | -- | ||
30 | 2.17.1 | ||
31 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch index dbafc786..ebd1fa4c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 26662110955e26c62629f4263a999216dac326ef Mon Sep 17 00:00:00 2001 | 1 | From 987bd08638fab099dcfdce412448734182be51e6 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Thu, 29 Nov 2018 17:59:25 +0530 | 3 | Date: Thu, 29 Nov 2018 17:59:25 +0530 |
4 | Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue | 4 | Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gas/config/tc-microblaze.c | 10 +++++----- | 7 | gas/config/tc-microblaze.c | 10 +++++----- |
@@ -9,10 +9,10 @@ Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue | |||
9 | 2 files changed, 7 insertions(+), 7 deletions(-) | 9 | 2 files changed, 7 insertions(+), 7 deletions(-) |
10 | 10 | ||
11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
12 | index b3e49f0cf0..5b506d3348 100644 | 12 | index 4bd71557ca2..83e17c60fa0 100644 |
13 | --- a/gas/config/tc-microblaze.c | 13 | --- a/gas/config/tc-microblaze.c |
14 | +++ b/gas/config/tc-microblaze.c | 14 | +++ b/gas/config/tc-microblaze.c |
15 | @@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) | 15 | @@ -797,7 +797,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) |
16 | } | 16 | } |
17 | 17 | ||
18 | static char * | 18 | static char * |
@@ -21,7 +21,7 @@ index b3e49f0cf0..5b506d3348 100644 | |||
21 | { | 21 | { |
22 | char *new_pointer; | 22 | char *new_pointer; |
23 | char *atp; | 23 | char *atp; |
24 | @@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max) | 24 | @@ -848,11 +848,11 @@ parse_imml (char * s, expressionS * e, long min, long max) |
25 | ; /* An error message has already been emitted. */ | 25 | ; /* An error message has already been emitted. */ |
26 | else if ((e->X_op != O_constant && e->X_op != O_symbol) ) | 26 | else if ((e->X_op != O_constant && e->X_op != O_symbol) ) |
27 | as_fatal (_("operand must be a constant or a label")); | 27 | as_fatal (_("operand must be a constant or a label")); |
@@ -38,7 +38,7 @@ index b3e49f0cf0..5b506d3348 100644 | |||
38 | 38 | ||
39 | if (atp) | 39 | if (atp) |
40 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 40 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
41 | index 824afc0ab0..d59ee0a95f 100644 | 41 | index f9709412097..77d74c17f3a 100644 |
42 | --- a/opcodes/microblaze-opc.h | 42 | --- a/opcodes/microblaze-opc.h |
43 | +++ b/opcodes/microblaze-opc.h | 43 | +++ b/opcodes/microblaze-opc.h |
44 | @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr"; | 44 | @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr"; |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch index 8141095a..12f44a6d 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Added-support-to-new-arithmetic-single-register-inst.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch | |||
@@ -1,21 +1,21 @@ | |||
1 | From 7b332d61cb3dbcae69021ce706f2c408c85af193 Mon Sep 17 00:00:00 2001 | 1 | From dde3395588ca91a7c484cc4a003f72f80848c534 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Fri, 23 Aug 2019 16:18:43 +0530 | 3 | Date: Fri, 23 Aug 2019 16:18:43 +0530 |
4 | Subject: [PATCH 30/43] Added support to new arithmetic single register | 4 | Subject: [PATCH 27/40] Added support to new arithmetic single register |
5 | instructions | 5 | instructions |
6 | 6 | ||
7 | --- | 7 | --- |
8 | gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++- | 8 | gas/config/tc-microblaze.c | 145 ++++++++++++++++++++++++++++++++++++- |
9 | opcodes/microblaze-dis.c | 12 +++ | 9 | opcodes/microblaze-dis.c | 13 +++- |
10 | opcodes/microblaze-opc.h | 43 ++++++++++- | 10 | opcodes/microblaze-opc.h | 45 +++++++++++- |
11 | opcodes/microblaze-opcm.h | 5 +- | 11 | opcodes/microblaze-opcm.h | 5 +- |
12 | 4 files changed, 201 insertions(+), 6 deletions(-) | 12 | 4 files changed, 201 insertions(+), 7 deletions(-) |
13 | 13 | ||
14 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 14 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
15 | index 5b506d3348..12eef24a29 100644 | 15 | index 83e17c60fa0..b4330652758 100644 |
16 | --- a/gas/config/tc-microblaze.c | 16 | --- a/gas/config/tc-microblaze.c |
17 | +++ b/gas/config/tc-microblaze.c | 17 | +++ b/gas/config/tc-microblaze.c |
18 | @@ -423,12 +423,33 @@ void | 18 | @@ -422,12 +422,33 @@ void |
19 | md_begin (void) | 19 | md_begin (void) |
20 | { | 20 | { |
21 | struct op_code_struct * opcode; | 21 | struct op_code_struct * opcode; |
@@ -26,7 +26,7 @@ index 5b506d3348..12eef24a29 100644 | |||
26 | /* Insert unique names into hash table. */ | 26 | /* Insert unique names into hash table. */ |
27 | - for (opcode = opcodes; opcode->name; opcode ++) | 27 | - for (opcode = opcodes; opcode->name; opcode ++) |
28 | - hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | 28 | - hash_insert (opcode_hash_control, opcode->name, (char *) opcode); |
29 | + for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++) | 29 | + for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++) |
30 | + { | 30 | + { |
31 | + if (strcmp (prev_name, opcode->name)) | 31 | + if (strcmp (prev_name, opcode->name)) |
32 | + { | 32 | + { |
@@ -51,7 +51,7 @@ index 5b506d3348..12eef24a29 100644 | |||
51 | } | 51 | } |
52 | 52 | ||
53 | /* Try to parse a reg name. */ | 53 | /* Try to parse a reg name. */ |
54 | @@ -986,6 +1007,7 @@ md_assemble (char * str) | 54 | @@ -1000,6 +1021,7 @@ md_assemble (char * str) |
55 | { | 55 | { |
56 | char * op_start; | 56 | char * op_start; |
57 | char * op_end; | 57 | char * op_end; |
@@ -59,19 +59,15 @@ index 5b506d3348..12eef24a29 100644 | |||
59 | struct op_code_struct * opcode, *opcode1; | 59 | struct op_code_struct * opcode, *opcode1; |
60 | char * output = NULL; | 60 | char * output = NULL; |
61 | int nlen = 0; | 61 | int nlen = 0; |
62 | @@ -996,9 +1018,10 @@ md_assemble (char * str) | 62 | @@ -1013,6 +1035,7 @@ md_assemble (char * str) |
63 | unsigned reg3; | 63 | expressionS exp; |
64 | unsigned isize; | ||
65 | unsigned long immed, immed2, temp; | ||
66 | - expressionS exp; | ||
67 | + expressionS exp,exp1; | ||
68 | char name[20]; | 64 | char name[20]; |
69 | long immedl; | 65 | long immedl; |
70 | + int reg=0; | 66 | + int reg=0; |
71 | 67 | ||
72 | /* Drop leading whitespace. */ | 68 | /* Drop leading whitespace. */ |
73 | while (ISSPACE (* str)) | 69 | while (ISSPACE (* str)) |
74 | @@ -1029,7 +1052,78 @@ md_assemble (char * str) | 70 | @@ -1043,7 +1066,78 @@ md_assemble (char * str) |
75 | as_bad (_("unknown opcode \"%s\""), name); | 71 | as_bad (_("unknown opcode \"%s\""), name); |
76 | return; | 72 | return; |
77 | } | 73 | } |
@@ -151,7 +147,7 @@ index 5b506d3348..12eef24a29 100644 | |||
151 | inst = opcode->bit_sequence; | 147 | inst = opcode->bit_sequence; |
152 | isize = 4; | 148 | isize = 4; |
153 | 149 | ||
154 | @@ -1480,6 +1574,51 @@ md_assemble (char * str) | 150 | @@ -1494,6 +1588,51 @@ md_assemble (char * str) |
155 | inst |= (immed << IMM_LOW) & IMM15_MASK; | 151 | inst |= (immed << IMM_LOW) & IMM15_MASK; |
156 | break; | 152 | break; |
157 | 153 | ||
@@ -204,37 +200,45 @@ index 5b506d3348..12eef24a29 100644 | |||
204 | if (strcmp (op_end, "")) | 200 | if (strcmp (op_end, "")) |
205 | op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ | 201 | op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ |
206 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 202 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
207 | index f679a43606..e5e880cb1c 100644 | 203 | index fc8e79b19cf..f5db1189240 100644 |
208 | --- a/opcodes/microblaze-dis.c | 204 | --- a/opcodes/microblaze-dis.c |
209 | +++ b/opcodes/microblaze-dis.c | 205 | +++ b/opcodes/microblaze-dis.c |
210 | @@ -114,6 +114,15 @@ get_field_imm15 (long instr) | 206 | @@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr) |
211 | return (strdup (tmpstr)); | 207 | return p; |
212 | } | 208 | } |
213 | 209 | ||
214 | +static char * | 210 | +static char * |
215 | +get_field_imm16 (long instr) | 211 | +get_field_imm16 (struct string_buf *buf, long instr) |
216 | +{ | 212 | +{ |
217 | + char tmpstr[25]; | 213 | + char *p = strbuf (buf); |
218 | + | 214 | + |
219 | + sprintf (tmpstr, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW)); | 215 | + sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW)); |
220 | + return (strdup (tmpstr)); | 216 | + return p; |
221 | +} | 217 | +} |
222 | + | 218 | + |
223 | static char * | 219 | static char * |
224 | get_field_special (long instr, struct op_code_struct * op) | 220 | get_field_special (struct string_buf *buf, long instr, |
225 | { | 221 | struct op_code_struct *op) |
226 | @@ -419,6 +428,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 222 | @@ -450,6 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
227 | case INST_TYPE_RD_IMM15: | 223 | print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), |
228 | print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst)); | 224 | get_field_imm15 (&buf, inst)); |
229 | break; | 225 | break; |
230 | + case INST_TYPE_RD_IMML: | 226 | + case INST_TYPE_RD_IMML: |
231 | + print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm16 (inst)); | 227 | + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); |
232 | + break; | 228 | + break; |
233 | /* For mbar insn. */ | 229 | /* For mbar insn. */ |
234 | case INST_TYPE_IMM5: | 230 | case INST_TYPE_IMM5: |
235 | print_func (stream, "\t%s", get_field_imm5_mbar (inst)); | 231 | print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst)); |
232 | @@ -457,7 +469,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | ||
233 | /* For mbar 16 or sleep insn. */ | ||
234 | case INST_TYPE_NONE: | ||
235 | break; | ||
236 | - /* For tuqula instruction */ | ||
237 | /* For bit field insns. */ | ||
238 | case INST_TYPE_RD_R1_IMMW_IMMS: | ||
239 | print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), | ||
236 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 240 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
237 | index d59ee0a95f..0774f70e08 100644 | 241 | index 77d74c17f3a..bd1cc90bff6 100644 |
238 | --- a/opcodes/microblaze-opc.h | 242 | --- a/opcodes/microblaze-opc.h |
239 | +++ b/opcodes/microblaze-opc.h | 243 | +++ b/opcodes/microblaze-opc.h |
240 | @@ -69,6 +69,7 @@ | 244 | @@ -69,6 +69,7 @@ |
@@ -287,7 +291,7 @@ index d59ee0a95f..0774f70e08 100644 | |||
287 | /* New Mask for msrset, msrclr insns. */ | 291 | /* New Mask for msrset, msrclr insns. */ |
288 | #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ | 292 | #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ |
289 | /* Mask for mbar insn. */ | 293 | /* Mask for mbar insn. */ |
290 | @@ -114,7 +143,7 @@ | 294 | @@ -114,13 +143,13 @@ |
291 | #define DELAY_SLOT 1 | 295 | #define DELAY_SLOT 1 |
292 | #define NO_DELAY_SLOT 0 | 296 | #define NO_DELAY_SLOT 0 |
293 | 297 | ||
@@ -296,6 +300,13 @@ index d59ee0a95f..0774f70e08 100644 | |||
296 | 300 | ||
297 | struct op_code_struct | 301 | struct op_code_struct |
298 | { | 302 | { |
303 | const char * name; | ||
304 | short inst_type; /* Registers and immediate values involved. */ | ||
305 | - short inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */ | ||
306 | + int inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */ | ||
307 | short delay_slots; /* Info about delay slots needed after this instr. */ | ||
308 | short immval_mask; | ||
309 | unsigned long bit_sequence; /* All the fixed bits for the op are set and | ||
299 | @@ -444,13 +473,21 @@ struct op_code_struct | 310 | @@ -444,13 +473,21 @@ struct op_code_struct |
300 | {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, | 311 | {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, |
301 | {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, | 312 | {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, |
@@ -333,7 +344,7 @@ index d59ee0a95f..0774f70e08 100644 | |||
333 | {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, | 344 | {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, |
334 | {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, | 345 | {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, |
335 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 346 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
336 | index 5f2e190d23..4d2ee2dd0d 100644 | 347 | index ad8b8ce345b..86cdb3b0715 100644 |
337 | --- a/opcodes/microblaze-opcm.h | 348 | --- a/opcodes/microblaze-opcm.h |
338 | +++ b/opcodes/microblaze-opcm.h | 349 | +++ b/opcodes/microblaze-opcm.h |
339 | @@ -61,7 +61,9 @@ enum microblaze_instr | 350 | @@ -61,7 +61,9 @@ enum microblaze_instr |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch index f9f0fc55..a8d5a385 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch | |||
@@ -1,19 +1,19 @@ | |||
1 | From 213df2cac38d404619614939de0c9d3dcbf7557d Mon Sep 17 00:00:00 2001 | 1 | From 623f4e7ea6c18bec0e141c7471c7bd609bd9a6d7 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 26 Aug 2019 15:29:42 +0530 | 3 | Date: Mon, 26 Aug 2019 15:29:42 +0530 |
4 | Subject: [PATCH 31/43] [Patch,MicroBlaze] : double imml generation for 64 bit | 4 | Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit |
5 | values. | 5 | values. |
6 | 6 | ||
7 | --- | 7 | --- |
8 | gas/config/tc-microblaze.c | 322 ++++++++++++++++++++++++++++++------- | 8 | gas/config/tc-microblaze.c | 324 ++++++++++++++++++++++++++++++------- |
9 | opcodes/microblaze-opc.h | 4 +- | 9 | opcodes/microblaze-opc.h | 4 +- |
10 | 2 files changed, 263 insertions(+), 63 deletions(-) | 10 | 2 files changed, 264 insertions(+), 64 deletions(-) |
11 | 11 | ||
12 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 12 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
13 | index 12eef24a29..3ff6a14baf 100644 | 13 | index b4330652758..f5cc1e05f7e 100644 |
14 | --- a/gas/config/tc-microblaze.c | 14 | --- a/gas/config/tc-microblaze.c |
15 | +++ b/gas/config/tc-microblaze.c | 15 | +++ b/gas/config/tc-microblaze.c |
16 | @@ -1008,7 +1008,7 @@ md_assemble (char * str) | 16 | @@ -1022,7 +1022,7 @@ md_assemble (char * str) |
17 | char * op_start; | 17 | char * op_start; |
18 | char * op_end; | 18 | char * op_end; |
19 | char * temp_op_end; | 19 | char * temp_op_end; |
@@ -22,20 +22,21 @@ index 12eef24a29..3ff6a14baf 100644 | |||
22 | char * output = NULL; | 22 | char * output = NULL; |
23 | int nlen = 0; | 23 | int nlen = 0; |
24 | int i; | 24 | int i; |
25 | @@ -1192,7 +1192,12 @@ md_assemble (char * str) | 25 | @@ -1206,7 +1206,12 @@ md_assemble (char * str) |
26 | reg2 = 0; | 26 | reg2 = 0; |
27 | } | 27 | } |
28 | if (strcmp (op_end, "")) | 28 | if (strcmp (op_end, "")) |
29 | - op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); | ||
29 | + { | 30 | + { |
30 | + if(microblaze_arch_size == 64) | 31 | + if (microblaze_arch_size == 64) |
31 | + op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); | 32 | + op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); |
32 | + else | 33 | + else |
33 | op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); | 34 | + op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); |
34 | + } | 35 | + } |
35 | else | 36 | else |
36 | as_fatal (_("Error in statement syntax")); | 37 | as_fatal (_("Error in statement syntax")); |
37 | 38 | ||
38 | @@ -1288,24 +1293,51 @@ md_assemble (char * str) | 39 | @@ -1302,24 +1307,51 @@ md_assemble (char * str) |
39 | || streq (name, "lwi") || streq (name, "sbi") | 40 | || streq (name, "lwi") || streq (name, "sbi") |
40 | || streq (name, "shi") || streq (name, "swi")))) | 41 | || streq (name, "shi") || streq (name, "swi")))) |
41 | { | 42 | { |
@@ -51,27 +52,28 @@ index 12eef24a29..3ff6a14baf 100644 | |||
51 | + { | 52 | + { |
52 | + opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | 53 | + opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); |
53 | + if (opcode1 == NULL) | 54 | + if (opcode1 == NULL) |
54 | + { | 55 | { |
55 | + as_bad (_("unknown opcode \"%s\""), "imml"); | 56 | as_bad (_("unknown opcode \"%s\""), "imml"); |
56 | + return; | 57 | return; |
57 | + } | 58 | } |
58 | + inst1 = opcode1->bit_sequence; | 59 | inst1 = opcode1->bit_sequence; |
60 | - inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; | ||
59 | + inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; | 61 | + inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; |
60 | + output[0] = INST_BYTE0 (inst1); | 62 | output[0] = INST_BYTE0 (inst1); |
61 | + output[1] = INST_BYTE1 (inst1); | 63 | output[1] = INST_BYTE1 (inst1); |
62 | + output[2] = INST_BYTE2 (inst1); | 64 | output[2] = INST_BYTE2 (inst1); |
63 | + output[3] = INST_BYTE3 (inst1); | 65 | output[3] = INST_BYTE3 (inst1); |
64 | + output = frag_more (isize); | 66 | output = frag_more (isize); |
65 | + } | 67 | } |
66 | + else | 68 | + else |
67 | + { | 69 | + { |
68 | + opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | 70 | + opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); |
69 | + opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); | 71 | + opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); |
70 | + if (opcode1 == NULL || opcode2 == NULL) | 72 | + if (opcode1 == NULL || opcode2 == NULL) |
71 | { | 73 | + { |
72 | as_bad (_("unknown opcode \"%s\""), "imml"); | 74 | + as_bad (_("unknown opcode \"%s\""), "imml"); |
73 | return; | 75 | + return; |
74 | } | 76 | + } |
75 | + inst1 = opcode2->bit_sequence; | 77 | + inst1 = opcode2->bit_sequence; |
76 | + inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; | 78 | + inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; |
77 | + output[0] = INST_BYTE0 (inst1); | 79 | + output[0] = INST_BYTE0 (inst1); |
@@ -79,20 +81,19 @@ index 12eef24a29..3ff6a14baf 100644 | |||
79 | + output[2] = INST_BYTE2 (inst1); | 81 | + output[2] = INST_BYTE2 (inst1); |
80 | + output[3] = INST_BYTE3 (inst1); | 82 | + output[3] = INST_BYTE3 (inst1); |
81 | + output = frag_more (isize); | 83 | + output = frag_more (isize); |
82 | inst1 = opcode1->bit_sequence; | 84 | + inst1 = opcode1->bit_sequence; |
83 | - inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; | ||
84 | + inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; | 85 | + inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; |
85 | output[0] = INST_BYTE0 (inst1); | 86 | + output[0] = INST_BYTE0 (inst1); |
86 | output[1] = INST_BYTE1 (inst1); | 87 | + output[1] = INST_BYTE1 (inst1); |
87 | output[2] = INST_BYTE2 (inst1); | 88 | + output[2] = INST_BYTE2 (inst1); |
88 | output[3] = INST_BYTE3 (inst1); | 89 | + output[3] = INST_BYTE3 (inst1); |
89 | output = frag_more (isize); | 90 | + output = frag_more (isize); |
90 | } | 91 | + } |
91 | + } | 92 | + } |
92 | inst |= (reg1 << RD_LOW) & RD_MASK; | 93 | inst |= (reg1 << RD_LOW) & RD_MASK; |
93 | inst |= (reg2 << RA_LOW) & RA_MASK; | 94 | inst |= (reg2 << RA_LOW) & RA_MASK; |
94 | inst |= (immed << IMM_LOW) & IMM_MASK; | 95 | inst |= (immed << IMM_LOW) & IMM_MASK; |
95 | @@ -1316,14 +1348,13 @@ md_assemble (char * str) | 96 | @@ -1330,14 +1362,13 @@ md_assemble (char * str) |
96 | if ((temp != 0) && (temp != 0xFFFF8000)) | 97 | if ((temp != 0) && (temp != 0xFFFF8000)) |
97 | { | 98 | { |
98 | /* Needs an immediate inst. */ | 99 | /* Needs an immediate inst. */ |
@@ -109,7 +110,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
109 | inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; | 110 | inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; |
110 | output[0] = INST_BYTE0 (inst1); | 111 | output[0] = INST_BYTE0 (inst1); |
111 | output[1] = INST_BYTE1 (inst1); | 112 | output[1] = INST_BYTE1 (inst1); |
112 | @@ -1564,7 +1595,7 @@ md_assemble (char * str) | 113 | @@ -1578,7 +1609,7 @@ md_assemble (char * str) |
113 | as_fatal (_("Cannot use special register with this instruction")); | 114 | as_fatal (_("Cannot use special register with this instruction")); |
114 | 115 | ||
115 | if (exp.X_op != O_constant) | 116 | if (exp.X_op != O_constant) |
@@ -118,7 +119,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
118 | else | 119 | else |
119 | { | 120 | { |
120 | output = frag_more (isize); | 121 | output = frag_more (isize); |
121 | @@ -1898,8 +1929,9 @@ md_assemble (char * str) | 122 | @@ -1912,8 +1943,9 @@ md_assemble (char * str) |
122 | temp = immed & 0xFFFF8000; | 123 | temp = immed & 0xFFFF8000; |
123 | if ((temp != 0) && (temp != 0xFFFF8000)) | 124 | if ((temp != 0) && (temp != 0xFFFF8000)) |
124 | { | 125 | { |
@@ -129,7 +130,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
129 | if (opcode1 == NULL) | 130 | if (opcode1 == NULL) |
130 | { | 131 | { |
131 | as_bad (_("unknown opcode \"%s\""), "imm"); | 132 | as_bad (_("unknown opcode \"%s\""), "imm"); |
132 | @@ -1928,7 +1960,12 @@ md_assemble (char * str) | 133 | @@ -1942,7 +1974,12 @@ md_assemble (char * str) |
133 | reg1 = 0; | 134 | reg1 = 0; |
134 | } | 135 | } |
135 | if (strcmp (op_end, "")) | 136 | if (strcmp (op_end, "")) |
@@ -142,7 +143,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
142 | else | 143 | else |
143 | as_fatal (_("Error in statement syntax")); | 144 | as_fatal (_("Error in statement syntax")); |
144 | 145 | ||
145 | @@ -1967,30 +2004,55 @@ md_assemble (char * str) | 146 | @@ -1981,30 +2018,55 @@ md_assemble (char * str) |
146 | } | 147 | } |
147 | if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) | 148 | if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) |
148 | { | 149 | { |
@@ -203,8 +204,8 @@ index 12eef24a29..3ff6a14baf 100644 | |||
203 | temp = immed & 0xFFFF8000; | 204 | temp = immed & 0xFFFF8000; |
204 | if ((temp != 0) && (temp != 0xFFFF8000)) | 205 | if ((temp != 0) && (temp != 0xFFFF8000)) |
205 | { | 206 | { |
206 | @@ -2076,25 +2138,50 @@ md_assemble (char * str) | 207 | @@ -2090,25 +2152,50 @@ md_assemble (char * str) |
207 | streq (name, "breaid") || | 208 | streq (name, "breaid") || |
208 | streq (name, "brai") || streq (name, "braid"))) | 209 | streq (name, "brai") || streq (name, "braid"))) |
209 | { | 210 | { |
210 | - temp = immed & 0xFFFFFF8000; | 211 | - temp = immed & 0xFFFFFF8000; |
@@ -258,7 +259,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
258 | inst |= (immed << IMM_LOW) & IMM_MASK; | 259 | inst |= (immed << IMM_LOW) & IMM_MASK; |
259 | } | 260 | } |
260 | else | 261 | else |
261 | @@ -2194,21 +2281,45 @@ md_assemble (char * str) | 262 | @@ -2208,21 +2295,45 @@ md_assemble (char * str) |
262 | { | 263 | { |
263 | output = frag_more (isize); | 264 | output = frag_more (isize); |
264 | immedl = exp.X_add_number; | 265 | immedl = exp.X_add_number; |
@@ -319,7 +320,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
319 | } | 320 | } |
320 | 321 | ||
321 | inst |= (reg1 << RD_LOW) & RD_MASK; | 322 | inst |= (reg1 << RD_LOW) & RD_MASK; |
322 | @@ -2257,21 +2368,46 @@ md_assemble (char * str) | 323 | @@ -2271,21 +2382,46 @@ md_assemble (char * str) |
323 | { | 324 | { |
324 | output = frag_more (isize); | 325 | output = frag_more (isize); |
325 | immedl = exp.X_add_number; | 326 | immedl = exp.X_add_number; |
@@ -374,7 +375,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
374 | 375 | ||
375 | inst |= (reg1 << RA_LOW) & RA_MASK; | 376 | inst |= (reg1 << RA_LOW) & RA_MASK; |
376 | inst |= (immedl << IMM_LOW) & IMM_MASK; | 377 | inst |= (immedl << IMM_LOW) & IMM_MASK; |
377 | @@ -2554,8 +2690,8 @@ md_apply_fix (fixS * fixP, | 378 | @@ -2565,8 +2701,8 @@ md_apply_fix (fixS * fixP, |
378 | /* Note: use offsetT because it is signed, valueT is unsigned. */ | 379 | /* Note: use offsetT because it is signed, valueT is unsigned. */ |
379 | offsetT val = (offsetT) * valp; | 380 | offsetT val = (offsetT) * valp; |
380 | int i; | 381 | int i; |
@@ -385,7 +386,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
385 | 386 | ||
386 | symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); | 387 | symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); |
387 | 388 | ||
388 | @@ -2739,30 +2875,75 @@ md_apply_fix (fixS * fixP, | 389 | @@ -2749,30 +2885,75 @@ md_apply_fix (fixS * fixP, |
389 | case BFD_RELOC_MICROBLAZE_64_TEXTREL: | 390 | case BFD_RELOC_MICROBLAZE_64_TEXTREL: |
390 | case BFD_RELOC_MICROBLAZE_64: | 391 | case BFD_RELOC_MICROBLAZE_64: |
391 | case BFD_RELOC_MICROBLAZE_64_PCREL: | 392 | case BFD_RELOC_MICROBLAZE_64_PCREL: |
@@ -471,7 +472,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
471 | /* Generate the imm instruction. */ | 472 | /* Generate the imm instruction. */ |
472 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); | 473 | opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); |
473 | if (opcode1 == NULL) | 474 | if (opcode1 == NULL) |
474 | @@ -2774,12 +2955,11 @@ md_apply_fix (fixS * fixP, | 475 | @@ -2784,12 +2965,11 @@ md_apply_fix (fixS * fixP, |
475 | inst1 = opcode1->bit_sequence; | 476 | inst1 = opcode1->bit_sequence; |
476 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | 477 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) |
477 | inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; | 478 | inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; |
@@ -485,7 +486,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
485 | /* Add the value only if the symbol is defined. */ | 486 | /* Add the value only if the symbol is defined. */ |
486 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | 487 | if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) |
487 | { | 488 | { |
488 | @@ -2811,21 +2991,41 @@ md_apply_fix (fixS * fixP, | 489 | @@ -2821,21 +3001,41 @@ md_apply_fix (fixS * fixP, |
489 | /* Add an imm instruction. First save the current instruction. */ | 490 | /* Add an imm instruction. First save the current instruction. */ |
490 | for (i = 0; i < INST_WORD_SIZE; i++) | 491 | for (i = 0; i < INST_WORD_SIZE; i++) |
491 | buf[i + INST_WORD_SIZE] = buf[i]; | 492 | buf[i + INST_WORD_SIZE] = buf[i]; |
@@ -532,7 +533,7 @@ index 12eef24a29..3ff6a14baf 100644 | |||
532 | within the same section only. */ | 533 | within the same section only. */ |
533 | buf[0] = INST_BYTE0 (inst1); | 534 | buf[0] = INST_BYTE0 (inst1); |
534 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 535 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
535 | index 0774f70e08..bd9d91cd57 100644 | 536 | index bd1cc90bff6..cf5b5920921 100644 |
536 | --- a/opcodes/microblaze-opc.h | 537 | --- a/opcodes/microblaze-opc.h |
537 | +++ b/opcodes/microblaze-opc.h | 538 | +++ b/opcodes/microblaze-opc.h |
538 | @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr"; | 539 | @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr"; |
@@ -541,7 +542,7 @@ index 0774f70e08..bd9d91cd57 100644 | |||
541 | 542 | ||
542 | -#define MIN_IMML ((long long) 0xffffff8000000000L) | 543 | -#define MIN_IMML ((long long) 0xffffff8000000000L) |
543 | -#define MAX_IMML ((long long) 0x0000007fffffffffL) | 544 | -#define MAX_IMML ((long long) 0x0000007fffffffffL) |
544 | +#define MIN_IMML ((long long) -9223372036854775808) | 545 | +#define MIN_IMML ((long long) -9223372036854775807) |
545 | +#define MAX_IMML ((long long) 9223372036854775807) | 546 | +#define MAX_IMML ((long long) 9223372036854775807) |
546 | 547 | ||
547 | #endif /* MICROBLAZE_OPC */ | 548 | #endif /* MICROBLAZE_OPC */ |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch index 118c5629..3720f2dc 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From d64ce07a2b9206ce1e53d8958b28de02cc7cca2b Mon Sep 17 00:00:00 2001 | 1 | From b7b5caa314177cfe8aeb0fb6d748f6e52fe51a83 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Wed, 22 Jan 2020 16:31:12 +0530 | 3 | Date: Wed, 22 Jan 2020 16:31:12 +0530 |
4 | Subject: [PATCH 45/45] Fixed bug in generation of IMML instruction for the new | 4 | Subject: [PATCH 29/40] Fixed bug in generation of IMML instruction for the new |
5 | MB-64 instructions with single register. | 5 | MB-64 instructions with single register. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,10 +9,10 @@ Subject: [PATCH 45/45] Fixed bug in generation of IMML instruction for the new | |||
9 | 1 file changed, 47 insertions(+), 3 deletions(-) | 9 | 1 file changed, 47 insertions(+), 3 deletions(-) |
10 | 10 | ||
11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
12 | index 95a1e69729..dc79328df6 100644 | 12 | index f5cc1e05f7e..efd1a42769e 100644 |
13 | --- a/gas/config/tc-microblaze.c | 13 | --- a/gas/config/tc-microblaze.c |
14 | +++ b/gas/config/tc-microblaze.c | 14 | +++ b/gas/config/tc-microblaze.c |
15 | @@ -1642,12 +1642,56 @@ md_assemble (char * str) | 15 | @@ -1653,12 +1653,56 @@ md_assemble (char * str) |
16 | exp.X_add_symbol, | 16 | exp.X_add_symbol, |
17 | exp.X_add_number, | 17 | exp.X_add_number, |
18 | (char *) opc); | 18 | (char *) opc); |
@@ -70,8 +70,8 @@ index 95a1e69729..dc79328df6 100644 | |||
70 | } | 70 | } |
71 | inst |= (reg1 << RD_LOW) & RD_MASK; | 71 | inst |= (reg1 << RD_LOW) & RD_MASK; |
72 | inst |= (immed << IMM_LOW) & IMM16_MASK; | 72 | inst |= (immed << IMM_LOW) & IMM16_MASK; |
73 | @@ -2141,8 +2185,8 @@ md_assemble (char * str) | 73 | @@ -2152,8 +2196,8 @@ md_assemble (char * str) |
74 | streq (name, "breaid") || | 74 | streq (name, "breaid") || |
75 | streq (name, "brai") || streq (name, "braid"))) | 75 | streq (name, "brai") || streq (name, "braid"))) |
76 | { | 76 | { |
77 | - temp = immed & 0xFFFFFFFFFFFF8000; | 77 | - temp = immed & 0xFFFFFFFFFFFF8000; |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch new file mode 100644 index 00000000..8cd3563b --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch | |||
@@ -0,0 +1,47 @@ | |||
1 | From 0afa4ba2af8d63cb70771f1c7e235af920603533 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 16 Apr 2020 18:08:58 +0530 | ||
4 | Subject: [PATCH 30/40] [Patch,MicroBlaze m64]: Update imml instructions for | ||
5 | Type A branch EA | ||
6 | |||
7 | This patch will remove imml 0 and imml -1 instructions when the offset is less than 16 bit for Type A branch EA instructions. | ||
8 | --- | ||
9 | gas/config/tc-microblaze.c | 14 +++++++------- | ||
10 | 1 file changed, 7 insertions(+), 7 deletions(-) | ||
11 | |||
12 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
13 | index efd1a42769e..1d838abfefa 100644 | ||
14 | --- a/gas/config/tc-microblaze.c | ||
15 | +++ b/gas/config/tc-microblaze.c | ||
16 | @@ -2164,13 +2164,13 @@ md_assemble (char * str) | ||
17 | if (exp.X_op != O_constant) | ||
18 | { | ||
19 | char *opc; | ||
20 | - if (microblaze_arch_size == 64 && (streq (name, "breai") || | ||
21 | - streq (name, "breaid") || | ||
22 | - streq (name, "brai") || streq (name, "braid"))) | ||
23 | - opc = strdup(str_microblaze_64); | ||
24 | + /* removal of imml 0 and imml -1 for bea type A insns. | ||
25 | + if offset is 16 bit then imml instructions are redundant */ | ||
26 | + if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid"))) | ||
27 | + opc = strdup(str_microblaze_64); | ||
28 | else | ||
29 | - opc = NULL; | ||
30 | - relax_substateT subtype; | ||
31 | + opc = NULL; | ||
32 | + relax_substateT subtype; | ||
33 | |||
34 | if (exp.X_md != 0) | ||
35 | subtype = get_imm_otype(exp.X_md); | ||
36 | @@ -2930,7 +2930,7 @@ md_apply_fix (fixS * fixP, | ||
37 | case BFD_RELOC_MICROBLAZE_64: | ||
38 | case BFD_RELOC_MICROBLAZE_64_PCREL: | ||
39 | if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64 | ||
40 | - || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) | ||
41 | + || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64)) | ||
42 | { | ||
43 | /* Generate the imm instruction. */ | ||
44 | if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887) | ||
45 | -- | ||
46 | 2.17.1 | ||
47 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch new file mode 100644 index 00000000..fda23a1a --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch | |||
@@ -0,0 +1,38 @@ | |||
1 | From 23f0f6e8281b5cd481ef7636739c07b446828f7e Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Wed, 17 Jun 2020 21:20:26 +0530 | ||
4 | Subject: [PATCH 31/40] ldlang.c: Workaround for improper address mapping | ||
5 | causing runtime loops | ||
6 | |||
7 | [Patch,MicroBlaze] : improper address mapping of PROVIDE directive | ||
8 | symbols[DTOR_END] are causing runtime loops and we don't need to override | ||
9 | PROVIDE symbols if symbols are defined in libraries and linker so I am | ||
10 | disabling override for PROVIDE symbols. | ||
11 | --- | ||
12 | ld/ldlang.c | 8 +++++++- | ||
13 | 1 file changed, 7 insertions(+), 1 deletion(-) | ||
14 | |||
15 | diff --git a/ld/ldlang.c b/ld/ldlang.c | ||
16 | index 9977195074a..9e2c1da066e 100644 | ||
17 | --- a/ld/ldlang.c | ||
18 | +++ b/ld/ldlang.c | ||
19 | @@ -3657,9 +3657,15 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) | ||
20 | plugin_insert = NULL; | ||
21 | #endif | ||
22 | break; | ||
23 | + /* This is from a --defsym on the command line. */ | ||
24 | case lang_assignment_statement_enum: | ||
25 | if (s->assignment_statement.exp->type.node_class != etree_assert) | ||
26 | - exp_fold_tree_no_dot (s->assignment_statement.exp); | ||
27 | + { | ||
28 | + if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide)) | ||
29 | + ; | ||
30 | + else | ||
31 | + exp_fold_tree_no_dot (s->assignment_statement.exp); | ||
32 | + } | ||
33 | break; | ||
34 | default: | ||
35 | break; | ||
36 | -- | ||
37 | 2.17.1 | ||
38 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch new file mode 100644 index 00000000..0e813f96 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch | |||
@@ -0,0 +1,83 @@ | |||
1 | From 4d0c68ffb688c23f984de8c0a22af824c3902d83 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
3 | Date: Thu, 16 Jul 2020 12:38:11 -0500 | ||
4 | Subject: [PATCH 32/40] gas: revert moving of md_pseudo_table from const | ||
5 | |||
6 | The base system expect md_pseudo_table to be constant, Changing the | ||
7 | definition will break other architectures when compiled with a | ||
8 | unified source code. | ||
9 | |||
10 | Patch reverts the change away from const, and implements a newer | ||
11 | dynamic handler that passes the correct argument value based on word | ||
12 | size. | ||
13 | |||
14 | Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
15 | --- | ||
16 | gas/config/tc-microblaze.c | 16 +++++++++++++--- | ||
17 | gas/tc.h | 2 +- | ||
18 | 2 files changed, 14 insertions(+), 4 deletions(-) | ||
19 | |||
20 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
21 | index 1d838abfefa..da99d4ef482 100644 | ||
22 | --- a/gas/config/tc-microblaze.c | ||
23 | +++ b/gas/config/tc-microblaze.c | ||
24 | @@ -384,6 +384,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) | ||
25 | demand_empty_rest_of_line (); | ||
26 | } | ||
27 | |||
28 | +/* Handle the .gpword pseudo-op, Pass to s_rva */ | ||
29 | + | ||
30 | +static void | ||
31 | +microblaze_s_gpword (int ignore ATTRIBUTE_UNUSED) | ||
32 | +{ | ||
33 | + int size = 4; | ||
34 | + if (microblaze_arch_size == 64) | ||
35 | + size = 8; | ||
36 | + s_rva(size); | ||
37 | +} | ||
38 | + | ||
39 | /* This table describes all the machine specific pseudo-ops the assembler | ||
40 | has to support. The fields are: | ||
41 | Pseudo-op name without dot | ||
42 | @@ -391,7 +402,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) | ||
43 | Integer arg to pass to the function. */ | ||
44 | /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, | ||
45 | and then in the read.c table. */ | ||
46 | -pseudo_typeS md_pseudo_table[] = | ||
47 | +const pseudo_typeS md_pseudo_table[] = | ||
48 | { | ||
49 | {"lcomm", microblaze_s_lcomm, 1}, | ||
50 | {"data", microblaze_s_data, 0}, | ||
51 | @@ -400,7 +411,7 @@ pseudo_typeS md_pseudo_table[] = | ||
52 | {"data32", cons, 4}, /* Same as word. */ | ||
53 | {"ent", s_func, 0}, /* Treat ent as function entry point. */ | ||
54 | {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ | ||
55 | - {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ | ||
56 | + {"gpword", microblaze_s_gpword, 0}, /* gpword label => store resolved label address in data section. */ | ||
57 | {"weakext", microblaze_s_weakext, 0}, | ||
58 | {"rodata", microblaze_s_rdata, 0}, | ||
59 | {"sdata2", microblaze_s_rdata, 1}, | ||
60 | @@ -3464,7 +3475,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) | ||
61 | case OPTION_M64: | ||
62 | //if (arg != NULL && strcmp (arg, "64") == 0) | ||
63 | microblaze_arch_size = 64; | ||
64 | - md_pseudo_table[7].poc_val = 8; | ||
65 | break; | ||
66 | default: | ||
67 | return 0; | ||
68 | diff --git a/gas/tc.h b/gas/tc.h | ||
69 | index 5bdfe5c3475..da1738d67a8 100644 | ||
70 | --- a/gas/tc.h | ||
71 | +++ b/gas/tc.h | ||
72 | @@ -22,7 +22,7 @@ | ||
73 | /* In theory (mine, at least!) the machine dependent part of the assembler | ||
74 | should only have to include one file. This one. -- JF */ | ||
75 | |||
76 | -extern pseudo_typeS md_pseudo_table[]; | ||
77 | +extern const pseudo_typeS md_pseudo_table[]; | ||
78 | |||
79 | const char * md_atof (int, char *, int *); | ||
80 | int md_parse_option (int, const char *); | ||
81 | -- | ||
82 | 2.17.1 | ||
83 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch new file mode 100644 index 00000000..7339995e --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch | |||
@@ -0,0 +1,105 @@ | |||
1 | From d9114e764eb42ae1daaf6af7c2a5e48fc764109d Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
3 | Date: Fri, 17 Jul 2020 09:20:54 -0500 | ||
4 | Subject: [PATCH 33/40] Fix various compile warnings | ||
5 | |||
6 | Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
7 | --- | ||
8 | bfd/elf64-microblaze.c | 9 +++++---- | ||
9 | gas/config/tc-microblaze.c | 11 +++++------ | ||
10 | 2 files changed, 10 insertions(+), 10 deletions(-) | ||
11 | |||
12 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | ||
13 | index b002b414d64..8308f1ebd09 100644 | ||
14 | --- a/bfd/elf64-microblaze.c | ||
15 | +++ b/bfd/elf64-microblaze.c | ||
16 | @@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | ||
17 | /* Set the howto pointer for a RCE ELF reloc. */ | ||
18 | |||
19 | static bfd_boolean | ||
20 | -microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, | ||
21 | +microblaze_elf_info_to_howto (bfd * abfd, | ||
22 | arelent * cache_ptr, | ||
23 | Elf_Internal_Rela * dst) | ||
24 | { | ||
25 | @@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, | ||
26 | r_type = ELF64_R_TYPE (dst->r_info); | ||
27 | if (r_type >= R_MICROBLAZE_max) | ||
28 | { | ||
29 | - (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"), | ||
30 | + _bfd_error_handler (_("%pB: unsupported relocation type %#x"), | ||
31 | abfd, r_type); | ||
32 | bfd_set_error (bfd_error_bad_value); | ||
33 | return FALSE; | ||
34 | } | ||
35 | |||
36 | cache_ptr->howto = microblaze_elf_howto_table [r_type]; | ||
37 | - return TRUE; | ||
38 | + return TRUE; | ||
39 | } | ||
40 | |||
41 | /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ | ||
42 | @@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | ||
43 | else | ||
44 | { | ||
45 | BFD_FAIL (); | ||
46 | - (*_bfd_error_handler) | ||
47 | + _bfd_error_handler | ||
48 | (_("%pB: probably compiled without -fPIC?"), | ||
49 | input_bfd); | ||
50 | bfd_set_error (bfd_error_bad_value); | ||
51 | @@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd, | ||
52 | goto dogottls; | ||
53 | case R_MICROBLAZE_TLSLD: | ||
54 | tls_type |= (TLS_TLS | TLS_LD); | ||
55 | + /* Fall through. */ | ||
56 | dogottls: | ||
57 | sec->has_tls_reloc = 1; | ||
58 | /* Fall through. */ | ||
59 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
60 | index da99d4ef482..62daa56b47a 100644 | ||
61 | --- a/gas/config/tc-microblaze.c | ||
62 | +++ b/gas/config/tc-microblaze.c | ||
63 | @@ -1091,7 +1091,6 @@ md_assemble (char * str) | ||
64 | reg = is_reg (temp_op_end + 1); | ||
65 | if (reg) | ||
66 | { | ||
67 | - | ||
68 | opcode->inst_type=INST_TYPE_RD_R1_IMML; | ||
69 | opcode->inst_offset_type = OPCODE_MASK_H; | ||
70 | if (streq (name, "addli")) | ||
71 | @@ -1242,18 +1241,18 @@ md_assemble (char * str) | ||
72 | else if (streq (name, "smi")) | ||
73 | as_fatal (_("smi pseudo instruction should not use a label in imm field")); | ||
74 | if(streq (name, "lli") || streq (name, "sli")) | ||
75 | - opc = str_microblaze_64; | ||
76 | + opc = strdup(str_microblaze_64); | ||
77 | else if ((microblaze_arch_size == 64) && ((streq (name, "lbui") | ||
78 | || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi") | ||
79 | || streq (name, "shi") || streq (name, "swi")))) | ||
80 | { | ||
81 | - opc = str_microblaze_64; | ||
82 | + opc = strdup(str_microblaze_64); | ||
83 | subtype = opcode->inst_offset_type; | ||
84 | } | ||
85 | else if (reg2 == REG_ROSDP) | ||
86 | - opc = str_microblaze_ro_anchor; | ||
87 | + opc = strdup(str_microblaze_ro_anchor); | ||
88 | else if (reg2 == REG_RWSDP) | ||
89 | - opc = str_microblaze_rw_anchor; | ||
90 | + opc = strdup(str_microblaze_rw_anchor); | ||
91 | else | ||
92 | opc = NULL; | ||
93 | if (exp.X_md != 0) | ||
94 | @@ -1718,7 +1717,7 @@ md_assemble (char * str) | ||
95 | inst |= (reg1 << RD_LOW) & RD_MASK; | ||
96 | inst |= (immed << IMM_LOW) & IMM16_MASK; | ||
97 | break; | ||
98 | - | ||
99 | + | ||
100 | case INST_TYPE_R1_RFSL: | ||
101 | if (strcmp (op_end, "")) | ||
102 | op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ | ||
103 | -- | ||
104 | 2.17.1 | ||
105 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0032-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch index 88c137f5..00e5410c 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0032-Add-initial-port-of-linux-gdbserver.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 5c7fa77256c704cc493a6bd42425fcec814710e8 Mon Sep 17 00:00:00 2001 | 1 | From c466a54f6ac8fae44f3e79e33bb782086dc08a2b Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 23 Jan 2017 19:07:44 +0530 | 3 | Date: Mon, 23 Jan 2017 19:07:44 +0530 |
4 | Subject: [PATCH 32/43] Add initial port of linux gdbserver add | 4 | Subject: [PATCH 34/40] Add initial port of linux gdbserver add |
5 | gdb_proc_service_h to gdbserver microblaze-linux | 5 | gdb_proc_service_h to gdbserver microblaze-linux |
6 | 6 | ||
7 | gdbserver needs to initialise the microblaze registers | 7 | gdbserver needs to initialise the microblaze registers |
@@ -21,17 +21,21 @@ Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> | |||
21 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | 21 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> |
22 | --- | 22 | --- |
23 | gdb/configure.host | 3 + | 23 | gdb/configure.host | 3 + |
24 | gdb/features/microblaze-linux.xml | 12 ++ | ||
24 | gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++ | 25 | gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++ |
25 | gdb/microblaze-linux-tdep.c | 29 +++- | 26 | gdb/microblaze-linux-tdep.c | 29 +++- |
26 | gdb/microblaze-tdep.c | 35 ++++- | 27 | gdb/microblaze-tdep.c | 35 ++++- |
27 | gdb/microblaze-tdep.h | 4 +- | 28 | gdb/microblaze-tdep.h | 4 +- |
28 | gdb/regformats/reg-microblaze.dat | 41 ++++++ | 29 | gdb/regformats/reg-microblaze.dat | 41 ++++++ |
29 | 6 files changed, 298 insertions(+), 3 deletions(-) | 30 | gdbserver/Makefile.in | 4 + |
31 | gdbserver/configure.srv | 8 ++ | ||
32 | 9 files changed, 322 insertions(+), 3 deletions(-) | ||
33 | create mode 100644 gdb/features/microblaze-linux.xml | ||
30 | create mode 100644 gdb/gdbserver/linux-microblaze-low.c | 34 | create mode 100644 gdb/gdbserver/linux-microblaze-low.c |
31 | create mode 100644 gdb/regformats/reg-microblaze.dat | 35 | create mode 100644 gdb/regformats/reg-microblaze.dat |
32 | 36 | ||
33 | diff --git a/gdb/configure.host b/gdb/configure.host | 37 | diff --git a/gdb/configure.host b/gdb/configure.host |
34 | index c87f997abc..de8d6b00f3 100644 | 38 | index ce528237291..cf1a08e8b28 100644 |
35 | --- a/gdb/configure.host | 39 | --- a/gdb/configure.host |
36 | +++ b/gdb/configure.host | 40 | +++ b/gdb/configure.host |
37 | @@ -65,6 +65,7 @@ hppa*) gdb_host_cpu=pa ;; | 41 | @@ -65,6 +65,7 @@ hppa*) gdb_host_cpu=pa ;; |
@@ -51,9 +55,27 @@ index c87f997abc..de8d6b00f3 100644 | |||
51 | powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) | 55 | powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) |
52 | gdb_host=aix ;; | 56 | gdb_host=aix ;; |
53 | powerpc*-*-freebsd*) gdb_host=fbsd ;; | 57 | powerpc*-*-freebsd*) gdb_host=fbsd ;; |
58 | diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml | ||
59 | new file mode 100644 | ||
60 | index 00000000000..8983e66eb3d | ||
61 | --- /dev/null | ||
62 | +++ b/gdb/features/microblaze-linux.xml | ||
63 | @@ -0,0 +1,12 @@ | ||
64 | +<?xml version="1.0"?> | ||
65 | +<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc. | ||
66 | + | ||
67 | + Copying and distribution of this file, with or without modification, | ||
68 | + are permitted in any medium without royalty provided the copyright | ||
69 | + notice and this notice are preserved. --> | ||
70 | + | ||
71 | +<!DOCTYPE target SYSTEM "gdb-target.dtd"> | ||
72 | +<target> | ||
73 | + <osabi>GNU/Linux</osabi> | ||
74 | + <xi:include href="microblaze-core.xml"/> | ||
75 | +</target> | ||
54 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c | 76 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c |
55 | new file mode 100644 | 77 | new file mode 100644 |
56 | index 0000000000..cba5d6fc58 | 78 | index 00000000000..cba5d6fc585 |
57 | --- /dev/null | 79 | --- /dev/null |
58 | +++ b/gdb/gdbserver/linux-microblaze-low.c | 80 | +++ b/gdb/gdbserver/linux-microblaze-low.c |
59 | @@ -0,0 +1,189 @@ | 81 | @@ -0,0 +1,189 @@ |
@@ -247,7 +269,7 @@ index 0000000000..cba5d6fc58 | |||
247 | + microblaze_supply_ptrace_register, | 269 | + microblaze_supply_ptrace_register, |
248 | +}; | 270 | +}; |
249 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | 271 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c |
250 | index 4e5f60cd4e..7ab650a1cc 100644 | 272 | index be710bedb64..d15b24d619e 100644 |
251 | --- a/gdb/microblaze-linux-tdep.c | 273 | --- a/gdb/microblaze-linux-tdep.c |
252 | +++ b/gdb/microblaze-linux-tdep.c | 274 | +++ b/gdb/microblaze-linux-tdep.c |
253 | @@ -37,6 +37,22 @@ | 275 | @@ -37,6 +37,22 @@ |
@@ -273,17 +295,14 @@ index 4e5f60cd4e..7ab650a1cc 100644 | |||
273 | static int | 295 | static int |
274 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 296 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
275 | struct bp_target_info *bp_tgt) | 297 | struct bp_target_info *bp_tgt) |
276 | @@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 298 | @@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
277 | int val; | ||
278 | int bplen; | ||
279 | gdb_byte old_contents[BREAKPOINT_MAX]; | ||
280 | + struct cleanup *cleanup; | ||
281 | |||
282 | /* Determine appropriate breakpoint contents and size for this address. */ | 299 | /* Determine appropriate breakpoint contents and size for this address. */ |
283 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | 300 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
284 | 301 | ||
285 | + /* Make sure we see the memory breakpoints. */ | 302 | + /* Make sure we see the memory breakpoints. */ |
286 | + cleanup = make_show_memory_breakpoints_cleanup (1); | 303 | + scoped_restore restore_memory |
304 | + = make_scoped_restore_show_memory_breakpoints (1); | ||
305 | + | ||
287 | val = target_read_memory (addr, old_contents, bplen); | 306 | val = target_read_memory (addr, old_contents, bplen); |
288 | 307 | ||
289 | /* If our breakpoint is no longer at the address, this means that the | 308 | /* If our breakpoint is no longer at the address, this means that the |
@@ -296,10 +315,8 @@ index 4e5f60cd4e..7ab650a1cc 100644 | |||
296 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); | 315 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); |
297 | + } | 316 | + } |
298 | 317 | ||
299 | + do_cleanups (cleanup); | ||
300 | return val; | 318 | return val; |
301 | } | 319 | } |
302 | |||
303 | @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info, | 320 | @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info, |
304 | /* Trampolines. */ | 321 | /* Trampolines. */ |
305 | tramp_frame_prepend_unwinder (gdbarch, | 322 | tramp_frame_prepend_unwinder (gdbarch, |
@@ -310,9 +327,9 @@ index 4e5f60cd4e..7ab650a1cc 100644 | |||
310 | + svr4_fetch_objfile_link_map); | 327 | + svr4_fetch_objfile_link_map); |
311 | } | 328 | } |
312 | 329 | ||
313 | void | 330 | void _initialize_microblaze_linux_tdep (); |
314 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | 331 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c |
315 | index 1248acbdc9..730a2b281f 100644 | 332 | index 5c804133040..5972a69eb5f 100644 |
316 | --- a/gdb/microblaze-tdep.c | 333 | --- a/gdb/microblaze-tdep.c |
317 | +++ b/gdb/microblaze-tdep.c | 334 | +++ b/gdb/microblaze-tdep.c |
318 | @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc) | 335 | @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc) |
@@ -329,7 +346,6 @@ index 1248acbdc9..730a2b281f 100644 | |||
329 | + int val; | 346 | + int val; |
330 | + int bplen; | 347 | + int bplen; |
331 | + gdb_byte old_contents[BREAKPOINT_MAX]; | 348 | + gdb_byte old_contents[BREAKPOINT_MAX]; |
332 | + struct cleanup *cleanup; | ||
333 | + | 349 | + |
334 | + /* Determine appropriate breakpoint contents and size for this address. */ | 350 | + /* Determine appropriate breakpoint contents and size for this address. */ |
335 | + bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | 351 | + bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
@@ -337,7 +353,9 @@ index 1248acbdc9..730a2b281f 100644 | |||
337 | + error (_("Software breakpoints not implemented for this target.")); | 353 | + error (_("Software breakpoints not implemented for this target.")); |
338 | + | 354 | + |
339 | + /* Make sure we see the memory breakpoints. */ | 355 | + /* Make sure we see the memory breakpoints. */ |
340 | + cleanup = make_show_memory_breakpoints_cleanup (1); | 356 | + scoped_restore restore_memory |
357 | + = make_scoped_restore_show_memory_breakpoints (1); | ||
358 | + | ||
341 | + val = target_read_memory (addr, old_contents, bplen); | 359 | + val = target_read_memory (addr, old_contents, bplen); |
342 | + | 360 | + |
343 | + /* If our breakpoint is no longer at the address, this means that the | 361 | + /* If our breakpoint is no longer at the address, this means that the |
@@ -349,7 +367,6 @@ index 1248acbdc9..730a2b281f 100644 | |||
349 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); | 367 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); |
350 | + } | 368 | + } |
351 | + | 369 | + |
352 | + do_cleanups (cleanup); | ||
353 | + return val; | 370 | + return val; |
354 | +} | 371 | +} |
355 | 372 | ||
@@ -363,14 +380,14 @@ index 1248acbdc9..730a2b281f 100644 | |||
363 | 380 | ||
364 | set_gdbarch_frame_args_skip (gdbarch, 8); | 381 | set_gdbarch_frame_args_skip (gdbarch, 8); |
365 | 382 | ||
366 | @@ -770,4 +802,5 @@ When non-zero, microblaze specific debugging is enabled."), | 383 | @@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."), |
367 | NULL, | 384 | NULL, |
368 | &setdebuglist, &showdebuglist); | 385 | &setdebuglist, &showdebuglist); |
369 | 386 | ||
370 | + | 387 | + |
371 | } | 388 | } |
372 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 389 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
373 | index a0048148e4..63aab84ef6 100644 | 390 | index 4fbdf9933f0..db0772643dc 100644 |
374 | --- a/gdb/microblaze-tdep.h | 391 | --- a/gdb/microblaze-tdep.h |
375 | +++ b/gdb/microblaze-tdep.h | 392 | +++ b/gdb/microblaze-tdep.h |
376 | @@ -117,6 +117,8 @@ struct microblaze_frame_cache | 393 | @@ -117,6 +117,8 @@ struct microblaze_frame_cache |
@@ -385,7 +402,7 @@ index a0048148e4..63aab84ef6 100644 | |||
385 | #endif /* microblaze-tdep.h */ | 402 | #endif /* microblaze-tdep.h */ |
386 | diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat | 403 | diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat |
387 | new file mode 100644 | 404 | new file mode 100644 |
388 | index 0000000000..bd8a438442 | 405 | index 00000000000..bd8a4384424 |
389 | --- /dev/null | 406 | --- /dev/null |
390 | +++ b/gdb/regformats/reg-microblaze.dat | 407 | +++ b/gdb/regformats/reg-microblaze.dat |
391 | @@ -0,0 +1,41 @@ | 408 | @@ -0,0 +1,41 @@ |
@@ -430,6 +447,54 @@ index 0000000000..bd8a438442 | |||
430 | +32:fsr | 447 | +32:fsr |
431 | +32:slr | 448 | +32:slr |
432 | +32:shr | 449 | +32:shr |
450 | diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in | ||
451 | index 9d7687be534..8195ccb8ad2 100644 | ||
452 | --- a/gdbserver/Makefile.in | ||
453 | +++ b/gdbserver/Makefile.in | ||
454 | @@ -183,6 +183,7 @@ SFILES = \ | ||
455 | $(srcdir)/linux-ia64-low.cc \ | ||
456 | $(srcdir)/linux-low.cc \ | ||
457 | $(srcdir)/linux-m68k-low.cc \ | ||
458 | + $(srcdir)/linux-microblaze-low.c \ | ||
459 | $(srcdir)/linux-mips-low.cc \ | ||
460 | $(srcdir)/linux-nios2-low.cc \ | ||
461 | $(srcdir)/linux-ppc-low.cc \ | ||
462 | @@ -216,6 +217,7 @@ SFILES = \ | ||
463 | $(srcdir)/../gdb/nat/linux-namespaces.c \ | ||
464 | $(srcdir)/../gdb/nat/linux-osdata.c \ | ||
465 | $(srcdir)/../gdb/nat/linux-personality.c \ | ||
466 | + $(srcdir)/../gdb/nat/microblaze-linux.c \ | ||
467 | $(srcdir)/../gdb/nat/mips-linux-watch.c \ | ||
468 | $(srcdir)/../gdb/nat/ppc-linux.c \ | ||
469 | $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \ | ||
470 | @@ -557,6 +559,8 @@ target/%.o: ../gdb/target/%.c | ||
471 | |||
472 | %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh) | ||
473 | $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@ | ||
474 | +microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh) | ||
475 | + $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c | ||
476 | |||
477 | # | ||
478 | # Dependency tracking. | ||
479 | diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv | ||
480 | index 5e33bd9c54d..13d5c6aff87 100644 | ||
481 | --- a/gdbserver/configure.srv | ||
482 | +++ b/gdbserver/configure.srv | ||
483 | @@ -155,6 +155,14 @@ case "${gdbserver_host}" in | ||
484 | srv_linux_usrregs=yes | ||
485 | srv_linux_thread_db=yes | ||
486 | ;; | ||
487 | + microblaze*-*-linux*) srv_regobj="microblaze-linux.o" | ||
488 | + srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | ||
489 | + srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | ||
490 | + srv_xmlfiles="microblaze-linux.xml" | ||
491 | + srv_linux_regsets=yes | ||
492 | + srv_linux_usrregs=yes | ||
493 | + srv_linux_thread_db=yes | ||
494 | + ;; | ||
495 | powerpc*-*-linux*) srv_regobj="powerpc-32l.o" | ||
496 | srv_regobj="${srv_regobj} powerpc-altivec32l.o" | ||
497 | srv_regobj="${srv_regobj} powerpc-vsx32l.o" | ||
433 | -- | 498 | -- |
434 | 2.17.1 | 499 | 2.17.1 |
435 | 500 | ||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch index e6bbf2b7..4eeeb7da 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Initial-port-of-core-reading-support.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch | |||
@@ -1,22 +1,22 @@ | |||
1 | From 0fd864ff792d7bcbbcbed5ee0ae9f429f1fd2353 Mon Sep 17 00:00:00 2001 | 1 | From b6c01467951b83f9cca621ffeb89151eba1d73a1 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 24 Jan 2017 14:55:56 +0530 | 3 | Date: Tue, 24 Jan 2017 14:55:56 +0530 |
4 | Subject: [PATCH 33/43] Initial port of core reading support Added support for | 4 | Subject: [PATCH 35/40] Initial port of core reading support Added support for |
5 | reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO | 5 | reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO |
6 | information for rebuilding ".reg" sections of core dumps at run time. | 6 | information for rebuilding ".reg" sections of core dumps at run time. |
7 | 7 | ||
8 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> | 8 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> |
9 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | 9 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> |
10 | --- | 10 | --- |
11 | bfd/elf32-microblaze.c | 84 ++++++++++++++++++++++++++++++++++ | 11 | bfd/elf32-microblaze.c | 84 +++++++++++++++++++++++++++++++++++++ |
12 | gdb/configure.tgt | 2 +- | 12 | gdb/configure.tgt | 2 +- |
13 | gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++ | 13 | gdb/microblaze-linux-tdep.c | 17 +++++++- |
14 | gdb/microblaze-tdep.c | 90 +++++++++++++++++++++++++++++++++++++ | 14 | gdb/microblaze-tdep.c | 48 +++++++++++++++++++++ |
15 | gdb/microblaze-tdep.h | 27 +++++++++++ | 15 | gdb/microblaze-tdep.h | 27 ++++++++++++ |
16 | 5 files changed, 259 insertions(+), 1 deletion(-) | 16 | 5 files changed, 176 insertions(+), 2 deletions(-) |
17 | 17 | ||
18 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 18 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
19 | index 6a795c5069..c280431df6 100644 | 19 | index bf09c68afd9..a4b15882d77 100644 |
20 | --- a/bfd/elf32-microblaze.c | 20 | --- a/bfd/elf32-microblaze.c |
21 | +++ b/bfd/elf32-microblaze.c | 21 | +++ b/bfd/elf32-microblaze.c |
22 | @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) | 22 | @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) |
@@ -107,7 +107,7 @@ index 6a795c5069..c280431df6 100644 | |||
107 | /* ELF linker hash entry. */ | 107 | /* ELF linker hash entry. */ |
108 | 108 | ||
109 | struct elf32_mb_link_hash_entry | 109 | struct elf32_mb_link_hash_entry |
110 | @@ -3672,4 +3753,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, | 110 | @@ -3574,4 +3655,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, |
111 | #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections | 111 | #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections |
112 | #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook | 112 | #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook |
113 | 113 | ||
@@ -116,10 +116,10 @@ index 6a795c5069..c280431df6 100644 | |||
116 | + | 116 | + |
117 | #include "elf32-target.h" | 117 | #include "elf32-target.h" |
118 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt | 118 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt |
119 | index 27f122ad04..622bd486b3 100644 | 119 | index d66f01bb9f7..2938fddfe82 100644 |
120 | --- a/gdb/configure.tgt | 120 | --- a/gdb/configure.tgt |
121 | +++ b/gdb/configure.tgt | 121 | +++ b/gdb/configure.tgt |
122 | @@ -397,7 +397,7 @@ mep-*-*) | 122 | @@ -389,7 +389,7 @@ mep-*-*) |
123 | 123 | ||
124 | microblaze*-linux-*|microblaze*-*-linux*) | 124 | microblaze*-linux-*|microblaze*-*-linux*) |
125 | # Target: Xilinx MicroBlaze running Linux | 125 | # Target: Xilinx MicroBlaze running Linux |
@@ -129,65 +129,34 @@ index 27f122ad04..622bd486b3 100644 | |||
129 | gdb_sim=../sim/microblaze/libsim.a | 129 | gdb_sim=../sim/microblaze/libsim.a |
130 | ;; | 130 | ;; |
131 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | 131 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c |
132 | index 7ab650a1cc..e2225d778a 100644 | 132 | index d15b24d619e..0d5c08d24f6 100644 |
133 | --- a/gdb/microblaze-linux-tdep.c | 133 | --- a/gdb/microblaze-linux-tdep.c |
134 | +++ b/gdb/microblaze-linux-tdep.c | 134 | +++ b/gdb/microblaze-linux-tdep.c |
135 | @@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame = | 135 | @@ -36,6 +36,7 @@ |
136 | #include "frame-unwind.h" | ||
137 | #include "tramp-frame.h" | ||
138 | #include "linux-tdep.h" | ||
139 | +#include "glibc-tdep.h" | ||
140 | |||
141 | static int microblaze_debug_flag = 0; | ||
142 | |||
143 | @@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame = | ||
136 | microblaze_linux_sighandler_cache_init | 144 | microblaze_linux_sighandler_cache_init |
137 | }; | 145 | }; |
138 | 146 | ||
139 | +const struct microblaze_gregset microblaze_linux_core_gregset; | 147 | - |
140 | + | ||
141 | +static void | ||
142 | +microblaze_linux_supply_core_gregset (const struct regset *regset, | ||
143 | + struct regcache *regcache, | ||
144 | + int regnum, const void *gregs, size_t len) | ||
145 | +{ | ||
146 | + microblaze_supply_gregset (µblaze_linux_core_gregset, regcache, | ||
147 | + regnum, gregs); | ||
148 | +} | ||
149 | + | ||
150 | +static void | ||
151 | +microblaze_linux_collect_core_gregset (const struct regset *regset, | ||
152 | + const struct regcache *regcache, | ||
153 | + int regnum, void *gregs, size_t len) | ||
154 | +{ | ||
155 | + microblaze_collect_gregset (µblaze_linux_core_gregset, regcache, | ||
156 | + regnum, gregs); | ||
157 | +} | ||
158 | + | ||
159 | +static void | ||
160 | +microblaze_linux_supply_core_fpregset (const struct regset *regset, | ||
161 | + struct regcache *regcache, | ||
162 | + int regnum, const void *fpregs, size_t len) | ||
163 | +{ | ||
164 | + /* FIXME. */ | ||
165 | + microblaze_supply_fpregset (regcache, regnum, fpregs); | ||
166 | +} | ||
167 | + | ||
168 | +static void | ||
169 | +microblaze_linux_collect_core_fpregset (const struct regset *regset, | ||
170 | + const struct regcache *regcache, | ||
171 | + int regnum, void *fpregs, size_t len) | ||
172 | +{ | ||
173 | + /* FIXME. */ | ||
174 | + microblaze_collect_fpregset (regcache, regnum, fpregs); | ||
175 | +} | ||
176 | |||
177 | static void | 148 | static void |
178 | microblaze_linux_init_abi (struct gdbarch_info info, | 149 | microblaze_linux_init_abi (struct gdbarch_info info, |
179 | struct gdbarch *gdbarch) | 150 | struct gdbarch *gdbarch) |
180 | { | 151 | { |
181 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | 152 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
182 | + | 153 | + |
183 | + tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset, | ||
184 | + microblaze_linux_collect_core_gregset); | ||
185 | + tdep->sizeof_gregset = 200; | 154 | + tdep->sizeof_gregset = 200; |
186 | + | 155 | + |
187 | linux_init_abi (info, gdbarch); | 156 | linux_init_abi (info, gdbarch); |
188 | 157 | ||
189 | set_gdbarch_memory_remove_breakpoint (gdbarch, | 158 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
190 | @@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info, | 159 | @@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info, |
191 | tramp_frame_prepend_unwinder (gdbarch, | 160 | tramp_frame_prepend_unwinder (gdbarch, |
192 | µblaze_linux_sighandler_tramp_frame); | 161 | µblaze_linux_sighandler_tramp_frame); |
193 | 162 | ||
@@ -202,109 +171,50 @@ index 7ab650a1cc..e2225d778a 100644 | |||
202 | + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | 171 | + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
203 | + set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); | 172 | + set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
204 | + | 173 | + |
205 | + set_gdbarch_regset_from_core_section (gdbarch, | ||
206 | + microblaze_regset_from_core_section); | ||
207 | + | ||
208 | /* Enable TLS support. */ | 174 | /* Enable TLS support. */ |
209 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | 175 | set_gdbarch_fetch_tls_load_module_address (gdbarch, |
210 | svr4_fetch_objfile_link_map); | 176 | svr4_fetch_objfile_link_map); |
211 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | 177 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c |
212 | index 730a2b281f..49713ea9b1 100644 | 178 | index 5972a69eb5f..7462a1f7ce6 100644 |
213 | --- a/gdb/microblaze-tdep.c | 179 | --- a/gdb/microblaze-tdep.c |
214 | +++ b/gdb/microblaze-tdep.c | 180 | +++ b/gdb/microblaze-tdep.c |
215 | @@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc) | 181 | @@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) |
216 | constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; | ||
217 | |||
218 | typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; | ||
219 | +static CORE_ADDR | ||
220 | +microblaze_store_arguments (struct regcache *regcache, int nargs, | ||
221 | + struct value **args, CORE_ADDR sp, | ||
222 | + int struct_return, CORE_ADDR struct_addr) | ||
223 | +{ | ||
224 | + error (_("store_arguments not implemented")); | ||
225 | + return sp; | ||
226 | +} | ||
227 | static int | ||
228 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
229 | struct bp_target_info *bp_tgt) | ||
230 | @@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame, | ||
231 | return cache->base; | ||
232 | } | ||
233 | |||
234 | +static const struct frame_unwind * | ||
235 | +microblaze_frame_sniffer (struct frame_info *next_frame) | ||
236 | +{ | ||
237 | + return µblaze_frame_unwind; | ||
238 | +} | ||
239 | + | ||
240 | static const struct frame_base microblaze_frame_base = | ||
241 | { | ||
242 | µblaze_frame_unwind, | ||
243 | @@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) | ||
244 | tdesc_microblaze_with_stack_protect); | 182 | tdesc_microblaze_with_stack_protect); |
245 | } | 183 | } |
246 | 184 | ||
247 | +void | 185 | +void |
248 | +microblaze_supply_gregset (const struct microblaze_gregset *gregset, | 186 | +microblaze_supply_gregset (const struct regset *regset, |
249 | + struct regcache *regcache, | 187 | + struct regcache *regcache, |
250 | + int regnum, const void *gregs) | 188 | + int regnum, const void *gregs) |
251 | +{ | 189 | +{ |
252 | + unsigned int *regs = gregs; | 190 | + const unsigned int *regs = (const unsigned int *)gregs; |
253 | + if (regnum >= 0) | 191 | + if (regnum >= 0) |
254 | + regcache_raw_supply (regcache, regnum, regs + regnum); | 192 | + regcache->raw_supply (regnum, regs + regnum); |
255 | + | 193 | + |
256 | + if (regnum == -1) { | 194 | + if (regnum == -1) { |
257 | + int i; | 195 | + int i; |
258 | + | 196 | + |
259 | + for (i = 0; i < 50; i++) { | 197 | + for (i = 0; i < 50; i++) { |
260 | + regcache_raw_supply (regcache, i, regs + i); | 198 | + regcache->raw_supply (i, regs + i); |
261 | + } | 199 | + } |
262 | + } | 200 | + } |
263 | +} | 201 | +} |
264 | + | 202 | + |
265 | + | 203 | + |
266 | +void | ||
267 | +microblaze_collect_gregset (const struct microblaze_gregset *gregset, | ||
268 | + const struct regcache *regcache, | ||
269 | + int regnum, void *gregs) | ||
270 | +{ | ||
271 | + /* FIXME. */ | ||
272 | +} | ||
273 | + | ||
274 | +void | ||
275 | +microblaze_supply_fpregset (struct regcache *regcache, | ||
276 | + int regnum, const void *fpregs) | ||
277 | +{ | ||
278 | + /* FIXME. */ | ||
279 | +} | ||
280 | + | ||
281 | +void | ||
282 | +microblaze_collect_fpregset (const struct regcache *regcache, | ||
283 | + int regnum, void *fpregs) | ||
284 | +{ | ||
285 | + /* FIXME. */ | ||
286 | +} | ||
287 | + | ||
288 | + | ||
289 | +/* Return the appropriate register set for the core section identified | 204 | +/* Return the appropriate register set for the core section identified |
290 | + by SECT_NAME and SECT_SIZE. */ | 205 | + by SECT_NAME and SECT_SIZE. */ |
291 | + | 206 | + |
292 | +const struct regset * | 207 | +static void |
293 | +microblaze_regset_from_core_section (struct gdbarch *gdbarch, | 208 | +microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, |
294 | + const char *sect_name, size_t sect_size) | 209 | + iterate_over_regset_sections_cb *cb, |
210 | + void *cb_data, | ||
211 | + const struct regcache *regcache) | ||
295 | +{ | 212 | +{ |
296 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | 213 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
297 | + | 214 | + |
298 | + microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name); | 215 | + cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); |
299 | + | ||
300 | + if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) | ||
301 | + return tdep->gregset; | ||
302 | + | ||
303 | + if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) | ||
304 | + return tdep->fpregset; | ||
305 | + | 216 | + |
306 | + microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n"); | 217 | + cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); |
307 | + return NULL; | ||
308 | +} | 218 | +} |
309 | + | 219 | + |
310 | + | 220 | + |
@@ -312,7 +222,7 @@ index 730a2b281f..49713ea9b1 100644 | |||
312 | static struct gdbarch * | 222 | static struct gdbarch * |
313 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 223 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
314 | { | 224 | { |
315 | @@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 225 | @@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
316 | tdep = XCNEW (struct gdbarch_tdep); | 226 | tdep = XCNEW (struct gdbarch_tdep); |
317 | gdbarch = gdbarch_alloc (&info, tdep); | 227 | gdbarch = gdbarch_alloc (&info, tdep); |
318 | 228 | ||
@@ -323,7 +233,7 @@ index 730a2b281f..49713ea9b1 100644 | |||
323 | set_gdbarch_long_double_bit (gdbarch, 128); | 233 | set_gdbarch_long_double_bit (gdbarch, 128); |
324 | 234 | ||
325 | set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); | 235 | set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); |
326 | @@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 236 | @@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
327 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); | 237 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
328 | if (tdesc_data != NULL) | 238 | if (tdesc_data != NULL) |
329 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | 239 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); |
@@ -331,14 +241,14 @@ index 730a2b281f..49713ea9b1 100644 | |||
331 | + | 241 | + |
332 | + /* If we have register sets, enable the generic core file support. */ | 242 | + /* If we have register sets, enable the generic core file support. */ |
333 | + if (tdep->gregset) { | 243 | + if (tdep->gregset) { |
334 | + set_gdbarch_regset_from_core_section (gdbarch, | 244 | + set_gdbarch_iterate_over_regset_sections (gdbarch, |
335 | + microblaze_regset_from_core_section); | 245 | + microblaze_iterate_over_regset_sections); |
336 | + } | 246 | + } |
337 | 247 | ||
338 | return gdbarch; | 248 | return gdbarch; |
339 | } | 249 | } |
340 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 250 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
341 | index 63aab84ef6..02650f61d9 100644 | 251 | index db0772643dc..8f41ba19351 100644 |
342 | --- a/gdb/microblaze-tdep.h | 252 | --- a/gdb/microblaze-tdep.h |
343 | +++ b/gdb/microblaze-tdep.h | 253 | +++ b/gdb/microblaze-tdep.h |
344 | @@ -22,8 +22,22 @@ | 254 | @@ -22,8 +22,22 @@ |
@@ -368,10 +278,10 @@ index 63aab84ef6..02650f61d9 100644 | |||
368 | #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} | 278 | #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} |
369 | #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} | 279 | #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} |
370 | 280 | ||
371 | +extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset, | 281 | +extern void microblaze_supply_gregset (const struct regset *regset, |
372 | + struct regcache *regcache, | 282 | + struct regcache *regcache, |
373 | + int regnum, const void *gregs); | 283 | + int regnum, const void *gregs); |
374 | +extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset, | 284 | +extern void microblaze_collect_gregset (const struct regset *regset, |
375 | + const struct regcache *regcache, | 285 | + const struct regcache *regcache, |
376 | + int regnum, void *gregs); | 286 | + int regnum, void *gregs); |
377 | +extern void microblaze_supply_fpregset (struct regcache *regcache, | 287 | +extern void microblaze_supply_fpregset (struct regcache *regcache, |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch deleted file mode 100644 index ddb53a07..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0035-revert-master-rebase-changes-to-gdbserver.patch +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | From 1c5dbbd272854e6e7912e2602bdfd78b64399319 Mon Sep 17 00:00:00 2001 | ||
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
3 | Date: Mon, 22 Jul 2013 11:16:05 +1000 | ||
4 | Subject: [PATCH 35/43] revert master-rebase changes to gdbserver | ||
5 | |||
6 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
7 | --- | ||
8 | gdb/gdbserver/configure.srv | 7 +++++++ | ||
9 | 1 file changed, 7 insertions(+) | ||
10 | |||
11 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | ||
12 | index d19d22b3a3..7a0be5b072 100644 | ||
13 | --- a/gdb/gdbserver/configure.srv | ||
14 | +++ b/gdb/gdbserver/configure.srv | ||
15 | @@ -210,6 +210,13 @@ case "${target}" in | ||
16 | srv_linux_usrregs=yes | ||
17 | srv_linux_thread_db=yes | ||
18 | ;; | ||
19 | + microblaze*-*-linux*) srv_regobj=microblaze-linux.o | ||
20 | + srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | ||
21 | + srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | ||
22 | + srv_linux_regsets=yes | ||
23 | + srv_linux_usrregs=yes | ||
24 | + srv_linux_thread_db=yes | ||
25 | + ;; | ||
26 | powerpc*-*-linux*) srv_regobj="powerpc-32l.o" | ||
27 | srv_regobj="${srv_regobj} powerpc-altivec32l.o" | ||
28 | srv_regobj="${srv_regobj} powerpc-cell32l.o" | ||
29 | -- | ||
30 | 2.17.1 | ||
31 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch index df5b3db3..79d08da9 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Fix-debug-message-when-register-is-unavailable.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From e44a27432ce56bb48eb9785ffaae14bc3a12bd27 Mon Sep 17 00:00:00 2001 | 1 | From dc76254a84fa1086983aefe9db4d8f94b42efb9b Mon Sep 17 00:00:00 2001 |
2 | From: Nathan Rossi <nathan.rossi@petalogix.com> | 2 | From: Nathan Rossi <nathan.rossi@petalogix.com> |
3 | Date: Tue, 8 May 2012 18:11:17 +1000 | 3 | Date: Tue, 8 May 2012 18:11:17 +1000 |
4 | Subject: [PATCH 34/43] Fix debug message when register is unavailable | 4 | Subject: [PATCH 36/40] Fix debug message when register is unavailable |
5 | 5 | ||
6 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | 6 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> |
7 | --- | 7 | --- |
@@ -9,10 +9,10 @@ Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | |||
9 | 1 file changed, 10 insertions(+), 3 deletions(-) | 9 | 1 file changed, 10 insertions(+), 3 deletions(-) |
10 | 10 | ||
11 | diff --git a/gdb/frame.c b/gdb/frame.c | 11 | diff --git a/gdb/frame.c b/gdb/frame.c |
12 | index d8b5f819f1..49706dc97c 100644 | 12 | index ff27b9f00e9..bf931b370c9 100644 |
13 | --- a/gdb/frame.c | 13 | --- a/gdb/frame.c |
14 | +++ b/gdb/frame.c | 14 | +++ b/gdb/frame.c |
15 | @@ -1227,12 +1227,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum) | 15 | @@ -1263,12 +1263,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum) |
16 | else | 16 | else |
17 | { | 17 | { |
18 | int i; | 18 | int i; |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch deleted file mode 100644 index f2e5e951..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | From bd55e11af18006afb87a8b0fbd93bb0920354e0e Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Mon, 30 Apr 2018 17:09:55 +0530 | ||
4 | Subject: [PATCH 36/43] revert master-rebase changes to gdbserver , previous | ||
5 | commit typo's | ||
6 | |||
7 | --- | ||
8 | gdb/gdbserver/Makefile.in | 2 ++ | ||
9 | 1 file changed, 2 insertions(+) | ||
10 | |||
11 | diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in | ||
12 | index 4ae13692a2..45d95e6cab 100644 | ||
13 | --- a/gdb/gdbserver/Makefile.in | ||
14 | +++ b/gdb/gdbserver/Makefile.in | ||
15 | @@ -169,6 +169,7 @@ SFILES = \ | ||
16 | $(srcdir)/linux-low.c \ | ||
17 | $(srcdir)/linux-m32r-low.c \ | ||
18 | $(srcdir)/linux-m68k-low.c \ | ||
19 | + $(srcdir)/linux-microblaze-low.c \ | ||
20 | $(srcdir)/linux-mips-low.c \ | ||
21 | $(srcdir)/linux-nios2-low.c \ | ||
22 | $(srcdir)/linux-ppc-low.c \ | ||
23 | @@ -226,6 +227,7 @@ SFILES = \ | ||
24 | $(srcdir)/nat/linux-osdata.c \ | ||
25 | $(srcdir)/nat/linux-personality.c \ | ||
26 | $(srcdir)/nat/mips-linux-watch.c \ | ||
27 | + $(srcdir)/nat/microblaze-linux.c \ | ||
28 | $(srcdir)/nat/ppc-linux.c \ | ||
29 | $(srcdir)/nat/fork-inferior.c \ | ||
30 | $(srcdir)/target/waitstatus.c | ||
31 | -- | ||
32 | 2.17.1 | ||
33 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch index e2b601b6..80b70fcc 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 988a9a41ac91ce3293af8708c1c88c51c48a2a72 Mon Sep 17 00:00:00 2001 | 1 | From 23376adc47cf72e46a1edf99e7fbc40164d39cd6 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | 2 | From: David Holsgrove <david.holsgrove@xilinx.com> |
3 | Date: Mon, 16 Dec 2013 16:37:32 +1000 | 3 | Date: Mon, 16 Dec 2013 16:37:32 +1000 |
4 | Subject: [PATCH 37/43] microblaze: Add build_gdbserver=yes to top level | 4 | Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level |
5 | configure.tgt | 5 | configure.tgt |
6 | 6 | ||
7 | For Microblaze linux toolchains, set the build_gdbserver=yes | 7 | For Microblaze linux toolchains, set the build_gdbserver=yes |
@@ -16,10 +16,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
16 | 1 file changed, 1 insertion(+) | 16 | 1 file changed, 1 insertion(+) |
17 | 17 | ||
18 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt | 18 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt |
19 | index 622bd486b3..989523735b 100644 | 19 | index 2938fddfe82..ac2d35a9917 100644 |
20 | --- a/gdb/configure.tgt | 20 | --- a/gdb/configure.tgt |
21 | +++ b/gdb/configure.tgt | 21 | +++ b/gdb/configure.tgt |
22 | @@ -405,6 +405,7 @@ microblaze*-*-*) | 22 | @@ -397,6 +397,7 @@ microblaze*-*-*) |
23 | # Target: Xilinx MicroBlaze running standalone | 23 | # Target: Xilinx MicroBlaze running standalone |
24 | gdb_target_obs="microblaze-tdep.o" | 24 | gdb_target_obs="microblaze-tdep.o" |
25 | gdb_sim=../sim/microblaze/libsim.a | 25 | gdb_sim=../sim/microblaze/libsim.a |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch index 1a50f0a6..9360bc5a 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch | |||
@@ -1,62 +1,43 @@ | |||
1 | From aa9cb6db79c663dc944cb67928d16e63f2a69f74 Mon Sep 17 00:00:00 2001 | 1 | From f34017e4cec8ad571accfd964187ab1f2db8de7f Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@petalogix.com> | 2 | From: David Holsgrove <david.holsgrove@petalogix.com> |
3 | Date: Fri, 20 Jul 2012 15:18:35 +1000 | 3 | Date: Fri, 20 Jul 2012 15:18:35 +1000 |
4 | Subject: [PATCH 38/43] Initial support for native gdb | 4 | Subject: [PATCH 38/40] Initial support for native gdb |
5 | 5 | ||
6 | microblaze: Follow PPC method of getting setting registers | 6 | microblaze: Follow PPC method of getting setting registers |
7 | using PTRACE PEEK/POKE | 7 | using PTRACE PEEK/POKE |
8 | 8 | ||
9 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> | 9 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> |
10 | |||
11 | Conflicts: | ||
12 | gdb/Makefile.in | ||
13 | --- | 10 | --- |
14 | gdb/Makefile.in | 4 +- | 11 | gdb/Makefile.in | 2 + |
15 | gdb/config/microblaze/linux.mh | 9 + | 12 | gdb/config/microblaze/linux.mh | 9 + |
16 | gdb/microblaze-linux-nat.c | 431 +++++++++++++++++++++++++++++++++ | 13 | gdb/microblaze-linux-nat.c | 431 +++++++++++++++++++++++++++++++++ |
17 | 3 files changed, 443 insertions(+), 1 deletion(-) | 14 | 3 files changed, 442 insertions(+) |
18 | create mode 100644 gdb/config/microblaze/linux.mh | 15 | create mode 100644 gdb/config/microblaze/linux.mh |
19 | create mode 100644 gdb/microblaze-linux-nat.c | 16 | create mode 100644 gdb/microblaze-linux-nat.c |
20 | 17 | ||
21 | diff --git a/gdb/Makefile.in b/gdb/Makefile.in | 18 | diff --git a/gdb/Makefile.in b/gdb/Makefile.in |
22 | index 215ef7933c..8c9a3c07c0 100644 | 19 | index 9ae9fe2d1e1..a44464b9830 100644 |
23 | --- a/gdb/Makefile.in | 20 | --- a/gdb/Makefile.in |
24 | +++ b/gdb/Makefile.in | 21 | +++ b/gdb/Makefile.in |
25 | @@ -1316,6 +1316,7 @@ HFILES_NO_SRCDIR = \ | 22 | @@ -1328,6 +1328,7 @@ HFILES_NO_SRCDIR = \ |
26 | memory-map.h \ | 23 | memory-map.h \ |
27 | memrange.h \ | 24 | memrange.h \ |
28 | microblaze-tdep.h \ | 25 | microblaze-tdep.h \ |
29 | + microblaze-linux-tdep.h \ | 26 | + microblaze-linux-tdep.h \ |
30 | mips-linux-tdep.h \ | 27 | mips-linux-tdep.h \ |
31 | mips-nbsd-tdep.h \ | 28 | mips-nbsd-tdep.h \ |
32 | mips-tdep.h \ | 29 | mips-tdep.h \ |
33 | @@ -1349,6 +1350,7 @@ HFILES_NO_SRCDIR = \ | 30 | @@ -2207,6 +2208,7 @@ ALLDEPFILES = \ |
34 | prologue-value.h \ | ||
35 | psympriv.h \ | ||
36 | psymtab.h \ | ||
37 | + ia64-hpux-tdep.h \ | ||
38 | ravenscar-thread.h \ | ||
39 | record.h \ | ||
40 | record-full.h \ | ||
41 | @@ -2263,6 +2265,7 @@ ALLDEPFILES = \ | ||
42 | m68k-tdep.c \ | 31 | m68k-tdep.c \ |
43 | microblaze-linux-tdep.c \ | 32 | microblaze-linux-tdep.c \ |
44 | microblaze-tdep.c \ | 33 | microblaze-tdep.c \ |
45 | + microblaze-linux-nat.c \ | 34 | + microblaze-linux-nat.c \ |
46 | mingw-hdep.c \ | 35 | mingw-hdep.c \ |
47 | mips-fbsd-nat.c \ | 36 | mips-fbsd-nat.c \ |
48 | mips-fbsd-tdep.c \ | 37 | mips-fbsd-tdep.c \ |
49 | @@ -2365,7 +2368,6 @@ ALLDEPFILES = \ | ||
50 | xtensa-linux-tdep.c \ | ||
51 | xtensa-tdep.c \ | ||
52 | xtensa-xtregs.c \ | ||
53 | - common/mingw-strerror.c \ | ||
54 | common/posix-strerror.c | ||
55 | |||
56 | # Some files need explicit build rules (due to -Werror problems) or due | ||
57 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh | 38 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh |
58 | new file mode 100644 | 39 | new file mode 100644 |
59 | index 0000000000..a4eaf540e1 | 40 | index 00000000000..a4eaf540e1d |
60 | --- /dev/null | 41 | --- /dev/null |
61 | +++ b/gdb/config/microblaze/linux.mh | 42 | +++ b/gdb/config/microblaze/linux.mh |
62 | @@ -0,0 +1,9 @@ | 43 | @@ -0,0 +1,9 @@ |
@@ -71,7 +52,7 @@ index 0000000000..a4eaf540e1 | |||
71 | +LOADLIBES = -ldl $(RDYNAMIC) | 52 | +LOADLIBES = -ldl $(RDYNAMIC) |
72 | diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c | 53 | diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c |
73 | new file mode 100644 | 54 | new file mode 100644 |
74 | index 0000000000..e9b8c9c522 | 55 | index 00000000000..e9b8c9c5221 |
75 | --- /dev/null | 56 | --- /dev/null |
76 | +++ b/gdb/microblaze-linux-nat.c | 57 | +++ b/gdb/microblaze-linux-nat.c |
77 | @@ -0,0 +1,431 @@ | 58 | @@ -0,0 +1,431 @@ |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch index 0b1475a7..136291f2 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch | |||
@@ -1,20 +1,19 @@ | |||
1 | From 0b5b76d6c9757ebb1c9677772c24272957190345 Mon Sep 17 00:00:00 2001 | 1 | From 1a493a6fc3bebb50d9679a4d11709676f933ab04 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 17 Feb 2017 14:09:40 +0530 | 3 | Date: Fri, 17 Feb 2017 14:09:40 +0530 |
4 | Subject: [PATCH 39/43] Fixing the issues related to GDB-7.12 added all the | 4 | Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12 |
5 | required function which are new in 7.12 and removed few deprecated functions | ||
6 | from 7.6 | ||
7 | 5 | ||
6 | added all the required function which are new in 7.12 and removed | ||
7 | few deprecated functions from 7.6 | ||
8 | --- | 8 | --- |
9 | gdb/config/microblaze/linux.mh | 4 +- | 9 | gdb/config/microblaze/linux.mh | 4 +- |
10 | gdb/gdbserver/configure.srv | 3 +- | ||
11 | gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++---- | 10 | gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++---- |
12 | gdb/microblaze-linux-tdep.c | 68 +++++++++++++++++-- | ||
13 | gdb/microblaze-tdep.h | 1 + | 11 | gdb/microblaze-tdep.h | 1 + |
14 | 5 files changed, 153 insertions(+), 20 deletions(-) | 12 | gdbserver/configure.srv | 3 +- |
13 | 4 files changed, 89 insertions(+), 16 deletions(-) | ||
15 | 14 | ||
16 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh | 15 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh |
17 | index a4eaf540e1..74a53b854a 100644 | 16 | index a4eaf540e1d..74a53b854a4 100644 |
18 | --- a/gdb/config/microblaze/linux.mh | 17 | --- a/gdb/config/microblaze/linux.mh |
19 | +++ b/gdb/config/microblaze/linux.mh | 18 | +++ b/gdb/config/microblaze/linux.mh |
20 | @@ -1,9 +1,11 @@ | 19 | @@ -1,9 +1,11 @@ |
@@ -30,22 +29,8 @@ index a4eaf540e1..74a53b854a 100644 | |||
30 | NAT_CDEPS = $(srcdir)/proc-service.list | 29 | NAT_CDEPS = $(srcdir)/proc-service.list |
31 | 30 | ||
32 | LOADLIBES = -ldl $(RDYNAMIC) | 31 | LOADLIBES = -ldl $(RDYNAMIC) |
33 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | ||
34 | index 7a0be5b072..c421790bd0 100644 | ||
35 | --- a/gdb/gdbserver/configure.srv | ||
36 | +++ b/gdb/gdbserver/configure.srv | ||
37 | @@ -211,8 +211,7 @@ case "${target}" in | ||
38 | srv_linux_thread_db=yes | ||
39 | ;; | ||
40 | microblaze*-*-linux*) srv_regobj=microblaze-linux.o | ||
41 | - srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | ||
42 | - srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | ||
43 | + srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " | ||
44 | srv_linux_regsets=yes | ||
45 | srv_linux_usrregs=yes | ||
46 | srv_linux_thread_db=yes | ||
47 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c | 32 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c |
48 | index cba5d6fc58..a2733f3c21 100644 | 33 | index cba5d6fc585..a2733f3c21c 100644 |
49 | --- a/gdb/gdbserver/linux-microblaze-low.c | 34 | --- a/gdb/gdbserver/linux-microblaze-low.c |
50 | +++ b/gdb/gdbserver/linux-microblaze-low.c | 35 | +++ b/gdb/gdbserver/linux-microblaze-low.c |
51 | @@ -39,10 +39,11 @@ static int microblaze_regmap[] = | 36 | @@ -39,10 +39,11 @@ static int microblaze_regmap[] = |
@@ -200,100 +185,8 @@ index cba5d6fc58..a2733f3c21 100644 | |||
200 | +{ | 185 | +{ |
201 | + init_registers_microblaze (); | 186 | + init_registers_microblaze (); |
202 | +} | 187 | +} |
203 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
204 | index e2225d778a..011e513941 100644 | ||
205 | --- a/gdb/microblaze-linux-tdep.c | ||
206 | +++ b/gdb/microblaze-linux-tdep.c | ||
207 | @@ -29,13 +29,76 @@ | ||
208 | #include "regcache.h" | ||
209 | #include "value.h" | ||
210 | #include "osabi.h" | ||
211 | -#include "regset.h" | ||
212 | #include "solib-svr4.h" | ||
213 | #include "microblaze-tdep.h" | ||
214 | #include "trad-frame.h" | ||
215 | #include "frame-unwind.h" | ||
216 | #include "tramp-frame.h" | ||
217 | #include "linux-tdep.h" | ||
218 | +#include "glibc-tdep.h" | ||
219 | + | ||
220 | +#include "gdb_assert.h" | ||
221 | + | ||
222 | +#ifndef REGSET_H | ||
223 | +#define REGSET_H 1 | ||
224 | + | ||
225 | +struct gdbarch; | ||
226 | +struct regcache; | ||
227 | + | ||
228 | +/* Data structure for the supported register notes in a core file. */ | ||
229 | +struct core_regset_section | ||
230 | +{ | ||
231 | + const char *sect_name; | ||
232 | + int size; | ||
233 | + const char *human_name; | ||
234 | +}; | ||
235 | + | ||
236 | +/* Data structure describing a register set. */ | ||
237 | + | ||
238 | +typedef void (supply_regset_ftype) (const struct regset *, struct regcache *, | ||
239 | + int, const void *, size_t); | ||
240 | +typedef void (collect_regset_ftype) (const struct regset *, | ||
241 | + const struct regcache *, | ||
242 | + int, void *, size_t); | ||
243 | + | ||
244 | +struct regset | ||
245 | +{ | ||
246 | + /* Data pointer for private use by the methods below, presumably | ||
247 | + providing some sort of description of the register set. */ | ||
248 | + const void *descr; | ||
249 | + | ||
250 | + /* Function supplying values in a register set to a register cache. */ | ||
251 | + supply_regset_ftype *supply_regset; | ||
252 | + | ||
253 | + /* Function collecting values in a register set from a register cache. */ | ||
254 | + collect_regset_ftype *collect_regset; | ||
255 | + | ||
256 | + /* Architecture associated with the register set. */ | ||
257 | + struct gdbarch *arch; | ||
258 | +}; | ||
259 | + | ||
260 | +#endif | ||
261 | + | ||
262 | +/* Allocate a fresh 'struct regset' whose supply_regset function is | ||
263 | + SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET. | ||
264 | + If the regset has no collect_regset function, pass NULL for | ||
265 | + COLLECT_REGSET. | ||
266 | + | ||
267 | + The object returned is allocated on ARCH's obstack. */ | ||
268 | + | ||
269 | +struct regset * | ||
270 | +regset_alloc (struct gdbarch *arch, | ||
271 | + supply_regset_ftype *supply_regset, | ||
272 | + collect_regset_ftype *collect_regset) | ||
273 | +{ | ||
274 | + struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset); | ||
275 | + | ||
276 | + regset->arch = arch; | ||
277 | + regset->supply_regset = supply_regset; | ||
278 | + regset->collect_regset = collect_regset; | ||
279 | + | ||
280 | + return regset; | ||
281 | +} | ||
282 | |||
283 | static int microblaze_debug_flag = 0; | ||
284 | |||
285 | @@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
286 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | ||
287 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); | ||
288 | |||
289 | - set_gdbarch_regset_from_core_section (gdbarch, | ||
290 | - microblaze_regset_from_core_section); | ||
291 | - | ||
292 | /* Enable TLS support. */ | ||
293 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | ||
294 | svr4_fetch_objfile_link_map); | ||
295 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 188 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
296 | index 02650f61d9..3777cbb6a8 100644 | 189 | index 8f41ba19351..d2112dc07e1 100644 |
297 | --- a/gdb/microblaze-tdep.h | 190 | --- a/gdb/microblaze-tdep.h |
298 | +++ b/gdb/microblaze-tdep.h | 191 | +++ b/gdb/microblaze-tdep.h |
299 | @@ -24,6 +24,7 @@ | 192 | @@ -24,6 +24,7 @@ |
@@ -304,6 +197,20 @@ index 02650f61d9..3777cbb6a8 100644 | |||
304 | unsigned int gregs[32]; | 197 | unsigned int gregs[32]; |
305 | unsigned int fpregs[32]; | 198 | unsigned int fpregs[32]; |
306 | unsigned int pregs[16]; | 199 | unsigned int pregs[16]; |
200 | diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv | ||
201 | index 13d5c6aff87..ff9ada71b0d 100644 | ||
202 | --- a/gdbserver/configure.srv | ||
203 | +++ b/gdbserver/configure.srv | ||
204 | @@ -156,8 +156,7 @@ case "${gdbserver_host}" in | ||
205 | srv_linux_thread_db=yes | ||
206 | ;; | ||
207 | microblaze*-*-linux*) srv_regobj="microblaze-linux.o" | ||
208 | - srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | ||
209 | - srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | ||
210 | + srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " | ||
211 | srv_xmlfiles="microblaze-linux.xml" | ||
212 | srv_linux_regsets=yes | ||
213 | srv_linux_usrregs=yes | ||
307 | -- | 214 | -- |
308 | 2.17.1 | 215 | 2.17.1 |
309 | 216 | ||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch index 6582af01..1dc6b695 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch | |||
@@ -1,37 +1,33 @@ | |||
1 | From 34e572e123b166122cc54a8d8e66676c36515711 Mon Sep 17 00:00:00 2001 | 1 | From 928d8d1f05274ab6029e4da7d659312c769beded Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Thu, 31 Jan 2019 14:36:00 +0530 | 3 | Date: Thu, 31 Jan 2019 14:36:00 +0530 |
4 | Subject: [PATCH 40/43] [Patch, microblaze]: Adding 64 bit MB support Added new | 4 | Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support |
5 | architecture to Microblaze 64-bit support to GDB Signed-off-by :Nagaraju | ||
6 | Mekala <nmekala@xilix.com> | ||
7 | 5 | ||
8 | Merged on top of binutils work. | 6 | Added new architecture to Microblaze 64-bit support to GDB |
9 | 7 | ||
10 | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | 8 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
11 | --- | 9 | --- |
12 | bfd/archures.c | 2 + | 10 | bfd/archures.c | 2 + |
13 | bfd/bfd-in2.h | 2 + | 11 | bfd/bfd-in2.h | 2 + |
14 | bfd/cpu-microblaze.c | 12 +- | 12 | bfd/cpu-microblaze.c | 16 +- |
15 | bfd/elf32-microblaze.c | 93 +------- | 13 | bfd/elf32-microblaze.c | 9 + |
16 | gas/config/tc-microblaze.c | 16 +- | 14 | gas/config/tc-microblaze.c | 14 ++ |
17 | gas/config/tc-microblaze.h | 4 + | 15 | gas/config/tc-microblaze.h | 4 + |
18 | gdb/Makefile.in | 2 +- | ||
19 | gdb/features/Makefile | 3 + | 16 | gdb/features/Makefile | 3 + |
20 | gdb/features/microblaze-core.xml | 6 +- | 17 | gdb/features/microblaze-core.xml | 6 +- |
21 | gdb/features/microblaze-stack-protect.xml | 4 +- | 18 | gdb/features/microblaze-with-stack-protect.c | 4 +- |
22 | gdb/features/microblaze-with-stack-protect.c | 8 +- | ||
23 | gdb/features/microblaze.c | 6 +- | 19 | gdb/features/microblaze.c | 6 +- |
24 | gdb/features/microblaze64-core.xml | 69 ++++++ | 20 | gdb/features/microblaze64-core.xml | 69 +++++++ |
25 | gdb/features/microblaze64-stack-protect.xml | 12 + | 21 | gdb/features/microblaze64-stack-protect.xml | 12 ++ |
26 | .../microblaze64-with-stack-protect.c | 79 +++++++ | 22 | .../microblaze64-with-stack-protect.c | 79 ++++++++ |
27 | .../microblaze64-with-stack-protect.xml | 12 + | 23 | .../microblaze64-with-stack-protect.xml | 12 ++ |
28 | gdb/features/microblaze64.c | 77 +++++++ | 24 | gdb/features/microblaze64.c | 77 ++++++++ |
29 | gdb/features/microblaze64.xml | 11 + | 25 | gdb/features/microblaze64.xml | 11 ++ |
30 | gdb/microblaze-tdep.c | 207 ++++++++++++++++-- | 26 | gdb/microblaze-linux-tdep.c | 29 ++- |
31 | gdb/microblaze-tdep.h | 8 +- | 27 | gdb/microblaze-tdep.c | 176 ++++++++++++++++-- |
28 | gdb/microblaze-tdep.h | 9 +- | ||
32 | .../microblaze-with-stack-protect.dat | 4 +- | 29 | .../microblaze-with-stack-protect.dat | 4 +- |
33 | opcodes/microblaze-opc.h | 1 - | 30 | 20 files changed, 504 insertions(+), 40 deletions(-) |
34 | 22 files changed, 504 insertions(+), 134 deletions(-) | ||
35 | create mode 100644 gdb/features/microblaze64-core.xml | 31 | create mode 100644 gdb/features/microblaze64-core.xml |
36 | create mode 100644 gdb/features/microblaze64-stack-protect.xml | 32 | create mode 100644 gdb/features/microblaze64-stack-protect.xml |
37 | create mode 100644 gdb/features/microblaze64-with-stack-protect.c | 33 | create mode 100644 gdb/features/microblaze64-with-stack-protect.c |
@@ -40,10 +36,10 @@ Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | |||
40 | create mode 100644 gdb/features/microblaze64.xml | 36 | create mode 100644 gdb/features/microblaze64.xml |
41 | 37 | ||
42 | diff --git a/bfd/archures.c b/bfd/archures.c | 38 | diff --git a/bfd/archures.c b/bfd/archures.c |
43 | index 647cf0d8d4..3fdf7c3c0e 100644 | 39 | index 551ec8732f0..627d81261da 100644 |
44 | --- a/bfd/archures.c | 40 | --- a/bfd/archures.c |
45 | +++ b/bfd/archures.c | 41 | +++ b/bfd/archures.c |
46 | @@ -512,6 +512,8 @@ DESCRIPTION | 42 | @@ -522,6 +522,8 @@ DESCRIPTION |
47 | . bfd_arch_lm32, {* Lattice Mico32. *} | 43 | . bfd_arch_lm32, {* Lattice Mico32. *} |
48 | .#define bfd_mach_lm32 1 | 44 | .#define bfd_mach_lm32 1 |
49 | . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} | 45 | . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} |
@@ -53,10 +49,10 @@ index 647cf0d8d4..3fdf7c3c0e 100644 | |||
53 | . bfd_arch_tilegx, {* Tilera TILE-Gx. *} | 49 | . bfd_arch_tilegx, {* Tilera TILE-Gx. *} |
54 | .#define bfd_mach_tilepro 1 | 50 | .#define bfd_mach_tilepro 1 |
55 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 51 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
56 | index 33c9cb62d9..db624c62b9 100644 | 52 | index 8902d9c7939..0e5071c235d 100644 |
57 | --- a/bfd/bfd-in2.h | 53 | --- a/bfd/bfd-in2.h |
58 | +++ b/bfd/bfd-in2.h | 54 | +++ b/bfd/bfd-in2.h |
59 | @@ -2411,6 +2411,8 @@ enum bfd_architecture | 55 | @@ -1922,6 +1922,8 @@ enum bfd_architecture |
60 | bfd_arch_lm32, /* Lattice Mico32. */ | 56 | bfd_arch_lm32, /* Lattice Mico32. */ |
61 | #define bfd_mach_lm32 1 | 57 | #define bfd_mach_lm32 1 |
62 | bfd_arch_microblaze,/* Xilinx MicroBlaze. */ | 58 | bfd_arch_microblaze,/* Xilinx MicroBlaze. */ |
@@ -66,7 +62,7 @@ index 33c9cb62d9..db624c62b9 100644 | |||
66 | bfd_arch_tilegx, /* Tilera TILE-Gx. */ | 62 | bfd_arch_tilegx, /* Tilera TILE-Gx. */ |
67 | #define bfd_mach_tilepro 1 | 63 | #define bfd_mach_tilepro 1 |
68 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c | 64 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c |
69 | index c91ba46f75..8e7bcead28 100644 | 65 | index f94dc2c177b..4dbc149155e 100644 |
70 | --- a/bfd/cpu-microblaze.c | 66 | --- a/bfd/cpu-microblaze.c |
71 | +++ b/bfd/cpu-microblaze.c | 67 | +++ b/bfd/cpu-microblaze.c |
72 | @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 68 | @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
@@ -80,16 +76,23 @@ index c91ba46f75..8e7bcead28 100644 | |||
80 | "microblaze", /* Architecture name. */ | 76 | "microblaze", /* Architecture name. */ |
81 | "MicroBlaze", /* Printable name. */ | 77 | "MicroBlaze", /* Printable name. */ |
82 | 3, /* Section align power. */ | 78 | 3, /* Section align power. */ |
83 | @@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 79 | @@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
84 | 32, /* 32 bits in an address. */ | 80 | 0 /* Maximum offset of a reloc from the start of an insn. */ |
85 | 8, /* 8 bits in a byte. */ | 81 | }, |
86 | bfd_arch_microblaze, /* Architecture. */ | 82 | { |
83 | - 32, /* Bits in a word. */ | ||
84 | - 32, /* Bits in an address. */ | ||
85 | - 8, /* Bits in a byte. */ | ||
86 | + 32, /* 32 bits in a word. */ | ||
87 | + 32, /* 32 bits in an address. */ | ||
88 | + 8, /* 8 bits in a byte. */ | ||
89 | bfd_arch_microblaze, /* Architecture number. */ | ||
87 | - 0, /* Machine number - 0 for now. */ | 90 | - 0, /* Machine number - 0 for now. */ |
88 | + bfd_mach_microblaze, /* 32 bit Machine */ | 91 | + bfd_mach_microblaze, /* 32 bit Machine */ |
89 | "microblaze", /* Architecture name. */ | 92 | "microblaze", /* Architecture name. */ |
90 | "MicroBlaze", /* Printable name. */ | 93 | "MicroBlaze", /* Printable name. */ |
91 | 3, /* Section align power. */ | 94 | 3, /* Section align power. */ |
92 | @@ -62,7 +62,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 95 | @@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
93 | 32, /* 32 bits in an address. */ | 96 | 32, /* 32 bits in an address. */ |
94 | 8, /* 8 bits in a byte. */ | 97 | 8, /* 8 bits in a byte. */ |
95 | bfd_arch_microblaze, /* Architecture. */ | 98 | bfd_arch_microblaze, /* Architecture. */ |
@@ -98,110 +101,20 @@ index c91ba46f75..8e7bcead28 100644 | |||
98 | "microblaze", /* Architecture name. */ | 101 | "microblaze", /* Architecture name. */ |
99 | "MicroBlaze", /* Printable name. */ | 102 | "MicroBlaze", /* Printable name. */ |
100 | 3, /* Section align power. */ | 103 | 3, /* Section align power. */ |
101 | @@ -76,8 +76,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 104 | @@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
102 | 64, /* 32 bits in a word. */ | ||
103 | 64, /* 32 bits in an address. */ | 105 | 64, /* 32 bits in an address. */ |
104 | 8, /* 8 bits in a byte. */ | 106 | 8, /* 8 bits in a byte. */ |
105 | - bfd_arch_microblaze, /* Architecture. */ | 107 | bfd_arch_microblaze, /* Architecture. */ |
106 | - 0, /* Machine number - 0 for now. */ | 108 | - 0, /* Machine number - 0 for now. */ |
107 | + bfd_arch_microblaze, /* Architecture. */ | ||
108 | + bfd_mach_microblaze64, /* 64 bit Machine */ | 109 | + bfd_mach_microblaze64, /* 64 bit Machine */ |
109 | "microblaze", /* Architecture name. */ | 110 | "microblaze", /* Architecture name. */ |
110 | "MicroBlaze", /* Printable name. */ | 111 | "MicroBlaze", /* Printable name. */ |
111 | 3, /* Section align power. */ | 112 | 3, /* Section align power. */ |
112 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 113 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
113 | index c280431df6..f9996eae12 100644 | 114 | index a4b15882d77..d33f709b8b3 100644 |
114 | --- a/bfd/elf32-microblaze.c | 115 | --- a/bfd/elf32-microblaze.c |
115 | +++ b/bfd/elf32-microblaze.c | 116 | +++ b/bfd/elf32-microblaze.c |
116 | @@ -767,87 +767,6 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) | 117 | @@ -3585,6 +3585,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, |
117 | return _bfd_elf_is_local_label_name (abfd, name); | ||
118 | } | ||
119 | |||
120 | -/* Support for core dump NOTE sections. */ | ||
121 | -static bfd_boolean | ||
122 | -microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) | ||
123 | -{ | ||
124 | - int offset; | ||
125 | - unsigned int size; | ||
126 | - | ||
127 | - switch (note->descsz) | ||
128 | - { | ||
129 | - default: | ||
130 | - return FALSE; | ||
131 | - | ||
132 | - case 228: /* Linux/MicroBlaze */ | ||
133 | - /* pr_cursig */ | ||
134 | - elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); | ||
135 | - | ||
136 | - /* pr_pid */ | ||
137 | - elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); | ||
138 | - | ||
139 | - /* pr_reg */ | ||
140 | - offset = 72; | ||
141 | - size = 50 * 4; | ||
142 | - | ||
143 | - break; | ||
144 | - } | ||
145 | - | ||
146 | - /* Make a ".reg/999" section. */ | ||
147 | - return _bfd_elfcore_make_pseudosection (abfd, ".reg", | ||
148 | - size, note->descpos + offset); | ||
149 | -} | ||
150 | - | ||
151 | -static bfd_boolean | ||
152 | -microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) | ||
153 | -{ | ||
154 | - switch (note->descsz) | ||
155 | - { | ||
156 | - default: | ||
157 | - return FALSE; | ||
158 | - | ||
159 | - case 128: /* Linux/MicroBlaze elf_prpsinfo */ | ||
160 | - elf_tdata (abfd)->core->program | ||
161 | - = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); | ||
162 | - elf_tdata (abfd)->core->command | ||
163 | - = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80); | ||
164 | - } | ||
165 | - | ||
166 | - /* Note that for some reason, a spurious space is tacked | ||
167 | - onto the end of the args in some (at least one anyway) | ||
168 | - implementations, so strip it off if it exists. */ | ||
169 | - | ||
170 | - { | ||
171 | - char *command = elf_tdata (abfd)->core->command; | ||
172 | - int n = strlen (command); | ||
173 | - | ||
174 | - if (0 < n && command[n - 1] == ' ') | ||
175 | - command[n - 1] = '\0'; | ||
176 | - } | ||
177 | - | ||
178 | - return TRUE; | ||
179 | -} | ||
180 | - | ||
181 | -/* The microblaze linker (like many others) needs to keep track of | ||
182 | - the number of relocs that it decides to copy as dynamic relocs in | ||
183 | - check_relocs for each symbol. This is so that it can later discard | ||
184 | - them if they are found to be unnecessary. We store the information | ||
185 | - in a field extending the regular ELF linker hash table. */ | ||
186 | - | ||
187 | -struct elf32_mb_dyn_relocs | ||
188 | -{ | ||
189 | - struct elf32_mb_dyn_relocs *next; | ||
190 | - | ||
191 | - /* The input section of the reloc. */ | ||
192 | - asection *sec; | ||
193 | - | ||
194 | - /* Total number of relocs copied for the input section. */ | ||
195 | - bfd_size_type count; | ||
196 | - | ||
197 | - /* Number of pc-relative relocs copied for the input section. */ | ||
198 | - bfd_size_type pc_count; | ||
199 | -}; | ||
200 | - | ||
201 | /* ELF linker hash entry. */ | ||
202 | |||
203 | struct elf32_mb_link_hash_entry | ||
204 | @@ -3683,6 +3602,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, | ||
205 | return TRUE; | 118 | return TRUE; |
206 | } | 119 | } |
207 | 120 | ||
@@ -216,42 +129,30 @@ index c280431df6..f9996eae12 100644 | |||
216 | /* Hook called by the linker routine which adds symbols from an object | 129 | /* Hook called by the linker routine which adds symbols from an object |
217 | file. We use it to put .comm items in .sbss, and not .bss. */ | 130 | file. We use it to put .comm items in .sbss, and not .bss. */ |
218 | 131 | ||
219 | @@ -3752,8 +3679,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, | 132 | @@ -3657,5 +3665,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, |
220 | #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol | 133 | |
221 | #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections | 134 | #define elf_backend_grok_prstatus microblaze_elf_grok_prstatus |
222 | #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook | 135 | #define elf_backend_grok_psinfo microblaze_elf_grok_psinfo |
223 | - | ||
224 | -#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus | ||
225 | -#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo | ||
226 | +#define elf_backend_object_p elf_microblaze_object_p | 136 | +#define elf_backend_object_p elf_microblaze_object_p |
227 | 137 | ||
228 | #include "elf32-target.h" | 138 | #include "elf32-target.h" |
229 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 139 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
230 | index 3ff6a14baf..95a1e69729 100644 | 140 | index 62daa56b47a..b22f6de2df6 100644 |
231 | --- a/gas/config/tc-microblaze.c | 141 | --- a/gas/config/tc-microblaze.c |
232 | +++ b/gas/config/tc-microblaze.c | 142 | +++ b/gas/config/tc-microblaze.c |
233 | @@ -426,7 +426,10 @@ md_begin (void) | 143 | @@ -437,6 +437,11 @@ md_begin (void) |
234 | const char *prev_name = ""; | ||
235 | 144 | ||
236 | opcode_hash_control = hash_new (); | 145 | opcode_hash_control = hash_new (); |
237 | - | 146 | |
238 | + if (microblaze_arch_size == 64) | 147 | + if (microblaze_arch_size == 64) |
239 | + bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze64); | 148 | + bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze64); |
240 | + else | 149 | + else |
241 | + bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze); | 150 | + bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze); |
151 | + | ||
242 | /* Insert unique names into hash table. */ | 152 | /* Insert unique names into hash table. */ |
243 | for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++) | 153 | for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++) |
244 | { | 154 | { |
245 | @@ -1348,7 +1351,7 @@ md_assemble (char * str) | 155 | @@ -3494,6 +3499,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) |
246 | if ((temp != 0) && (temp != 0xFFFF8000)) | ||
247 | { | ||
248 | /* Needs an immediate inst. */ | ||
249 | - opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); | ||
250 | + opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); | ||
251 | if (opcode1 == NULL) | ||
252 | { | ||
253 | as_bad (_("unknown opcode \"%s\""), "imm"); | ||
254 | @@ -3431,6 +3434,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) | ||
255 | } | 156 | } |
256 | 157 | ||
257 | 158 | ||
@@ -268,7 +169,7 @@ index 3ff6a14baf..95a1e69729 100644 | |||
268 | found a machine specific op in an expression, | 169 | found a machine specific op in an expression, |
269 | then we create relocs accordingly. */ | 170 | then we create relocs accordingly. */ |
270 | diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h | 171 | diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h |
271 | index 9d38d2ced5..13f58917e7 100644 | 172 | index 7435a70ef5e..90c2a4a5558 100644 |
272 | --- a/gas/config/tc-microblaze.h | 173 | --- a/gas/config/tc-microblaze.h |
273 | +++ b/gas/config/tc-microblaze.h | 174 | +++ b/gas/config/tc-microblaze.h |
274 | @@ -23,6 +23,10 @@ | 175 | @@ -23,6 +23,10 @@ |
@@ -282,34 +183,21 @@ index 9d38d2ced5..13f58917e7 100644 | |||
282 | #ifndef TARGET_BYTES_BIG_ENDIAN | 183 | #ifndef TARGET_BYTES_BIG_ENDIAN |
283 | /* Used to initialise target_big_endian. */ | 184 | /* Used to initialise target_big_endian. */ |
284 | #define TARGET_BYTES_BIG_ENDIAN 1 | 185 | #define TARGET_BYTES_BIG_ENDIAN 1 |
285 | diff --git a/gdb/Makefile.in b/gdb/Makefile.in | ||
286 | index 8c9a3c07c0..15387197c7 100644 | ||
287 | --- a/gdb/Makefile.in | ||
288 | +++ b/gdb/Makefile.in | ||
289 | @@ -2265,7 +2265,7 @@ ALLDEPFILES = \ | ||
290 | m68k-tdep.c \ | ||
291 | microblaze-linux-tdep.c \ | ||
292 | microblaze-tdep.c \ | ||
293 | - microblaze-linux-nat.c \ | ||
294 | + microblaze-linux-nat.c \ | ||
295 | mingw-hdep.c \ | ||
296 | mips-fbsd-nat.c \ | ||
297 | mips-fbsd-tdep.c \ | ||
298 | diff --git a/gdb/features/Makefile b/gdb/features/Makefile | 186 | diff --git a/gdb/features/Makefile b/gdb/features/Makefile |
299 | index 3d84ca09a1..fdeec19753 100644 | 187 | index d0af9a47b48..2c3cf91b69f 100644 |
300 | --- a/gdb/features/Makefile | 188 | --- a/gdb/features/Makefile |
301 | +++ b/gdb/features/Makefile | 189 | +++ b/gdb/features/Makefile |
302 | @@ -64,6 +64,7 @@ WHICH = aarch64 \ | 190 | @@ -46,6 +46,7 @@ |
303 | i386/x32-avx-avx512-linux \ | 191 | # List of .dat files to create in ../regformats/ |
304 | mips-linux mips-dsp-linux \ | 192 | WHICH = mips-linux mips-dsp-linux \ |
305 | microblaze-with-stack-protect \ | 193 | microblaze-with-stack-protect \ |
306 | + microblaze64-with-stack-protect \ | 194 | + microblaze64-with-stack-protect \ |
307 | mips64-linux mips64-dsp-linux \ | 195 | mips64-linux mips64-dsp-linux \ |
308 | nios2-linux \ | 196 | nios2-linux \ |
309 | rs6000/powerpc-32 \ | 197 | rs6000/powerpc-32 \ |
310 | @@ -135,7 +136,9 @@ XMLTOC = \ | 198 | @@ -107,7 +108,9 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH)) |
311 | arm/arm-with-vfpv2.xml \ | 199 | # to make on the command line. |
312 | arm/arm-with-vfpv3.xml \ | 200 | XMLTOC = \ |
313 | microblaze-with-stack-protect.xml \ | 201 | microblaze-with-stack-protect.xml \ |
314 | + microblaze64-with-stack-protect.xml \ | 202 | + microblaze64-with-stack-protect.xml \ |
315 | microblaze.xml \ | 203 | microblaze.xml \ |
@@ -318,7 +206,7 @@ index 3d84ca09a1..fdeec19753 100644 | |||
318 | mips-linux.xml \ | 206 | mips-linux.xml \ |
319 | mips64-dsp-linux.xml \ | 207 | mips64-dsp-linux.xml \ |
320 | diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml | 208 | diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml |
321 | index 88c93e5d66..5bc3e49f84 100644 | 209 | index f272650a41b..d1f2282fd1e 100644 |
322 | --- a/gdb/features/microblaze-core.xml | 210 | --- a/gdb/features/microblaze-core.xml |
323 | +++ b/gdb/features/microblaze-core.xml | 211 | +++ b/gdb/features/microblaze-core.xml |
324 | @@ -8,7 +8,7 @@ | 212 | @@ -8,7 +8,7 @@ |
@@ -343,24 +231,11 @@ index 88c93e5d66..5bc3e49f84 100644 | |||
343 | <reg name="rtlbsx" bitsize="32"/> | 231 | <reg name="rtlbsx" bitsize="32"/> |
344 | <reg name="rtlblo" bitsize="32"/> | 232 | <reg name="rtlblo" bitsize="32"/> |
345 | <reg name="rtlbhi" bitsize="32"/> | 233 | <reg name="rtlbhi" bitsize="32"/> |
346 | + <reg name="slr" bitsize="32"/> | 234 | + <reg name="rslr" bitsize="32"/> |
347 | + <reg name="shr" bitsize="32"/> | 235 | + <reg name="rshr" bitsize="32"/> |
348 | </feature> | ||
349 | diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml | ||
350 | index 870c148bb0..a7f27b903c 100644 | ||
351 | --- a/gdb/features/microblaze-stack-protect.xml | ||
352 | +++ b/gdb/features/microblaze-stack-protect.xml | ||
353 | @@ -7,6 +7,6 @@ | ||
354 | |||
355 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
356 | <feature name="org.gnu.gdb.microblaze.stack-protect"> | ||
357 | - <reg name="rslr" bitsize="32"/> | ||
358 | - <reg name="rshr" bitsize="32"/> | ||
359 | + <reg name="slr" bitsize="32"/> | ||
360 | + <reg name="shr" bitsize="32"/> | ||
361 | </feature> | 236 | </feature> |
362 | diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c | 237 | diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c |
363 | index b39aa19887..609934e2b4 100644 | 238 | index b39aa198874..ab162fd2588 100644 |
364 | --- a/gdb/features/microblaze-with-stack-protect.c | 239 | --- a/gdb/features/microblaze-with-stack-protect.c |
365 | +++ b/gdb/features/microblaze-with-stack-protect.c | 240 | +++ b/gdb/features/microblaze-with-stack-protect.c |
366 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) | 241 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) |
@@ -381,19 +256,8 @@ index b39aa19887..609934e2b4 100644 | |||
381 | tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); | 256 | tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); |
382 | tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); | 257 | tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); |
383 | tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); | 258 | tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); |
384 | @@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) | ||
385 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
386 | |||
387 | feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect"); | ||
388 | - tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); | ||
389 | - tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); | ||
390 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); | ||
391 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); | ||
392 | |||
393 | tdesc_microblaze_with_stack_protect = result; | ||
394 | } | ||
395 | diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c | 259 | diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c |
396 | index 6c86fc0770..ceb98ca8b8 100644 | 260 | index 6c86fc07700..7919ac96e62 100644 |
397 | --- a/gdb/features/microblaze.c | 261 | --- a/gdb/features/microblaze.c |
398 | +++ b/gdb/features/microblaze.c | 262 | +++ b/gdb/features/microblaze.c |
399 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) | 263 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) |
@@ -418,14 +282,14 @@ index 6c86fc0770..ceb98ca8b8 100644 | |||
418 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | 282 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); |
419 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | 283 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); |
420 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | 284 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); |
421 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | 285 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); |
422 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | 286 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); |
423 | 287 | ||
424 | tdesc_microblaze = result; | 288 | tdesc_microblaze = result; |
425 | } | 289 | } |
426 | diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml | 290 | diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml |
427 | new file mode 100644 | 291 | new file mode 100644 |
428 | index 0000000000..96e99e2fb2 | 292 | index 00000000000..b9adadfade6 |
429 | --- /dev/null | 293 | --- /dev/null |
430 | +++ b/gdb/features/microblaze64-core.xml | 294 | +++ b/gdb/features/microblaze64-core.xml |
431 | @@ -0,0 +1,69 @@ | 295 | @@ -0,0 +1,69 @@ |
@@ -495,12 +359,12 @@ index 0000000000..96e99e2fb2 | |||
495 | + <reg name="rtlbsx" bitsize="32"/> | 359 | + <reg name="rtlbsx" bitsize="32"/> |
496 | + <reg name="rtlblo" bitsize="32"/> | 360 | + <reg name="rtlblo" bitsize="32"/> |
497 | + <reg name="rtlbhi" bitsize="32"/> | 361 | + <reg name="rtlbhi" bitsize="32"/> |
498 | + <reg name="slr" bitsize="64"/> | 362 | + <reg name="rslr" bitsize="64"/> |
499 | + <reg name="shr" bitsize="64"/> | 363 | + <reg name="rshr" bitsize="64"/> |
500 | +</feature> | 364 | +</feature> |
501 | diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml | 365 | diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml |
502 | new file mode 100644 | 366 | new file mode 100644 |
503 | index 0000000000..1bbf5fc3ce | 367 | index 00000000000..9d7ea8b9fd7 |
504 | --- /dev/null | 368 | --- /dev/null |
505 | +++ b/gdb/features/microblaze64-stack-protect.xml | 369 | +++ b/gdb/features/microblaze64-stack-protect.xml |
506 | @@ -0,0 +1,12 @@ | 370 | @@ -0,0 +1,12 @@ |
@@ -513,12 +377,12 @@ index 0000000000..1bbf5fc3ce | |||
513 | + | 377 | + |
514 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | 378 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> |
515 | +<feature name="org.gnu.gdb.microblaze64.stack-protect"> | 379 | +<feature name="org.gnu.gdb.microblaze64.stack-protect"> |
516 | + <reg name="slr" bitsize="64"/> | 380 | + <reg name="rslr" bitsize="64"/> |
517 | + <reg name="shr" bitsize="64"/> | 381 | + <reg name="rshr" bitsize="64"/> |
518 | +</feature> | 382 | +</feature> |
519 | diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c | 383 | diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c |
520 | new file mode 100644 | 384 | new file mode 100644 |
521 | index 0000000000..f448c9a749 | 385 | index 00000000000..249cb534daa |
522 | --- /dev/null | 386 | --- /dev/null |
523 | +++ b/gdb/features/microblaze64-with-stack-protect.c | 387 | +++ b/gdb/features/microblaze64-with-stack-protect.c |
524 | @@ -0,0 +1,79 @@ | 388 | @@ -0,0 +1,79 @@ |
@@ -596,14 +460,14 @@ index 0000000000..f448c9a749 | |||
596 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | 460 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); |
597 | + | 461 | + |
598 | + feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect"); | 462 | + feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect"); |
599 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | 463 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); |
600 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | 464 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); |
601 | + | 465 | + |
602 | + tdesc_microblaze64_with_stack_protect = result; | 466 | + tdesc_microblaze64_with_stack_protect = result; |
603 | +} | 467 | +} |
604 | diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml | 468 | diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml |
605 | new file mode 100644 | 469 | new file mode 100644 |
606 | index 0000000000..0e9f01611f | 470 | index 00000000000..0e9f01611f3 |
607 | --- /dev/null | 471 | --- /dev/null |
608 | +++ b/gdb/features/microblaze64-with-stack-protect.xml | 472 | +++ b/gdb/features/microblaze64-with-stack-protect.xml |
609 | @@ -0,0 +1,12 @@ | 473 | @@ -0,0 +1,12 @@ |
@@ -621,7 +485,7 @@ index 0000000000..0e9f01611f | |||
621 | +</target> | 485 | +</target> |
622 | diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c | 486 | diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c |
623 | new file mode 100644 | 487 | new file mode 100644 |
624 | index 0000000000..1aa37c4512 | 488 | index 00000000000..5d3e2c8cd91 |
625 | --- /dev/null | 489 | --- /dev/null |
626 | +++ b/gdb/features/microblaze64.c | 490 | +++ b/gdb/features/microblaze64.c |
627 | @@ -0,0 +1,77 @@ | 491 | @@ -0,0 +1,77 @@ |
@@ -697,14 +561,14 @@ index 0000000000..1aa37c4512 | |||
697 | + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | 561 | + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); |
698 | + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | 562 | + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); |
699 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | 563 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); |
700 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | 564 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); |
701 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | 565 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); |
702 | + | 566 | + |
703 | + tdesc_microblaze64 = result; | 567 | + tdesc_microblaze64 = result; |
704 | +} | 568 | +} |
705 | diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml | 569 | diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml |
706 | new file mode 100644 | 570 | new file mode 100644 |
707 | index 0000000000..515d18e65c | 571 | index 00000000000..515d18e65cf |
708 | --- /dev/null | 572 | --- /dev/null |
709 | +++ b/gdb/features/microblaze64.xml | 573 | +++ b/gdb/features/microblaze64.xml |
710 | @@ -0,0 +1,11 @@ | 574 | @@ -0,0 +1,11 @@ |
@@ -719,8 +583,55 @@ index 0000000000..515d18e65c | |||
719 | +<target> | 583 | +<target> |
720 | + <xi:include href="microblaze64-core.xml"/> | 584 | + <xi:include href="microblaze64-core.xml"/> |
721 | +</target> | 585 | +</target> |
586 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
587 | index 0d5c08d24f6..a9a0eef3854 100644 | ||
588 | --- a/gdb/microblaze-linux-tdep.c | ||
589 | +++ b/gdb/microblaze-linux-tdep.c | ||
590 | @@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
591 | |||
592 | /* BFD target for core files. */ | ||
593 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
594 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
595 | + { | ||
596 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
597 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); | ||
598 | + MICROBLAZE_REGISTER_SIZE=8; | ||
599 | + } | ||
600 | + else | ||
601 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
602 | + } | ||
603 | else | ||
604 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
605 | + { | ||
606 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
607 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); | ||
608 | + MICROBLAZE_REGISTER_SIZE=8; | ||
609 | + } | ||
610 | + else | ||
611 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
612 | + } | ||
613 | + | ||
614 | + switch (info.bfd_arch_info->mach) | ||
615 | + { | ||
616 | + case bfd_mach_microblaze64: | ||
617 | + set_gdbarch_ptr_bit (gdbarch, 64); | ||
618 | + break; | ||
619 | + } | ||
620 | |||
621 | |||
622 | /* Shared library handling. */ | ||
623 | @@ -177,6 +198,8 @@ void _initialize_microblaze_linux_tdep (); | ||
624 | void | ||
625 | _initialize_microblaze_linux_tdep () | ||
626 | { | ||
627 | - gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, | ||
628 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, | ||
629 | + microblaze_linux_init_abi); | ||
630 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, | ||
631 | microblaze_linux_init_abi); | ||
632 | } | ||
722 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | 633 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c |
723 | index 49713ea9b1..0605283c9e 100644 | 634 | index 7462a1f7ce6..5dd0b3ea532 100644 |
724 | --- a/gdb/microblaze-tdep.c | 635 | --- a/gdb/microblaze-tdep.c |
725 | +++ b/gdb/microblaze-tdep.c | 636 | +++ b/gdb/microblaze-tdep.c |
726 | @@ -40,7 +40,9 @@ | 637 | @@ -40,7 +40,9 @@ |
@@ -733,57 +644,34 @@ index 49713ea9b1..0605283c9e 100644 | |||
733 | 644 | ||
734 | /* Instruction macros used for analyzing the prologue. */ | 645 | /* Instruction macros used for analyzing the prologue. */ |
735 | /* This set of instruction macros need to be changed whenever the | 646 | /* This set of instruction macros need to be changed whenever the |
736 | @@ -75,12 +77,13 @@ static const char *microblaze_register_names[] = | 647 | @@ -79,8 +81,9 @@ static const char *microblaze_register_names[] = |
737 | "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", | ||
738 | "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", | ||
739 | "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", | ||
740 | - "rslr", "rshr" | ||
741 | + "slr", "shr" | ||
742 | }; | 648 | }; |
743 | 649 | ||
744 | #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) | 650 | #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) |
745 | 651 | - | |
652 | + | ||
746 | static unsigned int microblaze_debug_flag = 0; | 653 | static unsigned int microblaze_debug_flag = 0; |
747 | +int reg_size = 4; | 654 | +int MICROBLAZE_REGISTER_SIZE = 4; |
748 | 655 | ||
749 | static void ATTRIBUTE_PRINTF (1, 2) | 656 | static void ATTRIBUTE_PRINTF (1, 2) |
750 | microblaze_debug (const char *fmt, ...) | 657 | microblaze_debug (const char *fmt, ...) |
751 | @@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs, | 658 | @@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc) |
752 | error (_("store_arguments not implemented")); | 659 | constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; |
753 | return sp; | 660 | |
754 | } | 661 | typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; |
755 | +#if 0 | 662 | +#if 0 |
756 | static int | 663 | static int |
757 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 664 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
758 | struct bp_target_info *bp_tgt) | 665 | struct bp_target_info *bp_tgt) |
759 | @@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 666 | @@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
760 | int val; | ||
761 | int bplen; | ||
762 | gdb_byte old_contents[BREAKPOINT_MAX]; | ||
763 | - struct cleanup *cleanup; | ||
764 | + //struct cleanup *cleanup; | ||
765 | 667 | ||
766 | /* Determine appropriate breakpoint contents and size for this address. */ | ||
767 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | ||
768 | @@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
769 | error (_("Software breakpoints not implemented for this target.")); | ||
770 | |||
771 | /* Make sure we see the memory breakpoints. */ | ||
772 | - cleanup = make_show_memory_breakpoints_cleanup (1); | ||
773 | + scoped_restore | ||
774 | + cleanup = make_scoped_restore_show_memory_breakpoints (1); | ||
775 | val = target_read_memory (addr, old_contents, bplen); | ||
776 | |||
777 | /* If our breakpoint is no longer at the address, this means that the | ||
778 | @@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
779 | return val; | 668 | return val; |
780 | } | 669 | } |
781 | |||
782 | +#endif | 670 | +#endif |
671 | |||
783 | /* Allocate and initialize a frame cache. */ | 672 | /* Allocate and initialize a frame cache. */ |
784 | 673 | ||
785 | static struct microblaze_frame_cache * | 674 | @@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, |
786 | @@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, | ||
787 | gdb_byte *valbuf) | 675 | gdb_byte *valbuf) |
788 | { | 676 | { |
789 | gdb_byte buf[8]; | 677 | gdb_byte buf[8]; |
@@ -791,19 +679,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
791 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ | 679 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ |
792 | switch (TYPE_LENGTH (type)) | 680 | switch (TYPE_LENGTH (type)) |
793 | { | 681 | { |
794 | case 1: /* return last byte in the register. */ | 682 | @@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) |
795 | regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); | ||
796 | - memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1); | ||
797 | + memcpy(valbuf, buf + reg_size - 1, 1); | ||
798 | return; | ||
799 | case 2: /* return last 2 bytes in register. */ | ||
800 | regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); | ||
801 | - memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2); | ||
802 | + memcpy(valbuf, buf + reg_size - 2, 2); | ||
803 | return; | ||
804 | case 4: /* for sizes 4 or 8, copy the required length. */ | ||
805 | case 8: | ||
806 | @@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) | ||
807 | return (TYPE_LENGTH (type) == 16); | 683 | return (TYPE_LENGTH (type) == 16); |
808 | } | 684 | } |
809 | 685 | ||
@@ -915,16 +791,14 @@ index 49713ea9b1..0605283c9e 100644 | |||
915 | +} | 791 | +} |
916 | +#endif | 792 | +#endif |
917 | + | 793 | + |
918 | +static void | ||
919 | +microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) | ||
920 | +{ | ||
921 | + regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc); | ||
922 | +} | ||
923 | + | ||
924 | static int dwarf2_to_reg_map[78] = | 794 | static int dwarf2_to_reg_map[78] = |
925 | { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ | 795 | { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ |
926 | 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ | 796 | 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ |
927 | @@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) | 797 | @@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
798 | return -1; | ||
799 | } | ||
800 | |||
801 | +#if 0 | ||
928 | static void | 802 | static void |
929 | microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) | 803 | microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) |
930 | { | 804 | { |
@@ -940,46 +814,27 @@ index 49713ea9b1..0605283c9e 100644 | |||
940 | - tdesc_microblaze_with_stack_protect); | 814 | - tdesc_microblaze_with_stack_protect); |
941 | + tdesc_microblaze64_with_stack_protect); | 815 | + tdesc_microblaze64_with_stack_protect); |
942 | } | 816 | } |
817 | +#endif | ||
943 | 818 | ||
944 | void | 819 | void |
945 | @@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset, | 820 | microblaze_supply_gregset (const struct regset *regset, |
946 | struct regcache *regcache, | 821 | struct regcache *regcache, |
947 | int regnum, const void *gregs) | 822 | int regnum, const void *gregs) |
948 | { | 823 | { |
949 | - unsigned int *regs = gregs; | 824 | - const unsigned int *regs = (const unsigned int *)gregs; |
950 | + const gdb_byte *regs = (const gdb_byte *) gregs; | 825 | + const gdb_byte *regs = (const gdb_byte *) gregs; |
951 | if (regnum >= 0) | 826 | if (regnum >= 0) |
952 | - regcache_raw_supply (regcache, regnum, regs + regnum); | 827 | regcache->raw_supply (regnum, regs + regnum); |
953 | + regcache->raw_supply (regnum, regs + regnum); | ||
954 | |||
955 | if (regnum == -1) { | ||
956 | int i; | ||
957 | 828 | ||
958 | for (i = 0; i < 50; i++) { | 829 | @@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, |
959 | - regcache_raw_supply (regcache, i, regs + i); | ||
960 | + regcache->raw_supply (regnum, regs + i); | ||
961 | } | ||
962 | } | ||
963 | } | 830 | } |
964 | @@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch, | ||
965 | } | ||
966 | |||
967 | 831 | ||
968 | +static void | ||
969 | +make_regs (struct gdbarch *arch) | ||
970 | +{ | ||
971 | + struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
972 | + int mach = gdbarch_bfd_arch_info (arch)->mach; | ||
973 | + | ||
974 | + if (mach == bfd_mach_microblaze64) | ||
975 | + { | ||
976 | + set_gdbarch_ptr_bit (arch, 64); | ||
977 | + } | ||
978 | +} | ||
979 | 832 | ||
833 | - | ||
980 | static struct gdbarch * | 834 | static struct gdbarch * |
981 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 835 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
982 | @@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 836 | { |
837 | @@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | ||
983 | if (arches != NULL) | 838 | if (arches != NULL) |
984 | return arches->gdbarch; | 839 | return arches->gdbarch; |
985 | if (tdesc == NULL) | 840 | if (tdesc == NULL) |
@@ -989,7 +844,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
989 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) | 844 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) |
990 | + { | 845 | + { |
991 | + tdesc = tdesc_microblaze64; | 846 | + tdesc = tdesc_microblaze64; |
992 | + reg_size = 8; | 847 | + MICROBLAZE_REGISTER_SIZE = 8; |
993 | + } | 848 | + } |
994 | + else | 849 | + else |
995 | + tdesc = tdesc_microblaze; | 850 | + tdesc = tdesc_microblaze; |
@@ -997,7 +852,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
997 | /* Check any target description for validity. */ | 852 | /* Check any target description for validity. */ |
998 | if (tdesc_has_registers (tdesc)) | 853 | if (tdesc_has_registers (tdesc)) |
999 | { | 854 | { |
1000 | @@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 855 | @@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1001 | int valid_p; | 856 | int valid_p; |
1002 | int i; | 857 | int i; |
1003 | 858 | ||
@@ -1038,7 +893,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1038 | } | 893 | } |
1039 | 894 | ||
1040 | if (!valid_p) | 895 | if (!valid_p) |
1041 | @@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 896 | @@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1042 | tdesc_data_cleanup (tdesc_data); | 897 | tdesc_data_cleanup (tdesc_data); |
1043 | return NULL; | 898 | return NULL; |
1044 | } | 899 | } |
@@ -1046,7 +901,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1046 | } | 901 | } |
1047 | 902 | ||
1048 | /* Allocate space for the new architecture. */ | 903 | /* Allocate space for the new architecture. */ |
1049 | @@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 904 | @@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1050 | /* Register numbers of various important registers. */ | 905 | /* Register numbers of various important registers. */ |
1051 | set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); | 906 | set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); |
1052 | set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); | 907 | set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); |
@@ -1064,7 +919,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1064 | /* Map Dwarf2 registers to GDB registers. */ | 919 | /* Map Dwarf2 registers to GDB registers. */ |
1065 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); | 920 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); |
1066 | 921 | ||
1067 | @@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 922 | @@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1068 | microblaze_breakpoint::kind_from_pc); | 923 | microblaze_breakpoint::kind_from_pc); |
1069 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, | 924 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, |
1070 | microblaze_breakpoint::bp_from_kind); | 925 | microblaze_breakpoint::bp_from_kind); |
@@ -1082,21 +937,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1082 | 937 | ||
1083 | frame_base_set_default (gdbarch, µblaze_frame_base); | 938 | frame_base_set_default (gdbarch, µblaze_frame_base); |
1084 | 939 | ||
1085 | @@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 940 | @@ -841,6 +981,8 @@ _initialize_microblaze_tdep () |
1086 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | ||
1087 | //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); | ||
1088 | |||
1089 | - /* If we have register sets, enable the generic core file support. */ | ||
1090 | + /* If we have register sets, enable the generic core file support. | ||
1091 | if (tdep->gregset) { | ||
1092 | set_gdbarch_regset_from_core_section (gdbarch, | ||
1093 | microblaze_regset_from_core_section); | ||
1094 | - } | ||
1095 | + }*/ | ||
1096 | |||
1097 | return gdbarch; | ||
1098 | } | ||
1099 | @@ -882,6 +1039,8 @@ _initialize_microblaze_tdep (void) | ||
1100 | 941 | ||
1101 | initialize_tdesc_microblaze_with_stack_protect (); | 942 | initialize_tdesc_microblaze_with_stack_protect (); |
1102 | initialize_tdesc_microblaze (); | 943 | initialize_tdesc_microblaze (); |
@@ -1106,7 +947,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1106 | add_setshow_zuinteger_cmd ("microblaze", class_maintenance, | 947 | add_setshow_zuinteger_cmd ("microblaze", class_maintenance, |
1107 | µblaze_debug_flag, _("\ | 948 | µblaze_debug_flag, _("\ |
1108 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 949 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
1109 | index 3777cbb6a8..55f5dd1962 100644 | 950 | index d2112dc07e1..bd03e969b9b 100644 |
1110 | --- a/gdb/microblaze-tdep.h | 951 | --- a/gdb/microblaze-tdep.h |
1111 | +++ b/gdb/microblaze-tdep.h | 952 | +++ b/gdb/microblaze-tdep.h |
1112 | @@ -27,7 +27,7 @@ struct microblaze_gregset | 953 | @@ -27,7 +27,7 @@ struct microblaze_gregset |
@@ -1130,17 +971,18 @@ index 3777cbb6a8..55f5dd1962 100644 | |||
1130 | }; | 971 | }; |
1131 | 972 | ||
1132 | struct microblaze_frame_cache | 973 | struct microblaze_frame_cache |
1133 | @@ -128,7 +128,7 @@ struct microblaze_frame_cache | 974 | @@ -128,7 +128,8 @@ struct microblaze_frame_cache |
1134 | struct trad_frame_saved_reg *saved_regs; | 975 | struct trad_frame_saved_reg *saved_regs; |
1135 | }; | 976 | }; |
1136 | /* All registers are 32 bits. */ | 977 | /* All registers are 32 bits. */ |
1137 | -#define MICROBLAZE_REGISTER_SIZE 4 | 978 | -#define MICROBLAZE_REGISTER_SIZE 4 |
1138 | +//#define MICROBLAZE_REGISTER_SIZE 8 | 979 | +extern int microblaze_reg_size; |
980 | +#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size | ||
1139 | 981 | ||
1140 | /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. | 982 | /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. |
1141 | Only used for native debugging. */ | 983 | Only used for native debugging. */ |
1142 | diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat | 984 | diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat |
1143 | index 8040a7b3fd..450e321d49 100644 | 985 | index 8040a7b3fd0..450e321d49e 100644 |
1144 | --- a/gdb/regformats/microblaze-with-stack-protect.dat | 986 | --- a/gdb/regformats/microblaze-with-stack-protect.dat |
1145 | +++ b/gdb/regformats/microblaze-with-stack-protect.dat | 987 | +++ b/gdb/regformats/microblaze-with-stack-protect.dat |
1146 | @@ -60,5 +60,5 @@ expedite:r1,rpc | 988 | @@ -60,5 +60,5 @@ expedite:r1,rpc |
@@ -1151,18 +993,6 @@ index 8040a7b3fd..450e321d49 100644 | |||
1151 | -32:rshr | 993 | -32:rshr |
1152 | +32:slr | 994 | +32:slr |
1153 | +32:shr | 995 | +32:shr |
1154 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | ||
1155 | index bd9d91cd57..12d4456bc2 100644 | ||
1156 | --- a/opcodes/microblaze-opc.h | ||
1157 | +++ b/opcodes/microblaze-opc.h | ||
1158 | @@ -134,7 +134,6 @@ | ||
1159 | #define ORLI_MASK 0xA0000000 | ||
1160 | #define XORLI_MASK 0xA8000000 | ||
1161 | |||
1162 | - | ||
1163 | /* New Mask for msrset, msrclr insns. */ | ||
1164 | #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ | ||
1165 | /* Mask for mbar insn. */ | ||
1166 | -- | 996 | -- |
1167 | 2.17.1 | 997 | 2.17.1 |
1168 | 998 | ||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch deleted file mode 100644 index 1a0153b8..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0041-patch-MicroBlaze-porting-GDB-for-linux.patch +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | From 07757f455d343beb50ac04815c77b04075bf9534 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 12 Dec 2019 14:56:17 +0530 | ||
4 | Subject: [PATCH 41/43] [patch,MicroBlaze] : porting GDB for linux | ||
5 | |||
6 | --- | ||
7 | gdb/features/microblaze-linux.xml | 12 ++++++++++ | ||
8 | gdb/gdbserver/Makefile.in | 2 ++ | ||
9 | gdb/gdbserver/configure.srv | 3 ++- | ||
10 | gdb/microblaze-linux-tdep.c | 39 ++++++++++++++++++++++++------- | ||
11 | 4 files changed, 47 insertions(+), 9 deletions(-) | ||
12 | create mode 100644 gdb/features/microblaze-linux.xml | ||
13 | |||
14 | diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml | ||
15 | new file mode 100644 | ||
16 | index 0000000000..8983e66eb3 | ||
17 | --- /dev/null | ||
18 | +++ b/gdb/features/microblaze-linux.xml | ||
19 | @@ -0,0 +1,12 @@ | ||
20 | +<?xml version="1.0"?> | ||
21 | +<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc. | ||
22 | + | ||
23 | + Copying and distribution of this file, with or without modification, | ||
24 | + are permitted in any medium without royalty provided the copyright | ||
25 | + notice and this notice are preserved. --> | ||
26 | + | ||
27 | +<!DOCTYPE target SYSTEM "gdb-target.dtd"> | ||
28 | +<target> | ||
29 | + <osabi>GNU/Linux</osabi> | ||
30 | + <xi:include href="microblaze-core.xml"/> | ||
31 | +</target> | ||
32 | diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in | ||
33 | index 45d95e6cab..7c8fa3c246 100644 | ||
34 | --- a/gdb/gdbserver/Makefile.in | ||
35 | +++ b/gdb/gdbserver/Makefile.in | ||
36 | @@ -633,6 +633,8 @@ common/%.o: ../common/%.c | ||
37 | |||
38 | %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh) | ||
39 | $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@ | ||
40 | +microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh) | ||
41 | + $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c | ||
42 | |||
43 | # | ||
44 | # Dependency tracking. | ||
45 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | ||
46 | index c421790bd0..6ad0ac9fa6 100644 | ||
47 | --- a/gdb/gdbserver/configure.srv | ||
48 | +++ b/gdb/gdbserver/configure.srv | ||
49 | @@ -210,8 +210,9 @@ case "${target}" in | ||
50 | srv_linux_usrregs=yes | ||
51 | srv_linux_thread_db=yes | ||
52 | ;; | ||
53 | - microblaze*-*-linux*) srv_regobj=microblaze-linux.o | ||
54 | + microblaze*-*-linux*) srv_regobj="microblaze-linux.o" | ||
55 | srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " | ||
56 | + srv_xmlfiles="microblaze-linux.xml" | ||
57 | srv_linux_regsets=yes | ||
58 | srv_linux_usrregs=yes | ||
59 | srv_linux_thread_db=yes | ||
60 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
61 | index 011e513941..e3d2a7508d 100644 | ||
62 | --- a/gdb/microblaze-linux-tdep.c | ||
63 | +++ b/gdb/microblaze-linux-tdep.c | ||
64 | @@ -41,7 +41,7 @@ | ||
65 | |||
66 | #ifndef REGSET_H | ||
67 | #define REGSET_H 1 | ||
68 | - | ||
69 | +int MICROBLAZE_REGISTER_SIZE=4; | ||
70 | struct gdbarch; | ||
71 | struct regcache; | ||
72 | |||
73 | @@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...) | ||
74 | va_end (args); | ||
75 | } | ||
76 | } | ||
77 | - | ||
78 | +#if 0 | ||
79 | static int | ||
80 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
81 | struct bp_target_info *bp_tgt) | ||
82 | @@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
83 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | ||
84 | |||
85 | /* Make sure we see the memory breakpoints. */ | ||
86 | - cleanup = make_show_memory_breakpoints_cleanup (1); | ||
87 | + cleanup = make_scoped_restore_show_memory_breakpoints (1); | ||
88 | val = target_read_memory (addr, old_contents, bplen); | ||
89 | |||
90 | /* If our breakpoint is no longer at the address, this means that the | ||
91 | @@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
92 | do_cleanups (cleanup); | ||
93 | return val; | ||
94 | } | ||
95 | +#endif | ||
96 | |||
97 | static void | ||
98 | microblaze_linux_sigtramp_cache (struct frame_info *next_frame, | ||
99 | @@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
100 | |||
101 | linux_init_abi (info, gdbarch); | ||
102 | |||
103 | - set_gdbarch_memory_remove_breakpoint (gdbarch, | ||
104 | - microblaze_linux_memory_remove_breakpoint); | ||
105 | +// set_gdbarch_memory_remove_breakpoint (gdbarch, | ||
106 | +// microblaze_linux_memory_remove_breakpoint); | ||
107 | |||
108 | /* Shared library handling. */ | ||
109 | set_solib_svr4_fetch_link_map_offsets (gdbarch, | ||
110 | @@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
111 | |||
112 | /* BFD target for core files. */ | ||
113 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
114 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
115 | + { | ||
116 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
117 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); | ||
118 | + MICROBLAZE_REGISTER_SIZE=8; | ||
119 | + } | ||
120 | + else | ||
121 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
122 | + } | ||
123 | else | ||
124 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
125 | + { | ||
126 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
127 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); | ||
128 | + MICROBLAZE_REGISTER_SIZE=8; | ||
129 | + } | ||
130 | + else | ||
131 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
132 | + } | ||
133 | |||
134 | + switch (info.bfd_arch_info->mach) | ||
135 | + { | ||
136 | + case bfd_mach_microblaze64: | ||
137 | + set_gdbarch_ptr_bit (gdbarch, 64); | ||
138 | + break; | ||
139 | + } | ||
140 | |||
141 | /* Shared library handling. */ | ||
142 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | ||
143 | @@ -278,6 +299,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
144 | void | ||
145 | _initialize_microblaze_linux_tdep (void) | ||
146 | { | ||
147 | - gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, | ||
148 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, | ||
149 | + microblaze_linux_init_abi); | ||
150 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, | ||
151 | microblaze_linux_init_abi); | ||
152 | } | ||
153 | -- | ||
154 | 2.17.1 | ||
155 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch deleted file mode 100644 index ad8dcb53..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | From c2a4667e87bd610a48a6690fcc9fdc6761398bcf Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Thu, 19 Dec 2019 12:22:04 +0530 | ||
4 | Subject: [PATCH 42/43] Correcting the register names from slr & shr to rslr & | ||
5 | rshr | ||
6 | |||
7 | --- | ||
8 | gdb/features/microblaze-core.xml | 4 ++-- | ||
9 | gdb/features/microblaze-stack-protect.xml | 4 ++-- | ||
10 | gdb/features/microblaze-with-stack-protect.c | 4 ++-- | ||
11 | gdb/features/microblaze.c | 4 ++-- | ||
12 | gdb/features/microblaze64-core.xml | 4 ++-- | ||
13 | gdb/features/microblaze64-stack-protect.xml | 4 ++-- | ||
14 | gdb/features/microblaze64-with-stack-protect.c | 4 ++-- | ||
15 | gdb/features/microblaze64.c | 4 ++-- | ||
16 | gdb/microblaze-tdep.c | 2 +- | ||
17 | 9 files changed, 17 insertions(+), 17 deletions(-) | ||
18 | |||
19 | diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml | ||
20 | index 5bc3e49f84..6f73f4eb84 100644 | ||
21 | --- a/gdb/features/microblaze-core.xml | ||
22 | +++ b/gdb/features/microblaze-core.xml | ||
23 | @@ -64,6 +64,6 @@ | ||
24 | <reg name="rtlbsx" bitsize="32"/> | ||
25 | <reg name="rtlblo" bitsize="32"/> | ||
26 | <reg name="rtlbhi" bitsize="32"/> | ||
27 | - <reg name="slr" bitsize="32"/> | ||
28 | - <reg name="shr" bitsize="32"/> | ||
29 | + <reg name="rslr" bitsize="32"/> | ||
30 | + <reg name="rshr" bitsize="32"/> | ||
31 | </feature> | ||
32 | diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml | ||
33 | index a7f27b903c..870c148bb0 100644 | ||
34 | --- a/gdb/features/microblaze-stack-protect.xml | ||
35 | +++ b/gdb/features/microblaze-stack-protect.xml | ||
36 | @@ -7,6 +7,6 @@ | ||
37 | |||
38 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
39 | <feature name="org.gnu.gdb.microblaze.stack-protect"> | ||
40 | - <reg name="slr" bitsize="32"/> | ||
41 | - <reg name="shr" bitsize="32"/> | ||
42 | + <reg name="rslr" bitsize="32"/> | ||
43 | + <reg name="rshr" bitsize="32"/> | ||
44 | </feature> | ||
45 | diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c | ||
46 | index 609934e2b4..ab162fd258 100644 | ||
47 | --- a/gdb/features/microblaze-with-stack-protect.c | ||
48 | +++ b/gdb/features/microblaze-with-stack-protect.c | ||
49 | @@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) | ||
50 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
51 | |||
52 | feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect"); | ||
53 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); | ||
54 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); | ||
55 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); | ||
56 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); | ||
57 | |||
58 | tdesc_microblaze_with_stack_protect = result; | ||
59 | } | ||
60 | diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c | ||
61 | index ceb98ca8b8..7919ac96e6 100644 | ||
62 | --- a/gdb/features/microblaze.c | ||
63 | +++ b/gdb/features/microblaze.c | ||
64 | @@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void) | ||
65 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | ||
66 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | ||
67 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
68 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | ||
69 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | ||
70 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); | ||
71 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); | ||
72 | |||
73 | tdesc_microblaze = result; | ||
74 | } | ||
75 | diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml | ||
76 | index 96e99e2fb2..b9adadfade 100644 | ||
77 | --- a/gdb/features/microblaze64-core.xml | ||
78 | +++ b/gdb/features/microblaze64-core.xml | ||
79 | @@ -64,6 +64,6 @@ | ||
80 | <reg name="rtlbsx" bitsize="32"/> | ||
81 | <reg name="rtlblo" bitsize="32"/> | ||
82 | <reg name="rtlbhi" bitsize="32"/> | ||
83 | - <reg name="slr" bitsize="64"/> | ||
84 | - <reg name="shr" bitsize="64"/> | ||
85 | + <reg name="rslr" bitsize="64"/> | ||
86 | + <reg name="rshr" bitsize="64"/> | ||
87 | </feature> | ||
88 | diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml | ||
89 | index 1bbf5fc3ce..9d7ea8b9fd 100644 | ||
90 | --- a/gdb/features/microblaze64-stack-protect.xml | ||
91 | +++ b/gdb/features/microblaze64-stack-protect.xml | ||
92 | @@ -7,6 +7,6 @@ | ||
93 | |||
94 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
95 | <feature name="org.gnu.gdb.microblaze64.stack-protect"> | ||
96 | - <reg name="slr" bitsize="64"/> | ||
97 | - <reg name="shr" bitsize="64"/> | ||
98 | + <reg name="rslr" bitsize="64"/> | ||
99 | + <reg name="rshr" bitsize="64"/> | ||
100 | </feature> | ||
101 | diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c | ||
102 | index f448c9a749..249cb534da 100644 | ||
103 | --- a/gdb/features/microblaze64-with-stack-protect.c | ||
104 | +++ b/gdb/features/microblaze64-with-stack-protect.c | ||
105 | @@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void) | ||
106 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
107 | |||
108 | feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect"); | ||
109 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | ||
110 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | ||
111 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); | ||
112 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); | ||
113 | |||
114 | tdesc_microblaze64_with_stack_protect = result; | ||
115 | } | ||
116 | diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c | ||
117 | index 1aa37c4512..5d3e2c8cd9 100644 | ||
118 | --- a/gdb/features/microblaze64.c | ||
119 | +++ b/gdb/features/microblaze64.c | ||
120 | @@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void) | ||
121 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | ||
122 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | ||
123 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
124 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | ||
125 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | ||
126 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); | ||
127 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); | ||
128 | |||
129 | tdesc_microblaze64 = result; | ||
130 | } | ||
131 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | ||
132 | index 0605283c9e..7a0c2527f4 100644 | ||
133 | --- a/gdb/microblaze-tdep.c | ||
134 | +++ b/gdb/microblaze-tdep.c | ||
135 | @@ -77,7 +77,7 @@ static const char *microblaze_register_names[] = | ||
136 | "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", | ||
137 | "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", | ||
138 | "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", | ||
139 | - "slr", "shr" | ||
140 | + "rslr", "rshr" | ||
141 | }; | ||
142 | |||
143 | #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) | ||
144 | -- | ||
145 | 2.17.1 | ||
146 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch deleted file mode 100644 index 930e161c..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | From 9562530bc48c76d8f824b8f4901ad90dd2969086 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Fri, 17 Jan 2020 15:45:48 +0530 | ||
4 | Subject: [PATCH 43/43] Removing the header "gdb_assert.h" from MB target file | ||
5 | |||
6 | --- | ||
7 | gdb/microblaze-linux-tdep.c | 1 - | ||
8 | 1 file changed, 1 deletion(-) | ||
9 | |||
10 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
11 | index e3d2a7508d..5ef937219c 100644 | ||
12 | --- a/gdb/microblaze-linux-tdep.c | ||
13 | +++ b/gdb/microblaze-linux-tdep.c | ||
14 | @@ -37,7 +37,6 @@ | ||
15 | #include "linux-tdep.h" | ||
16 | #include "glibc-tdep.h" | ||
17 | |||
18 | -#include "gdb_assert.h" | ||
19 | |||
20 | #ifndef REGSET_H | ||
21 | #define REGSET_H 1 | ||
22 | -- | ||
23 | 2.17.1 | ||
24 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch deleted file mode 100644 index 29e198cd..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch +++ /dev/null | |||
@@ -1,364 +0,0 @@ | |||
1 | From 4f0e06249d23629e1d56b296e7a040b6968484e9 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@xilinx.com> | ||
3 | Date: Mon, 20 Jan 2020 12:48:13 -0800 | ||
4 | Subject: [PATCH 44/45] gdb/microblaze-linux-nat.c: Fix target compilation of | ||
5 | gdb | ||
6 | |||
7 | Add the nat to the configure file | ||
8 | |||
9 | Remove gdb_assert.h and gdb_string.h. | ||
10 | |||
11 | Adjust include for opcodes as well. | ||
12 | |||
13 | Update to match latest style of components, similar to ppc-linux-nat.c | ||
14 | |||
15 | Update: | ||
16 | get_regcache_arch(regcache) to regcache->arch() | ||
17 | regcache_raw_supply(regcache, ...) to regcache->raw_supply(...) | ||
18 | regcache_raw_collect(regcache, ...) to regcache->raw_collect(...) | ||
19 | |||
20 | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | ||
21 | --- | ||
22 | gdb/configure.nat | 4 + | ||
23 | gdb/microblaze-linux-nat.c | 149 +++++++++++++------------------------ | ||
24 | gdb/microblaze-tdep.c | 3 +- | ||
25 | 3 files changed, 57 insertions(+), 99 deletions(-) | ||
26 | |||
27 | diff --git a/gdb/configure.nat b/gdb/configure.nat | ||
28 | index 3118263ac6..b8dc7398a5 100644 | ||
29 | --- a/gdb/configure.nat | ||
30 | +++ b/gdb/configure.nat | ||
31 | @@ -260,6 +260,10 @@ case ${gdb_host} in | ||
32 | # Host: Motorola m68k running GNU/Linux. | ||
33 | NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o" | ||
34 | ;; | ||
35 | + microblaze*) | ||
36 | + # Host: Microblaze, running Linux | ||
37 | + NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o" | ||
38 | + ;; | ||
39 | mips) | ||
40 | # Host: Linux/MIPS | ||
41 | NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \ | ||
42 | diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c | ||
43 | index e9b8c9c522..e09a86bb3f 100644 | ||
44 | --- a/gdb/microblaze-linux-nat.c | ||
45 | +++ b/gdb/microblaze-linux-nat.c | ||
46 | @@ -36,11 +36,9 @@ | ||
47 | #include "dwarf2-frame.h" | ||
48 | #include "osabi.h" | ||
49 | |||
50 | -#include "gdb_assert.h" | ||
51 | -#include "gdb_string.h" | ||
52 | #include "target-descriptions.h" | ||
53 | -#include "opcodes/microblaze-opcm.h" | ||
54 | -#include "opcodes/microblaze-dis.h" | ||
55 | +#include "../opcodes/microblaze-opcm.h" | ||
56 | +#include "../opcodes/microblaze-dis.h" | ||
57 | |||
58 | #include "linux-nat.h" | ||
59 | #include "target-descriptions.h" | ||
60 | @@ -61,34 +59,27 @@ | ||
61 | /* Defines ps_err_e, struct ps_prochandle. */ | ||
62 | #include "gdb_proc_service.h" | ||
63 | |||
64 | -/* On GNU/Linux, threads are implemented as pseudo-processes, in which | ||
65 | - case we may be tracing more than one process at a time. In that | ||
66 | - case, inferior_ptid will contain the main process ID and the | ||
67 | - individual thread (process) ID. get_thread_id () is used to get | ||
68 | - the thread id if it's available, and the process id otherwise. */ | ||
69 | - | ||
70 | -int | ||
71 | -get_thread_id (ptid_t ptid) | ||
72 | -{ | ||
73 | - int tid = TIDGET (ptid); | ||
74 | - if (0 == tid) | ||
75 | - tid = PIDGET (ptid); | ||
76 | - return tid; | ||
77 | -} | ||
78 | - | ||
79 | -#define GET_THREAD_ID(PTID) get_thread_id (PTID) | ||
80 | - | ||
81 | /* Non-zero if our kernel may support the PTRACE_GETREGS and | ||
82 | PTRACE_SETREGS requests, for reading and writing the | ||
83 | general-purpose registers. Zero if we've tried one of | ||
84 | them and gotten an error. */ | ||
85 | int have_ptrace_getsetregs = 1; | ||
86 | |||
87 | +struct microblaze_linux_nat_target final : public linux_nat_target | ||
88 | +{ | ||
89 | + /* Add our register access methods. */ | ||
90 | + void fetch_registers (struct regcache *, int) override; | ||
91 | + void store_registers (struct regcache *, int) override; | ||
92 | + | ||
93 | + const struct target_desc *read_description () override; | ||
94 | +}; | ||
95 | + | ||
96 | +static microblaze_linux_nat_target the_microblaze_linux_nat_target; | ||
97 | + | ||
98 | static int | ||
99 | microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) | ||
100 | { | ||
101 | int u_addr = -1; | ||
102 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
103 | /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace | ||
104 | interface, and not the wordsize of the program's ABI. */ | ||
105 | int wordsize = sizeof (long); | ||
106 | @@ -105,18 +96,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) | ||
107 | static void | ||
108 | fetch_register (struct regcache *regcache, int tid, int regno) | ||
109 | { | ||
110 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
111 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
112 | + struct gdbarch *gdbarch = regcache->arch(); | ||
113 | /* This isn't really an address. But ptrace thinks of it as one. */ | ||
114 | CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); | ||
115 | int bytes_transferred; | ||
116 | - unsigned int offset; /* Offset of registers within the u area. */ | ||
117 | - char buf[MAX_REGISTER_SIZE]; | ||
118 | + char buf[sizeof(long)]; | ||
119 | |||
120 | if (regaddr == -1) | ||
121 | { | ||
122 | memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ | ||
123 | - regcache_raw_supply (regcache, regno, buf); | ||
124 | + regcache->raw_supply (regno, buf); | ||
125 | return; | ||
126 | } | ||
127 | |||
128 | @@ -149,14 +138,14 @@ fetch_register (struct regcache *regcache, int tid, int regno) | ||
129 | { | ||
130 | /* Little-endian values are always found at the left end of the | ||
131 | bytes transferred. */ | ||
132 | - regcache_raw_supply (regcache, regno, buf); | ||
133 | + regcache->raw_supply (regno, buf); | ||
134 | } | ||
135 | else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
136 | { | ||
137 | /* Big-endian values are found at the right end of the bytes | ||
138 | transferred. */ | ||
139 | size_t padding = (bytes_transferred - register_size (gdbarch, regno)); | ||
140 | - regcache_raw_supply (regcache, regno, buf + padding); | ||
141 | + regcache->raw_supply (regno, buf + padding); | ||
142 | } | ||
143 | else | ||
144 | internal_error (__FILE__, __LINE__, | ||
145 | @@ -175,8 +164,6 @@ fetch_register (struct regcache *regcache, int tid, int regno) | ||
146 | static int | ||
147 | fetch_all_gp_regs (struct regcache *regcache, int tid) | ||
148 | { | ||
149 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
150 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
151 | gdb_gregset_t gregset; | ||
152 | |||
153 | if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) | ||
154 | @@ -204,8 +191,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid) | ||
155 | static void | ||
156 | fetch_gp_regs (struct regcache *regcache, int tid) | ||
157 | { | ||
158 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
159 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
160 | int i; | ||
161 | |||
162 | if (have_ptrace_getsetregs) | ||
163 | @@ -219,17 +204,29 @@ fetch_gp_regs (struct regcache *regcache, int tid) | ||
164 | fetch_register (regcache, tid, i); | ||
165 | } | ||
166 | |||
167 | +/* Fetch registers from the child process. Fetch all registers if | ||
168 | + regno == -1, otherwise fetch all general registers or all floating | ||
169 | + point registers depending upon the value of regno. */ | ||
170 | +void | ||
171 | +microblaze_linux_nat_target::fetch_registers (struct regcache *regcache, int regno) | ||
172 | +{ | ||
173 | + pid_t tid = get_ptrace_pid (regcache->ptid ()); | ||
174 | + | ||
175 | + if (regno == -1) | ||
176 | + fetch_gp_regs (regcache, tid); | ||
177 | + else | ||
178 | + fetch_register (regcache, tid, regno); | ||
179 | +} | ||
180 | |||
181 | static void | ||
182 | store_register (const struct regcache *regcache, int tid, int regno) | ||
183 | { | ||
184 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
185 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
186 | + struct gdbarch *gdbarch = regcache->arch(); | ||
187 | /* This isn't really an address. But ptrace thinks of it as one. */ | ||
188 | CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); | ||
189 | int i; | ||
190 | size_t bytes_to_transfer; | ||
191 | - char buf[MAX_REGISTER_SIZE]; | ||
192 | + char buf[sizeof(long)]; | ||
193 | |||
194 | if (regaddr == -1) | ||
195 | return; | ||
196 | @@ -242,13 +239,13 @@ store_register (const struct regcache *regcache, int tid, int regno) | ||
197 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) | ||
198 | { | ||
199 | /* Little-endian values always sit at the left end of the buffer. */ | ||
200 | - regcache_raw_collect (regcache, regno, buf); | ||
201 | + regcache->raw_collect (regno, buf); | ||
202 | } | ||
203 | else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
204 | { | ||
205 | /* Big-endian values sit at the right end of the buffer. */ | ||
206 | size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); | ||
207 | - regcache_raw_collect (regcache, regno, buf + padding); | ||
208 | + regcache->raw_collect (regno, buf + padding); | ||
209 | } | ||
210 | |||
211 | for (i = 0; i < bytes_to_transfer; i += sizeof (long)) | ||
212 | @@ -281,8 +278,6 @@ store_register (const struct regcache *regcache, int tid, int regno) | ||
213 | static int | ||
214 | store_all_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
215 | { | ||
216 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
217 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
218 | gdb_gregset_t gregset; | ||
219 | |||
220 | if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) | ||
221 | @@ -319,8 +314,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
222 | static void | ||
223 | store_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
224 | { | ||
225 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
226 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
227 | int i; | ||
228 | |||
229 | if (have_ptrace_getsetregs) | ||
230 | @@ -335,33 +328,10 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
231 | } | ||
232 | |||
233 | |||
234 | -/* Fetch registers from the child process. Fetch all registers if | ||
235 | - regno == -1, otherwise fetch all general registers or all floating | ||
236 | - point registers depending upon the value of regno. */ | ||
237 | - | ||
238 | -static void | ||
239 | -microblaze_linux_fetch_inferior_registers (struct target_ops *ops, | ||
240 | - struct regcache *regcache, int regno) | ||
241 | -{ | ||
242 | - /* Get the thread id for the ptrace call. */ | ||
243 | - int tid = GET_THREAD_ID (inferior_ptid); | ||
244 | - | ||
245 | - if (regno == -1) | ||
246 | - fetch_gp_regs (regcache, tid); | ||
247 | - else | ||
248 | - fetch_register (regcache, tid, regno); | ||
249 | -} | ||
250 | - | ||
251 | -/* Store registers back into the inferior. Store all registers if | ||
252 | - regno == -1, otherwise store all general registers or all floating | ||
253 | - point registers depending upon the value of regno. */ | ||
254 | - | ||
255 | -static void | ||
256 | -microblaze_linux_store_inferior_registers (struct target_ops *ops, | ||
257 | - struct regcache *regcache, int regno) | ||
258 | +void | ||
259 | +microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno) | ||
260 | { | ||
261 | - /* Get the thread id for the ptrace call. */ | ||
262 | - int tid = GET_THREAD_ID (inferior_ptid); | ||
263 | + pid_t tid = get_ptrace_pid (regcache->ptid ()); | ||
264 | |||
265 | if (regno >= 0) | ||
266 | store_register (regcache, tid, regno); | ||
267 | @@ -373,59 +343,44 @@ microblaze_linux_store_inferior_registers (struct target_ops *ops, | ||
268 | thread debugging. */ | ||
269 | |||
270 | void | ||
271 | -fill_gregset (const struct regcache *regcache, | ||
272 | - gdb_gregset_t *gregsetp, int regno) | ||
273 | +supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | ||
274 | { | ||
275 | - microblaze_collect_gregset (NULL, regcache, regno, gregsetp); | ||
276 | + microblaze_supply_gregset (NULL, regcache, -1, gregsetp); | ||
277 | } | ||
278 | |||
279 | void | ||
280 | -supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | ||
281 | +fill_gregset (const struct regcache *regcache, | ||
282 | + gdb_gregset_t *gregsetp, int regno) | ||
283 | { | ||
284 | - microblaze_supply_gregset (NULL, regcache, -1, gregsetp); | ||
285 | + microblaze_collect_gregset (NULL, regcache, regno, gregsetp); | ||
286 | } | ||
287 | |||
288 | void | ||
289 | -fill_fpregset (const struct regcache *regcache, | ||
290 | - gdb_fpregset_t *fpregsetp, int regno) | ||
291 | +supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | ||
292 | { | ||
293 | /* FIXME. */ | ||
294 | + return; | ||
295 | } | ||
296 | |||
297 | void | ||
298 | -supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | ||
299 | +fill_fpregset (const struct regcache *regcache, | ||
300 | + gdb_fpregset_t *fpregsetp, int regno) | ||
301 | { | ||
302 | /* FIXME. */ | ||
303 | + return; | ||
304 | } | ||
305 | |||
306 | -static const struct target_desc * | ||
307 | -microblaze_linux_read_description (struct target_ops *ops) | ||
308 | +const struct target_desc * | ||
309 | +microblaze_linux_nat_target::read_description () | ||
310 | { | ||
311 | - CORE_ADDR microblaze_hwcap = 0; | ||
312 | - | ||
313 | - if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1) | ||
314 | - return NULL; | ||
315 | - | ||
316 | return NULL; | ||
317 | } | ||
318 | |||
319 | - | ||
320 | -void _initialize_microblaze_linux_nat (void); | ||
321 | - | ||
322 | void | ||
323 | _initialize_microblaze_linux_nat (void) | ||
324 | { | ||
325 | - struct target_ops *t; | ||
326 | - | ||
327 | - /* Fill in the generic GNU/Linux methods. */ | ||
328 | - t = linux_target (); | ||
329 | - | ||
330 | - /* Add our register access methods. */ | ||
331 | - t->to_fetch_registers = microblaze_linux_fetch_inferior_registers; | ||
332 | - t->to_store_registers = microblaze_linux_store_inferior_registers; | ||
333 | - | ||
334 | - t->to_read_description = microblaze_linux_read_description; | ||
335 | + linux_target = &the_microblaze_linux_nat_target; | ||
336 | |||
337 | /* Register the target. */ | ||
338 | - linux_nat_add_target (t); | ||
339 | + add_inf_child_target (linux_target); | ||
340 | } | ||
341 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | ||
342 | index 7a0c2527f4..23deb24d26 100644 | ||
343 | --- a/gdb/microblaze-tdep.c | ||
344 | +++ b/gdb/microblaze-tdep.c | ||
345 | @@ -657,7 +657,7 @@ static std::vector<CORE_ADDR> | ||
346 | microblaze_software_single_step (struct regcache *regcache) | ||
347 | { | ||
348 | // struct gdbarch *arch = get_frame_arch(frame); | ||
349 | - struct gdbarch *arch = get_regcache_arch (regcache); | ||
350 | + struct gdbarch *arch = regcache->arch(); | ||
351 | struct address_space *aspace = get_regcache_aspace (regcache); | ||
352 | // struct address_space *aspace = get_frame_address_space (frame); | ||
353 | struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
354 | @@ -876,7 +876,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch, | ||
355 | static void | ||
356 | make_regs (struct gdbarch *arch) | ||
357 | { | ||
358 | - struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
359 | int mach = gdbarch_bfd_arch_info (arch)->mach; | ||
360 | |||
361 | if (mach == bfd_mach_microblaze64) | ||
362 | -- | ||
363 | 2.17.1 | ||
364 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch deleted file mode 100644 index 7677ab35..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | From 9c8f4f1c11d324f0788da3a077b06c6bc9e6f2b8 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 16 Apr 2020 18:08:58 +0530 | ||
4 | Subject: [PATCH] [Patch,MicroBlaze m64] : This patch will remove imml 0 and | ||
5 | imml -1 instructions when the offset is less than 16 bit for Type A branch EA | ||
6 | instructions. | ||
7 | |||
8 | --- | ||
9 | gas/config/tc-microblaze.c | 6 ++---- | ||
10 | 1 file changed, 2 insertions(+), 4 deletions(-) | ||
11 | |||
12 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
13 | index 088eae73a9..12fd145a03 100644 | ||
14 | --- a/gas/config/tc-microblaze.c | ||
15 | +++ b/gas/config/tc-microblaze.c | ||
16 | @@ -2150,9 +2150,7 @@ md_assemble (char * str) | ||
17 | if (exp.X_op != O_constant) | ||
18 | { | ||
19 | char *opc; | ||
20 | - if (microblaze_arch_size == 64 && (streq (name, "breai") || | ||
21 | - streq (name, "breaid") || | ||
22 | - streq (name, "brai") || streq (name, "braid"))) | ||
23 | + if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid"))) | ||
24 | opc = str_microblaze_64; | ||
25 | else | ||
26 | opc = NULL; | ||
27 | @@ -2920,7 +2918,7 @@ md_apply_fix (fixS * fixP, | ||
28 | case BFD_RELOC_MICROBLAZE_64: | ||
29 | case BFD_RELOC_MICROBLAZE_64_PCREL: | ||
30 | if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64 | ||
31 | - || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) | ||
32 | + || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64)) | ||
33 | { | ||
34 | /* Generate the imm instruction. */ | ||
35 | if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887) | ||
36 | -- | ||
37 | 2.17.1 | ||
38 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch deleted file mode 100644 index 93314594..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0047-Patch-MicroBlaze-commit-for-triggering-build-to-remo.patch +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | From 2ab2547493c871b452adb2cb8754691b0adf5f03 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Sun, 19 Apr 2020 21:17:03 +0530 | ||
4 | Subject: [PATCH 47/49] [Patch,MicroBlaze] : commit for triggering build to | ||
5 | remove imml for Type A BEA insns. | ||
6 | |||
7 | --- | ||
8 | gas/config/tc-microblaze.c | 1 + | ||
9 | 1 file changed, 1 insertion(+) | ||
10 | |||
11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
12 | index 12fd145a03..7ae0dbc018 100644 | ||
13 | --- a/gas/config/tc-microblaze.c | ||
14 | +++ b/gas/config/tc-microblaze.c | ||
15 | @@ -2150,6 +2150,7 @@ md_assemble (char * str) | ||
16 | if (exp.X_op != O_constant) | ||
17 | { | ||
18 | char *opc; | ||
19 | +/* removal imml 0 and imml -1 for bea type A insns */ | ||
20 | if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid"))) | ||
21 | opc = str_microblaze_64; | ||
22 | else | ||
23 | -- | ||
24 | 2.17.1 | ||
25 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch deleted file mode 100644 index 30fbbe7b..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Patch-MicroBlaze-Adding-more-description-to-the-imml.patch +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | From 9b61edf44e44303f1937e98a02a7d78f750a9b24 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 30 Apr 2020 19:40:16 +0530 | ||
4 | Subject: [PATCH 48/49] [Patch,MicroBlaze] : Adding more description to the | ||
5 | imml removal for bea type B insns. | ||
6 | |||
7 | --- | ||
8 | gas/config/tc-microblaze.c | 3 ++- | ||
9 | 1 file changed, 2 insertions(+), 1 deletion(-) | ||
10 | |||
11 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | ||
12 | index 7ae0dbc018..1d37af54bf 100644 | ||
13 | --- a/gas/config/tc-microblaze.c | ||
14 | +++ b/gas/config/tc-microblaze.c | ||
15 | @@ -2150,7 +2150,8 @@ md_assemble (char * str) | ||
16 | if (exp.X_op != O_constant) | ||
17 | { | ||
18 | char *opc; | ||
19 | -/* removal imml 0 and imml -1 for bea type A insns */ | ||
20 | +/* removal of imml 0 and imml -1 for bea type A insns. | ||
21 | +if offset is 16 bit then imml instructions are redundant */ | ||
22 | if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid"))) | ||
23 | opc = str_microblaze_64; | ||
24 | else | ||
25 | -- | ||
26 | 2.17.1 | ||
27 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch deleted file mode 100644 index b751f294..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0049-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | From ba660177916ffb8a0a9882c27246a201dbc218bd Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Wed, 17 Jun 2020 21:20:26 +0530 | ||
4 | Subject: [PATCH 49/49] [Patch,MicroBlaze] : improper address mapping of | ||
5 | PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't | ||
6 | need to override PROVIDE symbols if symbols are defined in libraries and | ||
7 | linker so I am disabling override for PROVIDE symbols. | ||
8 | |||
9 | --- | ||
10 | ld/ldlang.c | 12 +++++++++--- | ||
11 | 1 file changed, 9 insertions(+), 3 deletions(-) | ||
12 | |||
13 | diff --git a/ld/ldlang.c b/ld/ldlang.c | ||
14 | index 33f6bda292..a0b404c04d 100644 | ||
15 | --- a/ld/ldlang.c | ||
16 | +++ b/ld/ldlang.c | ||
17 | @@ -3559,10 +3559,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) | ||
18 | plugin_insert = NULL; | ||
19 | #endif | ||
20 | break; | ||
21 | + /* This is from a --defsym on the command line. */ | ||
22 | case lang_assignment_statement_enum: | ||
23 | - if (s->assignment_statement.exp->type.node_class != etree_assert) | ||
24 | - exp_fold_tree_no_dot (s->assignment_statement.exp); | ||
25 | - break; | ||
26 | + if (s->assignment_statement.exp->type.node_class != etree_assert) | ||
27 | + { | ||
28 | + if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide)) | ||
29 | + ; | ||
30 | + else | ||
31 | + exp_fold_tree_no_dot (s->assignment_statement.exp); | ||
32 | + } | ||
33 | + break; | ||
34 | default: | ||
35 | break; | ||
36 | } | ||
37 | -- | ||
38 | 2.17.1 | ||
39 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch deleted file mode 100644 index 9469732e..00000000 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0050-Fix-i386-md_pseudo_table.patch +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | Fix a possible compilation issue on i386 when using microblaze patches | ||
2 | |||
3 | Due to patch 0019, a later item may need to refer to this table. | ||
4 | |||
5 | | ../../gas/config/tc-i386.c:1155:20: error: conflicting types for ‘md_pseudo_table’ | ||
6 | | const pseudo_typeS md_pseudo_table[] = | ||
7 | | ^~~~~~~~~~~~~~~ | ||
8 | | In file included from ../../gas/as.h:565:0, | ||
9 | | from ../../gas/config/tc-i386.c:28: | ||
10 | | ../../gas/tc.h:25:21: note: previous declaration of ‘md_pseudo_table’ was here | ||
11 | | extern pseudo_typeS md_pseudo_table[]; | ||
12 | | ^~~~~~~~~~~~~~~ | ||
13 | |||
14 | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | ||
15 | |||
16 | Index: git/gas/config/tc-i386.c | ||
17 | =================================================================== | ||
18 | --- git.orig/gas/config/tc-i386.c | ||
19 | +++ git/gas/config/tc-i386.c | ||
20 | @@ -1152,7 +1152,7 @@ pe_lcomm (int needs_align) | ||
21 | } | ||
22 | #endif | ||
23 | |||
24 | -const pseudo_typeS md_pseudo_table[] = | ||
25 | +pseudo_typeS md_pseudo_table[] = | ||
26 | { | ||
27 | #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO) | ||
28 | {"align", s_align_bytes, 0}, | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch index 28247daa..af5a65cb 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch | |||
@@ -1,35 +1,29 @@ | |||
1 | From 23e6126392ab228c1d6483c02ffc32b15f00777e Mon Sep 17 00:00:00 2001 | 1 | From d2ebb14b318166dd91fe35bf3531d758dcbc995a Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 11 Jan 2017 13:13:57 +0530 | 3 | Date: Wed, 11 Jan 2017 13:13:57 +0530 |
4 | Subject: [PATCH 01/63] LOCAL]: Testsuite - builtins tests require fpic | 4 | Subject: [PATCH 01/58] [LOCAL]: Testsuite - builtins tests require fpic |
5 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
6 | 5 | ||
7 | Conflicts: | 6 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
8 | |||
9 | gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | ||
10 | --- | 7 | --- |
11 | gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 8 ++++++++ | 8 | gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 5 +++++ |
12 | 1 file changed, 8 insertions(+) | 9 | 1 file changed, 5 insertions(+) |
13 | 10 | ||
14 | diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 11 | diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp |
15 | index acb9eac..363ce07 100644 | 12 | index 594c9297958..4103d43748d 100644 |
16 | --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 13 | --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp |
17 | +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 14 | +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp |
18 | @@ -48,6 +48,14 @@ if { [istarget *-*-eabi*] | 15 | @@ -48,6 +48,11 @@ if { [istarget *-*-eabi*] |
19 | lappend additional_flags "-Wl,--allow-multiple-definition" | 16 | lappend additional_flags "-Wl,--allow-multiple-definition" |
20 | } | 17 | } |
21 | 18 | ||
22 | +<<<<<<< HEAD | ||
23 | +======= | ||
24 | +if [istarget "microblaze*-*-linux*"] { | 19 | +if [istarget "microblaze*-*-linux*"] { |
25 | + lappend additional_flags "-Wl,-zmuldefs" | 20 | + lappend additional_flags "-Wl,-zmuldefs" |
26 | + lappend additional_flags "-fPIC" | 21 | + lappend additional_flags "-fPIC" |
27 | +} | 22 | +} |
28 | + | 23 | + |
29 | +>>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic | ||
30 | foreach src [lsort [find $srcdir/$subdir *.c]] { | 24 | foreach src [lsort [find $srcdir/$subdir *.c]] { |
31 | if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { | 25 | if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { |
32 | c-torture-execute [list $src \ | 26 | c-torture-execute [list $src \ |
33 | -- | 27 | -- |
34 | 2.7.4 | 28 | 2.17.1 |
35 | 29 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch index 8e4a2a32..976896da 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch | |||
@@ -1,10 +1,11 @@ | |||
1 | From e9c8884f473eae307945ceabaa1ff03278236c23 Mon Sep 17 00:00:00 2001 | 1 | From 54394232ffbaa9474f8a78c6882f08a48842242e Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 11 Jan 2017 14:31:10 +0530 | 3 | Date: Wed, 11 Jan 2017 14:31:10 +0530 |
4 | Subject: [PATCH 02/63] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C This | 4 | Subject: [PATCH 02/58] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C |
5 | particular testcase fails with a timeout. Instead, fail it at compile-time | 5 | |
6 | for microblaze. This speeds up the testsuite without removing it from the | 6 | This particular testcase fails with a timeout. Instead, fail it |
7 | FAIL reports. | 7 | at compile-time for microblaze. This speeds up the testsuite without |
8 | removing it from the FAIL reports. | ||
8 | 9 | ||
9 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 10 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
10 | --- | 11 | --- |
@@ -12,7 +13,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | |||
12 | 1 file changed, 4 insertions(+) | 13 | 1 file changed, 4 insertions(+) |
13 | 14 | ||
14 | diff --git a/gcc/testsuite/g++.dg/opt/memcpy1.C b/gcc/testsuite/g++.dg/opt/memcpy1.C | 15 | diff --git a/gcc/testsuite/g++.dg/opt/memcpy1.C b/gcc/testsuite/g++.dg/opt/memcpy1.C |
15 | index 3862756..db9f990 100644 | 16 | index 3862756083d..db9f990f781 100644 |
16 | --- a/gcc/testsuite/g++.dg/opt/memcpy1.C | 17 | --- a/gcc/testsuite/g++.dg/opt/memcpy1.C |
17 | +++ b/gcc/testsuite/g++.dg/opt/memcpy1.C | 18 | +++ b/gcc/testsuite/g++.dg/opt/memcpy1.C |
18 | @@ -4,6 +4,10 @@ | 19 | @@ -4,6 +4,10 @@ |
@@ -27,5 +28,5 @@ index 3862756..db9f990 100644 | |||
27 | typedef uint8_t uint8; | 28 | typedef uint8_t uint8; |
28 | __extension__ typedef __SIZE_TYPE__ size_t; | 29 | __extension__ typedef __SIZE_TYPE__ size_t; |
29 | -- | 30 | -- |
30 | 2.7.4 | 31 | 2.17.1 |
31 | 32 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch index ef994457..8e6d22db 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch | |||
@@ -1,14 +1,12 @@ | |||
1 | From fb4b4d4ecba04859d52a653d7c453df92014dc38 Mon Sep 17 00:00:00 2001 | 1 | From f0a446bcb453630d8116b30f542aee79407228ea Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 11 Jan 2017 15:28:38 +0530 | 3 | Date: Wed, 11 Jan 2017 15:28:38 +0530 |
4 | Subject: [PATCH 03/63] [LOCAL]: Testsuite - explicitly add -fivopts for tests | 4 | Subject: [PATCH 03/58] [LOCAL]: Testsuite - explicitly add -fivopts for tests |
5 | that depend on it (test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt | 5 | that depend on it |
6 | exist in 4.6 branch) | ||
7 | 6 | ||
8 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 7 | (test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt exist in 4.6 branch) |
9 | 8 | ||
10 | Conflicts: | 9 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
11 | gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | ||
12 | --- | 10 | --- |
13 | gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +- | 11 | gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +- |
14 | gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +- | 12 | gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +- |
@@ -21,7 +19,7 @@ Conflicts: | |||
21 | 8 files changed, 8 insertions(+), 8 deletions(-) | 19 | 8 files changed, 8 insertions(+), 8 deletions(-) |
22 | 20 | ||
23 | diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 21 | diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C |
24 | index 438db88..ede883e 100644 | 22 | index 438db882043..ede883eb284 100644 |
25 | --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 23 | --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C |
26 | +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 24 | +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C |
27 | @@ -1,5 +1,5 @@ | 25 | @@ -1,5 +1,5 @@ |
@@ -32,7 +30,7 @@ index 438db88..ede883e 100644 | |||
32 | void test (int *b, int *e, int stride) | 30 | void test (int *b, int *e, int stride) |
33 | { | 31 | { |
34 | diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 32 | diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C |
35 | index 07ff1b7..a09710c 100644 | 33 | index cbb6c850baa..34248021c23 100644 |
36 | --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 34 | --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C |
37 | +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 35 | +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C |
38 | @@ -1,5 +1,5 @@ | 36 | @@ -1,5 +1,5 @@ |
@@ -43,7 +41,7 @@ index 07ff1b7..a09710c 100644 | |||
43 | class MinimalVec3 | 41 | class MinimalVec3 |
44 | { | 42 | { |
45 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 43 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c |
46 | index bda2516..22c8a5d 100644 | 44 | index bda25167353..22c8a5dcffe 100644 |
47 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 45 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c |
48 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 46 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c |
49 | @@ -1,7 +1,7 @@ | 47 | @@ -1,7 +1,7 @@ |
@@ -56,7 +54,7 @@ index bda2516..22c8a5d 100644 | |||
56 | 54 | ||
57 | /* Size of this structure should be sufficiently weird so that no memory | 55 | /* Size of this structure should be sufficiently weird so that no memory |
58 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 56 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c |
59 | index f0770ab..65d74c8 100644 | 57 | index f0770abdbbc..65d74c8e620 100644 |
60 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 58 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c |
61 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 59 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c |
62 | @@ -1,7 +1,7 @@ | 60 | @@ -1,7 +1,7 @@ |
@@ -69,7 +67,7 @@ index f0770ab..65d74c8 100644 | |||
69 | 67 | ||
70 | /* Size of this structure should be sufficiently weird so that no memory | 68 | /* Size of this structure should be sufficiently weird so that no memory |
71 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 69 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c |
72 | index 5f42857..9bc86ee 100644 | 70 | index 5f42857fe13..9bc86ee0d23 100644 |
73 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 71 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c |
74 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 72 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c |
75 | @@ -1,7 +1,7 @@ | 73 | @@ -1,7 +1,7 @@ |
@@ -82,7 +80,7 @@ index 5f42857..9bc86ee 100644 | |||
82 | void foo(long); | 80 | void foo(long); |
83 | 81 | ||
84 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 82 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c |
85 | index 50d86a0..1e3eacd 100644 | 83 | index 50d86a00485..1e3eacd33d1 100644 |
86 | --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 84 | --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c |
87 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 85 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c |
88 | @@ -1,5 +1,5 @@ | 86 | @@ -1,5 +1,5 @@ |
@@ -93,7 +91,7 @@ index 50d86a0..1e3eacd 100644 | |||
93 | 91 | ||
94 | void | 92 | void |
95 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 93 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c |
96 | index 2c6cfc6..648e6e6 100644 | 94 | index 2c6cfc6f831..648e6e67e80 100644 |
97 | --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 95 | --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c |
98 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 96 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c |
99 | @@ -1,5 +1,5 @@ | 97 | @@ -1,5 +1,5 @@ |
@@ -104,7 +102,7 @@ index 2c6cfc6..648e6e6 100644 | |||
104 | void vnum_test8(int *data) | 102 | void vnum_test8(int *data) |
105 | { | 103 | { |
106 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 104 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c |
107 | index e911bfc..5d3e7e0 100644 | 105 | index e911bfcd521..5d3e7e0801a 100644 |
108 | --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 106 | --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c |
109 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 107 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c |
110 | @@ -1,5 +1,5 @@ | 108 | @@ -1,5 +1,5 @@ |
@@ -115,5 +113,5 @@ index e911bfc..5d3e7e0 100644 | |||
115 | /* Slightly changed testcase from PR middle-end/40815. */ | 113 | /* Slightly changed testcase from PR middle-end/40815. */ |
116 | void bar(char*, char*, int); | 114 | void bar(char*, char*, int); |
117 | -- | 115 | -- |
118 | 2.7.4 | 116 | 2.17.1 |
119 | 117 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch index a575b518..4974462c 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch | |||
@@ -1,35 +1,30 @@ | |||
1 | From 38022a87b01cf2e36b605d4f6d0faab22a0d2f44 Mon Sep 17 00:00:00 2001 | 1 | From f8809fdebc3ef3927695c84224d3446fa13447d6 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 11 Jan 2017 15:46:28 +0530 | 3 | Date: Wed, 11 Jan 2017 15:46:28 +0530 |
4 | Subject: [PATCH 04/63] [LOCAL]: For dejagnu static testing on qemu, suppress | 4 | Subject: [PATCH 04/58] [LOCAL]: For dejagnu static testing on qemu, suppress |
5 | warnings about multiple definitions from the test function and libc in line | 5 | warnings |
6 | with method used by powerpc. Dynamic linking and using a qemu binary which | 6 | |
7 | understands sysroot resolves all test failures with builtins | 7 | about multiple definitions from the test function and libc in line |
8 | with method used by powerpc. Dynamic linking and using a qemu binary | ||
9 | which understands sysroot resolves all test failures with builtins | ||
8 | 10 | ||
9 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | 11 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
10 | --- | 12 | --- |
11 | gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 4 ---- | 13 | gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 1 - |
12 | 1 file changed, 4 deletions(-) | 14 | 1 file changed, 1 deletion(-) |
13 | 15 | ||
14 | diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 16 | diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp |
15 | index 363ce07..56b1a9a 100644 | 17 | index 4103d43748d..d7c9b281d01 100644 |
16 | --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 18 | --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp |
17 | +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 19 | +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp |
18 | @@ -48,14 +48,10 @@ if { [istarget *-*-eabi*] | 20 | @@ -50,7 +50,6 @@ if { [istarget *-*-eabi*] |
19 | lappend additional_flags "-Wl,--allow-multiple-definition" | ||
20 | } | ||
21 | 21 | ||
22 | -<<<<<<< HEAD | ||
23 | -======= | ||
24 | if [istarget "microblaze*-*-linux*"] { | 22 | if [istarget "microblaze*-*-linux*"] { |
25 | lappend additional_flags "-Wl,-zmuldefs" | 23 | lappend additional_flags "-Wl,-zmuldefs" |
26 | - lappend additional_flags "-fPIC" | 24 | - lappend additional_flags "-fPIC" |
27 | } | 25 | } |
28 | 26 | ||
29 | ->>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic | ||
30 | foreach src [lsort [find $srcdir/$subdir *.c]] { | 27 | foreach src [lsort [find $srcdir/$subdir *.c]] { |
31 | if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { | ||
32 | c-torture-execute [list $src \ | ||
33 | -- | 28 | -- |
34 | 2.7.4 | 29 | 2.17.1 |
35 | 30 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch index 18fd6dec..c21492e8 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch | |||
@@ -1,8 +1,8 @@ | |||
1 | From a7dfb5f158f16f88b30aabe903c4fb088889eeef Mon Sep 17 00:00:00 2001 | 1 | From 802078fa3e76ea7fdb29f3baf1d4d9baae42bc0b Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 11 Jan 2017 15:50:35 +0530 | 3 | Date: Wed, 11 Jan 2017 15:50:35 +0530 |
4 | Subject: [PATCH 05/63] [Patch, testsuite]: Add MicroBlaze to target-supports | 4 | Subject: [PATCH 05/58] [Patch, testsuite]: Add MicroBlaze to target-supports |
5 | for atomic buil. .tin tests | 5 | for atomic builtin tests |
6 | 6 | ||
7 | MicroBlaze added to supported targets for atomic builtin tests. | 7 | MicroBlaze added to supported targets for atomic builtin tests. |
8 | 8 | ||
@@ -19,10 +19,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
19 | 1 file changed, 1 insertion(+) | 19 | 1 file changed, 1 insertion(+) |
20 | 20 | ||
21 | diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp | 21 | diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp |
22 | index cda0f3d..0a69659e 100644 | 22 | index 13761491e63..d2f65dac32c 100644 |
23 | --- a/gcc/testsuite/lib/target-supports.exp | 23 | --- a/gcc/testsuite/lib/target-supports.exp |
24 | +++ b/gcc/testsuite/lib/target-supports.exp | 24 | +++ b/gcc/testsuite/lib/target-supports.exp |
25 | @@ -6829,6 +6829,7 @@ proc check_effective_target_sync_int_long { } { | 25 | @@ -7581,6 +7581,7 @@ proc check_effective_target_sync_int_long { } { |
26 | && [check_effective_target_arm_acq_rel]) | 26 | && [check_effective_target_arm_acq_rel]) |
27 | || [istarget bfin*-*linux*] | 27 | || [istarget bfin*-*linux*] |
28 | || [istarget hppa*-*linux*] | 28 | || [istarget hppa*-*linux*] |
@@ -31,5 +31,5 @@ index cda0f3d..0a69659e 100644 | |||
31 | || [istarget powerpc*-*-*] | 31 | || [istarget powerpc*-*-*] |
32 | || [istarget crisv32-*-*] || [istarget cris-*-*] | 32 | || [istarget crisv32-*-*] || [istarget cris-*-*] |
33 | -- | 33 | -- |
34 | 2.7.4 | 34 | 2.17.1 |
35 | 35 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch deleted file mode 100644 index b428d121..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | From 7f0a129701ce9809d79ea4618f3293062bd24bbf Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Sat, 26 Aug 2017 19:21:18 -0700 | ||
4 | Subject: [PATCH] Testsuite - explicitly add -fivopts for tests that depend on | ||
5 | it | ||
6 | |||
7 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | ||
8 | Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> | ||
9 | Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> | ||
10 | Upstream-Status: Pending | ||
11 | --- | ||
12 | gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +- | ||
13 | gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +- | ||
14 | gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 2 +- | ||
15 | gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 2 +- | ||
16 | gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 2 +- | ||
17 | gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 2 +- | ||
18 | gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 2 +- | ||
19 | gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 2 +- | ||
20 | 8 files changed, 8 insertions(+), 8 deletions(-) | ||
21 | |||
22 | diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | ||
23 | index 438db88204..ede883eb28 100644 | ||
24 | --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | ||
25 | +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | ||
26 | @@ -1,5 +1,5 @@ | ||
27 | /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ | ||
28 | -/* { dg-options "-O2 -fdump-tree-ivopts-details" } */ | ||
29 | +/* { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } */ | ||
30 | |||
31 | void test (int *b, int *e, int stride) | ||
32 | { | ||
33 | diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | ||
34 | index eb72581390..02f3ea4a7d 100644 | ||
35 | --- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | ||
36 | +++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | ||
37 | @@ -1,5 +1,5 @@ | ||
38 | // { dg-do compile } | ||
39 | -// { dg-options "-O2 -fdump-tree-ivopts-details" } | ||
40 | +// { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } | ||
41 | |||
42 | class MinimalVec3 | ||
43 | { | ||
44 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | ||
45 | index bda2516735..22c8a5dcff 100644 | ||
46 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | ||
47 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | ||
48 | @@ -1,7 +1,7 @@ | ||
49 | /* A test for strength reduction and induction variable elimination. */ | ||
50 | |||
51 | /* { dg-do compile } */ | ||
52 | -/* { dg-options "-O1 -fdump-tree-optimized" } */ | ||
53 | +/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ | ||
54 | /* { dg-require-effective-target size32plus } */ | ||
55 | |||
56 | /* Size of this structure should be sufficiently weird so that no memory | ||
57 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | ||
58 | index f0770abdbb..65d74c8e62 100644 | ||
59 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | ||
60 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | ||
61 | @@ -1,7 +1,7 @@ | ||
62 | /* A test for strength reduction and induction variable elimination. */ | ||
63 | |||
64 | /* { dg-do compile } */ | ||
65 | -/* { dg-options "-O1 -fdump-tree-optimized" } */ | ||
66 | +/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ | ||
67 | /* { dg-require-effective-target size32plus } */ | ||
68 | |||
69 | /* Size of this structure should be sufficiently weird so that no memory | ||
70 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | ||
71 | index 5f42857fe1..9bc86ee0d2 100644 | ||
72 | --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | ||
73 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | ||
74 | @@ -1,7 +1,7 @@ | ||
75 | /* A test for induction variable merging. */ | ||
76 | |||
77 | /* { dg-do compile } */ | ||
78 | -/* { dg-options "-O1 -fdump-tree-optimized" } */ | ||
79 | +/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ | ||
80 | |||
81 | void foo(long); | ||
82 | |||
83 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | ||
84 | index 3c8ee06016..db192a657f 100644 | ||
85 | --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | ||
86 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | ||
87 | @@ -1,5 +1,5 @@ | ||
88 | /* { dg-do compile } */ | ||
89 | -/* { dg-options "-O2 -Wunsafe-loop-optimizations" } */ | ||
90 | +/* { dg-options "-O2 -fivopts -Wunsafe-loop-optimizations" } */ | ||
91 | extern void g(void); | ||
92 | |||
93 | void | ||
94 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | ||
95 | index 2c6cfc6f83..648e6e67e8 100644 | ||
96 | --- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | ||
97 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | ||
98 | @@ -1,5 +1,5 @@ | ||
99 | /* { dg-do compile } */ | ||
100 | -/* { dg-options "-O2 -fdump-tree-ivopts" } */ | ||
101 | +/* { dg-options "-O2 -fivopts -fdump-tree-ivopts" } */ | ||
102 | |||
103 | void vnum_test8(int *data) | ||
104 | { | ||
105 | diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | ||
106 | index e911bfcd52..5d3e7e0801 100644 | ||
107 | --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | ||
108 | +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | ||
109 | @@ -1,5 +1,5 @@ | ||
110 | /* { dg-do compile } */ | ||
111 | -/* { dg-options "-Os -fdump-tree-optimized" } */ | ||
112 | +/* { dg-options "-Os -fivopts -fdump-tree-optimized" } */ | ||
113 | |||
114 | /* Slightly changed testcase from PR middle-end/40815. */ | ||
115 | void bar(char*, char*, int); | ||
116 | -- | ||
117 | 2.14.2 | ||
118 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch index e4a86dc4..9c8cce92 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch | |||
@@ -1,8 +1,9 @@ | |||
1 | From e23b1a424cfd852f7a33f29c0b80d867ca533c3b Mon Sep 17 00:00:00 2001 | 1 | From 8c24cb4f95f46793ac7500a5d6181d93f2b0d2c5 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 11 Jan 2017 16:20:01 +0530 | 3 | Date: Wed, 11 Jan 2017 16:20:01 +0530 |
4 | Subject: [PATCH 06/63] [Patch, testsuite]: Update MicroBlaze strings test for | 4 | Subject: [PATCH 06/58] [Patch, testsuite]: Update MicroBlaze strings test |
5 | new scan-assembly output resulting in use of $LC label | 5 | |
6 | for new scan-assembly output resulting in use of $LC label | ||
6 | 7 | ||
7 | ChangeLog/testsuite | 8 | ChangeLog/testsuite |
8 | 9 | ||
@@ -17,7 +18,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
17 | 1 file changed, 4 insertions(+), 2 deletions(-) | 18 | 1 file changed, 4 insertions(+), 2 deletions(-) |
18 | 19 | ||
19 | diff --git a/gcc/testsuite/gcc.target/microblaze/others/strings1.c b/gcc/testsuite/gcc.target/microblaze/others/strings1.c | 20 | diff --git a/gcc/testsuite/gcc.target/microblaze/others/strings1.c b/gcc/testsuite/gcc.target/microblaze/others/strings1.c |
20 | index 7a63faf..0403b7b 100644 | 21 | index 7a63faf79f2..0403b7bdca9 100644 |
21 | --- a/gcc/testsuite/gcc.target/microblaze/others/strings1.c | 22 | --- a/gcc/testsuite/gcc.target/microblaze/others/strings1.c |
22 | +++ b/gcc/testsuite/gcc.target/microblaze/others/strings1.c | 23 | +++ b/gcc/testsuite/gcc.target/microblaze/others/strings1.c |
23 | @@ -1,13 +1,15 @@ | 24 | @@ -1,13 +1,15 @@ |
@@ -39,5 +40,5 @@ index 7a63faf..0403b7b 100644 | |||
39 | somefunc (string2); | 40 | somefunc (string2); |
40 | } | 41 | } |
41 | -- | 42 | -- |
42 | 2.7.4 | 43 | 2.17.1 |
43 | 44 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch index 8c43de05..4d1e2017 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch | |||
@@ -1,9 +1,11 @@ | |||
1 | From c210044f15df2433438b6b74e5c2bcf79458c2e4 Mon Sep 17 00:00:00 2001 | 1 | From 38ece4b2dc5d34c1b88b6ea8dd8e62a0986f8f6c Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 16:14:15 +0530 | 3 | Date: Thu, 12 Jan 2017 16:14:15 +0530 |
4 | Subject: [PATCH 07/63] [Patch, testsuite]: Allow MicroBlaze .weakext pattern | 4 | Subject: [PATCH 07/58] [Patch, testsuite]: Allow MicroBlaze .weakext pattern |
5 | in regex match Extend regex pattern to include optional ext at the end of | 5 | in regex match |
6 | .weak to match the MicroBlaze weak label .weakext | 6 | |
7 | Extend regex pattern to include optional ext at the end of | ||
8 | .weak to match the MicroBlaze weak label .weakext | ||
7 | 9 | ||
8 | ChangeLog/testsuite | 10 | ChangeLog/testsuite |
9 | 11 | ||
@@ -25,7 +27,7 @@ Conflicts: | |||
25 | 3 files changed, 4 insertions(+), 4 deletions(-) | 27 | 3 files changed, 4 insertions(+), 4 deletions(-) |
26 | 28 | ||
27 | diff --git a/gcc/testsuite/g++.dg/abi/rtti3.C b/gcc/testsuite/g++.dg/abi/rtti3.C | 29 | diff --git a/gcc/testsuite/g++.dg/abi/rtti3.C b/gcc/testsuite/g++.dg/abi/rtti3.C |
28 | index 0cc7d3e..f284cd9 100644 | 30 | index 0cc7d3e79d0..f284cd9255c 100644 |
29 | --- a/gcc/testsuite/g++.dg/abi/rtti3.C | 31 | --- a/gcc/testsuite/g++.dg/abi/rtti3.C |
30 | +++ b/gcc/testsuite/g++.dg/abi/rtti3.C | 32 | +++ b/gcc/testsuite/g++.dg/abi/rtti3.C |
31 | @@ -3,8 +3,8 @@ | 33 | @@ -3,8 +3,8 @@ |
@@ -40,7 +42,7 @@ index 0cc7d3e..f284cd9 100644 | |||
40 | // { dg-final { scan-assembler-not ".weak_definition\[ \t\]_?_ZTIPP1A" { target { *-*-darwin* } } } } | 42 | // { dg-final { scan-assembler-not ".weak_definition\[ \t\]_?_ZTIPP1A" { target { *-*-darwin* } } } } |
41 | 43 | ||
42 | diff --git a/gcc/testsuite/g++.dg/abi/thunk3.C b/gcc/testsuite/g++.dg/abi/thunk3.C | 44 | diff --git a/gcc/testsuite/g++.dg/abi/thunk3.C b/gcc/testsuite/g++.dg/abi/thunk3.C |
43 | index f2347f7..dcec8a7 100644 | 45 | index f2347f79ecd..dcec8a771a1 100644 |
44 | --- a/gcc/testsuite/g++.dg/abi/thunk3.C | 46 | --- a/gcc/testsuite/g++.dg/abi/thunk3.C |
45 | +++ b/gcc/testsuite/g++.dg/abi/thunk3.C | 47 | +++ b/gcc/testsuite/g++.dg/abi/thunk3.C |
46 | @@ -1,5 +1,5 @@ | 48 | @@ -1,5 +1,5 @@ |
@@ -51,7 +53,7 @@ index f2347f7..dcec8a7 100644 | |||
51 | 53 | ||
52 | struct Base | 54 | struct Base |
53 | diff --git a/gcc/testsuite/g++.dg/abi/thunk4.C b/gcc/testsuite/g++.dg/abi/thunk4.C | 55 | diff --git a/gcc/testsuite/g++.dg/abi/thunk4.C b/gcc/testsuite/g++.dg/abi/thunk4.C |
54 | index 6e8f124..d1d34fe 100644 | 56 | index 6e8f124bc5e..d1d34fe1e4a 100644 |
55 | --- a/gcc/testsuite/g++.dg/abi/thunk4.C | 57 | --- a/gcc/testsuite/g++.dg/abi/thunk4.C |
56 | +++ b/gcc/testsuite/g++.dg/abi/thunk4.C | 58 | +++ b/gcc/testsuite/g++.dg/abi/thunk4.C |
57 | @@ -1,6 +1,6 @@ | 59 | @@ -1,6 +1,6 @@ |
@@ -63,5 +65,5 @@ index 6e8f124..d1d34fe 100644 | |||
63 | 65 | ||
64 | struct Base | 66 | struct Base |
65 | -- | 67 | -- |
66 | 2.7.4 | 68 | 2.17.1 |
67 | 69 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch index d02be316..f96d7d57 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch | |||
@@ -1,10 +1,11 @@ | |||
1 | From 283d8576d2599b3c38814e7c70e3f36ed51df9da Mon Sep 17 00:00:00 2001 | 1 | From bc5f423bcfa24aa8c15548379bfc6b3f49e57c15 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 16:34:27 +0530 | 3 | Date: Thu, 12 Jan 2017 16:34:27 +0530 |
4 | Subject: [PATCH 08/63] [Patch, testsuite]: Add MicroBlaze to | 4 | Subject: [PATCH 08/58] [Patch, testsuite]: Add MicroBlaze to |
5 | check_profiling_available Testsuite, add microblaze*-*-* target in | 5 | check_profiling_available |
6 | check_profiling_available inline with other archs setting | 6 | |
7 | profiling_available_saved to 0 | 7 | Testsuite, add microblaze*-*-* target in check_profiling_available |
8 | inline with other archs setting profiling_available_saved to 0 | ||
8 | 9 | ||
9 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | 10 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
10 | --- | 11 | --- |
@@ -12,10 +13,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
12 | 1 file changed, 1 insertion(+) | 13 | 1 file changed, 1 insertion(+) |
13 | 14 | ||
14 | diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp | 15 | diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp |
15 | index 0a69659e..d47819c 100644 | 16 | index d2f65dac32c..d949fbd8464 100644 |
16 | --- a/gcc/testsuite/lib/target-supports.exp | 17 | --- a/gcc/testsuite/lib/target-supports.exp |
17 | +++ b/gcc/testsuite/lib/target-supports.exp | 18 | +++ b/gcc/testsuite/lib/target-supports.exp |
18 | @@ -678,6 +678,7 @@ proc check_profiling_available { test_what } { | 19 | @@ -707,6 +707,7 @@ proc check_profiling_available { test_what } { |
19 | || [istarget m68k-*-elf] | 20 | || [istarget m68k-*-elf] |
20 | || [istarget m68k-*-uclinux*] | 21 | || [istarget m68k-*-uclinux*] |
21 | || [istarget mips*-*-elf*] | 22 | || [istarget mips*-*-elf*] |
@@ -24,5 +25,5 @@ index 0a69659e..d47819c 100644 | |||
24 | || [istarget mn10300-*-elf*] | 25 | || [istarget mn10300-*-elf*] |
25 | || [istarget moxie-*-elf*] | 26 | || [istarget moxie-*-elf*] |
26 | -- | 27 | -- |
27 | 2.7.4 | 28 | 2.17.1 |
28 | 29 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch index ae24c080..45d93cee 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch | |||
@@ -1,11 +1,12 @@ | |||
1 | From 1905061b279e6fe5fd9861fc490fd4075edac4a8 Mon Sep 17 00:00:00 2001 | 1 | From eeeb8ecda7cb71c033c850ce36162c92c7d0b781 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 16:41:43 +0530 | 3 | Date: Thu, 12 Jan 2017 16:41:43 +0530 |
4 | Subject: [PATCH 09/63] [Patch, microblaze]: Fix atomic side effects. In | 4 | Subject: [PATCH 09/58] [Patch, microblaze]: Fix atomic side effects. |
5 | atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions | 5 | |
6 | during optimization. Previously, the outputs were considered unused; this | 6 | In atomic_compare_and_swapsi, add side effects to prevent incorrect |
7 | generated assembly code with undefined side effects after invocation of the | 7 | assumptions during optimization. Previously, the outputs were |
8 | atomic. | 8 | considered unused; this generated assembly code with |
9 | undefined side effects after invocation of the atomic. | ||
9 | 10 | ||
10 | Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> | 11 | Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> |
11 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | 12 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
@@ -18,7 +19,7 @@ Conflicts: | |||
18 | 2 files changed, 16 insertions(+), 8 deletions(-) | 19 | 2 files changed, 16 insertions(+), 8 deletions(-) |
19 | 20 | ||
20 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 21 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
21 | index 183afff..7a40c53 100644 | 22 | index 7049acd1dcd..eba2776ae56 100644 |
22 | --- a/gcc/config/microblaze/microblaze.md | 23 | --- a/gcc/config/microblaze/microblaze.md |
23 | +++ b/gcc/config/microblaze/microblaze.md | 24 | +++ b/gcc/config/microblaze/microblaze.md |
24 | @@ -43,6 +43,9 @@ | 25 | @@ -43,6 +43,9 @@ |
@@ -32,7 +33,7 @@ index 183afff..7a40c53 100644 | |||
32 | 33 | ||
33 | (define_c_enum "unspec" [ | 34 | (define_c_enum "unspec" [ |
34 | diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md | 35 | diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md |
35 | index 6f16ca6..bebab5c 100644 | 36 | index 76f530b9d3b..24cd67e1fdb 100644 |
36 | --- a/gcc/config/microblaze/sync.md | 37 | --- a/gcc/config/microblaze/sync.md |
37 | +++ b/gcc/config/microblaze/sync.md | 38 | +++ b/gcc/config/microblaze/sync.md |
38 | @@ -18,14 +18,19 @@ | 39 | @@ -18,14 +18,19 @@ |
@@ -64,5 +65,5 @@ index 6f16ca6..bebab5c 100644 | |||
64 | "" | 65 | "" |
65 | { | 66 | { |
66 | -- | 67 | -- |
67 | 2.7.4 | 68 | 2.17.1 |
68 | 69 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch index 07a43177..48f77215 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch | |||
@@ -1,9 +1,11 @@ | |||
1 | From 65bc1969bd652df4bf9d01d30547a947da293550 Mon Sep 17 00:00:00 2001 | 1 | From 834448fc3493be56cc6a4f6b504569142f7f6070 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 16:45:45 +0530 | 3 | Date: Thu, 12 Jan 2017 16:45:45 +0530 |
4 | Subject: [PATCH 10/63] [Patch, microblaze]: Fix atomic boolean return value. | 4 | Subject: [PATCH 10/58] [Patch, microblaze]: Fix atomic boolean return value. |
5 | In atomic_compare_and_swapsi, fix boolean return value. Previously, it | 5 | |
6 | contained zero if successful and non-zero if unsuccessful. | 6 | In atomic_compare_and_swapsi, fix boolean return value. |
7 | Previously, it contained zero if successful and non-zero | ||
8 | if unsuccessful. | ||
7 | 9 | ||
8 | Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> | 10 | Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> |
9 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | 11 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
@@ -12,7 +14,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
12 | 1 file changed, 4 insertions(+), 3 deletions(-) | 14 | 1 file changed, 4 insertions(+), 3 deletions(-) |
13 | 15 | ||
14 | diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md | 16 | diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md |
15 | index bebab5c..72eac09 100644 | 17 | index 24cd67e1fdb..76c3616c992 100644 |
16 | --- a/gcc/config/microblaze/sync.md | 18 | --- a/gcc/config/microblaze/sync.md |
17 | +++ b/gcc/config/microblaze/sync.md | 19 | +++ b/gcc/config/microblaze/sync.md |
18 | @@ -34,15 +34,16 @@ | 20 | @@ -34,15 +34,16 @@ |
@@ -36,5 +38,5 @@ index bebab5c..72eac09 100644 | |||
36 | } | 38 | } |
37 | ) | 39 | ) |
38 | -- | 40 | -- |
39 | 2.7.4 | 41 | 2.17.1 |
40 | 42 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch index b9ba239f..e60e6f2f 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch | |||
@@ -1,13 +1,14 @@ | |||
1 | From 4e4409f10b450ec9254e69445ffeb8d116906d16 Mon Sep 17 00:00:00 2001 | 1 | From 19457459592123c41c3ce9e084e165525e4d7bb0 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 16:50:17 +0530 | 3 | Date: Thu, 12 Jan 2017 16:50:17 +0530 |
4 | Subject: [PATCH 11/63] [Patch, microblaze]: Fix the Microblaze crash with | 4 | Subject: [PATCH 11/58] [Patch, microblaze]: Fix the Microblaze crash with |
5 | msmall-divides flag Compiler is crashing when we use msmall-divides and | 5 | msmall-divides flag |
6 | mxl-barrel-shift flag. This is because when use above flags | 6 | |
7 | microblaze_expand_divide function will be called for division operation. In | 7 | Compiler is crashing when we use msmall-divides and mxl-barrel-shift flag. |
8 | microblaze_expand_divide function we are using sub_reg but MicroBlaze doesn't | 8 | This is because when use above flags microblaze_expand_divide function will be |
9 | have subreg register due to this compiler was crashing. Changed the logic to | 9 | called for division operation. In microblaze_expand_divide function we are |
10 | avoid sub_reg call | 10 | using sub_reg but MicroBlaze doesn't have subreg register due to this compiler |
11 | was crashing. Changed the logic to avoid sub_reg call | ||
11 | 12 | ||
12 | Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> | 13 | Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> |
13 | --- | 14 | --- |
@@ -15,10 +16,10 @@ Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> | |||
15 | 1 file changed, 1 insertion(+), 2 deletions(-) | 16 | 1 file changed, 1 insertion(+), 2 deletions(-) |
16 | 17 | ||
17 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 18 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
18 | index 55c1bec..ae45038 100644 | 19 | index a0f81b71391..0186171c04c 100644 |
19 | --- a/gcc/config/microblaze/microblaze.c | 20 | --- a/gcc/config/microblaze/microblaze.c |
20 | +++ b/gcc/config/microblaze/microblaze.c | 21 | +++ b/gcc/config/microblaze/microblaze.c |
21 | @@ -3715,8 +3715,7 @@ microblaze_expand_divide (rtx operands[]) | 22 | @@ -3709,8 +3709,7 @@ microblaze_expand_divide (rtx operands[]) |
22 | mem_rtx = gen_rtx_MEM (QImode, | 23 | mem_rtx = gen_rtx_MEM (QImode, |
23 | gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); | 24 | gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); |
24 | 25 | ||
@@ -29,5 +30,5 @@ index 55c1bec..ae45038 100644 | |||
29 | JUMP_LABEL (jump) = div_end_label; | 30 | JUMP_LABEL (jump) = div_end_label; |
30 | LABEL_NUSES (div_end_label) = 1; | 31 | LABEL_NUSES (div_end_label) = 1; |
31 | -- | 32 | -- |
32 | 2.7.4 | 33 | 2.17.1 |
33 | 34 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch index fc47bae6..b9e39928 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch | |||
@@ -1,10 +1,11 @@ | |||
1 | From 6dbeb53f0185dd587ece39d624d193768633a7ab Mon Sep 17 00:00:00 2001 | 1 | From 9da28a01ffb778fc5cb5df27332cef21f890a63f Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 16:52:56 +0530 | 3 | Date: Thu, 12 Jan 2017 16:52:56 +0530 |
4 | Subject: [PATCH 12/63] [Patch, microblaze]: Added ashrsi3_with_size_opt Added | 4 | Subject: [PATCH 12/58] [Patch, microblaze]: Added ashrsi3_with_size_opt |
5 | ashrsi3_with_size_opt pattern to optimize the sra instructions when the -Os | 5 | |
6 | optimization is used. lshrsi3_with_size_opt is being removed as it has | 6 | Added ashrsi3_with_size_opt pattern to optimize the sra instructions |
7 | conflicts with unsigned int variables | 7 | when the -Os optimization is used. lshrsi3_with_size_opt is |
8 | being removed as it has conflicts with unsigned int variables | ||
8 | 9 | ||
9 | Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> | 10 | Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> |
10 | --- | 11 | --- |
@@ -12,7 +13,7 @@ Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> | |||
12 | 1 file changed, 21 insertions(+) | 13 | 1 file changed, 21 insertions(+) |
13 | 14 | ||
14 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 15 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
15 | index 7a40c53..3d2636e 100644 | 16 | index eba2776ae56..187ad522dcc 100644 |
16 | --- a/gcc/config/microblaze/microblaze.md | 17 | --- a/gcc/config/microblaze/microblaze.md |
17 | +++ b/gcc/config/microblaze/microblaze.md | 18 | +++ b/gcc/config/microblaze/microblaze.md |
18 | @@ -1508,6 +1508,27 @@ | 19 | @@ -1508,6 +1508,27 @@ |
@@ -44,5 +45,5 @@ index 7a40c53..3d2636e 100644 | |||
44 | [(set (match_operand:SI 0 "register_operand" "=&d") | 45 | [(set (match_operand:SI 0 "register_operand" "=&d") |
45 | (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") | 46 | (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") |
46 | -- | 47 | -- |
47 | 2.7.4 | 48 | 2.17.1 |
48 | 49 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch deleted file mode 100644 index 3b4b4c70..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | From 53ab5a3fec283aeb9d2efeb632d423b774192e65 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 12 Jan 2017 17:50:03 +0530 | ||
4 | Subject: [PATCH 13/63] [Patch, microblaze]: Fixed missing save of r18 in | ||
5 | fast_interrupt. Register 18 is used as a clobber register, and must be stored | ||
6 | when entering a fast_interrupt. Before this fix, register 18 was only saved | ||
7 | if it was used directly in the interrupt function. | ||
8 | |||
9 | However, if the fast_interrupt function called a function that used | ||
10 | r18, the register would not be saved, and thus be mangled | ||
11 | upon returning from the interrupt. | ||
12 | |||
13 | Changelog | ||
14 | |||
15 | 2014-02-27 Klaus Petersen <klauspetersen@gmail.com> | ||
16 | |||
17 | * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in | ||
18 | microblaze_must_save_register. | ||
19 | |||
20 | Signed-off-by: Klaus Petersen <klauspetersen@gmail.com> | ||
21 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
22 | --- | ||
23 | gcc/config/microblaze/microblaze.c | 2 +- | ||
24 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
25 | |||
26 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
27 | index ae45038..c834b49 100644 | ||
28 | --- a/gcc/config/microblaze/microblaze.c | ||
29 | +++ b/gcc/config/microblaze/microblaze.c | ||
30 | @@ -2043,7 +2043,7 @@ microblaze_must_save_register (int regno) | ||
31 | { | ||
32 | if (df_regs_ever_live_p (regno) | ||
33 | || regno == MB_ABI_MSR_SAVE_REG | ||
34 | - || (interrupt_handler | ||
35 | + || ((interrupt_handler || fast_interrupt) | ||
36 | && (regno == MB_ABI_ASM_TEMP_REGNUM | ||
37 | || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM))) | ||
38 | return 1; | ||
39 | -- | ||
40 | 2.7.4 | ||
41 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch index 889a1e69..36af2652 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch | |||
@@ -1,15 +1,15 @@ | |||
1 | From cbf1854e3569122ee1143e6716ff68275c26aced Mon Sep 17 00:00:00 2001 | 1 | From 07a5c8b22a1cef99b2d4570ea080c503260161e4 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 10:57:19 +0530 | 3 | Date: Tue, 17 Jan 2017 10:57:19 +0530 |
4 | Subject: [PATCH 14/63] [Patch, microblaze]: Use bralid for profiler calls | 4 | Subject: [PATCH 13/58] [Patch, microblaze]: Use bralid for profiler calls |
5 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | ||
6 | 5 | ||
6 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | ||
7 | --- | 7 | --- |
8 | gcc/config/microblaze/microblaze.h | 2 +- | 8 | gcc/config/microblaze/microblaze.h | 2 +- |
9 | 1 file changed, 1 insertion(+), 1 deletion(-) | 9 | 1 file changed, 1 insertion(+), 1 deletion(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 11 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
12 | index fa0806e..0a435b8 100644 | 12 | index dc112f5301f..8aa3f155790 100644 |
13 | --- a/gcc/config/microblaze/microblaze.h | 13 | --- a/gcc/config/microblaze/microblaze.h |
14 | +++ b/gcc/config/microblaze/microblaze.h | 14 | +++ b/gcc/config/microblaze/microblaze.h |
15 | @@ -486,7 +486,7 @@ typedef struct microblaze_args | 15 | @@ -486,7 +486,7 @@ typedef struct microblaze_args |
@@ -22,5 +22,5 @@ index fa0806e..0a435b8 100644 | |||
22 | } | 22 | } |
23 | 23 | ||
24 | -- | 24 | -- |
25 | 2.7.4 | 25 | 2.17.1 |
26 | 26 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Disable-fivopts-by-default.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch index 0ada80eb..51563ecb 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Disable-fivopts-by-default.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch | |||
@@ -1,8 +1,9 @@ | |||
1 | From 604cae83ce9d2942568178966f69614acbbcbefd Mon Sep 17 00:00:00 2001 | 1 | From 616f16089f0b01ab02008d7291df0972a99782e0 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 11:10:21 +0530 | 3 | Date: Tue, 17 Jan 2017 11:10:21 +0530 |
4 | Subject: [PATCH 15/63] [Patch, microblaze]: Disable fivopts by default Turn | 4 | Subject: [PATCH 14/58] [Patch, microblaze]: Disable fivopts by default |
5 | off ivopts by default. Interferes with cse. | 5 | |
6 | Turn off ivopts by default. Interferes with cse. | ||
6 | 7 | ||
7 | Changelog | 8 | Changelog |
8 | 9 | ||
@@ -18,7 +19,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
18 | 1 file changed, 9 insertions(+) | 19 | 1 file changed, 9 insertions(+) |
19 | 20 | ||
20 | diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c | 21 | diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c |
21 | index c30bdef..9b6ef21 100644 | 22 | index 4391f939626..0b9d5a1b453 100644 |
22 | --- a/gcc/common/config/microblaze/microblaze-common.c | 23 | --- a/gcc/common/config/microblaze/microblaze-common.c |
23 | +++ b/gcc/common/config/microblaze/microblaze-common.c | 24 | +++ b/gcc/common/config/microblaze/microblaze-common.c |
24 | @@ -24,6 +24,15 @@ | 25 | @@ -24,6 +24,15 @@ |
@@ -38,5 +39,5 @@ index c30bdef..9b6ef21 100644 | |||
38 | #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT | 39 | #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT |
39 | 40 | ||
40 | -- | 41 | -- |
41 | 2.7.4 | 42 | 2.17.1 |
42 | 43 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Removed-moddi3-routinue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch index 87bc1668..e7fb9393 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Removed-moddi3-routinue.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch | |||
@@ -1,28 +1,29 @@ | |||
1 | From 14ddb3217fbb84c48903124ec6a3614b4707630d Mon Sep 17 00:00:00 2001 | 1 | From c2a6652176751bc95e2f990179e90cfe58026feb Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Thu, 12 Jan 2017 17:36:16 +0530 | 3 | Date: Thu, 12 Jan 2017 17:36:16 +0530 |
4 | Subject: [PATCH 16/63] [Patch, microblaze]: Removed moddi3 routinue Using the | 4 | Subject: [PATCH 15/58] [Patch, microblaze]: Removed moddi3 routinue |
5 | default moddi3 function as the existing implementation has many bugs | 5 | |
6 | Using the default moddi3 function as the existing implementation has many bugs | ||
6 | 7 | ||
7 | Signed-off-by:Nagaraju <nmekala@xilix.com> | 8 | Signed-off-by:Nagaraju <nmekala@xilix.com> |
8 | 9 | ||
9 | Conflicts: | 10 | Conflicts: |
10 | libgcc/config/microblaze/moddi3.S | 11 | libgcc/config/microblaze/moddi3.S |
11 | --- | 12 | --- |
12 | libgcc/config/microblaze/moddi3.S | 121 ---------------------------------- | 13 | libgcc/config/microblaze/moddi3.S | 121 -------------------------- |
13 | libgcc/config/microblaze/t-microblaze | 3 +- | 14 | libgcc/config/microblaze/t-microblaze | 3 +- |
14 | 2 files changed, 1 insertion(+), 123 deletions(-) | 15 | 2 files changed, 1 insertion(+), 123 deletions(-) |
15 | delete mode 100644 libgcc/config/microblaze/moddi3.S | 16 | delete mode 100644 libgcc/config/microblaze/moddi3.S |
16 | 17 | ||
17 | diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S | 18 | diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S |
18 | deleted file mode 100644 | 19 | deleted file mode 100644 |
19 | index abfe4fc..0000000 | 20 | index d0e24fdb89d..00000000000 |
20 | --- a/libgcc/config/microblaze/moddi3.S | 21 | --- a/libgcc/config/microblaze/moddi3.S |
21 | +++ /dev/null | 22 | +++ /dev/null |
22 | @@ -1,121 +0,0 @@ | 23 | @@ -1,121 +0,0 @@ |
23 | -################################### | 24 | -################################### |
24 | -# | 25 | -# |
25 | -# Copyright (C) 2009-2019 Free Software Foundation, Inc. | 26 | -# Copyright (C) 2009-2020 Free Software Foundation, Inc. |
26 | -# | 27 | -# |
27 | -# Contributed by Michael Eager <eager@eagercon.com>. | 28 | -# Contributed by Michael Eager <eager@eagercon.com>. |
28 | -# | 29 | -# |
@@ -142,7 +143,7 @@ index abfe4fc..0000000 | |||
142 | - .end __moddi3 | 143 | - .end __moddi3 |
143 | - | 144 | - |
144 | diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze | 145 | diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze |
145 | index 96959f0..8d954a4 100644 | 146 | index 96959f0292b..8d954a49575 100644 |
146 | --- a/libgcc/config/microblaze/t-microblaze | 147 | --- a/libgcc/config/microblaze/t-microblaze |
147 | +++ b/libgcc/config/microblaze/t-microblaze | 148 | +++ b/libgcc/config/microblaze/t-microblaze |
148 | @@ -1,8 +1,7 @@ | 149 | @@ -1,8 +1,7 @@ |
@@ -156,5 +157,5 @@ index 96959f0..8d954a4 100644 | |||
156 | $(srcdir)/config/microblaze/muldi3_hard.S \ | 157 | $(srcdir)/config/microblaze/muldi3_hard.S \ |
157 | $(srcdir)/config/microblaze/mulsi3.S \ | 158 | $(srcdir)/config/microblaze/mulsi3.S \ |
158 | -- | 159 | -- |
159 | 2.7.4 | 160 | 2.17.1 |
160 | 161 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch index ca1c2d1c..13c3ccd9 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch | |||
@@ -1,8 +1,9 @@ | |||
1 | From 032e50c1b267306338cff4d136db88f08350de72 Mon Sep 17 00:00:00 2001 | 1 | From 9a4253a92a5e1811693ea1707b5fc272908ec556 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 14:41:58 +0530 | 3 | Date: Tue, 17 Jan 2017 14:41:58 +0530 |
4 | Subject: [PATCH 17/63] [Patch, microblaze]: Add INIT_PRIORITY support Added | 4 | Subject: [PATCH 16/58] [Patch, microblaze]: Add INIT_PRIORITY support |
5 | TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros. | 5 | |
6 | Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros. | ||
6 | 7 | ||
7 | These macros allows users to control the order of initialization | 8 | These macros allows users to control the order of initialization |
8 | of objects defined at namespace scope with the init_priority | 9 | of objects defined at namespace scope with the init_priority |
@@ -22,14 +23,14 @@ Changelog | |||
22 | Signed-off-by:nagaraju <nmekala@xilix.com> | 23 | Signed-off-by:nagaraju <nmekala@xilix.com> |
23 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | 24 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
24 | --- | 25 | --- |
25 | gcc/config/microblaze/microblaze.c | 53 ++++++++++++++++++++++++++++++++++++++ | 26 | gcc/config/microblaze/microblaze.c | 53 ++++++++++++++++++++++++++++++ |
26 | 1 file changed, 53 insertions(+) | 27 | 1 file changed, 53 insertions(+) |
27 | 28 | ||
28 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 29 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
29 | index c834b49..c54b96b 100644 | 30 | index 0186171c04c..9eae5515c60 100644 |
30 | --- a/gcc/config/microblaze/microblaze.c | 31 | --- a/gcc/config/microblaze/microblaze.c |
31 | +++ b/gcc/config/microblaze/microblaze.c | 32 | +++ b/gcc/config/microblaze/microblaze.c |
32 | @@ -2642,6 +2642,53 @@ print_operand_address (FILE * file, rtx addr) | 33 | @@ -2634,6 +2634,53 @@ print_operand_address (FILE * file, rtx addr) |
33 | } | 34 | } |
34 | } | 35 | } |
35 | 36 | ||
@@ -83,7 +84,7 @@ index c834b49..c54b96b 100644 | |||
83 | /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol | 84 | /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol |
84 | is used, so that we don't emit an .extern for it in | 85 | is used, so that we don't emit an .extern for it in |
85 | microblaze_asm_file_end. */ | 86 | microblaze_asm_file_end. */ |
86 | @@ -3981,6 +4028,12 @@ microblaze_starting_frame_offset (void) | 87 | @@ -3975,6 +4022,12 @@ microblaze_starting_frame_offset (void) |
87 | #undef TARGET_ATTRIBUTE_TABLE | 88 | #undef TARGET_ATTRIBUTE_TABLE |
88 | #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table | 89 | #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table |
89 | 90 | ||
@@ -97,5 +98,5 @@ index c834b49..c54b96b 100644 | |||
97 | #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p | 98 | #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p |
98 | 99 | ||
99 | -- | 100 | -- |
100 | 2.7.4 | 101 | 2.17.1 |
101 | 102 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Add-optimized-lshrsi3.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch index de35f286..cfc06f74 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Add-optimized-lshrsi3.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch | |||
@@ -1,9 +1,11 @@ | |||
1 | From 6db9d068e32a424ac04c27e963d1e58cb3ef8bdf Mon Sep 17 00:00:00 2001 | 1 | From 27c27a8876152bac78059a1b2d5a6f0ac9b8cee2 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 15:23:57 +0530 | 3 | Date: Tue, 17 Jan 2017 15:23:57 +0530 |
4 | Subject: [PATCH 18/63] [Patch, microblaze]: Add optimized lshrsi3 When barrel | 4 | Subject: [PATCH 17/58] [Patch, microblaze]: Add optimized lshrsi3 |
5 | shifter is not present, the immediate value is greater than #5 and | 5 | |
6 | optimization is -OS, the compiler will generate shift operation using loop. | 6 | When barrel shifter is not present, the immediate value |
7 | is greater than #5 and optimization is -OS, the | ||
8 | compiler will generate shift operation using loop. | ||
7 | 9 | ||
8 | Changelog | 10 | Changelog |
9 | 11 | ||
@@ -20,13 +22,13 @@ ChangeLog/testsuite | |||
20 | Signed-off-by:Nagaraju <nmekala@xilix.com> | 22 | Signed-off-by:Nagaraju <nmekala@xilix.com> |
21 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | 23 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> |
22 | --- | 24 | --- |
23 | gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ | 25 | gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++ |
24 | .../gcc.target/microblaze/others/lshrsi_Os_1.c | 13 +++++++++++++ | 26 | .../microblaze/others/lshrsi_Os_1.c | 13 ++++++++++++ |
25 | 2 files changed, 34 insertions(+) | 27 | 2 files changed, 34 insertions(+) |
26 | create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c | 28 | create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c |
27 | 29 | ||
28 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 30 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
29 | index 3d2636e..aa2eda3 100644 | 31 | index 187ad522dcc..8f9baec826b 100644 |
30 | --- a/gcc/config/microblaze/microblaze.md | 32 | --- a/gcc/config/microblaze/microblaze.md |
31 | +++ b/gcc/config/microblaze/microblaze.md | 33 | +++ b/gcc/config/microblaze/microblaze.md |
32 | @@ -1618,6 +1618,27 @@ | 34 | @@ -1618,6 +1618,27 @@ |
@@ -59,7 +61,7 @@ index 3d2636e..aa2eda3 100644 | |||
59 | (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") | 61 | (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") |
60 | diff --git a/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c | 62 | diff --git a/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c |
61 | new file mode 100644 | 63 | new file mode 100644 |
62 | index 0000000..32a3be7 | 64 | index 00000000000..32a3be7c76a |
63 | --- /dev/null | 65 | --- /dev/null |
64 | +++ b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c | 66 | +++ b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c |
65 | @@ -0,0 +1,13 @@ | 67 | @@ -0,0 +1,13 @@ |
@@ -77,5 +79,5 @@ index 0000000..32a3be7 | |||
77 | +/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */ | 79 | +/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */ |
78 | +/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */ | 80 | +/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */ |
79 | -- | 81 | -- |
80 | 2.7.4 | 82 | 2.17.1 |
81 | 83 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch index b60a4e95..1f8decc7 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch | |||
@@ -1,10 +1,11 @@ | |||
1 | From 372bbc75146166df9b82ca5e8f236971b7cef16e Mon Sep 17 00:00:00 2001 | 1 | From 59273a71f1f180456d87eb4a1a5f95fcc6d17003 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 16:42:44 +0530 | 3 | Date: Tue, 17 Jan 2017 16:42:44 +0530 |
4 | Subject: [PATCH 20/63] [Patch, microblaze]: Reducing Stack space for arguments | 4 | Subject: [PATCH 18/58] [Patch, microblaze]: Reducing Stack space for arguments |
5 | Currently in Microblaze target stack space for arguments in register is being | 5 | |
6 | allocated even if there are no arguments in the function. This patch will | 6 | Currently in Microblaze target stack space for arguments in register is being |
7 | optimize the extra 24 bytes that are being allocated. | 7 | allocated even if there are no arguments in the function. |
8 | This patch will optimize the extra 24 bytes that are being allocated. | ||
8 | 9 | ||
9 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 10 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
10 | :Ajit Agarwal <ajitkum@xilinx.com> | 11 | :Ajit Agarwal <ajitkum@xilinx.com> |
@@ -17,12 +18,12 @@ ChangeLog: | |||
17 | *microblaze.c (REG_PARM_STACK_SPACE): Modify | 18 | *microblaze.c (REG_PARM_STACK_SPACE): Modify |
18 | --- | 19 | --- |
19 | gcc/config/microblaze/microblaze-protos.h | 1 + | 20 | gcc/config/microblaze/microblaze-protos.h | 1 + |
20 | gcc/config/microblaze/microblaze.c | 134 +++++++++++++++++++++++++++++- | 21 | gcc/config/microblaze/microblaze.c | 132 +++++++++++++++++++++- |
21 | gcc/config/microblaze/microblaze.h | 4 +- | 22 | gcc/config/microblaze/microblaze.h | 4 +- |
22 | 3 files changed, 136 insertions(+), 3 deletions(-) | 23 | 3 files changed, 134 insertions(+), 3 deletions(-) |
23 | 24 | ||
24 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h | 25 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h |
25 | index 1f5ca80..6647cbc 100644 | 26 | index 982b2abd2d4..96f7bb67f6c 100644 |
26 | --- a/gcc/config/microblaze/microblaze-protos.h | 27 | --- a/gcc/config/microblaze/microblaze-protos.h |
27 | +++ b/gcc/config/microblaze/microblaze-protos.h | 28 | +++ b/gcc/config/microblaze/microblaze-protos.h |
28 | @@ -59,6 +59,7 @@ extern int symbol_mentioned_p (rtx); | 29 | @@ -59,6 +59,7 @@ extern int symbol_mentioned_p (rtx); |
@@ -34,17 +35,16 @@ index 1f5ca80..6647cbc 100644 | |||
34 | 35 | ||
35 | /* Declare functions in microblaze-c.c. */ | 36 | /* Declare functions in microblaze-c.c. */ |
36 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 37 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
37 | index c54b96b..0ce9d13 100644 | 38 | index 9eae5515c60..a4bdf66f045 100644 |
38 | --- a/gcc/config/microblaze/microblaze.c | 39 | --- a/gcc/config/microblaze/microblaze.c |
39 | +++ b/gcc/config/microblaze/microblaze.c | 40 | +++ b/gcc/config/microblaze/microblaze.c |
40 | @@ -2065,6 +2065,138 @@ microblaze_must_save_register (int regno) | 41 | @@ -2057,6 +2057,136 @@ microblaze_must_save_register (int regno) |
41 | return 0; | 42 | return 0; |
42 | } | 43 | } |
43 | 44 | ||
44 | +static bool | 45 | +static bool |
45 | +microblaze_parm_needs_stack (cumulative_args_t args_so_far, tree type) | 46 | +microblaze_parm_needs_stack (cumulative_args_t args_so_far, tree type) |
46 | +{ | 47 | +{ |
47 | + enum machine_mode mode; | ||
48 | + int unsignedp; | 48 | + int unsignedp; |
49 | + rtx entry_parm; | 49 | + rtx entry_parm; |
50 | + | 50 | + |
@@ -65,37 +65,36 @@ index c54b96b..0ce9d13 100644 | |||
65 | + || microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type))); | 65 | + || microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type))); |
66 | + | 66 | + |
67 | + /* Handle transparent aggregates. */ | 67 | + /* Handle transparent aggregates. */ |
68 | + if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE) | 68 | + if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE) |
69 | + && TYPE_TRANSPARENT_AGGR (type)) | 69 | + && TYPE_TRANSPARENT_AGGR (type)) |
70 | + type = TREE_TYPE (first_field (type)); | 70 | + type = TREE_TYPE (first_field (type)); |
71 | + | 71 | + |
72 | + /* See if this arg was passed by invisible reference. */ | 72 | + /* See if this arg was passed by invisible reference. */ |
73 | + if (pass_by_reference (get_cumulative_args (args_so_far), | 73 | + function_arg_info arg (type, /*named=*/true); |
74 | + TYPE_MODE (type), type, true)) | 74 | + apply_pass_by_reference_rules (get_cumulative_args (args_so_far), arg); |
75 | + type = build_pointer_type (type); | ||
76 | + | 75 | + |
77 | + /* Find mode as it is passed by the ABI. */ | 76 | + /* Find mode as it is passed by the ABI. */ |
78 | + unsignedp = TYPE_UNSIGNED (type); | 77 | + unsignedp = TYPE_UNSIGNED (type); |
79 | + mode = promote_mode (type, TYPE_MODE (type), &unsignedp); | 78 | + arg.mode = promote_mode (arg.type, arg.mode, &unsignedp); |
80 | + | 79 | + |
81 | +/* If there is no incoming register, we need a stack. */ | 80 | + /* If there is no incoming register, we need a stack. */ |
82 | + entry_parm = microblaze_function_arg (args_so_far, mode, type, true); | 81 | + entry_parm = microblaze_function_arg (args_so_far, arg); |
83 | + if (entry_parm == NULL) | 82 | + if (entry_parm == NULL) |
84 | + return true; | 83 | + return true; |
85 | + | 84 | + |
86 | + /* Likewise if we need to pass both in registers and on the stack. */ | 85 | + /* Likewise if we need to pass both in registers and on the stack. */ |
87 | + if (GET_CODE (entry_parm) == PARALLEL | 86 | + if (GET_CODE (entry_parm) == PARALLEL |
88 | + && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX) | 87 | + && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX) |
89 | + return true; | 88 | + return true; |
90 | + | 89 | + |
91 | + /* Also true if we're partially in registers and partially not. */ | 90 | + /* Also true if we're partially in registers and partially not. */ |
92 | + if (function_arg_partial_bytes (args_so_far, mode, type, true) != 0) | 91 | + if (function_arg_partial_bytes (args_so_far, arg) != 0) |
93 | + return true; | 92 | + return true; |
94 | + | 93 | + |
95 | + /* Update info on where next arg arrives in registers. */ | 94 | + /* Update info on where next arg arrives in registers. */ |
96 | + microblaze_function_arg_advance (args_so_far, mode, type, true); | 95 | + microblaze_function_arg_advance (args_so_far, arg); |
97 | + return false; | 96 | + return false; |
98 | + } | 97 | +} |
99 | + | 98 | + |
100 | +static bool | 99 | +static bool |
101 | +microblaze_function_parms_need_stack (tree fun, bool incoming) | 100 | +microblaze_function_parms_need_stack (tree fun, bool incoming) |
@@ -176,7 +175,7 @@ index c54b96b..0ce9d13 100644 | |||
176 | /* Return the bytes needed to compute the frame pointer from the current | 175 | /* Return the bytes needed to compute the frame pointer from the current |
177 | stack pointer. | 176 | stack pointer. |
178 | 177 | ||
179 | @@ -3411,7 +3543,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, | 178 | @@ -3403,7 +3533,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, |
180 | emit_insn (gen_indirect_jump (temp2)); | 179 | emit_insn (gen_indirect_jump (temp2)); |
181 | 180 | ||
182 | /* Run just enough of rest_of_compilation. This sequence was | 181 | /* Run just enough of rest_of_compilation. This sequence was |
@@ -184,9 +183,9 @@ index c54b96b..0ce9d13 100644 | |||
184 | + "borrowed" from microblaze.c. */ | 183 | + "borrowed" from microblaze.c. */ |
185 | insn = get_insns (); | 184 | insn = get_insns (); |
186 | shorten_branches (insn); | 185 | shorten_branches (insn); |
187 | final_start_function (insn, file, 1); | 186 | assemble_start_function (thunk_fndecl, fnname); |
188 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 187 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
189 | index 0a435b8..346e47b 100644 | 188 | index 8aa3f155790..1e155e4041c 100644 |
190 | --- a/gcc/config/microblaze/microblaze.h | 189 | --- a/gcc/config/microblaze/microblaze.h |
191 | +++ b/gcc/config/microblaze/microblaze.h | 190 | +++ b/gcc/config/microblaze/microblaze.h |
192 | @@ -434,9 +434,9 @@ extern struct microblaze_frame_info current_frame_info; | 191 | @@ -434,9 +434,9 @@ extern struct microblaze_frame_info current_frame_info; |
@@ -202,5 +201,5 @@ index 0a435b8..346e47b 100644 | |||
202 | #define STACK_BOUNDARY 32 | 201 | #define STACK_BOUNDARY 32 |
203 | 202 | ||
204 | -- | 203 | -- |
205 | 2.7.4 | 204 | 2.17.1 |
206 | 205 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Add-cbranchsi4_reg.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch index c79f9552..b78a9814 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Add-cbranchsi4_reg.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch | |||
@@ -1,10 +1,11 @@ | |||
1 | From 1c226901aec38e2e824177418dcd82b6cd49ffca Mon Sep 17 00:00:00 2001 | 1 | From f43cb8572131074c7ce43a1d39c7ba6c85611e18 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 17:04:37 +0530 | 3 | Date: Tue, 17 Jan 2017 17:04:37 +0530 |
4 | Subject: [PATCH 21/63] [Patch, microblaze]: Add cbranchsi4_reg This patch | 4 | Subject: [PATCH 19/58] [Patch, microblaze]: Add cbranchsi4_reg |
5 | optimizes the generation of pcmpne/pcmpeq instruction if the compare | 5 | |
6 | instruction has no immediate values.For the immediate values the xor | 6 | This patch optimizes the generation of pcmpne/pcmpeq instruction if the |
7 | instruction is generated | 7 | compare instruction has no immediate values.For the immediate values the |
8 | xor instruction is generated | ||
8 | 9 | ||
9 | Signed-off-by: Nagaraju Mekala <nmekala@xilix.com> | 10 | Signed-off-by: Nagaraju Mekala <nmekala@xilix.com> |
10 | Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> | 11 | Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> |
@@ -20,18 +21,17 @@ Conflicts: | |||
20 | 21 | ||
21 | gcc/config/microblaze/microblaze-protos.h | 22 | gcc/config/microblaze/microblaze-protos.h |
22 | --- | 23 | --- |
23 | gcc/config/microblaze/microblaze-protos.h | 2 +- | 24 | gcc/config/microblaze/microblaze-protos.h | 2 +- |
24 | gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 2 +- | 25 | gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 2 +- |
25 | gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 2 +- | 26 | gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 2 +- |
26 | gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 2 +- | 27 | gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 2 +- |
27 | gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 2 +- | 28 | gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 2 +- |
28 | gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 14 +++++++------- | 29 | gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 14 +++++++------- |
29 | gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 12 ++++++------ | 30 | gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 12 ++++++------ |
30 | gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c | 2 +- | 31 | 7 files changed, 18 insertions(+), 18 deletions(-) |
31 | 8 files changed, 19 insertions(+), 19 deletions(-) | ||
32 | 32 | ||
33 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h | 33 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h |
34 | index 6647cbc..bdc9b69 100644 | 34 | index 96f7bb67f6c..76ffc682df2 100644 |
35 | --- a/gcc/config/microblaze/microblaze-protos.h | 35 | --- a/gcc/config/microblaze/microblaze-protos.h |
36 | +++ b/gcc/config/microblaze/microblaze-protos.h | 36 | +++ b/gcc/config/microblaze/microblaze-protos.h |
37 | @@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *); | 37 | @@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *); |
@@ -44,7 +44,7 @@ index 6647cbc..bdc9b69 100644 | |||
44 | extern void microblaze_expand_conditional_branch_sf (rtx *); | 44 | extern void microblaze_expand_conditional_branch_sf (rtx *); |
45 | extern int microblaze_can_use_return_insn (void); | 45 | extern int microblaze_can_use_return_insn (void); |
46 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 46 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c |
47 | index 4041a24..ccc6a46 100644 | 47 | index 4041a241391..ccc6a461cd9 100644 |
48 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 48 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c |
49 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 49 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c |
50 | @@ -6,5 +6,5 @@ void float_func () | 50 | @@ -6,5 +6,5 @@ void float_func () |
@@ -55,7 +55,7 @@ index 4041a24..ccc6a46 100644 | |||
55 | + f2 = f3; | 55 | + f2 = f3; |
56 | } | 56 | } |
57 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 57 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c |
58 | index 3902b83..1dd5fe6 100644 | 58 | index 3902b839db9..1dd5fe6c539 100644 |
59 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 59 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c |
60 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 60 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c |
61 | @@ -6,5 +6,5 @@ void float_func () | 61 | @@ -6,5 +6,5 @@ void float_func () |
@@ -66,7 +66,7 @@ index 3902b83..1dd5fe6 100644 | |||
66 | + f2 = f3; | 66 | + f2 = f3; |
67 | } | 67 | } |
68 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 68 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c |
69 | index 8555974..d6f80fb 100644 | 69 | index 8555974dda5..d6f80fb0ec3 100644 |
70 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 70 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c |
71 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 71 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c |
72 | @@ -6,5 +6,5 @@ void float_func () | 72 | @@ -6,5 +6,5 @@ void float_func () |
@@ -77,7 +77,7 @@ index 8555974..d6f80fb 100644 | |||
77 | + f1 = f2 + f3; | 77 | + f1 = f2 + f3; |
78 | } | 78 | } |
79 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 79 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c |
80 | index 79cc5f9..d117724 100644 | 80 | index 79cc5f9dd8e..d1177249552 100644 |
81 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 81 | --- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c |
82 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 82 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c |
83 | @@ -5,5 +5,5 @@ void float_func(float f1, float f2, float f3) | 83 | @@ -5,5 +5,5 @@ void float_func(float f1, float f2, float f3) |
@@ -88,7 +88,7 @@ index 79cc5f9..d117724 100644 | |||
88 | + f2 = f3; | 88 | + f2 = f3; |
89 | } | 89 | } |
90 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 90 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c |
91 | index ebfb170..7582297 100644 | 91 | index ebfb170ecee..75822977ef8 100644 |
92 | --- a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 92 | --- a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c |
93 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 93 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c |
94 | @@ -5,17 +5,17 @@ volatile float f1, f2, f3; | 94 | @@ -5,17 +5,17 @@ volatile float f1, f2, f3; |
@@ -117,7 +117,7 @@ index ebfb170..7582297 100644 | |||
117 | 117 | ||
118 | } | 118 | } |
119 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 119 | diff --git a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c |
120 | index 1d6ba80..532c035 100644 | 120 | index 1d6ba807b12..532c035adfd 100644 |
121 | --- a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 121 | --- a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c |
122 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 122 | +++ b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c |
123 | @@ -74,16 +74,16 @@ void float_cmp_func () | 123 | @@ -74,16 +74,16 @@ void float_cmp_func () |
@@ -143,17 +143,6 @@ index 1d6ba80..532c035 100644 | |||
143 | + f1 = f3; | 143 | + f1 = f3; |
144 | 144 | ||
145 | } | 145 | } |
146 | diff --git a/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c b/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c | ||
147 | index fdcde1f..580b4db 100644 | ||
148 | --- a/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c | ||
149 | +++ b/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c | ||
150 | @@ -5,4 +5,4 @@ void trap () | ||
151 | __builtin_trap (); | ||
152 | } | ||
153 | |||
154 | -/* { dg-final { scan-assembler "brki\tr0,-1" } } */ | ||
155 | \ No newline at end of file | ||
156 | +/* { dg-final { scan-assembler "bri\t0" } } */ | ||
157 | -- | 146 | -- |
158 | 2.7.4 | 147 | 2.17.1 |
159 | 148 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Modified-trap-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Modified-trap-instruction.patch deleted file mode 100644 index dc9b61cf..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Modified-trap-instruction.patch +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | From 614bacc058b94c7b12cd40fde1b19b4709870f3b Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Tue, 17 Jan 2017 15:42:15 +0530 | ||
4 | Subject: [PATCH 19/63] [Patch, microblaze]: Modified trap instruction The | ||
5 | instruction was wrongly written to brki r0,-1 it should be bri r0. Modified | ||
6 | with the correct instruction | ||
7 | |||
8 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | ||
9 | :Ajit Agarwal <ajitkum@xilinx.com> | ||
10 | --- | ||
11 | gcc/config/microblaze/microblaze.md | 2 +- | ||
12 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
13 | |||
14 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
15 | index aa2eda3..3c80760 100644 | ||
16 | --- a/gcc/config/microblaze/microblaze.md | ||
17 | +++ b/gcc/config/microblaze/microblaze.md | ||
18 | @@ -2348,7 +2348,7 @@ | ||
19 | (define_insn "trap" | ||
20 | [(trap_if (const_int 1) (const_int 0))] | ||
21 | "" | ||
22 | - "brki\tr0,-1" | ||
23 | + "bri\t0" | ||
24 | [(set_attr "type" "trap")] | ||
25 | ) | ||
26 | |||
27 | -- | ||
28 | 2.7.4 | ||
29 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch index c3822d06..cc1c3d7e 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch | |||
@@ -1,19 +1,22 @@ | |||
1 | From 791d65feae4f3cab47833579bc6f523e54194cbd Mon Sep 17 00:00:00 2001 | 1 | From 1bbf48097cf2da98e03139b499a5a74bc68e6abc Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 17:11:04 +0530 | 3 | Date: Tue, 17 Jan 2017 17:11:04 +0530 |
4 | Subject: [PATCH 22/63] [Patch,microblaze]: Inline Expansion of fsqrt builtin. | 4 | Subject: [PATCH 20/58] [Patch,microblaze]: Inline Expansion of fsqrt builtin. |
5 | The changes are made in the patch for the inline expansion of the fsqrt | 5 | |
6 | builtin with fqrt instruction. The sqrt math function takes double as | 6 | The changes are made in the patch for the inline expansion of |
7 | argument and return double as argument. The pattern is selected while | 7 | the fsqrt builtin with fqrt instruction. The sqrt math function |
8 | expanding the unary op through expand_unop which passes DFmode and the DFmode | 8 | takes double as argument and return double as argument. The |
9 | pattern was not there returning zero. Thus the sqrt math function is not | 9 | pattern is selected while expanding the unary op through |
10 | inlined and expanded. The pattern with DFmode argument is added. Also the | 10 | expand_unop which passes DFmode and the DFmode pattern was |
11 | source and destination argument is not same the DF through two different | 11 | not there returning zero. Thus the sqrt math function is not |
12 | consecutive registers with lower 32 bit is the argument passed to sqrt and | 12 | inlined and expanded. The pattern with DFmode argument is added. |
13 | the higher 32 bit is zero. If the source and destinations are different the | 13 | Also the source and destination argument is not same the DF |
14 | DFmode 64 bits registers is not set properly giving the problem in runtime. | 14 | through two different consecutive registers with lower 32 bit |
15 | Such changes are taken care in the implementation of the pattern for DFmode | 15 | is the argument passed to sqrt and the higher 32 bit is zero. |
16 | for inline expansion of the sqrt. | 16 | If the source and destinations are different the DFmode 64 bits |
17 | registers is not set properly giving the problem in runtime. Such | ||
18 | changes are taken care in the implementation of the pattern for | ||
19 | DFmode for inline expansion of the sqrt. | ||
17 | 20 | ||
18 | ChangeLog: | 21 | ChangeLog: |
19 | 2015-06-16 Ajit Agarwal <ajitkum@xilinx.com> | 22 | 2015-06-16 Ajit Agarwal <ajitkum@xilinx.com> |
@@ -29,7 +32,7 @@ Signed-off-by:Ajit Agarwal ajitkum@xilinx.com | |||
29 | 1 file changed, 14 insertions(+) | 32 | 1 file changed, 14 insertions(+) |
30 | 33 | ||
31 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 34 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
32 | index 3c80760..1fb5582 100644 | 35 | index 8f9baec826b..986d9c3aa25 100644 |
33 | --- a/gcc/config/microblaze/microblaze.md | 36 | --- a/gcc/config/microblaze/microblaze.md |
34 | +++ b/gcc/config/microblaze/microblaze.md | 37 | +++ b/gcc/config/microblaze/microblaze.md |
35 | @@ -451,6 +451,20 @@ | 38 | @@ -451,6 +451,20 @@ |
@@ -54,5 +57,5 @@ index 3c80760..1fb5582 100644 | |||
54 | [(set (match_operand:SI 0 "register_operand" "=d") | 57 | [(set (match_operand:SI 0 "register_operand" "=d") |
55 | (fix:SI (match_operand:SF 1 "register_operand" "d")))] | 58 | (fix:SI (match_operand:SF 1 "register_operand" "d")))] |
56 | -- | 59 | -- |
57 | 2.7.4 | 60 | 2.17.1 |
58 | 61 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch index a314170f..b4d03172 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch | |||
@@ -1,8 +1,8 @@ | |||
1 | From 2c4a1d46e4f1b2342f899d6741d09dbf7cc87aa2 Mon Sep 17 00:00:00 2001 | 1 | From fe7962c6cc54a5d5f80db90ccc06b8603ddeb74f Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 17:33:31 +0530 | 3 | Date: Tue, 17 Jan 2017 17:33:31 +0530 |
4 | Subject: [PATCH 23/63] [Patch] OPT: Update heuristics for loop-invariant for | 4 | Subject: [PATCH 21/58] [Patch] OPT: Update heuristics for loop-invariant for |
5 | address arithme. .tic. | 5 | address arithmetic |
6 | 6 | ||
7 | The changes are made in the patch to update the heuristics | 7 | The changes are made in the patch to update the heuristics |
8 | for loop invariant for address arithmetic. The heuristics is | 8 | for loop invariant for address arithmetic. The heuristics is |
@@ -26,7 +26,7 @@ Signed-off-by:Ajit Agarwal ajitkum@xilinx.com | |||
26 | 1 file changed, 2 insertions(+), 4 deletions(-) | 26 | 1 file changed, 2 insertions(+), 4 deletions(-) |
27 | 27 | ||
28 | diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c | 28 | diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c |
29 | index b880ead..fd7a019 100644 | 29 | index 37ae6549e56..f6385d6cf43 100644 |
30 | --- a/gcc/loop-invariant.c | 30 | --- a/gcc/loop-invariant.c |
31 | +++ b/gcc/loop-invariant.c | 31 | +++ b/gcc/loop-invariant.c |
32 | @@ -1465,10 +1465,8 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | 32 | @@ -1465,10 +1465,8 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed, |
@@ -43,5 +43,5 @@ index b880ead..fd7a019 100644 | |||
43 | else if (ret < 0) | 43 | else if (ret < 0) |
44 | return -1; | 44 | return -1; |
45 | -- | 45 | -- |
46 | 2.7.4 | 46 | 2.17.1 |
47 | 47 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch index a786ba09..2e5afed8 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch | |||
@@ -1,14 +1,17 @@ | |||
1 | From c2b64f2f7a06231d8da0a53c6761939583ac56da Mon Sep 17 00:00:00 2001 | 1 | From b066cb189302814fcd91b38f2f9da830a2c5b8fe Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 18:07:24 +0530 | 3 | Date: Tue, 17 Jan 2017 18:07:24 +0530 |
4 | Subject: [PATCH 24/63] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' | 4 | Subject: [PATCH 22/58] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' |
5 | insn definitions Change adddi3 to handle DI immediates as the second operand, | 5 | insn definitions |
6 | this requires modification to the output template however reduces the need to | 6 | |
7 | specify seperate templates for 16-bit positive/negative immediate operands. | 7 | Change adddi3 to handle DI immediates as the second operand, this |
8 | The use of 32-bit immediates for the addi and addic instructions is handled | 8 | requires modification to the output template however reduces the need to |
9 | by the assembler, which will emit the imm instructions when required. This | 9 | specify seperate templates for 16-bit positive/negative immediate |
10 | conveniently handles the optimizable cases where the immediate constant value | 10 | operands. The use of 32-bit immediates for the addi and addic |
11 | does not need the higher half words of the operands upper/lower words. | 11 | instructions is handled by the assembler, which will emit the imm |
12 | instructions when required. This conveniently handles the optimizable | ||
13 | cases where the immediate constant value does not need the higher half | ||
14 | words of the operands upper/lower words. | ||
12 | 15 | ||
13 | Change the constraints of the subdi3 instruction definition such that it | 16 | Change the constraints of the subdi3 instruction definition such that it |
14 | does not match the second operand as an immediate value. This is because | 17 | does not match the second operand as an immediate value. This is because |
@@ -23,7 +26,7 @@ Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> | |||
23 | 1 file changed, 6 insertions(+), 7 deletions(-) | 26 | 1 file changed, 6 insertions(+), 7 deletions(-) |
24 | 27 | ||
25 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 28 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
26 | index 1fb5582..216219b 100644 | 29 | index 986d9c3aa25..efd2c34e0b7 100644 |
27 | --- a/gcc/config/microblaze/microblaze.md | 30 | --- a/gcc/config/microblaze/microblaze.md |
28 | +++ b/gcc/config/microblaze/microblaze.md | 31 | +++ b/gcc/config/microblaze/microblaze.md |
29 | @@ -502,17 +502,16 @@ | 32 | @@ -502,17 +502,16 @@ |
@@ -59,5 +62,5 @@ index 1fb5582..216219b 100644 | |||
59 | "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" | 62 | "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" |
60 | [(set_attr "type" "darith") | 63 | [(set_attr "type" "darith") |
61 | -- | 64 | -- |
62 | 2.7.4 | 65 | 2.17.1 |
63 | 66 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch index 98310b36..fa16749e 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch | |||
@@ -1,11 +1,13 @@ | |||
1 | From c7e5c253b1e7800bc5ec8cc69850118ed938e22f Mon Sep 17 00:00:00 2001 | 1 | From 98018d020d9fbae38ea19627dec64d03d7f21fac Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 18:18:41 +0530 | 3 | Date: Tue, 17 Jan 2017 18:18:41 +0530 |
4 | Subject: [PATCH 25/63] [Patch, microblaze]: Update ashlsi3 & movsf patterns | 4 | Subject: [PATCH 23/58] [Patch, microblaze]: Update ashlsi3 & movsf patterns |
5 | This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand | 5 | |
6 | of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal | 6 | This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in |
7 | patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our | 7 | print_operand of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay |
8 | instruction doesn't support so using gen_int_mode function | 8 | and movsf_internal patterns beacuse HOST_WIDE_INT_PRINT_HEX |
9 | is generating 64-bit value which our instruction doesn't support | ||
10 | so using gen_int_mode function | ||
9 | 11 | ||
10 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 12 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
11 | :Ajit Agarwal <ajitkum@xilinx.com> | 13 | :Ajit Agarwal <ajitkum@xilinx.com> |
@@ -22,25 +24,11 @@ ChangeLog: | |||
22 | updated the 'F' case to use "unsinged int" instead | 24 | updated the 'F' case to use "unsinged int" instead |
23 | of HOST_WIDE_INT_PRINT_HEX | 25 | of HOST_WIDE_INT_PRINT_HEX |
24 | --- | 26 | --- |
25 | gcc/config/microblaze/microblaze.c | 2 +- | ||
26 | gcc/config/microblaze/microblaze.md | 10 ++++++++-- | 27 | gcc/config/microblaze/microblaze.md | 10 ++++++++-- |
27 | 2 files changed, 9 insertions(+), 3 deletions(-) | 28 | 1 file changed, 8 insertions(+), 2 deletions(-) |
28 | 29 | ||
29 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
30 | index 0ce9d13..7669668 100644 | ||
31 | --- a/gcc/config/microblaze/microblaze.c | ||
32 | +++ b/gcc/config/microblaze/microblaze.c | ||
33 | @@ -2608,7 +2608,7 @@ print_operand (FILE * file, rtx op, int letter) | ||
34 | unsigned long value_long; | ||
35 | REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), | ||
36 | value_long); | ||
37 | - fprintf (file, HOST_WIDE_INT_PRINT_HEX, value_long); | ||
38 | + fprintf (file, "0x%08x", (unsigned int) value_long); | ||
39 | } | ||
40 | else | ||
41 | { | ||
42 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 30 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
43 | index 216219b..4bc209c 100644 | 31 | index efd2c34e0b7..be8bbda2bfb 100644 |
44 | --- a/gcc/config/microblaze/microblaze.md | 32 | --- a/gcc/config/microblaze/microblaze.md |
45 | +++ b/gcc/config/microblaze/microblaze.md | 33 | +++ b/gcc/config/microblaze/microblaze.md |
46 | @@ -1368,7 +1368,10 @@ | 34 | @@ -1368,7 +1368,10 @@ |
@@ -68,5 +56,5 @@ index 216219b..4bc209c 100644 | |||
68 | [(set_attr "type" "no_delay_arith") | 56 | [(set_attr "type" "no_delay_arith") |
69 | (set_attr "mode" "SI") | 57 | (set_attr "mode" "SI") |
70 | -- | 58 | -- |
71 | 2.7.4 | 59 | 2.17.1 |
72 | 60 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch index ba80ce45..8e0eda3c 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch | |||
@@ -1,9 +1,10 @@ | |||
1 | From c3b633b0ee8d228a7d70a02b574822aba9a0fd93 Mon Sep 17 00:00:00 2001 | 1 | From 3f98e90620e0ae6d76a1ba18e97389feb095c3e4 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 17 Jan 2017 19:50:34 +0530 | 3 | Date: Tue, 17 Jan 2017 19:50:34 +0530 |
4 | Subject: [PATCH 26/63] [Patch, microblaze]: 8-stage pipeline for microblaze | 4 | Subject: [PATCH 24/58] [Patch, microblaze]: 8-stage pipeline for microblaze |
5 | This patch adds the support for the 8-stage pipeline. The new 8-stage | 5 | |
6 | pipeline reduces the latencies of float & integer division drastically | 6 | This patch adds the support for the 8-stage pipeline. The new 8-stage |
7 | pipeline reduces the latencies of float & integer division drastically | ||
7 | 8 | ||
8 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 9 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
9 | 10 | ||
@@ -21,17 +22,36 @@ ChangeLog: | |||
21 | *microblaze.opt (mxl-frequency): New | 22 | *microblaze.opt (mxl-frequency): New |
22 | New flag added for 8-stage pipeline | 23 | New flag added for 8-stage pipeline |
23 | --- | 24 | --- |
24 | gcc/config/microblaze/microblaze.c | 13 ++++++ | 25 | gcc/config/microblaze/microblaze.c | 18 ++++++- |
25 | gcc/config/microblaze/microblaze.h | 3 +- | 26 | gcc/config/microblaze/microblaze.h | 3 +- |
26 | gcc/config/microblaze/microblaze.md | 79 +++++++++++++++++++++++++++++++++++- | 27 | gcc/config/microblaze/microblaze.md | 79 +++++++++++++++++++++++++++- |
27 | gcc/config/microblaze/microblaze.opt | 4 ++ | 28 | gcc/config/microblaze/microblaze.opt | 4 ++ |
28 | 4 files changed, 96 insertions(+), 3 deletions(-) | 29 | 4 files changed, 100 insertions(+), 4 deletions(-) |
29 | 30 | ||
30 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 31 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
31 | index 7669668..ae7d5dd 100644 | 32 | index a4bdf66f045..a3996119bd7 100644 |
32 | --- a/gcc/config/microblaze/microblaze.c | 33 | --- a/gcc/config/microblaze/microblaze.c |
33 | +++ b/gcc/config/microblaze/microblaze.c | 34 | +++ b/gcc/config/microblaze/microblaze.c |
34 | @@ -1848,6 +1848,19 @@ microblaze_option_override (void) | 35 | @@ -164,6 +164,9 @@ int microblaze_no_unsafe_delay; |
36 | /* Set to one if the targeted core has the CLZ insn. */ | ||
37 | int microblaze_has_clz = 0; | ||
38 | |||
39 | +/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */ | ||
40 | +int microblaze_has_bitfield = 0; | ||
41 | + | ||
42 | /* Which CPU pipeline do we use. We haven't really standardized on a CPU | ||
43 | version having only a particular type of pipeline. There can still be | ||
44 | options on the CPU to scale pipeline features up or down. :( | ||
45 | @@ -1739,7 +1742,7 @@ microblaze_option_override (void) | ||
46 | register int i, start; | ||
47 | register int regno; | ||
48 | register machine_mode mode; | ||
49 | - int ver; | ||
50 | + int ver,ver_int; | ||
51 | |||
52 | microblaze_section_threshold = (global_options_set.x_g_switch_value | ||
53 | ? g_switch_value | ||
54 | @@ -1840,6 +1843,19 @@ microblaze_option_override (void) | ||
35 | "%<-mcpu=v8.30.a%>"); | 55 | "%<-mcpu=v8.30.a%>"); |
36 | TARGET_REORDER = 0; | 56 | TARGET_REORDER = 0; |
37 | } | 57 | } |
@@ -52,7 +72,7 @@ index 7669668..ae7d5dd 100644 | |||
52 | if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) | 72 | if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) |
53 | error ("%<-mxl-multiply-high%> requires %<-mno-xl-soft-mul%>"); | 73 | error ("%<-mxl-multiply-high%> requires %<-mno-xl-soft-mul%>"); |
54 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 74 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
55 | index 346e47b..bf7f3b4 100644 | 75 | index 1e155e4041c..8b0db2c1718 100644 |
56 | --- a/gcc/config/microblaze/microblaze.h | 76 | --- a/gcc/config/microblaze/microblaze.h |
57 | +++ b/gcc/config/microblaze/microblaze.h | 77 | +++ b/gcc/config/microblaze/microblaze.h |
58 | @@ -27,7 +27,8 @@ | 78 | @@ -27,7 +27,8 @@ |
@@ -66,7 +86,7 @@ index 346e47b..bf7f3b4 100644 | |||
66 | 86 | ||
67 | #define MICROBLAZE_MASK_NO_UNSAFE_DELAY 0x00000001 | 87 | #define MICROBLAZE_MASK_NO_UNSAFE_DELAY 0x00000001 |
68 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 88 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
69 | index 4bc209c..b7c16ac 100644 | 89 | index be8bbda2bfb..c407a81c51e 100644 |
70 | --- a/gcc/config/microblaze/microblaze.md | 90 | --- a/gcc/config/microblaze/microblaze.md |
71 | +++ b/gcc/config/microblaze/microblaze.md | 91 | +++ b/gcc/config/microblaze/microblaze.md |
72 | @@ -35,6 +35,7 @@ | 92 | @@ -35,6 +35,7 @@ |
@@ -177,7 +197,7 @@ index 4bc209c..b7c16ac 100644 | |||
177 | (set_attr "length" "4")]) | 197 | (set_attr "length" "4")]) |
178 | 198 | ||
179 | diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt | 199 | diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt |
180 | index 2e46941..d23f376 100644 | 200 | index 725c2fab52a..a29c6f8df90 100644 |
181 | --- a/gcc/config/microblaze/microblaze.opt | 201 | --- a/gcc/config/microblaze/microblaze.opt |
182 | +++ b/gcc/config/microblaze/microblaze.opt | 202 | +++ b/gcc/config/microblaze/microblaze.opt |
183 | @@ -133,3 +133,7 @@ Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE). | 203 | @@ -133,3 +133,7 @@ Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE). |
@@ -189,5 +209,5 @@ index 2e46941..d23f376 100644 | |||
189 | +Target Mask(AREA_OPTIMIZED_2) | 209 | +Target Mask(AREA_OPTIMIZED_2) |
190 | +Use 8 stage pipeline (frequency optimization) | 210 | +Use 8 stage pipeline (frequency optimization) |
191 | -- | 211 | -- |
192 | 2.7.4 | 212 | 2.17.1 |
193 | 213 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch index 330b5494..f1b793f3 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch | |||
@@ -1,8 +1,8 @@ | |||
1 | From 650cbdea7bc810e2bd0ebc5eb5647ed513498670 Mon Sep 17 00:00:00 2001 | 1 | From eca67041b3d6e20663313732df0038d75fd2da8d Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 18 Jan 2017 11:08:40 +0530 | 3 | Date: Wed, 18 Jan 2017 11:08:40 +0530 |
4 | Subject: [PATCH 27/63] [Patch,rtl Optimization]: Better register pressure | 4 | Subject: [PATCH 25/58] [Patch,rtl Optimization]: Better register pressure |
5 | estimate for loop . .invariant code motion | 5 | estimate for loop invariant code motion |
6 | 6 | ||
7 | Calculate the loop liveness used for regs for calculating the register pressure | 7 | Calculate the loop liveness used for regs for calculating the register pressure |
8 | in the cost estimation. Loop liveness is based on the following properties. | 8 | in the cost estimation. Loop liveness is based on the following properties. |
@@ -36,15 +36,15 @@ ChangeLog: | |||
36 | 36 | ||
37 | Signed-off-by:Ajit Agarwal ajitkum@xilinx.com. | 37 | Signed-off-by:Ajit Agarwal ajitkum@xilinx.com. |
38 | --- | 38 | --- |
39 | gcc/cfgloopanal.c | 4 +++- | 39 | gcc/cfgloopanal.c | 4 ++- |
40 | gcc/loop-invariant.c | 63 +++++++++++++++++++++++++++++++++++++++------------- | 40 | gcc/loop-invariant.c | 63 +++++++++++++++++++++++++++++++++----------- |
41 | 2 files changed, 50 insertions(+), 17 deletions(-) | 41 | 2 files changed, 50 insertions(+), 17 deletions(-) |
42 | 42 | ||
43 | diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c | 43 | diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c |
44 | index 6dbe96f..ec5cba2 100644 | 44 | index 0b33e8272a7..7be8606e4f0 100644 |
45 | --- a/gcc/cfgloopanal.c | 45 | --- a/gcc/cfgloopanal.c |
46 | +++ b/gcc/cfgloopanal.c | 46 | +++ b/gcc/cfgloopanal.c |
47 | @@ -411,7 +411,9 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed, | 47 | @@ -418,7 +418,9 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed, |
48 | if (regs_needed + target_res_regs <= available_regs) | 48 | if (regs_needed + target_res_regs <= available_regs) |
49 | return 0; | 49 | return 0; |
50 | 50 | ||
@@ -56,7 +56,7 @@ index 6dbe96f..ec5cba2 100644 | |||
56 | them. */ | 56 | them. */ |
57 | cost = target_reg_cost [speed] * n_new; | 57 | cost = target_reg_cost [speed] * n_new; |
58 | diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c | 58 | diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c |
59 | index fd7a019..ad54297 100644 | 59 | index f6385d6cf43..8596b5c984d 100644 |
60 | --- a/gcc/loop-invariant.c | 60 | --- a/gcc/loop-invariant.c |
61 | +++ b/gcc/loop-invariant.c | 61 | +++ b/gcc/loop-invariant.c |
62 | @@ -1519,7 +1519,7 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed, | 62 | @@ -1519,7 +1519,7 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed, |
@@ -138,5 +138,5 @@ index fd7a019..ad54297 100644 | |||
138 | 138 | ||
139 | if (! flag_ira_loop_pressure) | 139 | if (! flag_ira_loop_pressure) |
140 | -- | 140 | -- |
141 | 2.7.4 | 141 | 2.17.1 |
142 | 142 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch index b5ee2c8c..cbc1b7b8 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch | |||
@@ -1,11 +1,13 @@ | |||
1 | From 8f8c6cd35a2cf79449c0155fa865a665d730e541 Mon Sep 17 00:00:00 2001 | 1 | From 711652dd187e5b8d7aa12ecc9f569f10b1521bd1 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 18 Jan 2017 11:25:48 +0530 | 3 | Date: Wed, 18 Jan 2017 11:25:48 +0530 |
4 | Subject: [PATCH 28/63] [Patch, microblaze]: Correct the const high double | 4 | Subject: [PATCH 26/58] [Patch, microblaze]: Correct the const high double |
5 | immediate value With this patch the loading of the DI mode immediate values | 5 | immediate value |
6 | will be using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE | 6 | |
7 | functions, as CONST_DOUBLE_HIGH was returning the sign extension value even | 7 | With this patch the loading of the DI mode immediate values will be |
8 | of the unsigned long long constants also | 8 | using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE |
9 | functions, as CONST_DOUBLE_HIGH was returning the sign extension value | ||
10 | even of the unsigned long long constants also | ||
9 | 11 | ||
10 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 12 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
11 | Ajit Agarwal <ajitkum@xilinx.com> | 13 | Ajit Agarwal <ajitkum@xilinx.com> |
@@ -18,16 +20,16 @@ ChangeLog: | |||
18 | REAL_VALUE_TO_TARGET_DOUBLE | 20 | REAL_VALUE_TO_TARGET_DOUBLE |
19 | *long.c (new): Added new testcase | 21 | *long.c (new): Added new testcase |
20 | --- | 22 | --- |
21 | gcc/config/microblaze/microblaze.c | 8 ++++++-- | 23 | gcc/config/microblaze/microblaze.c | 6 ++++-- |
22 | gcc/testsuite/gcc.target/microblaze/long.c | 10 ++++++++++ | 24 | gcc/testsuite/gcc.target/microblaze/long.c | 10 ++++++++++ |
23 | 2 files changed, 16 insertions(+), 2 deletions(-) | 25 | 2 files changed, 14 insertions(+), 2 deletions(-) |
24 | create mode 100644 gcc/testsuite/gcc.target/microblaze/long.c | 26 | create mode 100644 gcc/testsuite/gcc.target/microblaze/long.c |
25 | 27 | ||
26 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 28 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
27 | index ae7d5dd..002d7a5 100644 | 29 | index a3996119bd7..73d0e010cda 100644 |
28 | --- a/gcc/config/microblaze/microblaze.c | 30 | --- a/gcc/config/microblaze/microblaze.c |
29 | +++ b/gcc/config/microblaze/microblaze.c | 31 | +++ b/gcc/config/microblaze/microblaze.c |
30 | @@ -2594,14 +2594,18 @@ print_operand (FILE * file, rtx op, int letter) | 32 | @@ -2587,14 +2587,16 @@ print_operand (FILE * file, rtx op, int letter) |
31 | else if (letter == 'h' || letter == 'j') | 33 | else if (letter == 'h' || letter == 'j') |
32 | { | 34 | { |
33 | long val[2]; | 35 | long val[2]; |
@@ -40,17 +42,15 @@ index ae7d5dd..002d7a5 100644 | |||
40 | { | 42 | { |
41 | - val[0] = CONST_DOUBLE_HIGH (op); | 43 | - val[0] = CONST_DOUBLE_HIGH (op); |
42 | - val[1] = CONST_DOUBLE_LOW (op); | 44 | - val[1] = CONST_DOUBLE_LOW (op); |
43 | + REAL_VALUE_TYPE rv; | 45 | + REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); |
44 | + REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | 46 | + val[1] = l[WORDS_BIG_ENDIAN == 0]; |
45 | + REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | 47 | + val[0] = l[WORDS_BIG_ENDIAN != 0]; |
46 | + val[1] = l[WORDS_BIG_ENDIAN == 0]; | ||
47 | + val[0] = l[WORDS_BIG_ENDIAN != 0]; | ||
48 | } | 48 | } |
49 | } | 49 | } |
50 | else if (code == CONST_INT) | 50 | else if (code == CONST_INT) |
51 | diff --git a/gcc/testsuite/gcc.target/microblaze/long.c b/gcc/testsuite/gcc.target/microblaze/long.c | 51 | diff --git a/gcc/testsuite/gcc.target/microblaze/long.c b/gcc/testsuite/gcc.target/microblaze/long.c |
52 | new file mode 100644 | 52 | new file mode 100644 |
53 | index 0000000..4d45186 | 53 | index 00000000000..4d4518619d1 |
54 | --- /dev/null | 54 | --- /dev/null |
55 | +++ b/gcc/testsuite/gcc.target/microblaze/long.c | 55 | +++ b/gcc/testsuite/gcc.target/microblaze/long.c |
56 | @@ -0,0 +1,10 @@ | 56 | @@ -0,0 +1,10 @@ |
@@ -65,5 +65,5 @@ index 0000000..4d45186 | |||
65 | +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */ | 65 | +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */ |
66 | +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */ | 66 | +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */ |
67 | -- | 67 | -- |
68 | 2.7.4 | 68 | 2.17.1 |
69 | 69 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch index cbfc98de..3869db15 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch | |||
@@ -1,11 +1,12 @@ | |||
1 | From 30402c3bcfeb8a93656957b22558997b65d69cb8 Mon Sep 17 00:00:00 2001 | 1 | From ea79d97f430d554921d94d30cb8db851cce6664b Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 18 Jan 2017 11:49:58 +0530 | 3 | Date: Wed, 18 Jan 2017 11:49:58 +0530 |
4 | Subject: [PATCH 29/63] [Fix, microblaze]: Fix internal compiler error with | 4 | Subject: [PATCH 27/58] [Fix, microblaze]: Fix internal compiler error with |
5 | msmall-divides This patch will fix the internal error | 5 | msmall-divides |
6 | microblaze_expand_divide function which comes because of rtx PLUS where the | 6 | |
7 | mem_rtx is of type SI and the operand is of type QImode. This patch modifies | 7 | This patch will fix the internal error microblaze_expand_divide function which comes because |
8 | the mem_rtx as QImode and Plus as QImode to fix the error. | 8 | of rtx PLUS where the mem_rtx is of type SI and the operand is of type QImode. |
9 | This patch modifies the mem_rtx as QImode and Plus as QImode to fix the error. | ||
9 | 10 | ||
10 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 11 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
11 | Ajit Agarwal <ajitkum@xilinx.com> | 12 | Ajit Agarwal <ajitkum@xilinx.com> |
@@ -19,10 +20,10 @@ ChangeLog: | |||
19 | 1 file changed, 1 insertion(+), 1 deletion(-) | 20 | 1 file changed, 1 insertion(+), 1 deletion(-) |
20 | 21 | ||
21 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 22 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
22 | index 002d7a5..c662952 100644 | 23 | index 73d0e010cda..f7c29ef28f5 100644 |
23 | --- a/gcc/config/microblaze/microblaze.c | 24 | --- a/gcc/config/microblaze/microblaze.c |
24 | +++ b/gcc/config/microblaze/microblaze.c | 25 | +++ b/gcc/config/microblaze/microblaze.c |
25 | @@ -3909,7 +3909,7 @@ microblaze_expand_divide (rtx operands[]) | 26 | @@ -3902,7 +3902,7 @@ microblaze_expand_divide (rtx operands[]) |
26 | emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); | 27 | emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); |
27 | emit_insn (gen_addsi3 (regt1, regt1, operands[2])); | 28 | emit_insn (gen_addsi3 (regt1, regt1, operands[2])); |
28 | mem_rtx = gen_rtx_MEM (QImode, | 29 | mem_rtx = gen_rtx_MEM (QImode, |
@@ -32,5 +33,5 @@ index 002d7a5..c662952 100644 | |||
32 | insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); | 33 | insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); |
33 | jump = emit_jump_insn_after (gen_jump (div_end_label), insn); | 34 | jump = emit_jump_insn_after (gen_jump (div_end_label), insn); |
34 | -- | 35 | -- |
35 | 2.7.4 | 36 | 2.17.1 |
36 | 37 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch index fce06359..3f9dd69b 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch | |||
@@ -1,8 +1,8 @@ | |||
1 | From 5ac80cf926c4dc96cbfd189f02c9250865b52dd3 Mon Sep 17 00:00:00 2001 | 1 | From fa067a4b7b65aae3671bb02d77c580c9e35fc384 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 18 Jan 2017 12:03:39 +0530 | 3 | Date: Wed, 18 Jan 2017 12:03:39 +0530 |
4 | Subject: [PATCH 30/63] [patch,microblaze]: Fix the calculation of high word in | 4 | Subject: [PATCH 28/58] [patch,microblaze]: Fix the calculation of high word in |
5 | a long long 6. .4-bit | 5 | a long long 64-bit |
6 | 6 | ||
7 | This patch will change the calculation of high word in a long long 64-bit. | 7 | This patch will change the calculation of high word in a long long 64-bit. |
8 | Earlier to this patch the high word of long long word (0xF0000000ULL) is | 8 | Earlier to this patch the high word of long long word (0xF0000000ULL) is |
@@ -27,10 +27,10 @@ ChangeLog: | |||
27 | 1 file changed, 3 deletions(-) | 27 | 1 file changed, 3 deletions(-) |
28 | 28 | ||
29 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 29 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
30 | index c662952..8013a2c 100644 | 30 | index f7c29ef28f5..0a73a6c32b4 100644 |
31 | --- a/gcc/config/microblaze/microblaze.c | 31 | --- a/gcc/config/microblaze/microblaze.c |
32 | +++ b/gcc/config/microblaze/microblaze.c | 32 | +++ b/gcc/config/microblaze/microblaze.c |
33 | @@ -2612,9 +2612,6 @@ print_operand (FILE * file, rtx op, int letter) | 33 | @@ -2603,9 +2603,6 @@ print_operand (FILE * file, rtx op, int letter) |
34 | { | 34 | { |
35 | val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; | 35 | val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; |
36 | val[1] = INTVAL (op) & 0x00000000ffffffffLL; | 36 | val[1] = INTVAL (op) & 0x00000000ffffffffLL; |
@@ -41,5 +41,5 @@ index c662952..8013a2c 100644 | |||
41 | fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); | 41 | fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); |
42 | } | 42 | } |
43 | -- | 43 | -- |
44 | 2.7.4 | 44 | 2.17.1 |
45 | 45 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Patch-microblaze-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch index cbf64d97..dfdb479c 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Patch-microblaze-Add-new-bit-field-instructions.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch | |||
@@ -1,13 +1,15 @@ | |||
1 | From 45deb5bd3ae8c3db360ef181c9873e37d2288848 Mon Sep 17 00:00:00 2001 | 1 | From 341bf8ad4e55693d00d4d8c916f4c347e7186dd4 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 18 Jan 2017 12:14:51 +0530 | 3 | Date: Wed, 18 Jan 2017 12:14:51 +0530 |
4 | Subject: [PATCH 31/63] [Patch, microblaze]: Add new bit-field instructions | 4 | Subject: [PATCH 29/58] [Patch, microblaze]: Add new bit-field instructions |
5 | This patches adds new bsefi and bsifi instructions. BSEFI- The instruction | 5 | |
6 | shall extract a bit field from a register and place it right-adjusted in the | 6 | This patches adds new bsefi and bsifi instructions. |
7 | destination register. The other bits in the destination register shall be set | 7 | BSEFI- The instruction shall extract a bit field from a |
8 | to zero BSIFI- The instruction shall insert a right-adjusted bit field from a | 8 | register and place it right-adjusted in the destination register. |
9 | register at another position in the destination register. The rest of the | 9 | The other bits in the destination register shall be set to zero |
10 | bits in the destination register shall be unchanged | 10 | BSIFI- The instruction shall insert a right-adjusted bit field |
11 | from a register at another position in the destination register. | ||
12 | The rest of the bits in the destination register shall be unchanged | ||
11 | 13 | ||
12 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 14 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
13 | 15 | ||
@@ -16,11 +18,32 @@ ChangeLog: | |||
16 | 18 | ||
17 | *microblaze.md (Update): Added new patterns | 19 | *microblaze.md (Update): Added new patterns |
18 | --- | 20 | --- |
19 | gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++++++++++ | 21 | gcc/config/microblaze/microblaze.h | 2 + |
20 | 1 file changed, 73 insertions(+) | 22 | gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++ |
23 | 2 files changed, 75 insertions(+) | ||
21 | 24 | ||
25 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
26 | index 8b0db2c1718..b5b7b22cec9 100644 | ||
27 | --- a/gcc/config/microblaze/microblaze.h | ||
28 | +++ b/gcc/config/microblaze/microblaze.h | ||
29 | @@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[]; | ||
30 | |||
31 | extern int microblaze_no_unsafe_delay; | ||
32 | extern int microblaze_has_clz; | ||
33 | +extern int microblaze_has_bitfield; | ||
34 | extern enum pipeline_type microblaze_pipe; | ||
35 | |||
36 | #define OBJECT_FORMAT_ELF | ||
37 | @@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe; | ||
38 | |||
39 | /* Do we have CLZ? */ | ||
40 | #define TARGET_HAS_CLZ (TARGET_PATTERN_COMPARE && microblaze_has_clz) | ||
41 | +#define TARGET_HAS_BITFIELD (TARGET_BARREL_SHIFT && microblaze_has_bitfield) | ||
42 | |||
43 | /* The default is to support PIC. */ | ||
44 | #define TARGET_SUPPORTS_PIC 1 | ||
22 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 45 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
23 | index b7c16ac..67b298a 100644 | 46 | index c407a81c51e..fa6aabdb9d4 100644 |
24 | --- a/gcc/config/microblaze/microblaze.md | 47 | --- a/gcc/config/microblaze/microblaze.md |
25 | +++ b/gcc/config/microblaze/microblaze.md | 48 | +++ b/gcc/config/microblaze/microblaze.md |
26 | @@ -982,6 +982,8 @@ | 49 | @@ -982,6 +982,8 @@ |
@@ -116,5 +139,5 @@ index b7c16ac..67b298a 100644 | |||
116 | + | 139 | + |
117 | (include "sync.md") | 140 | (include "sync.md") |
118 | -- | 141 | -- |
119 | 2.7.4 | 142 | 2.17.1 |
120 | 143 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch index 86df58b3..bb773239 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch | |||
@@ -1,21 +1,23 @@ | |||
1 | From bc95cc12b2c4d96ea709eefc4b99181b8c40b19c Mon Sep 17 00:00:00 2001 | 1 | From df38540af411564f428079335c8d1e695dc1d723 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 18 Jan 2017 12:42:10 +0530 | 3 | Date: Wed, 18 Jan 2017 12:42:10 +0530 |
4 | Subject: [PATCH 32/63] [Patch, microblaze]: Fix bug in MB version calculation | 4 | Subject: [PATCH 30/58] [Patch, microblaze]: Fix bug in MB version calculation |
5 | This patch fixes the bug in microblaze_version_to_int function. Earlier the | 5 | |
6 | conversion of vXX.YY.Z to int has a bug which is fixed now. | 6 | This patch fixes the bug in microblaze_version_to_int function. |
7 | Earlier the conversion of vXX.YY.Z to int has a bug which is | ||
8 | fixed now. | ||
7 | 9 | ||
8 | Signed-off-by : Mahesh Bodapati <mbodapat@xilinx.com> | 10 | Signed-off-by : Mahesh Bodapati <mbodapat@xilinx.com> |
9 | Nagaraju Mekala <nmekala@xilix.com> | 11 | Nagaraju Mekala <nmekala@xilix.com> |
10 | --- | 12 | --- |
11 | gcc/config/microblaze/microblaze.c | 147 ++++++++++++++++++------------------- | 13 | gcc/config/microblaze/microblaze.c | 145 ++++++++++++++--------------- |
12 | 1 file changed, 70 insertions(+), 77 deletions(-) | 14 | 1 file changed, 69 insertions(+), 76 deletions(-) |
13 | 15 | ||
14 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 16 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
15 | index 8013a2c..3f68ef0 100644 | 17 | index 0a73a6c32b4..4b5699671e8 100644 |
16 | --- a/gcc/config/microblaze/microblaze.c | 18 | --- a/gcc/config/microblaze/microblaze.c |
17 | +++ b/gcc/config/microblaze/microblaze.c | 19 | +++ b/gcc/config/microblaze/microblaze.c |
18 | @@ -239,6 +239,63 @@ section *sdata2_section; | 20 | @@ -242,6 +242,63 @@ section *sdata2_section; |
19 | #define TARGET_HAVE_TLS true | 21 | #define TARGET_HAVE_TLS true |
20 | #endif | 22 | #endif |
21 | 23 | ||
@@ -79,7 +81,7 @@ index 8013a2c..3f68ef0 100644 | |||
79 | /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */ | 81 | /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */ |
80 | static bool | 82 | static bool |
81 | microblaze_const_double_ok (rtx op, machine_mode mode) | 83 | microblaze_const_double_ok (rtx op, machine_mode mode) |
82 | @@ -1338,8 +1395,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, | 84 | @@ -1341,8 +1398,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, |
83 | { | 85 | { |
84 | if (TARGET_BARREL_SHIFT) | 86 | if (TARGET_BARREL_SHIFT) |
85 | { | 87 | { |
@@ -89,7 +91,7 @@ index 8013a2c..3f68ef0 100644 | |||
89 | *total = COSTS_N_INSNS (1); | 91 | *total = COSTS_N_INSNS (1); |
90 | else | 92 | else |
91 | *total = COSTS_N_INSNS (2); | 93 | *total = COSTS_N_INSNS (2); |
92 | @@ -1400,8 +1456,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, | 94 | @@ -1403,8 +1459,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, |
93 | } | 95 | } |
94 | else if (!TARGET_SOFT_MUL) | 96 | else if (!TARGET_SOFT_MUL) |
95 | { | 97 | { |
@@ -99,7 +101,7 @@ index 8013a2c..3f68ef0 100644 | |||
99 | *total = COSTS_N_INSNS (1); | 101 | *total = COSTS_N_INSNS (1); |
100 | else | 102 | else |
101 | *total = COSTS_N_INSNS (3); | 103 | *total = COSTS_N_INSNS (3); |
102 | @@ -1682,72 +1737,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, | 104 | @@ -1677,65 +1732,6 @@ function_arg_partial_bytes (cumulative_args_t cum_v, |
103 | return 0; | 105 | return 0; |
104 | } | 106 | } |
105 | 107 | ||
@@ -165,15 +167,7 @@ index 8013a2c..3f68ef0 100644 | |||
165 | static void | 167 | static void |
166 | microblaze_option_override (void) | 168 | microblaze_option_override (void) |
167 | { | 169 | { |
168 | register int i, start; | 170 | @@ -1763,13 +1759,13 @@ microblaze_option_override (void) |
169 | register int regno; | ||
170 | register machine_mode mode; | ||
171 | - int ver; | ||
172 | + int ver,ver_int; | ||
173 | |||
174 | microblaze_section_threshold = (global_options_set.x_g_switch_value | ||
175 | ? g_switch_value | ||
176 | @@ -1768,13 +1764,13 @@ microblaze_option_override (void) | ||
177 | /* Check the MicroBlaze CPU version for any special action to be done. */ | 171 | /* Check the MicroBlaze CPU version for any special action to be done. */ |
178 | if (microblaze_select_cpu == NULL) | 172 | if (microblaze_select_cpu == NULL) |
179 | microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU; | 173 | microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU; |
@@ -190,7 +184,7 @@ index 8013a2c..3f68ef0 100644 | |||
190 | if (ver < 0) | 184 | if (ver < 0) |
191 | { | 185 | { |
192 | /* No hardware exceptions in earlier versions. So no worries. */ | 186 | /* No hardware exceptions in earlier versions. So no worries. */ |
193 | @@ -1785,8 +1781,7 @@ microblaze_option_override (void) | 187 | @@ -1780,8 +1776,7 @@ microblaze_option_override (void) |
194 | microblaze_pipe = MICROBLAZE_PIPE_3; | 188 | microblaze_pipe = MICROBLAZE_PIPE_3; |
195 | } | 189 | } |
196 | else if (ver == 0 | 190 | else if (ver == 0 |
@@ -200,7 +194,7 @@ index 8013a2c..3f68ef0 100644 | |||
200 | { | 194 | { |
201 | #if 0 | 195 | #if 0 |
202 | microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY); | 196 | microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY); |
203 | @@ -1803,11 +1798,9 @@ microblaze_option_override (void) | 197 | @@ -1798,11 +1793,9 @@ microblaze_option_override (void) |
204 | #endif | 198 | #endif |
205 | microblaze_no_unsafe_delay = 0; | 199 | microblaze_no_unsafe_delay = 0; |
206 | microblaze_pipe = MICROBLAZE_PIPE_5; | 200 | microblaze_pipe = MICROBLAZE_PIPE_5; |
@@ -215,7 +209,7 @@ index 8013a2c..3f68ef0 100644 | |||
215 | { | 209 | { |
216 | /* Pattern compares are to be turned on by default only when | 210 | /* Pattern compares are to be turned on by default only when |
217 | compiling for MB v5.00.'z'. */ | 211 | compiling for MB v5.00.'z'. */ |
218 | @@ -1815,7 +1808,7 @@ microblaze_option_override (void) | 212 | @@ -1810,7 +1803,7 @@ microblaze_option_override (void) |
219 | } | 213 | } |
220 | } | 214 | } |
221 | 215 | ||
@@ -224,7 +218,7 @@ index 8013a2c..3f68ef0 100644 | |||
224 | if (ver < 0) | 218 | if (ver < 0) |
225 | { | 219 | { |
226 | if (TARGET_MULTIPLY_HIGH) | 220 | if (TARGET_MULTIPLY_HIGH) |
227 | @@ -1824,7 +1817,7 @@ microblaze_option_override (void) | 221 | @@ -1819,7 +1812,7 @@ microblaze_option_override (void) |
228 | "%<-mcpu=v6.00.a%> or greater"); | 222 | "%<-mcpu=v6.00.a%> or greater"); |
229 | } | 223 | } |
230 | 224 | ||
@@ -233,7 +227,7 @@ index 8013a2c..3f68ef0 100644 | |||
233 | microblaze_has_clz = 1; | 227 | microblaze_has_clz = 1; |
234 | if (ver < 0) | 228 | if (ver < 0) |
235 | { | 229 | { |
236 | @@ -1833,7 +1826,7 @@ microblaze_option_override (void) | 230 | @@ -1828,7 +1821,7 @@ microblaze_option_override (void) |
237 | } | 231 | } |
238 | 232 | ||
239 | /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */ | 233 | /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */ |
@@ -243,5 +237,5 @@ index 8013a2c..3f68ef0 100644 | |||
243 | { | 237 | { |
244 | if (TARGET_REORDER == 1) | 238 | if (TARGET_REORDER == 1) |
245 | -- | 239 | -- |
246 | 2.7.4 | 240 | 2.17.1 |
247 | 241 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixing-the-issue-with-the-builtin_alloc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch index 91ac0d02..0c80cf81 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixing-the-issue-with-the-builtin_alloc.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch | |||
@@ -1,9 +1,10 @@ | |||
1 | From e672184af6a43b773131181270c7a8c5c5273bd8 Mon Sep 17 00:00:00 2001 | 1 | From 87da245d89fffe6a025037b4a53f66dafa7e1f84 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Thu, 23 Feb 2017 17:09:04 +0530 | 3 | Date: Thu, 23 Feb 2017 17:09:04 +0530 |
4 | Subject: [PATCH 35/63] Fixing the issue with the builtin_alloc. register r18 | 4 | Subject: [PATCH 31/58] Fixing the issue with the builtin_alloc. |
5 | was not properly handling the stack pattern which was resolved by using free | 5 | |
6 | available register | 6 | register r18 was not properly handling the stack pattern |
7 | which was resolved by using free available register | ||
7 | 8 | ||
8 | signed-off-by:nagaraju mekala <nmekala@xilinx.com> | 9 | signed-off-by:nagaraju mekala <nmekala@xilinx.com> |
9 | --- | 10 | --- |
@@ -11,7 +12,7 @@ signed-off-by:nagaraju mekala <nmekala@xilinx.com> | |||
11 | 1 file changed, 4 insertions(+), 4 deletions(-) | 12 | 1 file changed, 4 insertions(+), 4 deletions(-) |
12 | 13 | ||
13 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 14 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
14 | index 67b298a..7bae957 100644 | 15 | index fa6aabdb9d4..9de46d0ce24 100644 |
15 | --- a/gcc/config/microblaze/microblaze.md | 16 | --- a/gcc/config/microblaze/microblaze.md |
16 | +++ b/gcc/config/microblaze/microblaze.md | 17 | +++ b/gcc/config/microblaze/microblaze.md |
17 | @@ -2078,10 +2078,10 @@ | 18 | @@ -2078,10 +2078,10 @@ |
@@ -40,5 +41,5 @@ index 67b298a..7bae957 100644 | |||
40 | } | 41 | } |
41 | ) | 42 | ) |
42 | -- | 43 | -- |
43 | 2.7.4 | 44 | 2.17.1 |
44 | 45 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch index ba0f8e80..458af563 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch | |||
@@ -1,15 +1,15 @@ | |||
1 | From f436198b817f33d56aaddb88ff629378498de489 Mon Sep 17 00:00:00 2001 | 1 | From 3e8779308d1901b273b2b360bea719aa72d24ab9 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 19 Feb 2018 18:06:16 +0530 | 3 | Date: Mon, 19 Feb 2018 18:06:16 +0530 |
4 | Subject: [PATCH 37/63] [Patch,Microblaze]: update in constraints for bitfield | 4 | Subject: [PATCH 32/58] [Patch,Microblaze]: update in constraints for bitfield |
5 | insert and extract instructions. | 5 | insert and extract instructions. |
6 | 6 | ||
7 | --- | 7 | --- |
8 | gcc/config/microblaze/microblaze.md | 43 ++++++------------------------------- | 8 | gcc/config/microblaze/microblaze.md | 43 +++++------------------------ |
9 | 1 file changed, 7 insertions(+), 36 deletions(-) | 9 | 1 file changed, 7 insertions(+), 36 deletions(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
12 | index 7bae957..6101387 100644 | 12 | index 9de46d0ce24..fe94807182b 100644 |
13 | --- a/gcc/config/microblaze/microblaze.md | 13 | --- a/gcc/config/microblaze/microblaze.md |
14 | +++ b/gcc/config/microblaze/microblaze.md | 14 | +++ b/gcc/config/microblaze/microblaze.md |
15 | @@ -2492,33 +2492,17 @@ | 15 | @@ -2492,33 +2492,17 @@ |
@@ -76,5 +76,5 @@ index 7bae957..6101387 100644 | |||
76 | (define_insn "insv_32" | 76 | (define_insn "insv_32" |
77 | [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") | 77 | [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") |
78 | -- | 78 | -- |
79 | 2.7.4 | 79 | 2.17.1 |
80 | 80 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Fixing-the-bug-in-the-bit-field-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Fixing-the-bug-in-the-bit-field-instruction.patch deleted file mode 100644 index 68f70ae8..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Fixing-the-bug-in-the-bit-field-instruction.patch +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | From 51da0572e0650378e422030b26d1258c8fc76df6 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Wed, 18 Jan 2017 13:57:48 +0530 | ||
4 | Subject: [PATCH 33/63] Fixing the bug in the bit-field instruction. Bit field | ||
5 | instruction should be generated only if mcpu >10.0 | ||
6 | |||
7 | --- | ||
8 | gcc/config/microblaze/microblaze.c | 3 +++ | ||
9 | gcc/config/microblaze/microblaze.h | 2 ++ | ||
10 | 2 files changed, 5 insertions(+) | ||
11 | |||
12 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
13 | index 3f68ef0..a37f08eea 100644 | ||
14 | --- a/gcc/config/microblaze/microblaze.c | ||
15 | +++ b/gcc/config/microblaze/microblaze.c | ||
16 | @@ -164,6 +164,9 @@ int microblaze_no_unsafe_delay; | ||
17 | /* Set to one if the targeted core has the CLZ insn. */ | ||
18 | int microblaze_has_clz = 0; | ||
19 | |||
20 | +/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */ | ||
21 | +int microblaze_has_bitfield = 0; | ||
22 | + | ||
23 | /* Which CPU pipeline do we use. We haven't really standardized on a CPU | ||
24 | version having only a particular type of pipeline. There can still be | ||
25 | options on the CPU to scale pipeline features up or down. :( | ||
26 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
27 | index bf7f3b4..1d05e6e 100644 | ||
28 | --- a/gcc/config/microblaze/microblaze.h | ||
29 | +++ b/gcc/config/microblaze/microblaze.h | ||
30 | @@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[]; | ||
31 | |||
32 | extern int microblaze_no_unsafe_delay; | ||
33 | extern int microblaze_has_clz; | ||
34 | +extern int microblaze_has_bitfield; | ||
35 | extern enum pipeline_type microblaze_pipe; | ||
36 | |||
37 | #define OBJECT_FORMAT_ELF | ||
38 | @@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe; | ||
39 | |||
40 | /* Do we have CLZ? */ | ||
41 | #define TARGET_HAS_CLZ (TARGET_PATTERN_COMPARE && microblaze_has_clz) | ||
42 | +#define TARGET_HAS_BITFIELD (TARGET_BARREL_SHIFT && microblaze_has_bitfield) | ||
43 | |||
44 | /* The default is to support PIC. */ | ||
45 | #define TARGET_SUPPORTS_PIC 1 | ||
46 | -- | ||
47 | 2.7.4 | ||
48 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch index 2b90880f..32433470 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 89aa1907ab0abad38e394f46f7e5f577bdb26498 Mon Sep 17 00:00:00 2001 | 1 | From eb90da1d616dfb7481b3f7c74a2be40e921a24f2 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 4 Jun 2018 10:10:18 +0530 | 3 | Date: Mon, 4 Jun 2018 10:10:18 +0530 |
4 | Subject: [PATCH 38/63] [Patch,Microblaze] : Removed fsqrt generation for | 4 | Subject: [PATCH 33/58] [Patch,Microblaze] : Removed fsqrt generation for |
5 | double values. | 5 | double values. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Subject: [PATCH 38/63] [Patch,Microblaze] : Removed fsqrt generation for | |||
9 | 1 file changed, 14 deletions(-) | 9 | 1 file changed, 14 deletions(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
12 | index 6101387..eb01221 100644 | 12 | index fe94807182b..a527da70f8a 100644 |
13 | --- a/gcc/config/microblaze/microblaze.md | 13 | --- a/gcc/config/microblaze/microblaze.md |
14 | +++ b/gcc/config/microblaze/microblaze.md | 14 | +++ b/gcc/config/microblaze/microblaze.md |
15 | @@ -526,20 +526,6 @@ | 15 | @@ -526,20 +526,6 @@ |
@@ -34,5 +34,5 @@ index 6101387..eb01221 100644 | |||
34 | [(set (match_operand:SI 0 "register_operand" "=d") | 34 | [(set (match_operand:SI 0 "register_operand" "=d") |
35 | (fix:SI (match_operand:SF 1 "register_operand" "d")))] | 35 | (fix:SI (match_operand:SF 1 "register_operand" "d")))] |
36 | -- | 36 | -- |
37 | 2.7.4 | 37 | 2.17.1 |
38 | 38 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Intial-commit-of-64-bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch index f524cba2..acf14b23 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Intial-commit-of-64-bit-Microblaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch | |||
@@ -1,21 +1,37 @@ | |||
1 | From 68359cc8e82f63d01a77c39c68e782e6757cd71e Mon Sep 17 00:00:00 2001 | 1 | From 9600049313b095d6d7d8ea46a7ab783fabae71a2 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 3 Apr 2018 16:48:39 +0530 | 3 | Date: Tue, 3 Apr 2018 16:48:39 +0530 |
4 | Subject: [PATCH 39/63] Intial commit of 64-bit Microblaze | 4 | Subject: [PATCH 34/58] Intial commit of 64-bit Microblaze |
5 | 5 | ||
6 | Conflicts: | 6 | Added load store pattern movdi and also adding missing files |
7 | gcc/config/microblaze/microblaze.opt | ||
8 | --- | 7 | --- |
8 | gcc/config/microblaze/constraints.md | 5 + | ||
9 | gcc/config/microblaze/microblaze-protos.h | 1 + | 9 | gcc/config/microblaze/microblaze-protos.h | 1 + |
10 | gcc/config/microblaze/microblaze.c | 109 +++++++-- | 10 | gcc/config/microblaze/microblaze.c | 109 ++++-- |
11 | gcc/config/microblaze/microblaze.h | 4 +- | 11 | gcc/config/microblaze/microblaze.h | 4 +- |
12 | gcc/config/microblaze/microblaze.md | 370 +++++++++++++++++++++++++++++- | 12 | gcc/config/microblaze/microblaze.md | 394 +++++++++++++++++++++- |
13 | gcc/config/microblaze/microblaze.opt | 7 +- | 13 | gcc/config/microblaze/microblaze.opt | 7 +- |
14 | gcc/config/microblaze/t-microblaze | 7 +- | 14 | gcc/config/microblaze/t-microblaze | 7 +- |
15 | 6 files changed, 460 insertions(+), 38 deletions(-) | 15 | 7 files changed, 490 insertions(+), 37 deletions(-) |
16 | 16 | ||
17 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md | ||
18 | index b9fc6e3fae2..f636b035280 100644 | ||
19 | --- a/gcc/config/microblaze/constraints.md | ||
20 | +++ b/gcc/config/microblaze/constraints.md | ||
21 | @@ -52,6 +52,11 @@ | ||
22 | (and (match_code "const_int") | ||
23 | (match_test "ival > 0 && ival < 0x10000"))) | ||
24 | |||
25 | +(define_constraint "K" | ||
26 | + "A constant in the range 0xffffff8000000000L to 0x0000007fffffffffL (inclusive)." | ||
27 | + (and (match_code "const_int") | ||
28 | + (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL"))) | ||
29 | + | ||
30 | ;; Define floating point constraints | ||
31 | |||
32 | (define_constraint "G" | ||
17 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h | 33 | diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h |
18 | index bdc9b69..7d6c189 100644 | 34 | index 76ffc682df2..b8a3321dbdf 100644 |
19 | --- a/gcc/config/microblaze/microblaze-protos.h | 35 | --- a/gcc/config/microblaze/microblaze-protos.h |
20 | +++ b/gcc/config/microblaze/microblaze-protos.h | 36 | +++ b/gcc/config/microblaze/microblaze-protos.h |
21 | @@ -36,6 +36,7 @@ extern void microblaze_expand_divide (rtx *); | 37 | @@ -36,6 +36,7 @@ extern void microblaze_expand_divide (rtx *); |
@@ -27,10 +43,10 @@ index bdc9b69..7d6c189 100644 | |||
27 | extern void print_operand (FILE *, rtx, int); | 43 | extern void print_operand (FILE *, rtx, int); |
28 | extern void print_operand_address (FILE *, rtx); | 44 | extern void print_operand_address (FILE *, rtx); |
29 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 45 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
30 | index 71640e5..f740f5c 100644 | 46 | index 4b5699671e8..8a3ccae558a 100644 |
31 | --- a/gcc/config/microblaze/microblaze.c | 47 | --- a/gcc/config/microblaze/microblaze.c |
32 | +++ b/gcc/config/microblaze/microblaze.c | 48 | +++ b/gcc/config/microblaze/microblaze.c |
33 | @@ -3570,11 +3570,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) | 49 | @@ -3562,11 +3562,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) |
34 | op0 = operands[0]; | 50 | op0 = operands[0]; |
35 | op1 = operands[1]; | 51 | op1 = operands[1]; |
36 | 52 | ||
@@ -45,7 +61,7 @@ index 71640e5..f740f5c 100644 | |||
45 | emit_move_insn (op0, temp); | 61 | emit_move_insn (op0, temp); |
46 | return true; | 62 | return true; |
47 | } | 63 | } |
48 | @@ -3639,12 +3639,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) | 64 | @@ -3631,12 +3631,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) |
49 | && (flag_pic == 2 || microblaze_tls_symbol_p (p0) | 65 | && (flag_pic == 2 || microblaze_tls_symbol_p (p0) |
50 | || !SMALL_INT (p1))))) | 66 | || !SMALL_INT (p1))))) |
51 | { | 67 | { |
@@ -60,7 +76,7 @@ index 71640e5..f740f5c 100644 | |||
60 | return true; | 76 | return true; |
61 | } | 77 | } |
62 | } | 78 | } |
63 | @@ -3775,7 +3775,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) | 79 | @@ -3767,7 +3767,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) |
64 | rtx cmp_op0 = operands[1]; | 80 | rtx cmp_op0 = operands[1]; |
65 | rtx cmp_op1 = operands[2]; | 81 | rtx cmp_op1 = operands[2]; |
66 | rtx label1 = operands[3]; | 82 | rtx label1 = operands[3]; |
@@ -69,7 +85,7 @@ index 71640e5..f740f5c 100644 | |||
69 | rtx condition; | 85 | rtx condition; |
70 | 86 | ||
71 | gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG)); | 87 | gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG)); |
72 | @@ -3784,23 +3784,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) | 88 | @@ -3776,23 +3776,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) |
73 | if (cmp_op1 == const0_rtx) | 89 | if (cmp_op1 == const0_rtx) |
74 | { | 90 | { |
75 | comp_reg = cmp_op0; | 91 | comp_reg = cmp_op0; |
@@ -112,7 +128,7 @@ index 71640e5..f740f5c 100644 | |||
112 | } | 128 | } |
113 | } | 129 | } |
114 | 130 | ||
115 | @@ -3811,7 +3824,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) | 131 | @@ -3803,7 +3816,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) |
116 | rtx cmp_op0 = operands[1]; | 132 | rtx cmp_op0 = operands[1]; |
117 | rtx cmp_op1 = operands[2]; | 133 | rtx cmp_op1 = operands[2]; |
118 | rtx label1 = operands[3]; | 134 | rtx label1 = operands[3]; |
@@ -121,7 +137,7 @@ index 71640e5..f740f5c 100644 | |||
121 | rtx condition; | 137 | rtx condition; |
122 | 138 | ||
123 | gcc_assert ((GET_CODE (cmp_op0) == REG) | 139 | gcc_assert ((GET_CODE (cmp_op0) == REG) |
124 | @@ -3822,30 +3835,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) | 140 | @@ -3814,30 +3827,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) |
125 | { | 141 | { |
126 | comp_reg = cmp_op0; | 142 | comp_reg = cmp_op0; |
127 | condition = gen_rtx_fmt_ee (signed_condition (code), | 143 | condition = gen_rtx_fmt_ee (signed_condition (code), |
@@ -197,7 +213,7 @@ index 71640e5..f740f5c 100644 | |||
197 | } | 213 | } |
198 | } | 214 | } |
199 | 215 | ||
200 | @@ -3862,6 +3908,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) | 216 | @@ -3854,6 +3900,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) |
201 | emit_jump_insn (gen_condjump (condition, operands[3])); | 217 | emit_jump_insn (gen_condjump (condition, operands[3])); |
202 | } | 218 | } |
203 | 219 | ||
@@ -218,7 +234,7 @@ index 71640e5..f740f5c 100644 | |||
218 | 234 | ||
219 | static bool | 235 | static bool |
220 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 236 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
221 | index 1d05e6e..2ca44f5 100644 | 237 | index b5b7b22cec9..4931895e650 100644 |
222 | --- a/gcc/config/microblaze/microblaze.h | 238 | --- a/gcc/config/microblaze/microblaze.h |
223 | +++ b/gcc/config/microblaze/microblaze.h | 239 | +++ b/gcc/config/microblaze/microblaze.h |
224 | @@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe; | 240 | @@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe; |
@@ -247,7 +263,7 @@ index 1d05e6e..2ca44f5 100644 | |||
247 | #define FLOAT_TYPE_SIZE 32 | 263 | #define FLOAT_TYPE_SIZE 32 |
248 | #define DOUBLE_TYPE_SIZE 64 | 264 | #define DOUBLE_TYPE_SIZE 64 |
249 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 265 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
250 | index eb01221..dbb592e 100644 | 266 | index a527da70f8a..bcf2b9244f8 100644 |
251 | --- a/gcc/config/microblaze/microblaze.md | 267 | --- a/gcc/config/microblaze/microblaze.md |
252 | +++ b/gcc/config/microblaze/microblaze.md | 268 | +++ b/gcc/config/microblaze/microblaze.md |
253 | @@ -497,7 +497,6 @@ | 269 | @@ -497,7 +497,6 @@ |
@@ -440,15 +456,39 @@ index eb01221..dbb592e 100644 | |||
440 | ;; Those for integer source operand are ordered | 456 | ;; Those for integer source operand are ordered |
441 | ;; widest source type first. | 457 | ;; widest source type first. |
442 | 458 | ||
443 | @@ -1011,7 +1122,6 @@ | 459 | @@ -1011,6 +1122,31 @@ |
444 | ) | 460 | ) |
445 | 461 | ||
446 | 462 | ||
447 | - | 463 | +(define_insn "*movdi_internal_64" |
464 | + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") | ||
465 | + (match_operand:DI 1 "general_operand" " d,K,J,R,o,d,d"))] | ||
466 | + "TARGET_MB_64 && (INTVAL(operands[1]) < 0x7fffffffff) && (INTVAL(operands[1]) > 0xffffff8000000000)" | ||
467 | + { | ||
468 | + switch (which_alternative) | ||
469 | + { | ||
470 | + case 0: | ||
471 | + return "addlk\t%0,%1"; | ||
472 | + case 1: | ||
473 | + return "addlik\t%0,r0,%1"; | ||
474 | + case 2: | ||
475 | + return "addlk\t%0,r0,r0"; | ||
476 | + case 3: | ||
477 | + case 4: | ||
478 | + return "lli\t%0,%1"; | ||
479 | + case 5: | ||
480 | + case 6: | ||
481 | + return "sli\t%1,%0"; | ||
482 | + } | ||
483 | + return "unreachable"; | ||
484 | + } | ||
485 | + [(set_attr "type" "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store") | ||
486 | + (set_attr "mode" "DI") | ||
487 | + (set_attr "length" "8,8,8,8,12,8,12")]) | ||
488 | |||
448 | (define_insn "*movdi_internal" | 489 | (define_insn "*movdi_internal" |
449 | [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") | 490 | [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") |
450 | (match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))] | 491 | @@ -1423,6 +1559,36 @@ |
451 | @@ -1423,6 +1533,36 @@ | ||
452 | (set_attr "length" "4,4")] | 492 | (set_attr "length" "4,4")] |
453 | ) | 493 | ) |
454 | 494 | ||
@@ -485,7 +525,7 @@ index eb01221..dbb592e 100644 | |||
485 | ;; The following patterns apply when there is no barrel shifter present | 525 | ;; The following patterns apply when there is no barrel shifter present |
486 | 526 | ||
487 | (define_insn "*ashlsi3_with_mul_delay" | 527 | (define_insn "*ashlsi3_with_mul_delay" |
488 | @@ -1548,6 +1688,36 @@ | 528 | @@ -1548,6 +1714,36 @@ |
489 | ;;---------------------------------------------------------------- | 529 | ;;---------------------------------------------------------------- |
490 | ;; 32-bit right shifts | 530 | ;; 32-bit right shifts |
491 | ;;---------------------------------------------------------------- | 531 | ;;---------------------------------------------------------------- |
@@ -522,7 +562,7 @@ index eb01221..dbb592e 100644 | |||
522 | (define_expand "ashrsi3" | 562 | (define_expand "ashrsi3" |
523 | [(set (match_operand:SI 0 "register_operand" "=&d") | 563 | [(set (match_operand:SI 0 "register_operand" "=&d") |
524 | (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") | 564 | (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") |
525 | @@ -1657,6 +1827,36 @@ | 565 | @@ -1657,6 +1853,36 @@ |
526 | ;;---------------------------------------------------------------- | 566 | ;;---------------------------------------------------------------- |
527 | ;; 32-bit right shifts (logical) | 567 | ;; 32-bit right shifts (logical) |
528 | ;;---------------------------------------------------------------- | 568 | ;;---------------------------------------------------------------- |
@@ -559,7 +599,7 @@ index eb01221..dbb592e 100644 | |||
559 | 599 | ||
560 | (define_expand "lshrsi3" | 600 | (define_expand "lshrsi3" |
561 | [(set (match_operand:SI 0 "register_operand" "=&d") | 601 | [(set (match_operand:SI 0 "register_operand" "=&d") |
562 | @@ -1803,6 +2003,8 @@ | 602 | @@ -1803,6 +2029,8 @@ |
563 | (set_attr "length" "4")] | 603 | (set_attr "length" "4")] |
564 | ) | 604 | ) |
565 | 605 | ||
@@ -568,7 +608,7 @@ index eb01221..dbb592e 100644 | |||
568 | ;;---------------------------------------------------------------- | 608 | ;;---------------------------------------------------------------- |
569 | ;; Setting a register from an floating point comparison. | 609 | ;; Setting a register from an floating point comparison. |
570 | ;;---------------------------------------------------------------- | 610 | ;;---------------------------------------------------------------- |
571 | @@ -1818,6 +2020,18 @@ | 611 | @@ -1818,6 +2046,18 @@ |
572 | (set_attr "length" "4")] | 612 | (set_attr "length" "4")] |
573 | ) | 613 | ) |
574 | 614 | ||
@@ -587,7 +627,7 @@ index eb01221..dbb592e 100644 | |||
587 | ;;---------------------------------------------------------------- | 627 | ;;---------------------------------------------------------------- |
588 | ;; Conditional branches | 628 | ;; Conditional branches |
589 | ;;---------------------------------------------------------------- | 629 | ;;---------------------------------------------------------------- |
590 | @@ -1930,6 +2144,115 @@ | 630 | @@ -1930,6 +2170,115 @@ |
591 | (set_attr "length" "12")] | 631 | (set_attr "length" "12")] |
592 | ) | 632 | ) |
593 | 633 | ||
@@ -703,7 +743,7 @@ index eb01221..dbb592e 100644 | |||
703 | ;;---------------------------------------------------------------- | 743 | ;;---------------------------------------------------------------- |
704 | ;; Unconditional branches | 744 | ;; Unconditional branches |
705 | ;;---------------------------------------------------------------- | 745 | ;;---------------------------------------------------------------- |
706 | @@ -2478,17 +2801,33 @@ | 746 | @@ -2478,17 +2827,33 @@ |
707 | DONE; | 747 | DONE; |
708 | }") | 748 | }") |
709 | 749 | ||
@@ -742,7 +782,7 @@ index eb01221..dbb592e 100644 | |||
742 | [(set (match_operand:SI 0 "register_operand" "=r") | 782 | [(set (match_operand:SI 0 "register_operand" "=r") |
743 | (zero_extract:SI (match_operand:SI 1 "register_operand" "r") | 783 | (zero_extract:SI (match_operand:SI 1 "register_operand" "r") |
744 | (match_operand:SI 2 "immediate_operand" "I") | 784 | (match_operand:SI 2 "immediate_operand" "I") |
745 | @@ -2505,8 +2844,21 @@ | 785 | @@ -2505,8 +2870,21 @@ |
746 | (match_operand:SI 2 "immediate_operand" "I")) | 786 | (match_operand:SI 2 "immediate_operand" "I")) |
747 | (match_operand:SI 3 "register_operand" "r"))] | 787 | (match_operand:SI 3 "register_operand" "r"))] |
748 | "TARGET_HAS_BITFIELD" | 788 | "TARGET_HAS_BITFIELD" |
@@ -767,7 +807,7 @@ index eb01221..dbb592e 100644 | |||
767 | (define_insn "insv_32" | 807 | (define_insn "insv_32" |
768 | [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") | 808 | [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") |
769 | diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt | 809 | diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt |
770 | index d23f376..f316e27 100644 | 810 | index a29c6f8df90..bbe48b06da6 100644 |
771 | --- a/gcc/config/microblaze/microblaze.opt | 811 | --- a/gcc/config/microblaze/microblaze.opt |
772 | +++ b/gcc/config/microblaze/microblaze.opt | 812 | +++ b/gcc/config/microblaze/microblaze.opt |
773 | @@ -136,4 +136,9 @@ Target | 813 | @@ -136,4 +136,9 @@ Target |
@@ -782,7 +822,7 @@ index d23f376..f316e27 100644 | |||
782 | +MicroBlaze 64-bit mode. | 822 | +MicroBlaze 64-bit mode. |
783 | + | 823 | + |
784 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze | 824 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze |
785 | index 41fa9a9..e9a1921 100644 | 825 | index 41fa9a92081..7671f63c5b5 100644 |
786 | --- a/gcc/config/microblaze/t-microblaze | 826 | --- a/gcc/config/microblaze/t-microblaze |
787 | +++ b/gcc/config/microblaze/t-microblaze | 827 | +++ b/gcc/config/microblaze/t-microblaze |
788 | @@ -1,8 +1,11 @@ | 828 | @@ -1,8 +1,11 @@ |
@@ -794,11 +834,11 @@ index 41fa9a9..e9a1921 100644 | |||
794 | MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian | 834 | MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian |
795 | +MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 | 835 | +MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 |
796 | MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian | 836 | MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian |
797 | +MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 | 837 | +#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 |
798 | +MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 | 838 | +#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 |
799 | 839 | ||
800 | # Extra files | 840 | # Extra files |
801 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ | 841 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ |
802 | -- | 842 | -- |
803 | 2.7.4 | 843 | 2.17.1 |
804 | 844 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch deleted file mode 100644 index 04326205..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | From 132b913b721f66c5db17f62dd5559bbca11bb875 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Wed, 18 Jan 2017 20:57:10 +0530 | ||
4 | Subject: [PATCH 34/63] [Patch, microblaze]: Macros used in Xilinx internal | ||
5 | patches has been removed in gcc 6.2 version so modified the code accordingly. | ||
6 | |||
7 | --- | ||
8 | gcc/config/microblaze/microblaze.c | 8 +++----- | ||
9 | 1 file changed, 3 insertions(+), 5 deletions(-) | ||
10 | |||
11 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
12 | index a37f08eea..71640e5 100644 | ||
13 | --- a/gcc/config/microblaze/microblaze.c | ||
14 | +++ b/gcc/config/microblaze/microblaze.c | ||
15 | @@ -2597,11 +2597,9 @@ print_operand (FILE * file, rtx op, int letter) | ||
16 | REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); | ||
17 | else | ||
18 | { | ||
19 | - REAL_VALUE_TYPE rv; | ||
20 | - REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | ||
21 | - REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | ||
22 | - val[1] = l[WORDS_BIG_ENDIAN == 0]; | ||
23 | - val[0] = l[WORDS_BIG_ENDIAN != 0]; | ||
24 | + REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); | ||
25 | + val[1] = l[WORDS_BIG_ENDIAN == 0]; | ||
26 | + val[0] = l[WORDS_BIG_ENDIAN != 0]; | ||
27 | } | ||
28 | } | ||
29 | else if (code == CONST_INT) | ||
30 | -- | ||
31 | 2.7.4 | ||
32 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Intial-commit-for-64bit-MB-sources.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch index b022eb77..e7872d54 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Intial-commit-for-64bit-MB-sources.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch | |||
@@ -1,25 +1,25 @@ | |||
1 | From 7c68b1c9771f09f7cc53410248e8432c562d24bf Mon Sep 17 00:00:00 2001 | 1 | From 8660e76d664ee4b42a83a4c15344b072d3c879df Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 27 Jul 2018 15:23:41 +0530 | 3 | Date: Fri, 27 Jul 2018 15:23:41 +0530 |
4 | Subject: [PATCH 41/63] Intial commit for 64bit-MB sources. Need to cleanup the | 4 | Subject: [PATCH 35/58] Intial commit for 64bit-MB sources. |
5 | code later. | ||
6 | 5 | ||
6 | Need to cleanup the code later. | ||
7 | --- | 7 | --- |
8 | gcc/config/microblaze/constraints.md | 2 +- | 8 | gcc/config/microblaze/constraints.md | 2 +- |
9 | gcc/config/microblaze/microblaze-c.c | 6 + | 9 | gcc/config/microblaze/microblaze-c.c | 6 + |
10 | gcc/config/microblaze/microblaze.c | 218 ++++++++---- | 10 | gcc/config/microblaze/microblaze.c | 218 ++++++--- |
11 | gcc/config/microblaze/microblaze.h | 63 ++-- | 11 | gcc/config/microblaze/microblaze.h | 63 ++- |
12 | gcc/config/microblaze/microblaze.md | 606 ++++++++++++++++++++++++-------- | 12 | gcc/config/microblaze/microblaze.md | 606 ++++++++++++++++++------ |
13 | gcc/config/microblaze/t-microblaze | 7 +- | 13 | gcc/config/microblaze/t-microblaze | 7 +- |
14 | libgcc/config/microblaze/crti.S | 4 +- | 14 | libgcc/config/microblaze/crti.S | 4 +- |
15 | libgcc/config/microblaze/crtn.S | 4 +- | 15 | libgcc/config/microblaze/crtn.S | 4 +- |
16 | libgcc/config/microblaze/divdi3.S | 98 ++++++ | 16 | libgcc/config/microblaze/divdi3.S | 98 ++++ |
17 | libgcc/config/microblaze/divdi3_table.c | 62 ++++ | 17 | libgcc/config/microblaze/divdi3_table.c | 62 +++ |
18 | libgcc/config/microblaze/moddi3.S | 97 +++++ | 18 | libgcc/config/microblaze/moddi3.S | 97 ++++ |
19 | libgcc/config/microblaze/muldi3.S | 73 ++++ | 19 | libgcc/config/microblaze/muldi3.S | 73 +++ |
20 | libgcc/config/microblaze/t-microblaze | 11 +- | 20 | libgcc/config/microblaze/t-microblaze | 11 +- |
21 | libgcc/config/microblaze/udivdi3.S | 107 ++++++ | 21 | libgcc/config/microblaze/udivdi3.S | 107 +++++ |
22 | libgcc/config/microblaze/umoddi3.S | 110 ++++++ | 22 | libgcc/config/microblaze/umoddi3.S | 110 +++++ |
23 | 15 files changed, 1232 insertions(+), 236 deletions(-) | 23 | 15 files changed, 1232 insertions(+), 236 deletions(-) |
24 | create mode 100644 libgcc/config/microblaze/divdi3.S | 24 | create mode 100644 libgcc/config/microblaze/divdi3.S |
25 | create mode 100644 libgcc/config/microblaze/divdi3_table.c | 25 | create mode 100644 libgcc/config/microblaze/divdi3_table.c |
@@ -29,7 +29,7 @@ Subject: [PATCH 41/63] Intial commit for 64bit-MB sources. Need to cleanup the | |||
29 | create mode 100644 libgcc/config/microblaze/umoddi3.S | 29 | create mode 100644 libgcc/config/microblaze/umoddi3.S |
30 | 30 | ||
31 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md | 31 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md |
32 | index 69bcb24..2fce91e 100644 | 32 | index f636b035280..c2b0a21c53b 100644 |
33 | --- a/gcc/config/microblaze/constraints.md | 33 | --- a/gcc/config/microblaze/constraints.md |
34 | +++ b/gcc/config/microblaze/constraints.md | 34 | +++ b/gcc/config/microblaze/constraints.md |
35 | @@ -55,7 +55,7 @@ | 35 | @@ -55,7 +55,7 @@ |
@@ -42,7 +42,7 @@ index 69bcb24..2fce91e 100644 | |||
42 | ;; Define floating point constraints | 42 | ;; Define floating point constraints |
43 | 43 | ||
44 | diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c | 44 | diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c |
45 | index cd21319..d2b0c76 100644 | 45 | index d8c88e510e5..dbcd21fc6ee 100644 |
46 | --- a/gcc/config/microblaze/microblaze-c.c | 46 | --- a/gcc/config/microblaze/microblaze-c.c |
47 | +++ b/gcc/config/microblaze/microblaze-c.c | 47 | +++ b/gcc/config/microblaze/microblaze-c.c |
48 | @@ -100,4 +100,10 @@ microblaze_cpp_define (cpp_reader *pfile) | 48 | @@ -100,4 +100,10 @@ microblaze_cpp_define (cpp_reader *pfile) |
@@ -57,7 +57,7 @@ index cd21319..d2b0c76 100644 | |||
57 | + } | 57 | + } |
58 | } | 58 | } |
59 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 59 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
60 | index f740f5c..d5ff7af 100644 | 60 | index 8a3ccae558a..3ecda553fe6 100644 |
61 | --- a/gcc/config/microblaze/microblaze.c | 61 | --- a/gcc/config/microblaze/microblaze.c |
62 | +++ b/gcc/config/microblaze/microblaze.c | 62 | +++ b/gcc/config/microblaze/microblaze.c |
63 | @@ -383,10 +383,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) | 63 | @@ -383,10 +383,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) |
@@ -118,7 +118,7 @@ index f740f5c..d5ff7af 100644 | |||
118 | 118 | ||
119 | /* Mop up any left-over bytes. */ | 119 | /* Mop up any left-over bytes. */ |
120 | if (leftover) | 120 | if (leftover) |
121 | @@ -1634,14 +1642,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v, | 121 | @@ -1633,14 +1641,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v, |
122 | break; | 122 | break; |
123 | 123 | ||
124 | case E_DFmode: | 124 | case E_DFmode: |
@@ -141,7 +141,7 @@ index f740f5c..d5ff7af 100644 | |||
141 | break; | 141 | break; |
142 | 142 | ||
143 | case E_QImode: | 143 | case E_QImode: |
144 | @@ -2295,7 +2309,7 @@ compute_frame_size (HOST_WIDE_INT size) | 144 | @@ -2285,7 +2299,7 @@ compute_frame_size (HOST_WIDE_INT size) |
145 | 145 | ||
146 | if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM) | 146 | if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM) |
147 | /* Don't account for link register. It is accounted specially below. */ | 147 | /* Don't account for link register. It is accounted specially below. */ |
@@ -150,7 +150,7 @@ index f740f5c..d5ff7af 100644 | |||
150 | 150 | ||
151 | mask |= (1L << (regno - GP_REG_FIRST)); | 151 | mask |= (1L << (regno - GP_REG_FIRST)); |
152 | } | 152 | } |
153 | @@ -2564,7 +2578,7 @@ print_operand (FILE * file, rtx op, int letter) | 153 | @@ -2554,7 +2568,7 @@ print_operand (FILE * file, rtx op, int letter) |
154 | 154 | ||
155 | if ((letter == 'M' && !WORDS_BIG_ENDIAN) | 155 | if ((letter == 'M' && !WORDS_BIG_ENDIAN) |
156 | || (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D') | 156 | || (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D') |
@@ -159,7 +159,7 @@ index f740f5c..d5ff7af 100644 | |||
159 | 159 | ||
160 | fprintf (file, "%s", reg_names[regnum]); | 160 | fprintf (file, "%s", reg_names[regnum]); |
161 | } | 161 | } |
162 | @@ -2590,6 +2604,7 @@ print_operand (FILE * file, rtx op, int letter) | 162 | @@ -2580,6 +2594,7 @@ print_operand (FILE * file, rtx op, int letter) |
163 | else if (letter == 'h' || letter == 'j') | 163 | else if (letter == 'h' || letter == 'j') |
164 | { | 164 | { |
165 | long val[2]; | 165 | long val[2]; |
@@ -167,7 +167,7 @@ index f740f5c..d5ff7af 100644 | |||
167 | long l[2]; | 167 | long l[2]; |
168 | if (code == CONST_DOUBLE) | 168 | if (code == CONST_DOUBLE) |
169 | { | 169 | { |
170 | @@ -2602,12 +2617,12 @@ print_operand (FILE * file, rtx op, int letter) | 170 | @@ -2592,12 +2607,12 @@ print_operand (FILE * file, rtx op, int letter) |
171 | val[0] = l[WORDS_BIG_ENDIAN != 0]; | 171 | val[0] = l[WORDS_BIG_ENDIAN != 0]; |
172 | } | 172 | } |
173 | } | 173 | } |
@@ -184,7 +184,7 @@ index f740f5c..d5ff7af 100644 | |||
184 | } | 184 | } |
185 | else if (code == CONST_DOUBLE) | 185 | else if (code == CONST_DOUBLE) |
186 | { | 186 | { |
187 | @@ -2801,7 +2816,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) | 187 | @@ -2791,7 +2806,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) |
188 | 188 | ||
189 | switch_to_section (get_section (section, 0, NULL)); | 189 | switch_to_section (get_section (section, 0, NULL)); |
190 | assemble_align (POINTER_SIZE); | 190 | assemble_align (POINTER_SIZE); |
@@ -196,7 +196,7 @@ index f740f5c..d5ff7af 100644 | |||
196 | output_addr_const (asm_out_file, symbol); | 196 | output_addr_const (asm_out_file, symbol); |
197 | fputs ("\n", asm_out_file); | 197 | fputs ("\n", asm_out_file); |
198 | } | 198 | } |
199 | @@ -2824,7 +2842,10 @@ microblaze_asm_destructor (rtx symbol, int priority) | 199 | @@ -2814,7 +2832,10 @@ microblaze_asm_destructor (rtx symbol, int priority) |
200 | 200 | ||
201 | switch_to_section (get_section (section, 0, NULL)); | 201 | switch_to_section (get_section (section, 0, NULL)); |
202 | assemble_align (POINTER_SIZE); | 202 | assemble_align (POINTER_SIZE); |
@@ -208,7 +208,7 @@ index f740f5c..d5ff7af 100644 | |||
208 | output_addr_const (asm_out_file, symbol); | 208 | output_addr_const (asm_out_file, symbol); |
209 | fputs ("\n", asm_out_file); | 209 | fputs ("\n", asm_out_file); |
210 | } | 210 | } |
211 | @@ -2890,7 +2911,7 @@ save_restore_insns (int prologue) | 211 | @@ -2880,7 +2901,7 @@ save_restore_insns (int prologue) |
212 | /* For interrupt_handlers, need to save/restore the MSR. */ | 212 | /* For interrupt_handlers, need to save/restore the MSR. */ |
213 | if (microblaze_is_interrupt_variant ()) | 213 | if (microblaze_is_interrupt_variant ()) |
214 | { | 214 | { |
@@ -217,7 +217,7 @@ index f740f5c..d5ff7af 100644 | |||
217 | gen_rtx_PLUS (Pmode, base_reg_rtx, | 217 | gen_rtx_PLUS (Pmode, base_reg_rtx, |
218 | GEN_INT (current_frame_info. | 218 | GEN_INT (current_frame_info. |
219 | gp_offset - | 219 | gp_offset - |
220 | @@ -2898,8 +2919,8 @@ save_restore_insns (int prologue) | 220 | @@ -2888,8 +2909,8 @@ save_restore_insns (int prologue) |
221 | 221 | ||
222 | /* Do not optimize in flow analysis. */ | 222 | /* Do not optimize in flow analysis. */ |
223 | MEM_VOLATILE_P (isr_mem_rtx) = 1; | 223 | MEM_VOLATILE_P (isr_mem_rtx) = 1; |
@@ -228,7 +228,7 @@ index f740f5c..d5ff7af 100644 | |||
228 | } | 228 | } |
229 | 229 | ||
230 | if (microblaze_is_interrupt_variant () && !prologue) | 230 | if (microblaze_is_interrupt_variant () && !prologue) |
231 | @@ -2907,8 +2928,8 @@ save_restore_insns (int prologue) | 231 | @@ -2897,8 +2918,8 @@ save_restore_insns (int prologue) |
232 | emit_move_insn (isr_reg_rtx, isr_mem_rtx); | 232 | emit_move_insn (isr_reg_rtx, isr_mem_rtx); |
233 | emit_move_insn (isr_msr_rtx, isr_reg_rtx); | 233 | emit_move_insn (isr_msr_rtx, isr_reg_rtx); |
234 | /* Do not optimize in flow analysis. */ | 234 | /* Do not optimize in flow analysis. */ |
@@ -239,7 +239,7 @@ index f740f5c..d5ff7af 100644 | |||
239 | } | 239 | } |
240 | 240 | ||
241 | for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) | 241 | for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) |
242 | @@ -2919,9 +2940,9 @@ save_restore_insns (int prologue) | 242 | @@ -2909,9 +2930,9 @@ save_restore_insns (int prologue) |
243 | /* Don't handle here. Already handled as the first register. */ | 243 | /* Don't handle here. Already handled as the first register. */ |
244 | continue; | 244 | continue; |
245 | 245 | ||
@@ -251,7 +251,7 @@ index f740f5c..d5ff7af 100644 | |||
251 | if (microblaze_is_interrupt_variant () || save_volatiles) | 251 | if (microblaze_is_interrupt_variant () || save_volatiles) |
252 | /* Do not optimize in flow analysis. */ | 252 | /* Do not optimize in flow analysis. */ |
253 | MEM_VOLATILE_P (mem_rtx) = 1; | 253 | MEM_VOLATILE_P (mem_rtx) = 1; |
254 | @@ -2936,7 +2957,7 @@ save_restore_insns (int prologue) | 254 | @@ -2926,7 +2947,7 @@ save_restore_insns (int prologue) |
255 | insn = emit_move_insn (reg_rtx, mem_rtx); | 255 | insn = emit_move_insn (reg_rtx, mem_rtx); |
256 | } | 256 | } |
257 | 257 | ||
@@ -260,7 +260,7 @@ index f740f5c..d5ff7af 100644 | |||
260 | } | 260 | } |
261 | } | 261 | } |
262 | 262 | ||
263 | @@ -2946,8 +2967,8 @@ save_restore_insns (int prologue) | 263 | @@ -2936,8 +2957,8 @@ save_restore_insns (int prologue) |
264 | emit_move_insn (isr_mem_rtx, isr_reg_rtx); | 264 | emit_move_insn (isr_mem_rtx, isr_reg_rtx); |
265 | 265 | ||
266 | /* Do not optimize in flow analysis. */ | 266 | /* Do not optimize in flow analysis. */ |
@@ -271,7 +271,7 @@ index f740f5c..d5ff7af 100644 | |||
271 | } | 271 | } |
272 | 272 | ||
273 | /* Done saving and restoring */ | 273 | /* Done saving and restoring */ |
274 | @@ -3037,7 +3058,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor) | 274 | @@ -3027,7 +3048,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor) |
275 | 275 | ||
276 | switch_to_section (s); | 276 | switch_to_section (s); |
277 | assemble_align (POINTER_SIZE); | 277 | assemble_align (POINTER_SIZE); |
@@ -283,7 +283,7 @@ index f740f5c..d5ff7af 100644 | |||
283 | output_addr_const (asm_out_file, symbol); | 283 | output_addr_const (asm_out_file, symbol); |
284 | fputs ("\n", asm_out_file); | 284 | fputs ("\n", asm_out_file); |
285 | } | 285 | } |
286 | @@ -3182,10 +3206,10 @@ microblaze_expand_prologue (void) | 286 | @@ -3171,10 +3195,10 @@ microblaze_expand_prologue (void) |
287 | { | 287 | { |
288 | if (offset != 0) | 288 | if (offset != 0) |
289 | ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset)); | 289 | ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset)); |
@@ -297,7 +297,7 @@ index f740f5c..d5ff7af 100644 | |||
297 | } | 297 | } |
298 | } | 298 | } |
299 | 299 | ||
300 | @@ -3194,15 +3218,23 @@ microblaze_expand_prologue (void) | 300 | @@ -3183,15 +3207,23 @@ microblaze_expand_prologue (void) |
301 | rtx fsiz_rtx = GEN_INT (fsiz); | 301 | rtx fsiz_rtx = GEN_INT (fsiz); |
302 | 302 | ||
303 | rtx_insn *insn = NULL; | 303 | rtx_insn *insn = NULL; |
@@ -323,7 +323,7 @@ index f740f5c..d5ff7af 100644 | |||
323 | gen_rtx_PLUS (Pmode, stack_pointer_rtx, | 323 | gen_rtx_PLUS (Pmode, stack_pointer_rtx, |
324 | const0_rtx)); | 324 | const0_rtx)); |
325 | 325 | ||
326 | @@ -3210,7 +3242,7 @@ microblaze_expand_prologue (void) | 326 | @@ -3199,7 +3231,7 @@ microblaze_expand_prologue (void) |
327 | /* Do not optimize in flow analysis. */ | 327 | /* Do not optimize in flow analysis. */ |
328 | MEM_VOLATILE_P (mem_rtx) = 1; | 328 | MEM_VOLATILE_P (mem_rtx) = 1; |
329 | 329 | ||
@@ -332,7 +332,7 @@ index f740f5c..d5ff7af 100644 | |||
332 | insn = emit_move_insn (mem_rtx, reg_rtx); | 332 | insn = emit_move_insn (mem_rtx, reg_rtx); |
333 | RTX_FRAME_RELATED_P (insn) = 1; | 333 | RTX_FRAME_RELATED_P (insn) = 1; |
334 | } | 334 | } |
335 | @@ -3320,12 +3352,12 @@ microblaze_expand_epilogue (void) | 335 | @@ -3309,12 +3341,12 @@ microblaze_expand_epilogue (void) |
336 | if (!crtl->is_leaf || interrupt_handler) | 336 | if (!crtl->is_leaf || interrupt_handler) |
337 | { | 337 | { |
338 | mem_rtx = | 338 | mem_rtx = |
@@ -347,7 +347,7 @@ index f740f5c..d5ff7af 100644 | |||
347 | emit_move_insn (reg_rtx, mem_rtx); | 347 | emit_move_insn (reg_rtx, mem_rtx); |
348 | } | 348 | } |
349 | 349 | ||
350 | @@ -3341,15 +3373,25 @@ microblaze_expand_epilogue (void) | 350 | @@ -3330,15 +3362,25 @@ microblaze_expand_epilogue (void) |
351 | /* _restore_ registers for epilogue. */ | 351 | /* _restore_ registers for epilogue. */ |
352 | save_restore_insns (0); | 352 | save_restore_insns (0); |
353 | emit_insn (gen_blockage ()); | 353 | emit_insn (gen_blockage ()); |
@@ -377,7 +377,7 @@ index f740f5c..d5ff7af 100644 | |||
377 | emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST + | 377 | emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST + |
378 | MB_ABI_SUB_RETURN_ADDR_REGNUM))); | 378 | MB_ABI_SUB_RETURN_ADDR_REGNUM))); |
379 | } | 379 | } |
380 | @@ -3515,9 +3557,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, | 380 | @@ -3505,9 +3547,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, |
381 | else | 381 | else |
382 | this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM); | 382 | this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM); |
383 | 383 | ||
@@ -394,7 +394,7 @@ index f740f5c..d5ff7af 100644 | |||
394 | 394 | ||
395 | /* Apply the offset from the vtable, if required. */ | 395 | /* Apply the offset from the vtable, if required. */ |
396 | if (vcall_offset) | 396 | if (vcall_offset) |
397 | @@ -3530,7 +3577,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, | 397 | @@ -3520,7 +3567,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, |
398 | rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx); | 398 | rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx); |
399 | emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc)); | 399 | emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc)); |
400 | 400 | ||
@@ -406,7 +406,7 @@ index f740f5c..d5ff7af 100644 | |||
406 | } | 406 | } |
407 | 407 | ||
408 | /* Generate a tail call to the target function. */ | 408 | /* Generate a tail call to the target function. */ |
409 | @@ -3704,7 +3754,7 @@ microblaze_eh_return (rtx op0) | 409 | @@ -3696,7 +3746,7 @@ microblaze_eh_return (rtx op0) |
410 | /* Queue an .ident string in the queue of top-level asm statements. | 410 | /* Queue an .ident string in the queue of top-level asm statements. |
411 | If the string size is below the threshold, put it into .sdata2. | 411 | If the string size is below the threshold, put it into .sdata2. |
412 | If the front-end is done, we must be being called from toplev.c. | 412 | If the front-end is done, we must be being called from toplev.c. |
@@ -415,7 +415,7 @@ index f740f5c..d5ff7af 100644 | |||
415 | void | 415 | void |
416 | microblaze_asm_output_ident (const char *string) | 416 | microblaze_asm_output_ident (const char *string) |
417 | { | 417 | { |
418 | @@ -3759,9 +3809,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) | 418 | @@ -3751,9 +3801,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) |
419 | emit_block_move (m_tramp, assemble_trampoline_template (), | 419 | emit_block_move (m_tramp, assemble_trampoline_template (), |
420 | GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL); | 420 | GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL); |
421 | 421 | ||
@@ -427,7 +427,7 @@ index f740f5c..d5ff7af 100644 | |||
427 | emit_move_insn (mem, fnaddr); | 427 | emit_move_insn (mem, fnaddr); |
428 | } | 428 | } |
429 | 429 | ||
430 | @@ -3785,7 +3835,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) | 430 | @@ -3777,7 +3827,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) |
431 | { | 431 | { |
432 | comp_reg = cmp_op0; | 432 | comp_reg = cmp_op0; |
433 | condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); | 433 | condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); |
@@ -436,7 +436,7 @@ index f740f5c..d5ff7af 100644 | |||
436 | emit_jump_insn (gen_condjump (condition, label1)); | 436 | emit_jump_insn (gen_condjump (condition, label1)); |
437 | else | 437 | else |
438 | emit_jump_insn (gen_long_condjump (condition, label1)); | 438 | emit_jump_insn (gen_long_condjump (condition, label1)); |
439 | @@ -3904,7 +3954,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) | 439 | @@ -3896,7 +3946,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) |
440 | rtx comp_reg = gen_reg_rtx (SImode); | 440 | rtx comp_reg = gen_reg_rtx (SImode); |
441 | 441 | ||
442 | emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); | 442 | emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); |
@@ -445,7 +445,7 @@ index f740f5c..d5ff7af 100644 | |||
445 | emit_jump_insn (gen_condjump (condition, operands[3])); | 445 | emit_jump_insn (gen_condjump (condition, operands[3])); |
446 | } | 446 | } |
447 | 447 | ||
448 | @@ -3914,10 +3964,10 @@ microblaze_expand_conditional_branch_df (rtx operands[]) | 448 | @@ -3906,10 +3956,10 @@ microblaze_expand_conditional_branch_df (rtx operands[]) |
449 | rtx condition; | 449 | rtx condition; |
450 | rtx cmp_op0 = XEXP (operands[0], 0); | 450 | rtx cmp_op0 = XEXP (operands[0], 0); |
451 | rtx cmp_op1 = XEXP (operands[0], 1); | 451 | rtx cmp_op1 = XEXP (operands[0], 1); |
@@ -458,7 +458,7 @@ index f740f5c..d5ff7af 100644 | |||
458 | emit_jump_insn (gen_long_condjump (condition, operands[3])); | 458 | emit_jump_insn (gen_long_condjump (condition, operands[3])); |
459 | } | 459 | } |
460 | 460 | ||
461 | @@ -3938,8 +3988,8 @@ microblaze_expand_divide (rtx operands[]) | 461 | @@ -3930,8 +3980,8 @@ microblaze_expand_divide (rtx operands[]) |
462 | { | 462 | { |
463 | /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */ | 463 | /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */ |
464 | 464 | ||
@@ -469,7 +469,7 @@ index f740f5c..d5ff7af 100644 | |||
469 | rtx regqi = gen_reg_rtx (QImode); | 469 | rtx regqi = gen_reg_rtx (QImode); |
470 | rtx_code_label *div_label = gen_label_rtx (); | 470 | rtx_code_label *div_label = gen_label_rtx (); |
471 | rtx_code_label *div_end_label = gen_label_rtx (); | 471 | rtx_code_label *div_end_label = gen_label_rtx (); |
472 | @@ -3947,17 +3997,31 @@ microblaze_expand_divide (rtx operands[]) | 472 | @@ -3939,17 +3989,31 @@ microblaze_expand_divide (rtx operands[]) |
473 | rtx mem_rtx; | 473 | rtx mem_rtx; |
474 | rtx ret; | 474 | rtx ret; |
475 | rtx_insn *jump, *cjump, *insn; | 475 | rtx_insn *jump, *cjump, *insn; |
@@ -508,7 +508,7 @@ index f740f5c..d5ff7af 100644 | |||
508 | mem_rtx = gen_rtx_MEM (QImode, | 508 | mem_rtx = gen_rtx_MEM (QImode, |
509 | gen_rtx_PLUS (QImode, regt1, div_table_rtx)); | 509 | gen_rtx_PLUS (QImode, regt1, div_table_rtx)); |
510 | 510 | ||
511 | @@ -4104,7 +4168,7 @@ insert_wic_for_ilb_runout (rtx_insn *first) | 511 | @@ -4096,7 +4160,7 @@ insert_wic_for_ilb_runout (rtx_insn *first) |
512 | { | 512 | { |
513 | insn = | 513 | insn = |
514 | emit_insn_before (gen_iprefetch | 514 | emit_insn_before (gen_iprefetch |
@@ -517,7 +517,7 @@ index f740f5c..d5ff7af 100644 | |||
517 | before_4); | 517 | before_4); |
518 | recog_memoized (insn); | 518 | recog_memoized (insn); |
519 | INSN_LOCATION (insn) = INSN_LOCATION (before_4); | 519 | INSN_LOCATION (insn) = INSN_LOCATION (before_4); |
520 | @@ -4114,7 +4178,27 @@ insert_wic_for_ilb_runout (rtx_insn *first) | 520 | @@ -4106,7 +4170,27 @@ insert_wic_for_ilb_runout (rtx_insn *first) |
521 | } | 521 | } |
522 | } | 522 | } |
523 | } | 523 | } |
@@ -546,7 +546,7 @@ index f740f5c..d5ff7af 100644 | |||
546 | /* Insert instruction prefetch instruction at the fall | 546 | /* Insert instruction prefetch instruction at the fall |
547 | through path of the function call. */ | 547 | through path of the function call. */ |
548 | 548 | ||
549 | @@ -4267,6 +4351,17 @@ microblaze_starting_frame_offset (void) | 549 | @@ -4259,6 +4343,17 @@ microblaze_starting_frame_offset (void) |
550 | #undef TARGET_LRA_P | 550 | #undef TARGET_LRA_P |
551 | #define TARGET_LRA_P hook_bool_void_false | 551 | #define TARGET_LRA_P hook_bool_void_false |
552 | 552 | ||
@@ -564,7 +564,7 @@ index f740f5c..d5ff7af 100644 | |||
564 | #undef TARGET_FRAME_POINTER_REQUIRED | 564 | #undef TARGET_FRAME_POINTER_REQUIRED |
565 | #define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required | 565 | #define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required |
566 | 566 | ||
567 | @@ -4276,6 +4371,9 @@ microblaze_starting_frame_offset (void) | 567 | @@ -4268,6 +4363,9 @@ microblaze_starting_frame_offset (void) |
568 | #undef TARGET_TRAMPOLINE_INIT | 568 | #undef TARGET_TRAMPOLINE_INIT |
569 | #define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init | 569 | #define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init |
570 | 570 | ||
@@ -575,7 +575,7 @@ index f740f5c..d5ff7af 100644 | |||
575 | #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote | 575 | #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote |
576 | 576 | ||
577 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 577 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
578 | index 2ca44f5..a23fd4e 100644 | 578 | index 4931895e650..1f6e2059545 100644 |
579 | --- a/gcc/config/microblaze/microblaze.h | 579 | --- a/gcc/config/microblaze/microblaze.h |
580 | +++ b/gcc/config/microblaze/microblaze.h | 580 | +++ b/gcc/config/microblaze/microblaze.h |
581 | @@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe; | 581 | @@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe; |
@@ -744,7 +744,7 @@ index 2ca44f5..a23fd4e 100644 | |||
744 | /* Default to -G 8 */ | 744 | /* Default to -G 8 */ |
745 | #ifndef MICROBLAZE_DEFAULT_GVALUE | 745 | #ifndef MICROBLAZE_DEFAULT_GVALUE |
746 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 746 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
747 | index eb52957..77627a7 100644 | 747 | index bcf2b9244f8..bef750c026a 100644 |
748 | --- a/gcc/config/microblaze/microblaze.md | 748 | --- a/gcc/config/microblaze/microblaze.md |
749 | +++ b/gcc/config/microblaze/microblaze.md | 749 | +++ b/gcc/config/microblaze/microblaze.md |
750 | @@ -26,6 +26,7 @@ | 750 | @@ -26,6 +26,7 @@ |
@@ -1797,7 +1797,7 @@ index eb52957..77627a7 100644 | |||
1797 | operands[2], operands[3])); | 1797 | operands[2], operands[3])); |
1798 | DONE; | 1798 | DONE; |
1799 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze | 1799 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze |
1800 | index 7671f63..9fc80b1 100644 | 1800 | index 7671f63c5b5..9fc80b142ce 100644 |
1801 | --- a/gcc/config/microblaze/t-microblaze | 1801 | --- a/gcc/config/microblaze/t-microblaze |
1802 | +++ b/gcc/config/microblaze/t-microblaze | 1802 | +++ b/gcc/config/microblaze/t-microblaze |
1803 | @@ -2,10 +2,11 @@ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-en | 1803 | @@ -2,10 +2,11 @@ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-en |
@@ -1816,7 +1816,7 @@ index 7671f63..9fc80b1 100644 | |||
1816 | # Extra files | 1816 | # Extra files |
1817 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ | 1817 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ |
1818 | diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S | 1818 | diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S |
1819 | index ee380ee..1811327 100644 | 1819 | index d0146083db6..005825f1ec5 100644 |
1820 | --- a/libgcc/config/microblaze/crti.S | 1820 | --- a/libgcc/config/microblaze/crti.S |
1821 | +++ b/libgcc/config/microblaze/crti.S | 1821 | +++ b/libgcc/config/microblaze/crti.S |
1822 | @@ -40,7 +40,7 @@ | 1822 | @@ -40,7 +40,7 @@ |
@@ -1836,7 +1836,7 @@ index ee380ee..1811327 100644 | |||
1836 | + addik r1, r1, -16 | 1836 | + addik r1, r1, -16 |
1837 | sw r15, r0, r1 | 1837 | sw r15, r0, r1 |
1838 | diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S | 1838 | diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S |
1839 | index 00d398a..60a4648 100644 | 1839 | index 2fff5ac04c7..5705eff9a4a 100644 |
1840 | --- a/libgcc/config/microblaze/crtn.S | 1840 | --- a/libgcc/config/microblaze/crtn.S |
1841 | +++ b/libgcc/config/microblaze/crtn.S | 1841 | +++ b/libgcc/config/microblaze/crtn.S |
1842 | @@ -33,9 +33,9 @@ | 1842 | @@ -33,9 +33,9 @@ |
@@ -1853,7 +1853,7 @@ index 00d398a..60a4648 100644 | |||
1853 | + addik r1, r1, 16 | 1853 | + addik r1, r1, 16 |
1854 | diff --git a/libgcc/config/microblaze/divdi3.S b/libgcc/config/microblaze/divdi3.S | 1854 | diff --git a/libgcc/config/microblaze/divdi3.S b/libgcc/config/microblaze/divdi3.S |
1855 | new file mode 100644 | 1855 | new file mode 100644 |
1856 | index 0000000..d37bf51 | 1856 | index 00000000000..d37bf5165c6 |
1857 | --- /dev/null | 1857 | --- /dev/null |
1858 | +++ b/libgcc/config/microblaze/divdi3.S | 1858 | +++ b/libgcc/config/microblaze/divdi3.S |
1859 | @@ -0,0 +1,98 @@ | 1859 | @@ -0,0 +1,98 @@ |
@@ -1957,7 +1957,7 @@ index 0000000..d37bf51 | |||
1957 | +#endif | 1957 | +#endif |
1958 | diff --git a/libgcc/config/microblaze/divdi3_table.c b/libgcc/config/microblaze/divdi3_table.c | 1958 | diff --git a/libgcc/config/microblaze/divdi3_table.c b/libgcc/config/microblaze/divdi3_table.c |
1959 | new file mode 100644 | 1959 | new file mode 100644 |
1960 | index 0000000..8096259 | 1960 | index 00000000000..80962597ea5 |
1961 | --- /dev/null | 1961 | --- /dev/null |
1962 | +++ b/libgcc/config/microblaze/divdi3_table.c | 1962 | +++ b/libgcc/config/microblaze/divdi3_table.c |
1963 | @@ -0,0 +1,62 @@ | 1963 | @@ -0,0 +1,62 @@ |
@@ -2025,7 +2025,7 @@ index 0000000..8096259 | |||
2025 | + | 2025 | + |
2026 | diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S | 2026 | diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S |
2027 | new file mode 100644 | 2027 | new file mode 100644 |
2028 | index 0000000..5d3f7c0 | 2028 | index 00000000000..5d3f7c03fc8 |
2029 | --- /dev/null | 2029 | --- /dev/null |
2030 | +++ b/libgcc/config/microblaze/moddi3.S | 2030 | +++ b/libgcc/config/microblaze/moddi3.S |
2031 | @@ -0,0 +1,97 @@ | 2031 | @@ -0,0 +1,97 @@ |
@@ -2128,7 +2128,7 @@ index 0000000..5d3f7c0 | |||
2128 | +#endif | 2128 | +#endif |
2129 | diff --git a/libgcc/config/microblaze/muldi3.S b/libgcc/config/microblaze/muldi3.S | 2129 | diff --git a/libgcc/config/microblaze/muldi3.S b/libgcc/config/microblaze/muldi3.S |
2130 | new file mode 100644 | 2130 | new file mode 100644 |
2131 | index 0000000..5677841 | 2131 | index 00000000000..567784197d3 |
2132 | --- /dev/null | 2132 | --- /dev/null |
2133 | +++ b/libgcc/config/microblaze/muldi3.S | 2133 | +++ b/libgcc/config/microblaze/muldi3.S |
2134 | @@ -0,0 +1,73 @@ | 2134 | @@ -0,0 +1,73 @@ |
@@ -2206,7 +2206,7 @@ index 0000000..5677841 | |||
2206 | + .size __muldi3, . - __muldi3 | 2206 | + .size __muldi3, . - __muldi3 |
2207 | +#endif | 2207 | +#endif |
2208 | diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze | 2208 | diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze |
2209 | index 8d954a4..35021b2 100644 | 2209 | index 8d954a49575..35021b24b7d 100644 |
2210 | --- a/libgcc/config/microblaze/t-microblaze | 2210 | --- a/libgcc/config/microblaze/t-microblaze |
2211 | +++ b/libgcc/config/microblaze/t-microblaze | 2211 | +++ b/libgcc/config/microblaze/t-microblaze |
2212 | @@ -1,11 +1,16 @@ | 2212 | @@ -1,11 +1,16 @@ |
@@ -2231,7 +2231,7 @@ index 8d954a4..35021b2 100644 | |||
2231 | + $(srcdir)/config/microblaze/divsi3_table.c \ | 2231 | + $(srcdir)/config/microblaze/divsi3_table.c \ |
2232 | diff --git a/libgcc/config/microblaze/udivdi3.S b/libgcc/config/microblaze/udivdi3.S | 2232 | diff --git a/libgcc/config/microblaze/udivdi3.S b/libgcc/config/microblaze/udivdi3.S |
2233 | new file mode 100644 | 2233 | new file mode 100644 |
2234 | index 0000000..c210fbc | 2234 | index 00000000000..c210fbc7128 |
2235 | --- /dev/null | 2235 | --- /dev/null |
2236 | +++ b/libgcc/config/microblaze/udivdi3.S | 2236 | +++ b/libgcc/config/microblaze/udivdi3.S |
2237 | @@ -0,0 +1,107 @@ | 2237 | @@ -0,0 +1,107 @@ |
@@ -2344,7 +2344,7 @@ index 0000000..c210fbc | |||
2344 | +#endif | 2344 | +#endif |
2345 | diff --git a/libgcc/config/microblaze/umoddi3.S b/libgcc/config/microblaze/umoddi3.S | 2345 | diff --git a/libgcc/config/microblaze/umoddi3.S b/libgcc/config/microblaze/umoddi3.S |
2346 | new file mode 100644 | 2346 | new file mode 100644 |
2347 | index 0000000..7f5cd23 | 2347 | index 00000000000..7f5cd23f9a1 |
2348 | --- /dev/null | 2348 | --- /dev/null |
2349 | +++ b/libgcc/config/microblaze/umoddi3.S | 2349 | +++ b/libgcc/config/microblaze/umoddi3.S |
2350 | @@ -0,0 +1,110 @@ | 2350 | @@ -0,0 +1,110 @@ |
@@ -2459,5 +2459,5 @@ index 0000000..7f5cd23 | |||
2459 | + .size __umoddi3, . - __umoddi3 | 2459 | + .size __umoddi3, . - __umoddi3 |
2460 | +#endif | 2460 | +#endif |
2461 | -- | 2461 | -- |
2462 | 2.7.4 | 2462 | 2.17.1 |
2463 | 2463 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch deleted file mode 100644 index 7079789f..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | From ac30efb4a5f5b6d289fdd27b268c2095d60dcb42 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 2 Mar 2017 19:02:31 +0530 | ||
4 | Subject: [PATCH 36/63] [Patch,Microblaze]:reverting the cost check before | ||
5 | propagating constants. | ||
6 | |||
7 | --- | ||
8 | gcc/cprop.c | 4 ++++ | ||
9 | 1 file changed, 4 insertions(+) | ||
10 | |||
11 | diff --git a/gcc/cprop.c b/gcc/cprop.c | ||
12 | index 65c0130..42bcc81 100644 | ||
13 | --- a/gcc/cprop.c | ||
14 | +++ b/gcc/cprop.c | ||
15 | @@ -733,6 +733,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
16 | int success = 0; | ||
17 | rtx set = single_set (insn); | ||
18 | |||
19 | +#if 0 | ||
20 | bool check_rtx_costs = true; | ||
21 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); | ||
22 | int old_cost = set ? set_rtx_cost (set, speed) : 0; | ||
23 | @@ -744,6 +745,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
24 | && (GET_CODE (XEXP (note, 0)) == CONST | ||
25 | || CONSTANT_P (XEXP (note, 0))))) | ||
26 | check_rtx_costs = false; | ||
27 | +#endif | ||
28 | |||
29 | /* Usually we substitute easy stuff, so we won't copy everything. | ||
30 | We however need to take care to not duplicate non-trivial CONST | ||
31 | @@ -752,6 +754,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
32 | |||
33 | validate_replace_src_group (from, to, insn); | ||
34 | |||
35 | +#if 0 | ||
36 | /* If TO is a constant, check the cost of the set after propagation | ||
37 | to the cost of the set before the propagation. If the cost is | ||
38 | higher, then do not replace FROM with TO. */ | ||
39 | @@ -764,6 +767,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
40 | return false; | ||
41 | } | ||
42 | |||
43 | +#endif | ||
44 | |||
45 | if (num_changes_pending () && apply_change_group ()) | ||
46 | success = 1; | ||
47 | -- | ||
48 | 2.7.4 | ||
49 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-re-arrangement-of-the-compare-branches.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch index 3afb7629..63290129 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-re-arrangement-of-the-compare-branches.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch | |||
@@ -1,18 +1,18 @@ | |||
1 | From 31062878a2c1773a1fc94242ad29e6d03e4828b1 Mon Sep 17 00:00:00 2001 | 1 | From e259b63769bf3cc437a665059add98d9480d942c Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 3 Aug 2018 15:41:39 +0530 | 3 | Date: Fri, 3 Aug 2018 15:41:39 +0530 |
4 | Subject: [PATCH 42/63] re-arrangement of the compare branches | 4 | Subject: [PATCH 36/58] re-arrangement of the compare branches |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/microblaze.c | 28 ++----- | 7 | gcc/config/microblaze/microblaze.c | 28 ++---- |
8 | gcc/config/microblaze/microblaze.md | 141 +++++++++++++++++------------------- | 8 | gcc/config/microblaze/microblaze.md | 141 +++++++++++++--------------- |
9 | 2 files changed, 73 insertions(+), 96 deletions(-) | 9 | 2 files changed, 73 insertions(+), 96 deletions(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 11 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
12 | index d5ff7af..dd46d93 100644 | 12 | index 3ecda553fe6..cba5d86225c 100644 |
13 | --- a/gcc/config/microblaze/microblaze.c | 13 | --- a/gcc/config/microblaze/microblaze.c |
14 | +++ b/gcc/config/microblaze/microblaze.c | 14 | +++ b/gcc/config/microblaze/microblaze.c |
15 | @@ -3835,11 +3835,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) | 15 | @@ -3827,11 +3827,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) |
16 | { | 16 | { |
17 | comp_reg = cmp_op0; | 17 | comp_reg = cmp_op0; |
18 | condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); | 18 | condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); |
@@ -25,7 +25,7 @@ index d5ff7af..dd46d93 100644 | |||
25 | } | 25 | } |
26 | 26 | ||
27 | else if (code == EQ || code == NE) | 27 | else if (code == EQ || code == NE) |
28 | @@ -3850,10 +3846,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) | 28 | @@ -3842,10 +3838,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) |
29 | else | 29 | else |
30 | emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1)); | 30 | emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1)); |
31 | condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); | 31 | condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); |
@@ -37,7 +37,7 @@ index d5ff7af..dd46d93 100644 | |||
37 | } | 37 | } |
38 | else | 38 | else |
39 | { | 39 | { |
40 | @@ -3886,10 +3879,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) | 40 | @@ -3878,10 +3871,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) |
41 | comp_reg = cmp_op0; | 41 | comp_reg = cmp_op0; |
42 | condition = gen_rtx_fmt_ee (signed_condition (code), | 42 | condition = gen_rtx_fmt_ee (signed_condition (code), |
43 | mode, comp_reg, const0_rtx); | 43 | mode, comp_reg, const0_rtx); |
@@ -49,7 +49,7 @@ index d5ff7af..dd46d93 100644 | |||
49 | } | 49 | } |
50 | else if (code == EQ) | 50 | else if (code == EQ) |
51 | { | 51 | { |
52 | @@ -3904,10 +3894,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) | 52 | @@ -3896,10 +3886,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) |
53 | cmp_op1)); | 53 | cmp_op1)); |
54 | } | 54 | } |
55 | condition = gen_rtx_EQ (mode, comp_reg, const0_rtx); | 55 | condition = gen_rtx_EQ (mode, comp_reg, const0_rtx); |
@@ -61,7 +61,7 @@ index d5ff7af..dd46d93 100644 | |||
61 | 61 | ||
62 | } | 62 | } |
63 | else if (code == NE) | 63 | else if (code == NE) |
64 | @@ -3923,10 +3910,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) | 64 | @@ -3915,10 +3902,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) |
65 | cmp_op1)); | 65 | cmp_op1)); |
66 | } | 66 | } |
67 | condition = gen_rtx_NE (mode, comp_reg, const0_rtx); | 67 | condition = gen_rtx_NE (mode, comp_reg, const0_rtx); |
@@ -73,7 +73,7 @@ index d5ff7af..dd46d93 100644 | |||
73 | } | 73 | } |
74 | else | 74 | else |
75 | { | 75 | { |
76 | @@ -3968,7 +3952,7 @@ microblaze_expand_conditional_branch_df (rtx operands[]) | 76 | @@ -3960,7 +3944,7 @@ microblaze_expand_conditional_branch_df (rtx operands[]) |
77 | 77 | ||
78 | emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); | 78 | emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); |
79 | condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx); | 79 | condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx); |
@@ -83,7 +83,7 @@ index d5ff7af..dd46d93 100644 | |||
83 | 83 | ||
84 | /* Implement TARGET_FRAME_POINTER_REQUIRED. */ | 84 | /* Implement TARGET_FRAME_POINTER_REQUIRED. */ |
85 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 85 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
86 | index 77627a7..edb7aab 100644 | 86 | index bef750c026a..29ebbfc0c03 100644 |
87 | --- a/gcc/config/microblaze/microblaze.md | 87 | --- a/gcc/config/microblaze/microblaze.md |
88 | +++ b/gcc/config/microblaze/microblaze.md | 88 | +++ b/gcc/config/microblaze/microblaze.md |
89 | @@ -2270,7 +2270,27 @@ else | 89 | @@ -2270,7 +2270,27 @@ else |
@@ -264,5 +264,5 @@ index 77627a7..edb7aab 100644 | |||
264 | ;; Unconditional branches | 264 | ;; Unconditional branches |
265 | ;;---------------------------------------------------------------- | 265 | ;;---------------------------------------------------------------- |
266 | -- | 266 | -- |
267 | 2.7.4 | 267 | 2.17.1 |
268 | 268 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch index f4074899..9be04781 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 7ab47599c2bec80d622883b3e220827dce89c598 Mon Sep 17 00:00:00 2001 | 1 | From 589c4453ab01570d47e6e37e4e546d65398cf58e Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 8 Aug 2018 17:37:26 +0530 | 3 | Date: Wed, 8 Aug 2018 17:37:26 +0530 |
4 | Subject: [PATCH 43/63] [Patch,Microblaze] : previous commit broke the | 4 | Subject: [PATCH 37/58] [Patch,Microblaze] : previous commit broke the |
5 | handling of SI Branch compare for Microblaze 32-bit.. | 5 | handling of SI Branch compare for Microblaze 32-bit.. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Subject: [PATCH 43/63] [Patch,Microblaze] : previous commit broke the | |||
9 | 1 file changed, 2 insertions(+), 2 deletions(-) | 9 | 1 file changed, 2 insertions(+), 2 deletions(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
12 | index edb7aab..fb22edb 100644 | 12 | index 29ebbfc0c03..1a8853056d7 100644 |
13 | --- a/gcc/config/microblaze/microblaze.md | 13 | --- a/gcc/config/microblaze/microblaze.md |
14 | +++ b/gcc/config/microblaze/microblaze.md | 14 | +++ b/gcc/config/microblaze/microblaze.md |
15 | @@ -2226,8 +2226,8 @@ else | 15 | @@ -2226,8 +2226,8 @@ else |
@@ -24,5 +24,5 @@ index edb7aab..fb22edb 100644 | |||
24 | (pc)))] | 24 | (pc)))] |
25 | "" | 25 | "" |
26 | -- | 26 | -- |
27 | 2.7.4 | 27 | 2.17.1 |
28 | 28 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch index ad287e57..464b5a6d 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 23622921a153258de469ff10db4926b83ff0c432 Mon Sep 17 00:00:00 2001 | 1 | From cfc6628cdf81a7ab268d2699c9bbc465865681c5 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 11 Sep 2018 13:43:48 +0530 | 3 | Date: Tue, 11 Sep 2018 13:43:48 +0530 |
4 | Subject: [PATCH 44/63] [Patch, Microblaze] : Support of multilibs with m64 ... | 4 | Subject: [PATCH 38/58] [Patch, Microblaze] : Support of multilibs with m64 ... |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/microblaze-c.c | 1 + | 7 | gcc/config/microblaze/microblaze-c.c | 1 + |
@@ -10,7 +10,7 @@ Subject: [PATCH 44/63] [Patch, Microblaze] : Support of multilibs with m64 ... | |||
10 | 3 files changed, 10 insertions(+), 17 deletions(-) | 10 | 3 files changed, 10 insertions(+), 17 deletions(-) |
11 | 11 | ||
12 | diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c | 12 | diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c |
13 | index d2b0c76..6670091 100644 | 13 | index dbcd21fc6ee..db543edcbe5 100644 |
14 | --- a/gcc/config/microblaze/microblaze-c.c | 14 | --- a/gcc/config/microblaze/microblaze-c.c |
15 | +++ b/gcc/config/microblaze/microblaze-c.c | 15 | +++ b/gcc/config/microblaze/microblaze-c.c |
16 | @@ -102,6 +102,7 @@ microblaze_cpp_define (cpp_reader *pfile) | 16 | @@ -102,6 +102,7 @@ microblaze_cpp_define (cpp_reader *pfile) |
@@ -22,7 +22,7 @@ index d2b0c76..6670091 100644 | |||
22 | builtin_define ("__microblaze64__"); | 22 | builtin_define ("__microblaze64__"); |
23 | builtin_define ("__MICROBLAZE64__"); | 23 | builtin_define ("__MICROBLAZE64__"); |
24 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze | 24 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze |
25 | index 9fc80b1..35ab9654 100644 | 25 | index 9fc80b142ce..35ab9654052 100644 |
26 | --- a/gcc/config/microblaze/t-microblaze | 26 | --- a/gcc/config/microblaze/t-microblaze |
27 | +++ b/gcc/config/microblaze/t-microblaze | 27 | +++ b/gcc/config/microblaze/t-microblaze |
28 | @@ -1,12 +1,9 @@ | 28 | @@ -1,12 +1,9 @@ |
@@ -45,7 +45,7 @@ index 9fc80b1..35ab9654 100644 | |||
45 | # Extra files | 45 | # Extra files |
46 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ | 46 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ |
47 | diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze | 47 | diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze |
48 | index 35021b2..8d954a4 100644 | 48 | index 35021b24b7d..8d954a49575 100644 |
49 | --- a/libgcc/config/microblaze/t-microblaze | 49 | --- a/libgcc/config/microblaze/t-microblaze |
50 | +++ b/libgcc/config/microblaze/t-microblaze | 50 | +++ b/libgcc/config/microblaze/t-microblaze |
51 | @@ -1,16 +1,11 @@ | 51 | @@ -1,16 +1,11 @@ |
@@ -69,5 +69,5 @@ index 35021b2..8d954a4 100644 | |||
69 | - $(srcdir)/config/microblaze/divsi3_table.c \ | 69 | - $(srcdir)/config/microblaze/divsi3_table.c \ |
70 | + $(srcdir)/config/microblaze/divsi3_table.c | 70 | + $(srcdir)/config/microblaze/divsi3_table.c |
71 | -- | 71 | -- |
72 | 2.7.4 | 72 | 2.17.1 |
73 | 73 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fixed-issues-like.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch index 3f5f7827..c9d4b8c7 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fixed-issues-like.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch | |||
@@ -1,19 +1,21 @@ | |||
1 | From 6e6fcbe5fafcbebaf63ff071ad947966af0c1559 Mon Sep 17 00:00:00 2001 | 1 | From 0405777c25bb8110ebfd8ea69c7df062a4c03d6b Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 11 Sep 2018 14:58:00 +0530 | 3 | Date: Tue, 11 Sep 2018 14:58:00 +0530 |
4 | Subject: [PATCH 45/63] Fixed issues like: 1 Interrupt alignment issue 2 Sign | 4 | Subject: [PATCH 39/58] Fix various issues |
5 | extension issue | ||
6 | 5 | ||
6 | Fixed issues like: | ||
7 | 1 Interrupt alignment issue | ||
8 | 2 Sign extension issue | ||
7 | --- | 9 | --- |
8 | gcc/config/microblaze/microblaze.c | 16 ++++++++++------ | 10 | gcc/config/microblaze/microblaze.c | 16 ++++++++++------ |
9 | gcc/config/microblaze/microblaze.md | 2 +- | 11 | gcc/config/microblaze/microblaze.md | 2 +- |
10 | 2 files changed, 11 insertions(+), 7 deletions(-) | 12 | 2 files changed, 11 insertions(+), 7 deletions(-) |
11 | 13 | ||
12 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 14 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
13 | index dd46d93..bfa667b 100644 | 15 | index cba5d86225c..b94902b8fbb 100644 |
14 | --- a/gcc/config/microblaze/microblaze.c | 16 | --- a/gcc/config/microblaze/microblaze.c |
15 | +++ b/gcc/config/microblaze/microblaze.c | 17 | +++ b/gcc/config/microblaze/microblaze.c |
16 | @@ -2317,9 +2317,14 @@ compute_frame_size (HOST_WIDE_INT size) | 18 | @@ -2307,9 +2307,14 @@ compute_frame_size (HOST_WIDE_INT size) |
17 | 19 | ||
18 | total_size += gp_reg_size; | 20 | total_size += gp_reg_size; |
19 | 21 | ||
@@ -30,7 +32,7 @@ index dd46d93..bfa667b 100644 | |||
30 | 32 | ||
31 | /* No space to be allocated for link register in leaf functions with no other | 33 | /* No space to be allocated for link register in leaf functions with no other |
32 | stack requirements. */ | 34 | stack requirements. */ |
33 | @@ -2604,7 +2609,6 @@ print_operand (FILE * file, rtx op, int letter) | 35 | @@ -2594,7 +2599,6 @@ print_operand (FILE * file, rtx op, int letter) |
34 | else if (letter == 'h' || letter == 'j') | 36 | else if (letter == 'h' || letter == 'j') |
35 | { | 37 | { |
36 | long val[2]; | 38 | long val[2]; |
@@ -38,7 +40,7 @@ index dd46d93..bfa667b 100644 | |||
38 | long l[2]; | 40 | long l[2]; |
39 | if (code == CONST_DOUBLE) | 41 | if (code == CONST_DOUBLE) |
40 | { | 42 | { |
41 | @@ -2619,10 +2623,10 @@ print_operand (FILE * file, rtx op, int letter) | 43 | @@ -2609,10 +2613,10 @@ print_operand (FILE * file, rtx op, int letter) |
42 | } | 44 | } |
43 | else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF) | 45 | else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF) |
44 | { | 46 | { |
@@ -53,7 +55,7 @@ index dd46d93..bfa667b 100644 | |||
53 | else if (code == CONST_DOUBLE) | 55 | else if (code == CONST_DOUBLE) |
54 | { | 56 | { |
55 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 57 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
56 | index fb22edb..4a8fbab 100644 | 58 | index 1a8853056d7..7cc26e7d786 100644 |
57 | --- a/gcc/config/microblaze/microblaze.md | 59 | --- a/gcc/config/microblaze/microblaze.md |
58 | +++ b/gcc/config/microblaze/microblaze.md | 60 | +++ b/gcc/config/microblaze/microblaze.md |
59 | @@ -1096,7 +1096,7 @@ | 61 | @@ -1096,7 +1096,7 @@ |
@@ -66,5 +68,5 @@ index fb22edb..4a8fbab 100644 | |||
66 | } | 68 | } |
67 | } | 69 | } |
68 | -- | 70 | -- |
69 | 2.7.4 | 71 | 2.17.1 |
70 | 72 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch deleted file mode 100644 index a973f4cd..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | From 95615e1bfae642dc4f5f1b03e1ffaea4f16aa99c Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju Mekala <nmekala@xilix.com> | ||
3 | Date: Wed, 4 Apr 2018 16:41:41 +0530 | ||
4 | Subject: [PATCH 40/63] Added load store pattern movdi and also adding missing | ||
5 | files | ||
6 | |||
7 | --- | ||
8 | gcc/config/microblaze/constraints.md | 5 +++++ | ||
9 | gcc/config/microblaze/microblaze.md | 26 ++++++++++++++++++++++++++ | ||
10 | gcc/config/microblaze/t-microblaze | 4 ++-- | ||
11 | 3 files changed, 33 insertions(+), 2 deletions(-) | ||
12 | |||
13 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md | ||
14 | index 5e1d79a..69bcb24 100644 | ||
15 | --- a/gcc/config/microblaze/constraints.md | ||
16 | +++ b/gcc/config/microblaze/constraints.md | ||
17 | @@ -52,6 +52,11 @@ | ||
18 | (and (match_code "const_int") | ||
19 | (match_test "ival > 0 && ival < 0x10000"))) | ||
20 | |||
21 | +(define_constraint "K" | ||
22 | + "A constant in the range 0xffffff8000000000L to 0x0000007fffffffffL (inclusive)." | ||
23 | + (and (match_code "const_int") | ||
24 | + (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL"))) | ||
25 | + | ||
26 | ;; Define floating point constraints | ||
27 | |||
28 | (define_constraint "G" | ||
29 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
30 | index dbb592e..eb52957 100644 | ||
31 | --- a/gcc/config/microblaze/microblaze.md | ||
32 | +++ b/gcc/config/microblaze/microblaze.md | ||
33 | @@ -1122,6 +1122,32 @@ | ||
34 | ) | ||
35 | |||
36 | |||
37 | +(define_insn "*movdi_internal_64" | ||
38 | + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") | ||
39 | + (match_operand:DI 1 "general_operand" " d,K,J,R,o,d,d"))] | ||
40 | + "TARGET_MB_64 && (INTVAL(operands[1]) < 0x7fffffffff) && (INTVAL(operands[1]) > 0xffffff8000000000)" | ||
41 | + { | ||
42 | + switch (which_alternative) | ||
43 | + { | ||
44 | + case 0: | ||
45 | + return "addlk\t%0,%1"; | ||
46 | + case 1: | ||
47 | + return "addlik\t%0,r0,%1"; | ||
48 | + case 2: | ||
49 | + return "addlk\t%0,r0,r0"; | ||
50 | + case 3: | ||
51 | + case 4: | ||
52 | + return "lli\t%0,%1"; | ||
53 | + case 5: | ||
54 | + case 6: | ||
55 | + return "sli\t%1,%0"; | ||
56 | + } | ||
57 | + return "unreachable"; | ||
58 | + } | ||
59 | + [(set_attr "type" "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store") | ||
60 | + (set_attr "mode" "DI") | ||
61 | + (set_attr "length" "8,8,8,8,12,8,12")]) | ||
62 | + | ||
63 | (define_insn "*movdi_internal" | ||
64 | [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") | ||
65 | (match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))] | ||
66 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze | ||
67 | index e9a1921..7671f63 100644 | ||
68 | --- a/gcc/config/microblaze/t-microblaze | ||
69 | +++ b/gcc/config/microblaze/t-microblaze | ||
70 | @@ -4,8 +4,8 @@ MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high | ||
71 | MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian | ||
72 | MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 | ||
73 | MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian | ||
74 | -MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 | ||
75 | -MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 | ||
76 | +#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 | ||
77 | +#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 | ||
78 | |||
79 | # Extra files | ||
80 | microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ | ||
81 | -- | ||
82 | 2.7.4 | ||
83 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Fixed-below-issues.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch index fc2fe3b5..d5fbf703 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Fixed-below-issues.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch | |||
@@ -1,27 +1,24 @@ | |||
1 | From 7c911a5ae8cf4a7496c059374f170f1919c00f6d Mon Sep 17 00:00:00 2001 | 1 | From c4d60b379c8d0a5621a0dc2a3a12fb40fe45e83e Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 26 Nov 2019 17:26:15 +0530 | 3 | Date: Tue, 26 Nov 2019 17:26:15 +0530 |
4 | Subject: [PATCH 46/63] Fixed below issues: | 4 | Subject: [PATCH 40/58] Fixed below issues: |
5 | 5 | ||
6 | - Floating point print issues in 64bit mode | 6 | - Floating point print issues in 64bit mode |
7 | - Dejagnu Jump related issues | 7 | - Dejagnu Jump related issues |
8 | - Added dbl instruction | 8 | - Added dbl instruction |
9 | |||
10 | Conflicts: | ||
11 | gcc/config/microblaze/microblaze.md | ||
12 | --- | 9 | --- |
13 | gcc/config/microblaze/microblaze.c | 12 +++++- | 10 | gcc/config/microblaze/microblaze.c | 12 +++- |
14 | gcc/config/microblaze/microblaze.h | 7 +++ | 11 | gcc/config/microblaze/microblaze.h | 7 +++ |
15 | gcc/config/microblaze/microblaze.md | 86 +++++++++++++++++++++++++++++++------ | 12 | gcc/config/microblaze/microblaze.md | 86 ++++++++++++++++++++++++----- |
16 | libgcc/config/microblaze/crti.S | 24 ++++++++++- | 13 | libgcc/config/microblaze/crti.S | 24 +++++++- |
17 | libgcc/config/microblaze/crtn.S | 13 ++++++ | 14 | libgcc/config/microblaze/crtn.S | 13 +++++ |
18 | 5 files changed, 125 insertions(+), 17 deletions(-) | 15 | 5 files changed, 125 insertions(+), 17 deletions(-) |
19 | 16 | ||
20 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 17 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
21 | index bfa667b..220e03d 100644 | 18 | index b94902b8fbb..12b1da852dd 100644 |
22 | --- a/gcc/config/microblaze/microblaze.c | 19 | --- a/gcc/config/microblaze/microblaze.c |
23 | +++ b/gcc/config/microblaze/microblaze.c | 20 | +++ b/gcc/config/microblaze/microblaze.c |
24 | @@ -2613,7 +2613,12 @@ print_operand (FILE * file, rtx op, int letter) | 21 | @@ -2603,7 +2603,12 @@ print_operand (FILE * file, rtx op, int letter) |
25 | if (code == CONST_DOUBLE) | 22 | if (code == CONST_DOUBLE) |
26 | { | 23 | { |
27 | if (GET_MODE (op) == DFmode) | 24 | if (GET_MODE (op) == DFmode) |
@@ -35,7 +32,7 @@ index bfa667b..220e03d 100644 | |||
35 | else | 32 | else |
36 | { | 33 | { |
37 | REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); | 34 | REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); |
38 | @@ -4014,7 +4019,10 @@ microblaze_expand_divide (rtx operands[]) | 35 | @@ -4006,7 +4011,10 @@ microblaze_expand_divide (rtx operands[]) |
39 | gen_rtx_PLUS (QImode, regt1, div_table_rtx)); | 36 | gen_rtx_PLUS (QImode, regt1, div_table_rtx)); |
40 | 37 | ||
41 | insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); | 38 | insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); |
@@ -48,7 +45,7 @@ index bfa667b..220e03d 100644 | |||
48 | LABEL_NUSES (div_end_label) = 1; | 45 | LABEL_NUSES (div_end_label) = 1; |
49 | emit_barrier (); | 46 | emit_barrier (); |
50 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 47 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
51 | index a23fd4e..7497cfb 100644 | 48 | index 1f6e2059545..a36e06316aa 100644 |
52 | --- a/gcc/config/microblaze/microblaze.h | 49 | --- a/gcc/config/microblaze/microblaze.h |
53 | +++ b/gcc/config/microblaze/microblaze.h | 50 | +++ b/gcc/config/microblaze/microblaze.h |
54 | @@ -888,10 +888,17 @@ do { \ | 51 | @@ -888,10 +888,17 @@ do { \ |
@@ -70,7 +67,7 @@ index a23fd4e..7497cfb 100644 | |||
70 | /* We need to group -lm as well, since some Newlib math functions | 67 | /* We need to group -lm as well, since some Newlib math functions |
71 | reference __errno! */ | 68 | reference __errno! */ |
72 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 69 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
73 | index 4a8fbab..65ec32c 100644 | 70 | index 7cc26e7d786..013c77651c3 100644 |
74 | --- a/gcc/config/microblaze/microblaze.md | 71 | --- a/gcc/config/microblaze/microblaze.md |
75 | +++ b/gcc/config/microblaze/microblaze.md | 72 | +++ b/gcc/config/microblaze/microblaze.md |
76 | @@ -527,6 +527,15 @@ | 73 | @@ -527,6 +527,15 @@ |
@@ -231,7 +228,7 @@ index 4a8fbab..65ec32c 100644 | |||
231 | "" | 228 | "" |
232 | "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8" | 229 | "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8" |
233 | diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S | 230 | diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S |
234 | index 1811327..a661319 100644 | 231 | index 005825f1ec5..b7436c7131f 100644 |
235 | --- a/libgcc/config/microblaze/crti.S | 232 | --- a/libgcc/config/microblaze/crti.S |
236 | +++ b/libgcc/config/microblaze/crti.S | 233 | +++ b/libgcc/config/microblaze/crti.S |
237 | @@ -33,11 +33,32 @@ | 234 | @@ -33,11 +33,32 @@ |
@@ -274,7 +271,7 @@ index 1811327..a661319 100644 | |||
274 | sw r15, r0, r1 | 271 | sw r15, r0, r1 |
275 | +#endif | 272 | +#endif |
276 | diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S | 273 | diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S |
277 | index 60a4648..d72507b 100644 | 274 | index 5705eff9a4a..f1148ffebe4 100644 |
278 | --- a/libgcc/config/microblaze/crtn.S | 275 | --- a/libgcc/config/microblaze/crtn.S |
279 | +++ b/libgcc/config/microblaze/crtn.S | 276 | +++ b/libgcc/config/microblaze/crtn.S |
280 | @@ -29,7 +29,19 @@ | 277 | @@ -29,7 +29,19 @@ |
@@ -303,5 +300,5 @@ index 60a4648..d72507b 100644 | |||
303 | addik r1, r1, 16 | 300 | addik r1, r1, 16 |
304 | +#endif | 301 | +#endif |
305 | -- | 302 | -- |
306 | 2.7.4 | 303 | 2.17.1 |
307 | 304 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Added-double-arith-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch index 1b7ac28b..75ee48fa 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Added-double-arith-instructions.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch | |||
@@ -1,16 +1,17 @@ | |||
1 | From 0f310964ff1c19cbc3404ec7ceba286d6de315c0 Mon Sep 17 00:00:00 2001 | 1 | From 90edf612331af9b7e99105112c2067a3f085daef Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 9 Oct 2018 10:07:08 +0530 | 3 | Date: Tue, 9 Oct 2018 10:07:08 +0530 |
4 | Subject: [PATCH 47/63] -Added double arith instructions -Fixed prologue stack | 4 | Subject: [PATCH 41/58] Fix various |
5 | pointer decrement issue | ||
6 | 5 | ||
6 | -Added double arith instructions | ||
7 | -Fixed prologue stack pointer decrement issue | ||
7 | --- | 8 | --- |
8 | gcc/config/microblaze/microblaze.md | 78 ++++++++++++++++++++++++++++++++----- | 9 | gcc/config/microblaze/microblaze.md | 78 +++++++++++++++++++++++++---- |
9 | gcc/config/microblaze/t-microblaze | 7 ++++ | 10 | gcc/config/microblaze/t-microblaze | 7 +++ |
10 | 2 files changed, 76 insertions(+), 9 deletions(-) | 11 | 2 files changed, 76 insertions(+), 9 deletions(-) |
11 | 12 | ||
12 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 13 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
13 | index 65ec32c..c199b27 100644 | 14 | index 013c77651c3..645f48f2847 100644 |
14 | --- a/gcc/config/microblaze/microblaze.md | 15 | --- a/gcc/config/microblaze/microblaze.md |
15 | +++ b/gcc/config/microblaze/microblaze.md | 16 | +++ b/gcc/config/microblaze/microblaze.md |
16 | @@ -527,6 +527,66 @@ | 17 | @@ -527,6 +527,66 @@ |
@@ -113,7 +114,7 @@ index 65ec32c..c199b27 100644 | |||
113 | (set_attr "mode" "DI") | 114 | (set_attr "mode" "DI") |
114 | (set_attr "length" "4,4,4")]) | 115 | (set_attr "length" "4,4,4")]) |
115 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze | 116 | diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze |
116 | index 35ab9654..dfef45c 100644 | 117 | index 35ab9654052..dfef45c268e 100644 |
117 | --- a/gcc/config/microblaze/t-microblaze | 118 | --- a/gcc/config/microblaze/t-microblaze |
118 | +++ b/gcc/config/microblaze/t-microblaze | 119 | +++ b/gcc/config/microblaze/t-microblaze |
119 | @@ -1,6 +1,13 @@ | 120 | @@ -1,6 +1,13 @@ |
@@ -131,5 +132,5 @@ index 35ab9654..dfef45c 100644 | |||
131 | MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high | 132 | MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high |
132 | MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high | 133 | MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high |
133 | -- | 134 | -- |
134 | 2.7.4 | 135 | 2.17.1 |
135 | 136 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch index c00b0a2b..2e66625b 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From b63cd2a410b9350fa67ed3ca348dcca349da4e44 Mon Sep 17 00:00:00 2001 | 1 | From c7f6fb9d81ce322f71cbef7cc1f5cb2fb8956a27 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 12 Oct 2018 16:07:36 +0530 | 3 | Date: Fri, 12 Oct 2018 16:07:36 +0530 |
4 | Subject: [PATCH 48/63] Fixed the issue in the delay slot with swap | 4 | Subject: [PATCH 42/58] Fixed the issue in the delay slot with swap |
5 | instructions | 5 | instructions |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Subject: [PATCH 48/63] Fixed the issue in the delay slot with swap | |||
9 | 1 file changed, 6 insertions(+) | 9 | 1 file changed, 6 insertions(+) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
12 | index c199b27..d6370d8 100644 | 12 | index 645f48f2847..6a1e45a5b66 100644 |
13 | --- a/gcc/config/microblaze/microblaze.md | 13 | --- a/gcc/config/microblaze/microblaze.md |
14 | +++ b/gcc/config/microblaze/microblaze.md | 14 | +++ b/gcc/config/microblaze/microblaze.md |
15 | @@ -443,6 +443,9 @@ | 15 | @@ -443,6 +443,9 @@ |
@@ -33,5 +33,5 @@ index c199b27..d6370d8 100644 | |||
33 | 33 | ||
34 | ;;---------------------------------------------------------------- | 34 | ;;---------------------------------------------------------------- |
35 | -- | 35 | -- |
36 | 2.7.4 | 36 | 2.17.1 |
37 | 37 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch index 7e92df2e..3d532c6a 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From f39f36cb0f0466343ef4ead50261b58595af708c Mon Sep 17 00:00:00 2001 | 1 | From 16a9a232ae430e691c13157dd5988f9c5c7dfb71 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sat, 13 Oct 2018 21:12:43 +0530 | 3 | Date: Sat, 13 Oct 2018 21:12:43 +0530 |
4 | Subject: [PATCH 49/63] Fixed the load store issue with the 32bit arith | 4 | Subject: [PATCH 43/58] Fixed the load store issue with the 32bit arith |
5 | libraries | 5 | libraries |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -13,7 +13,7 @@ Subject: [PATCH 49/63] Fixed the load store issue with the 32bit arith | |||
13 | 5 files changed, 98 insertions(+), 4 deletions(-) | 13 | 5 files changed, 98 insertions(+), 4 deletions(-) |
14 | 14 | ||
15 | diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S | 15 | diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S |
16 | index 24b94b9..2765e42 100644 | 16 | index bb047094e2f..104243e35fe 100644 |
17 | --- a/libgcc/config/microblaze/divsi3.S | 17 | --- a/libgcc/config/microblaze/divsi3.S |
18 | +++ b/libgcc/config/microblaze/divsi3.S | 18 | +++ b/libgcc/config/microblaze/divsi3.S |
19 | @@ -41,6 +41,17 @@ | 19 | @@ -41,6 +41,17 @@ |
@@ -70,7 +70,7 @@ index 24b94b9..2765e42 100644 | |||
70 | .size __divsi3, . - __divsi3 | 70 | .size __divsi3, . - __divsi3 |
71 | 71 | ||
72 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S | 72 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S |
73 | index 87372f5..7e61453 100644 | 73 | index 9692ff310ff..9500d64bdc0 100644 |
74 | --- a/libgcc/config/microblaze/modsi3.S | 74 | --- a/libgcc/config/microblaze/modsi3.S |
75 | +++ b/libgcc/config/microblaze/modsi3.S | 75 | +++ b/libgcc/config/microblaze/modsi3.S |
76 | @@ -41,6 +41,17 @@ | 76 | @@ -41,6 +41,17 @@ |
@@ -128,7 +128,7 @@ index 87372f5..7e61453 100644 | |||
128 | .size __modsi3, . - __modsi3 | 128 | .size __modsi3, . - __modsi3 |
129 | 129 | ||
130 | diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S | 130 | diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S |
131 | index 8c3f788..e28c69a 100644 | 131 | index cb3b6b8321f..2044399db4a 100644 |
132 | --- a/libgcc/config/microblaze/mulsi3.S | 132 | --- a/libgcc/config/microblaze/mulsi3.S |
133 | +++ b/libgcc/config/microblaze/mulsi3.S | 133 | +++ b/libgcc/config/microblaze/mulsi3.S |
134 | @@ -41,6 +41,9 @@ | 134 | @@ -41,6 +41,9 @@ |
@@ -142,7 +142,7 @@ index 8c3f788..e28c69a 100644 | |||
142 | .frame r1,0,r15 | 142 | .frame r1,0,r15 |
143 | add r3,r0,r0 | 143 | add r3,r0,r0 |
144 | diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S | 144 | diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S |
145 | index 5d726ad..b1e44b6 100644 | 145 | index ee2bdd0950d..d2332bcfe62 100644 |
146 | --- a/libgcc/config/microblaze/udivsi3.S | 146 | --- a/libgcc/config/microblaze/udivsi3.S |
147 | +++ b/libgcc/config/microblaze/udivsi3.S | 147 | +++ b/libgcc/config/microblaze/udivsi3.S |
148 | @@ -41,6 +41,16 @@ | 148 | @@ -41,6 +41,16 @@ |
@@ -197,7 +197,7 @@ index 5d726ad..b1e44b6 100644 | |||
197 | .end __udivsi3 | 197 | .end __udivsi3 |
198 | .size __udivsi3, . - __udivsi3 | 198 | .size __udivsi3, . - __udivsi3 |
199 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S | 199 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S |
200 | index b29d7e1..8804b99 100644 | 200 | index 12c082f6417..30bd8c20b58 100644 |
201 | --- a/libgcc/config/microblaze/umodsi3.S | 201 | --- a/libgcc/config/microblaze/umodsi3.S |
202 | +++ b/libgcc/config/microblaze/umodsi3.S | 202 | +++ b/libgcc/config/microblaze/umodsi3.S |
203 | @@ -41,6 +41,16 @@ | 203 | @@ -41,6 +41,16 @@ |
@@ -252,5 +252,5 @@ index b29d7e1..8804b99 100644 | |||
252 | .end __umodsi3 | 252 | .end __umodsi3 |
253 | .size __umodsi3, . - __umodsi3 | 253 | .size __umodsi3, . - __umodsi3 |
254 | -- | 254 | -- |
255 | 2.7.4 | 255 | 2.17.1 |
256 | 256 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch index ba717327..d34c103d 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch | |||
@@ -1,14 +1,14 @@ | |||
1 | From 51886f40b6bccea22277f8dcc971706d7c24bdd0 Mon Sep 17 00:00:00 2001 | 1 | From b3766742c4e1d401d4f7cdc55a90262681689a20 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 15 Oct 2018 12:00:10 +0530 | 3 | Date: Mon, 15 Oct 2018 12:00:10 +0530 |
4 | Subject: [PATCH 50/63] extending the Dwarf support to 64bit Microblaze | 4 | Subject: [PATCH 44/58] extending the Dwarf support to 64bit Microblaze |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/microblaze.h | 2 +- | 7 | gcc/config/microblaze/microblaze.h | 2 +- |
8 | 1 file changed, 1 insertion(+), 1 deletion(-) | 8 | 1 file changed, 1 insertion(+), 1 deletion(-) |
9 | 9 | ||
10 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 10 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
11 | index 7497cfb..bd5e216 100644 | 11 | index a36e06316aa..8504a841406 100644 |
12 | --- a/gcc/config/microblaze/microblaze.h | 12 | --- a/gcc/config/microblaze/microblaze.h |
13 | +++ b/gcc/config/microblaze/microblaze.h | 13 | +++ b/gcc/config/microblaze/microblaze.h |
14 | @@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe; | 14 | @@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe; |
@@ -21,5 +21,5 @@ index 7497cfb..bd5e216 100644 | |||
21 | /* Target machine storage layout */ | 21 | /* Target machine storage layout */ |
22 | 22 | ||
23 | -- | 23 | -- |
24 | 2.7.4 | 24 | 2.17.1 |
25 | 25 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-fixing-the-typo-errors-in-umodsi3-file.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch index a0758b31..a69c71dd 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-fixing-the-typo-errors-in-umodsi3-file.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch | |||
@@ -1,14 +1,14 @@ | |||
1 | From a8978d71c8b5adfa59430443611bd785a4d54ef9 Mon Sep 17 00:00:00 2001 | 1 | From bdc9429b5f2300e39ecdf1db63f4d35f8e18a932 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 16 Oct 2018 07:55:46 +0530 | 3 | Date: Tue, 16 Oct 2018 07:55:46 +0530 |
4 | Subject: [PATCH 51/63] fixing the typo errors in umodsi3 file | 4 | Subject: [PATCH 45/58] fixing the typo errors in umodsi3 file |
5 | 5 | ||
6 | --- | 6 | --- |
7 | libgcc/config/microblaze/umodsi3.S | 6 +++--- | 7 | libgcc/config/microblaze/umodsi3.S | 6 +++--- |
8 | 1 file changed, 3 insertions(+), 3 deletions(-) | 8 | 1 file changed, 3 insertions(+), 3 deletions(-) |
9 | 9 | ||
10 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S | 10 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S |
11 | index 8804b99..1b3070e 100644 | 11 | index 30bd8c20b58..2dd72aef68e 100644 |
12 | --- a/libgcc/config/microblaze/umodsi3.S | 12 | --- a/libgcc/config/microblaze/umodsi3.S |
13 | +++ b/libgcc/config/microblaze/umodsi3.S | 13 | +++ b/libgcc/config/microblaze/umodsi3.S |
14 | @@ -47,9 +47,9 @@ __umodsi3: | 14 | @@ -47,9 +47,9 @@ __umodsi3: |
@@ -25,5 +25,5 @@ index 8804b99..1b3070e 100644 | |||
25 | __umodsi3: | 25 | __umodsi3: |
26 | .frame r1,0,r15 | 26 | .frame r1,0,r15 |
27 | -- | 27 | -- |
28 | 2.7.4 | 28 | 2.17.1 |
29 | 29 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch index d0b534bc..a5f7afb6 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch | |||
@@ -1,14 +1,14 @@ | |||
1 | From 328bd339c292b63d2068a132a245bdc037815d6b Mon Sep 17 00:00:00 2001 | 1 | From 2226c8b836bdc9d0e2a281d971288e4bcb50d503 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Wed, 17 Oct 2018 16:56:14 +0530 | 3 | Date: Wed, 17 Oct 2018 16:56:14 +0530 |
4 | Subject: [PATCH 52/63] fixing the 32bit LTO related issue9(1014024) | 4 | Subject: [PATCH 46/58] fixing the 32bit LTO related issue9(1014024) |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/microblaze.h | 24 ++++++++++++++---------- | 7 | gcc/config/microblaze/microblaze.h | 24 ++++++++++++++---------- |
8 | 1 file changed, 14 insertions(+), 10 deletions(-) | 8 | 1 file changed, 14 insertions(+), 10 deletions(-) |
9 | 9 | ||
10 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 10 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
11 | index bd5e216..ab541f7 100644 | 11 | index 8504a841406..0c493b6f6e4 100644 |
12 | --- a/gcc/config/microblaze/microblaze.h | 12 | --- a/gcc/config/microblaze/microblaze.h |
13 | +++ b/gcc/config/microblaze/microblaze.h | 13 | +++ b/gcc/config/microblaze/microblaze.h |
14 | @@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe; | 14 | @@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe; |
@@ -64,5 +64,5 @@ index bd5e216..ab541f7 100644 | |||
64 | #define REGNO_OK_FOR_BASE_P(regno) microblaze_regno_ok_for_base_p ((regno), 1) | 64 | #define REGNO_OK_FOR_BASE_P(regno) microblaze_regno_ok_for_base_p ((regno), 1) |
65 | 65 | ||
66 | -- | 66 | -- |
67 | 2.7.4 | 67 | 2.17.1 |
68 | 68 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch index f8ac364c..42296396 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 3f65f0432d42f4d469fbb10828f1683cd30a5d84 Mon Sep 17 00:00:00 2001 | 1 | From 8ed304d49f66bc36b39dac8e804a7cdeda642739 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 19 Oct 2018 14:26:25 +0530 | 3 | Date: Fri, 19 Oct 2018 14:26:25 +0530 |
4 | Subject: [PATCH 53/63] Fixed the missing stack adjustment in prologue of | 4 | Subject: [PATCH 47/58] Fixed the missing stack adjustment in prologue of |
5 | modsi3 function | 5 | modsi3 function |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Subject: [PATCH 53/63] Fixed the missing stack adjustment in prologue of | |||
9 | 1 file changed, 1 insertion(+) | 9 | 1 file changed, 1 insertion(+) |
10 | 10 | ||
11 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S | 11 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S |
12 | index 7e61453..b0e6cad 100644 | 12 | index 9500d64bdc0..4dbb25900d9 100644 |
13 | --- a/libgcc/config/microblaze/modsi3.S | 13 | --- a/libgcc/config/microblaze/modsi3.S |
14 | +++ b/libgcc/config/microblaze/modsi3.S | 14 | +++ b/libgcc/config/microblaze/modsi3.S |
15 | @@ -119,6 +119,7 @@ $LaRETURN_HERE: | 15 | @@ -119,6 +119,7 @@ $LaRETURN_HERE: |
@@ -21,5 +21,5 @@ index 7e61453..b0e6cad 100644 | |||
21 | .end __modsi3 | 21 | .end __modsi3 |
22 | .size __modsi3, . - __modsi3 | 22 | .size __modsi3, . - __modsi3 |
23 | -- | 23 | -- |
24 | 2.7.4 | 24 | 2.17.1 |
25 | 25 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch index 0e704506..92fa9e57 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 0dbb2b7bfe466c18d54aec680208fd1459619bc1 Mon Sep 17 00:00:00 2001 | 1 | From d12f2da2ae7fa7946aef94c161730c7b851c086a Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 24 Oct 2018 18:31:04 +0530 | 3 | Date: Wed, 24 Oct 2018 18:31:04 +0530 |
4 | Subject: [PATCH 54/63] [Patch,Microblaze] : corrected SPN for dlong | 4 | Subject: [PATCH 48/58] [Patch,Microblaze] : corrected SPN for dlong |
5 | instruction mapping. | 5 | instruction mapping. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Subject: [PATCH 54/63] [Patch,Microblaze] : corrected SPN for dlong | |||
9 | 1 file changed, 2 insertions(+), 2 deletions(-) | 9 | 1 file changed, 2 insertions(+), 2 deletions(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
12 | index d6370d8..6b6b7c6 100644 | 12 | index 6a1e45a5b66..53dbe4e4060 100644 |
13 | --- a/gcc/config/microblaze/microblaze.md | 13 | --- a/gcc/config/microblaze/microblaze.md |
14 | +++ b/gcc/config/microblaze/microblaze.md | 14 | +++ b/gcc/config/microblaze/microblaze.md |
15 | @@ -602,9 +602,9 @@ | 15 | @@ -602,9 +602,9 @@ |
@@ -25,5 +25,5 @@ index d6370d8..6b6b7c6 100644 | |||
25 | "dlong\t%0,%1" | 25 | "dlong\t%0,%1" |
26 | [(set_attr "type" "fcvt") | 26 | [(set_attr "type" "fcvt") |
27 | -- | 27 | -- |
28 | 2.7.4 | 28 | 2.17.1 |
29 | 29 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch index 28554722..346157ce 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From a56b23ae244eee1da6d6595d3a6477085d77271e Mon Sep 17 00:00:00 2001 | 1 | From dfe4f5aa180a7b4c15b4b586b253541aa9d29e52 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Thu, 29 Nov 2018 17:55:08 +0530 | 3 | Date: Thu, 29 Nov 2018 17:55:08 +0530 |
4 | Subject: [PATCH 55/63] fixing the long & long long mingw toolchain issue | 4 | Subject: [PATCH 49/58] fixing the long & long long mingw toolchain issue |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/constraints.md | 2 +- | 7 | gcc/config/microblaze/constraints.md | 2 +- |
@@ -9,7 +9,7 @@ Subject: [PATCH 55/63] fixing the long & long long mingw toolchain issue | |||
9 | 2 files changed, 5 insertions(+), 5 deletions(-) | 9 | 2 files changed, 5 insertions(+), 5 deletions(-) |
10 | 10 | ||
11 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md | 11 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md |
12 | index 2fce91e..9a5aa6b 100644 | 12 | index c2b0a21c53b..4a6cf419671 100644 |
13 | --- a/gcc/config/microblaze/constraints.md | 13 | --- a/gcc/config/microblaze/constraints.md |
14 | +++ b/gcc/config/microblaze/constraints.md | 14 | +++ b/gcc/config/microblaze/constraints.md |
15 | @@ -55,7 +55,7 @@ | 15 | @@ -55,7 +55,7 @@ |
@@ -22,7 +22,7 @@ index 2fce91e..9a5aa6b 100644 | |||
22 | ;; Define floating point constraints | 22 | ;; Define floating point constraints |
23 | 23 | ||
24 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 24 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
25 | index 6b6b7c6..a1dc41f 100644 | 25 | index 53dbe4e4060..5d277014e42 100644 |
26 | --- a/gcc/config/microblaze/microblaze.md | 26 | --- a/gcc/config/microblaze/microblaze.md |
27 | +++ b/gcc/config/microblaze/microblaze.md | 27 | +++ b/gcc/config/microblaze/microblaze.md |
28 | @@ -648,8 +648,8 @@ | 28 | @@ -648,8 +648,8 @@ |
@@ -55,5 +55,5 @@ index 6b6b7c6..a1dc41f 100644 | |||
55 | else | 55 | else |
56 | return "addlik\t%0,r0,%1"; | 56 | return "addlik\t%0,r0,%1"; |
57 | -- | 57 | -- |
58 | 2.7.4 | 58 | 2.17.1 |
59 | 59 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch index a419216c..360bdb51 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Fix-the-MB-64-bug-of-handling-QI-objects.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch | |||
@@ -1,14 +1,14 @@ | |||
1 | From e13b1b70972511a642512cbc7093ed21e5a9e141 Mon Sep 17 00:00:00 2001 | 1 | From b21e115bc1af625b2ae1acb893027af6af3c2d16 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Thu, 14 Mar 2019 18:11:04 +0530 | 3 | Date: Thu, 14 Mar 2019 18:11:04 +0530 |
4 | Subject: [PATCH 56/63] Fix the MB-64 bug of handling QI objects | 4 | Subject: [PATCH 50/58] Fix the MB-64 bug of handling QI objects |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/microblaze.md | 14 +++++++------- | 7 | gcc/config/microblaze/microblaze.md | 14 +++++++------- |
8 | 1 file changed, 7 insertions(+), 7 deletions(-) | 8 | 1 file changed, 7 insertions(+), 7 deletions(-) |
9 | 9 | ||
10 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 10 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
11 | index a1dc41f..bb96e2d 100644 | 11 | index 5d277014e42..a1363935c42 100644 |
12 | --- a/gcc/config/microblaze/microblaze.md | 12 | --- a/gcc/config/microblaze/microblaze.md |
13 | +++ b/gcc/config/microblaze/microblaze.md | 13 | +++ b/gcc/config/microblaze/microblaze.md |
14 | @@ -2347,11 +2347,11 @@ else | 14 | @@ -2347,11 +2347,11 @@ else |
@@ -43,5 +43,5 @@ index a1dc41f..bb96e2d 100644 | |||
43 | "TARGET_MB_64" | 43 | "TARGET_MB_64" |
44 | { | 44 | { |
45 | -- | 45 | -- |
46 | 2.7.4 | 46 | 2.17.1 |
47 | 47 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch index 940009de..6b7bb2a1 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch | |||
@@ -1,15 +1,17 @@ | |||
1 | From 1387d4fedb397f78b08ad33204a3fcf2bd63f183 Mon Sep 17 00:00:00 2001 | 1 | From ed17f79b22769e5a256e3990715e32e943bfd929 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Fri, 29 Mar 2019 12:08:39 +0530 | 3 | Date: Fri, 29 Mar 2019 12:08:39 +0530 |
4 | Subject: [PATCH 57/63] [Patch,Microblaze] : We will check the possibility of | 4 | Subject: [PATCH 51/58] [Patch,Microblaze] : Check the possibiity of peephole2 |
5 | peephole2 optimization,if we can then we will fix the compiler issue. | 5 | opt |
6 | 6 | ||
7 | We will check the possibility of peephole2 | ||
8 | optimization,if we can then we will fix the compiler issue. | ||
7 | --- | 9 | --- |
8 | gcc/config/microblaze/microblaze.md | 63 ++++++++++++++++++++++--------------- | 10 | gcc/config/microblaze/microblaze.md | 63 +++++++++++++++++------------ |
9 | 1 file changed, 38 insertions(+), 25 deletions(-) | 11 | 1 file changed, 38 insertions(+), 25 deletions(-) |
10 | 12 | ||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 13 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
12 | index bb96e2d..830ef77 100644 | 14 | index a1363935c42..626eade9468 100644 |
13 | --- a/gcc/config/microblaze/microblaze.md | 15 | --- a/gcc/config/microblaze/microblaze.md |
14 | +++ b/gcc/config/microblaze/microblaze.md | 16 | +++ b/gcc/config/microblaze/microblaze.md |
15 | @@ -882,31 +882,44 @@ | 17 | @@ -882,31 +882,44 @@ |
@@ -83,5 +85,5 @@ index bb96e2d..830ef77 100644 | |||
83 | ;;---------------------------------------------------------------- | 85 | ;;---------------------------------------------------------------- |
84 | ;; Negation and one's complement | 86 | ;; Negation and one's complement |
85 | -- | 87 | -- |
86 | 2.7.4 | 88 | 2.17.1 |
87 | 89 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch index 1548faad..45505cf1 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch | |||
@@ -1,19 +1,19 @@ | |||
1 | From 80919b0f43b275e70521e4f85cd28bcd0ece3b80 Mon Sep 17 00:00:00 2001 | 1 | From d845981b381b0174d97dda8a78d82cf8fcae7ca1 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Wed, 17 Apr 2019 12:36:16 +0530 | 3 | Date: Wed, 17 Apr 2019 12:36:16 +0530 |
4 | Subject: [PATCH 60/61] [Patch,MicroBlaze]: fixed typos in mul,div and mod | 4 | Subject: [PATCH 52/58] [Patch,MicroBlaze]: fixed typos in mul,div and mod |
5 | assembly files. | 5 | assembly files. |
6 | 6 | ||
7 | --- | 7 | --- |
8 | libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++++++++---- | 8 | libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++---- |
9 | libgcc/config/microblaze/modsi3.S | 40 +++++++++++++++++++++++--- | 9 | libgcc/config/microblaze/modsi3.S | 40 ++++++++++++++++++--- |
10 | libgcc/config/microblaze/mulsi3.S | 33 +++++++++++++++++++++- | 10 | libgcc/config/microblaze/mulsi3.S | 33 ++++++++++++++++- |
11 | libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++---- | 11 | libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++--- |
12 | libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++--- | 12 | libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++--- |
13 | 5 files changed, 212 insertions(+), 20 deletions(-) | 13 | 5 files changed, 212 insertions(+), 20 deletions(-) |
14 | 14 | ||
15 | diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S | 15 | diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S |
16 | index 7e7d875..cfb4c05 100644 | 16 | index 104243e35fe..5755e29fbb6 100644 |
17 | --- a/libgcc/config/microblaze/divsi3.S | 17 | --- a/libgcc/config/microblaze/divsi3.S |
18 | +++ b/libgcc/config/microblaze/divsi3.S | 18 | +++ b/libgcc/config/microblaze/divsi3.S |
19 | @@ -46,7 +46,7 @@ | 19 | @@ -46,7 +46,7 @@ |
@@ -107,7 +107,7 @@ index 7e7d875..cfb4c05 100644 | |||
107 | $LaDiv_By_Zero: | 107 | $LaDiv_By_Zero: |
108 | $LaResult_Is_Zero: | 108 | $LaResult_Is_Zero: |
109 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S | 109 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S |
110 | index 46ff34a..49618dd 100644 | 110 | index 4dbb25900d9..b6129f5e822 100644 |
111 | --- a/libgcc/config/microblaze/modsi3.S | 111 | --- a/libgcc/config/microblaze/modsi3.S |
112 | +++ b/libgcc/config/microblaze/modsi3.S | 112 | +++ b/libgcc/config/microblaze/modsi3.S |
113 | @@ -62,40 +62,72 @@ __modsi3: | 113 | @@ -62,40 +62,72 @@ __modsi3: |
@@ -196,7 +196,7 @@ index 46ff34a..49618dd 100644 | |||
196 | nop | 196 | nop |
197 | #else | 197 | #else |
198 | diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S | 198 | diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S |
199 | index 31a73c2..39951be 100644 | 199 | index 2044399db4a..95709d5bb01 100644 |
200 | --- a/libgcc/config/microblaze/mulsi3.S | 200 | --- a/libgcc/config/microblaze/mulsi3.S |
201 | +++ b/libgcc/config/microblaze/mulsi3.S | 201 | +++ b/libgcc/config/microblaze/mulsi3.S |
202 | @@ -43,7 +43,37 @@ | 202 | @@ -43,7 +43,37 @@ |
@@ -246,7 +246,7 @@ index 31a73c2..39951be 100644 | |||
246 | .end __mulsi3 | 246 | .end __mulsi3 |
247 | .size __mulsi3, . - __mulsi3 | 247 | .size __mulsi3, . - __mulsi3 |
248 | diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S | 248 | diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S |
249 | index 94adb6a..d4fe285 100644 | 249 | index d2332bcfe62..687d5588801 100644 |
250 | --- a/libgcc/config/microblaze/udivsi3.S | 250 | --- a/libgcc/config/microblaze/udivsi3.S |
251 | +++ b/libgcc/config/microblaze/udivsi3.S | 251 | +++ b/libgcc/config/microblaze/udivsi3.S |
252 | @@ -59,52 +59,96 @@ __udivsi3: | 252 | @@ -59,52 +59,96 @@ __udivsi3: |
@@ -360,7 +360,7 @@ index 94adb6a..d4fe285 100644 | |||
360 | NOP | 360 | NOP |
361 | #else | 361 | #else |
362 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S | 362 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S |
363 | index 9bf65c3..3bd5d48 100644 | 363 | index 2dd72aef68e..59646ce437f 100644 |
364 | --- a/libgcc/config/microblaze/umodsi3.S | 364 | --- a/libgcc/config/microblaze/umodsi3.S |
365 | +++ b/libgcc/config/microblaze/umodsi3.S | 365 | +++ b/libgcc/config/microblaze/umodsi3.S |
366 | @@ -46,7 +46,7 @@ | 366 | @@ -46,7 +46,7 @@ |
@@ -462,5 +462,5 @@ index 9bf65c3..3bd5d48 100644 | |||
462 | $LaRETURN_HERE: | 462 | $LaRETURN_HERE: |
463 | # Restore values of CSRs and that of r3 and the divisor and the dividend | 463 | # Restore values of CSRs and that of r3 and the divisor and the dividend |
464 | -- | 464 | -- |
465 | 2.7.4 | 465 | 2.17.1 |
466 | 466 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Author-Nagaraju-nmekala-xilinx.com.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch index 9f878669..8dce8476 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0060-Author-Nagaraju-nmekala-xilinx.com.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch | |||
@@ -1,25 +1,24 @@ | |||
1 | From f0332f119c3cbe95886dae77c4b5a9b9907b4b17 Mon Sep 17 00:00:00 2001 | 1 | From e3b95d5646d4197bff81105c12bcbc5e7dba1725 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Thu, 18 Apr 2019 16:00:37 +0530 | 3 | Date: Thu, 18 Apr 2019 16:00:37 +0530 |
4 | Subject: [PATCH 60/63] Author: Nagaraju <nmekala@xilinx.com> Date: Wed Apr | 4 | Subject: [PATCH 53/58] [Patch, microblaze]: MB-64 removal of barrel-shift |
5 | 17 14:11:00 2019 +0530 | 5 | instructions from default |
6 | 6 | ||
7 | [Patch, microblaze]: MB-64 removal of barrel-shift instructions from default | 7 | By default MB-64 is generatting barrel-shift instructions. It has been |
8 | By default MB-64 is generatting barrel-shift instructions. It has been | 8 | removed from default. Barrel-shift instructions will be generated only if |
9 | removed from default. Barrel-shift instructions will be generated only if | 9 | barrel-shifter is enabled. Similarly to double instructions as well. |
10 | barrel-shifter is enabled. Similarly to double instructions as well. | ||
11 | 10 | ||
12 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 11 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
13 | --- | 12 | --- |
14 | gcc/config/microblaze/microblaze.c | 2 +- | 13 | gcc/config/microblaze/microblaze.c | 2 +- |
15 | gcc/config/microblaze/microblaze.md | 269 +++++++++++++++++++++++++++++++++--- | 14 | gcc/config/microblaze/microblaze.md | 269 ++++++++++++++++++++++++++-- |
16 | 2 files changed, 252 insertions(+), 19 deletions(-) | 15 | 2 files changed, 252 insertions(+), 19 deletions(-) |
17 | 16 | ||
18 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 17 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
19 | index 220e03d..5c09452 100644 | 18 | index 12b1da852dd..5b4c21af365 100644 |
20 | --- a/gcc/config/microblaze/microblaze.c | 19 | --- a/gcc/config/microblaze/microblaze.c |
21 | +++ b/gcc/config/microblaze/microblaze.c | 20 | +++ b/gcc/config/microblaze/microblaze.c |
22 | @@ -4008,7 +4008,7 @@ microblaze_expand_divide (rtx operands[]) | 21 | @@ -4000,7 +4000,7 @@ microblaze_expand_divide (rtx operands[]) |
23 | emit_insn (gen_rtx_CLOBBER (Pmode, reg18)); | 22 | emit_insn (gen_rtx_CLOBBER (Pmode, reg18)); |
24 | 23 | ||
25 | if (TARGET_MB_64) { | 24 | if (TARGET_MB_64) { |
@@ -29,7 +28,7 @@ index 220e03d..5c09452 100644 | |||
29 | } | 28 | } |
30 | else { | 29 | else { |
31 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 30 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
32 | index 830ef77..3e7c647 100644 | 31 | index 626eade9468..6cc62666269 100644 |
33 | --- a/gcc/config/microblaze/microblaze.md | 32 | --- a/gcc/config/microblaze/microblaze.md |
34 | +++ b/gcc/config/microblaze/microblaze.md | 33 | +++ b/gcc/config/microblaze/microblaze.md |
35 | @@ -547,7 +547,7 @@ | 34 | @@ -547,7 +547,7 @@ |
@@ -475,5 +474,5 @@ index 830ef77..3e7c647 100644 | |||
475 | [(set_attr "type" "arith") | 474 | [(set_attr "type" "arith") |
476 | (set_attr "mode" "DI") | 475 | (set_attr "mode" "DI") |
477 | -- | 476 | -- |
478 | 2.7.4 | 477 | 2.17.1 |
479 | 478 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch index d3ed669c..70e05117 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 11766e4f7aaad3f217944079335c71525b72201c Mon Sep 17 00:00:00 2001 | 1 | From 6bdb6f300593c4a633a8ec485ac2744a97b51460 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Wed, 8 May 2019 14:12:03 +0530 | 3 | Date: Wed, 8 May 2019 14:12:03 +0530 |
4 | Subject: [PATCH 61/63] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and | 4 | Subject: [PATCH 54/58] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and |
5 | disable fivopts by default | 5 | disable fivopts by default |
6 | 6 | ||
7 | Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default. | 7 | Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default. |
@@ -15,7 +15,7 @@ Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> | |||
15 | 1 file changed, 4 insertions(+), 2 deletions(-) | 15 | 1 file changed, 4 insertions(+), 2 deletions(-) |
16 | 16 | ||
17 | diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c | 17 | diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c |
18 | index 9b6ef21..3cae2a6 100644 | 18 | index 0b9d5a1b453..cf2db8afe36 100644 |
19 | --- a/gcc/common/config/microblaze/microblaze-common.c | 19 | --- a/gcc/common/config/microblaze/microblaze-common.c |
20 | +++ b/gcc/common/config/microblaze/microblaze-common.c | 20 | +++ b/gcc/common/config/microblaze/microblaze-common.c |
21 | @@ -27,13 +27,15 @@ | 21 | @@ -27,13 +27,15 @@ |
@@ -37,5 +37,5 @@ index 9b6ef21..3cae2a6 100644 | |||
37 | +#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table | 37 | +#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table |
38 | struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; | 38 | struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; |
39 | -- | 39 | -- |
40 | 2.7.4 | 40 | 2.17.1 |
41 | 41 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch index ca1a2b9f..4ab3cec9 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Added-new-MB-64-single-register-arithmetic-instructi.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch | |||
@@ -1,14 +1,14 @@ | |||
1 | From bb65903ab6293a47d154764a585f6c53b5fcf853 Mon Sep 17 00:00:00 2001 | 1 | From 3198a31122bb0436d298d29e986bb69bc3c526a9 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Fri, 23 Aug 2019 16:16:53 +0530 | 3 | Date: Fri, 23 Aug 2019 16:16:53 +0530 |
4 | Subject: [PATCH 62/63] Added new MB-64 single register arithmetic instructions | 4 | Subject: [PATCH 55/58] Added new MB-64 single register arithmetic instructions |
5 | 5 | ||
6 | --- | 6 | --- |
7 | gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++++++++++ | 7 | gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++ |
8 | 1 file changed, 56 insertions(+) | 8 | 1 file changed, 56 insertions(+) |
9 | 9 | ||
10 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 10 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
11 | index 3e7c647..4d40cc5 100644 | 11 | index 6cc62666269..696be7b300f 100644 |
12 | --- a/gcc/config/microblaze/microblaze.md | 12 | --- a/gcc/config/microblaze/microblaze.md |
13 | +++ b/gcc/config/microblaze/microblaze.md | 13 | +++ b/gcc/config/microblaze/microblaze.md |
14 | @@ -654,6 +654,18 @@ | 14 | @@ -654,6 +654,18 @@ |
@@ -103,5 +103,5 @@ index 3e7c647..4d40cc5 100644 | |||
103 | [(set (match_operand:DI 0 "register_operand" "=d,d") | 103 | [(set (match_operand:DI 0 "register_operand" "=d,d") |
104 | (xor:DI (match_operand:DI 1 "arith_operand" "%d,d") | 104 | (xor:DI (match_operand:DI 1 "arith_operand" "%d,d") |
105 | -- | 105 | -- |
106 | 2.7.4 | 106 | 2.17.1 |
107 | 107 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-microblaze_linker_script_xilinx_ld.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-microblaze_linker_script_xilinx_ld.patch deleted file mode 100644 index c009c92d..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-microblaze_linker_script_xilinx_ld.patch +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
2 | index 740b8d9..4bda9c2 100644 | ||
3 | --- a/gcc/config/microblaze/microblaze.h | ||
4 | +++ b/gcc/config/microblaze/microblaze.h | ||
5 | @@ -114,8 +114,9 @@ extern enum pipeline_type microblaze_pipe; | ||
6 | %{m64:-EL --oformat=elf64-microblazeel} \ | ||
7 | %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \ | ||
8 | %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \ | ||
9 | - %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \ | ||
10 | - %{!T*: -dT xilinx.ld%s}" | ||
11 | + %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0}" | ||
12 | + | ||
13 | +// %{!T*: -dT xilinx.ld%s}" | ||
14 | |||
15 | /* Specs for the compiler proper */ | ||
16 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0063-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch index edf6a0f3..afe3ae96 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0063-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From d4b23a1dd0564bcf67b5b88a68d62eb49bdab15d Mon Sep 17 00:00:00 2001 | 1 | From 1dadde6d9a49010a495529c9b5ea6c2bb75cc5f1 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 26 Aug 2019 15:55:22 +0530 | 3 | Date: Mon, 26 Aug 2019 15:55:22 +0530 |
4 | Subject: [PATCH 63/63] [Patch,MicroBlaze] : Added support for 64 bit Immediate | 4 | Subject: [PATCH 56/58] [Patch,MicroBlaze] : Added support for 64 bit Immediate |
5 | values. | 5 | values. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -10,7 +10,7 @@ Subject: [PATCH 63/63] [Patch,MicroBlaze] : Added support for 64 bit Immediate | |||
10 | 2 files changed, 3 insertions(+), 4 deletions(-) | 10 | 2 files changed, 3 insertions(+), 4 deletions(-) |
11 | 11 | ||
12 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md | 12 | diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md |
13 | index 9a5aa6b..e87a90f 100644 | 13 | index 4a6cf419671..2432b480a2c 100644 |
14 | --- a/gcc/config/microblaze/constraints.md | 14 | --- a/gcc/config/microblaze/constraints.md |
15 | +++ b/gcc/config/microblaze/constraints.md | 15 | +++ b/gcc/config/microblaze/constraints.md |
16 | @@ -53,9 +53,9 @@ | 16 | @@ -53,9 +53,9 @@ |
@@ -26,7 +26,7 @@ index 9a5aa6b..e87a90f 100644 | |||
26 | ;; Define floating point constraints | 26 | ;; Define floating point constraints |
27 | 27 | ||
28 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | 28 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
29 | index 4d40cc5..6e74503 100644 | 29 | index 696be7b300f..f0a9701ab18 100644 |
30 | --- a/gcc/config/microblaze/microblaze.md | 30 | --- a/gcc/config/microblaze/microblaze.md |
31 | +++ b/gcc/config/microblaze/microblaze.md | 31 | +++ b/gcc/config/microblaze/microblaze.md |
32 | @@ -1334,8 +1334,7 @@ | 32 | @@ -1334,8 +1334,7 @@ |
@@ -40,5 +40,5 @@ index 4d40cc5..6e74503 100644 | |||
40 | addlk\t%0,r0,r0\t | 40 | addlk\t%0,r0,r0\t |
41 | addlik\t%0,r0,%1\t #N1 %X1 | 41 | addlik\t%0,r0,%1\t #N1 %X1 |
42 | -- | 42 | -- |
43 | 2.7.4 | 43 | 2.17.1 |
44 | 44 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-fix-the-lto-wrapper-issue-on-windows.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-fix-the-lto-wrapper-issue-on-windows.patch deleted file mode 100644 index ff524770..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-fix-the-lto-wrapper-issue-on-windows.patch +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | From f30b99b5b8d3f2a8d8e4973cd155a4b9f1849039 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Thu, 14 Mar 2019 18:08:06 +0530 | ||
4 | Subject: [PATCH 56/57] fix the lto-wrapper issue on windows | ||
5 | |||
6 | --- | ||
7 | libiberty/simple-object.c | 6 +++++- | ||
8 | 1 file changed, 5 insertions(+), 1 deletion(-) | ||
9 | |||
10 | diff --git a/libiberty/simple-object.c b/libiberty/simple-object.c | ||
11 | index 42aa6ac..d2465c6 100644 | ||
12 | --- a/libiberty/simple-object.c | ||
13 | +++ b/libiberty/simple-object.c | ||
14 | @@ -44,6 +44,10 @@ Boston, MA 02110-1301, USA. */ | ||
15 | #define SEEK_SET 0 | ||
16 | #endif | ||
17 | |||
18 | +#ifndef O_BINARY | ||
19 | +#define O_BINARY 0 | ||
20 | +#endif | ||
21 | + | ||
22 | #include "simple-object-common.h" | ||
23 | |||
24 | /* The known object file formats. */ | ||
25 | @@ -326,7 +330,7 @@ simple_object_copy_lto_debug_sections (simple_object_read *sobj, | ||
26 | return errmsg; | ||
27 | } | ||
28 | |||
29 | - outfd = creat (dest, 00777); | ||
30 | + outfd = open (dest, O_CREAT|O_WRONLY|O_TRUNC|O_BINARY, 00777); | ||
31 | if (outfd == -1) | ||
32 | { | ||
33 | *err = errno; | ||
34 | -- | ||
35 | 2.7.4 | ||
36 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch deleted file mode 100644 index a5a2039d..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | From 6c58973f1cc1e37773aeab583aa3ac6331489106 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Thu, 14 Mar 2019 18:11:04 +0530 | ||
4 | Subject: [PATCH 57/57] Fix the MB-64 bug of handling QI objects | ||
5 | |||
6 | --- | ||
7 | gcc/config/microblaze/microblaze.md | 14 +++++++------- | ||
8 | 1 file changed, 7 insertions(+), 7 deletions(-) | ||
9 | |||
10 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
11 | index e03b835..88aee9e 100644 | ||
12 | --- a/gcc/config/microblaze/microblaze.md | ||
13 | +++ b/gcc/config/microblaze/microblaze.md | ||
14 | @@ -2345,11 +2345,11 @@ else | ||
15 | |||
16 | (define_insn "branch_zero_64" | ||
17 | [(set (pc) | ||
18 | - (if_then_else (match_operator:SI 0 "ordered_comparison_operator" | ||
19 | + (if_then_else (match_operator 0 "ordered_comparison_operator" | ||
20 | [(match_operand:SI 1 "register_operand" "d") | ||
21 | (const_int 0)]) | ||
22 | - (match_operand:SI 2 "pc_or_label_operand" "") | ||
23 | - (match_operand:SI 3 "pc_or_label_operand" ""))) | ||
24 | + (match_operand 2 "pc_or_label_operand" "") | ||
25 | + (match_operand 3 "pc_or_label_operand" ""))) | ||
26 | ] | ||
27 | "TARGET_MB_64" | ||
28 | { | ||
29 | @@ -2365,11 +2365,11 @@ else | ||
30 | |||
31 | (define_insn "long_branch_zero" | ||
32 | [(set (pc) | ||
33 | - (if_then_else (match_operator 0 "ordered_comparison_operator" | ||
34 | - [(match_operand 1 "register_operand" "d") | ||
35 | + (if_then_else (match_operator:DI 0 "ordered_comparison_operator" | ||
36 | + [(match_operand:DI 1 "register_operand" "d") | ||
37 | (const_int 0)]) | ||
38 | - (match_operand 2 "pc_or_label_operand" "") | ||
39 | - (match_operand 3 "pc_or_label_operand" ""))) | ||
40 | + (match_operand:DI 2 "pc_or_label_operand" "") | ||
41 | + (match_operand:DI 3 "pc_or_label_operand" ""))) | ||
42 | ] | ||
43 | "TARGET_MB_64" | ||
44 | { | ||
45 | -- | ||
46 | 2.7.4 | ||
47 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0064-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch index 41c90353..ebd707c9 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0064-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch | |||
@@ -1,23 +1,32 @@ | |||
1 | From 5f54efe1e7d9604b45ddddd510ce439477d0e94f Mon Sep 17 00:00:00 2001 | 1 | From ab73daf6bf1bc652e9557386cba5eb237af66350 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Thu, 9 Jan 2020 12:30:41 +0530 | 3 | Date: Thu, 9 Jan 2020 12:30:41 +0530 |
4 | Subject: [PATCH] [Patch, microblaze]: Fix Compiler crash with | 4 | Subject: [PATCH 57/58] [Patch, microblaze]: Fix Compiler crash with |
5 | -freg-struct-return This patch fixes a bug in MB GCC regarding the passing | 5 | -freg-struct-return This patch fixes a bug in MB GCC regarding the passing |
6 | struct values in registers. Currently we are only handling SImode With this | 6 | struct values in registers. Currently we are only handling SImode With this |
7 | patch all other modes are handled properly | 7 | patch all other modes are handled properly |
8 | 8 | ||
9 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 9 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
10 | 10 | ||
11 | ChangeLog: | ||
12 | 2020-01-09 Nagaraju Mekala <nmekala@xilix.com> | ||
13 | |||
14 | * gcc/config/microblaze/microblaze.h | ||
15 | (LIBCALL_Value): Remove macro | ||
16 | (PROMOTE_MODE): Remove macro | ||
17 | * gcc/config/microblaze/microblaze.c | ||
18 | (TARGET_LIBCALL_Value): Added new macro | ||
19 | (microblaze_function_value): Updated the return Value | ||
11 | --- | 20 | --- |
12 | gcc/config/microblaze/microblaze.c | 11 ++++++++++- | 21 | gcc/config/microblaze/microblaze.c | 11 ++++++++++- |
13 | gcc/config/microblaze/microblaze.h | 19 ------------------- | 22 | gcc/config/microblaze/microblaze.h | 19 ------------------- |
14 | 2 files changed, 10 insertions(+), 20 deletions(-) | 23 | 2 files changed, 10 insertions(+), 20 deletions(-) |
15 | 24 | ||
16 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | 25 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
17 | index 5c09452..beccd12 100644 | 26 | index 5b4c21af365..31869982d27 100644 |
18 | --- a/gcc/config/microblaze/microblaze.c | 27 | --- a/gcc/config/microblaze/microblaze.c |
19 | +++ b/gcc/config/microblaze/microblaze.c | 28 | +++ b/gcc/config/microblaze/microblaze.c |
20 | @@ -4046,7 +4046,16 @@ microblaze_function_value (const_tree valtype, | 29 | @@ -4038,7 +4038,16 @@ microblaze_function_value (const_tree valtype, |
21 | const_tree func ATTRIBUTE_UNUSED, | 30 | const_tree func ATTRIBUTE_UNUSED, |
22 | bool outgoing ATTRIBUTE_UNUSED) | 31 | bool outgoing ATTRIBUTE_UNUSED) |
23 | { | 32 | { |
@@ -36,7 +45,7 @@ index 5c09452..beccd12 100644 | |||
36 | 45 | ||
37 | /* Implement TARGET_SCHED_ADJUST_COST. */ | 46 | /* Implement TARGET_SCHED_ADJUST_COST. */ |
38 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | 47 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
39 | index ab541f7..100e7b2 100644 | 48 | index 0c493b6f6e4..5eb95c2600a 100644 |
40 | --- a/gcc/config/microblaze/microblaze.h | 49 | --- a/gcc/config/microblaze/microblaze.h |
41 | +++ b/gcc/config/microblaze/microblaze.h | 50 | +++ b/gcc/config/microblaze/microblaze.h |
42 | @@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe; | 51 | @@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe; |
@@ -73,5 +82,5 @@ index ab541f7..100e7b2 100644 | |||
73 | On the MicroBlaze, R2 R3 are the only register thus used. | 82 | On the MicroBlaze, R2 R3 are the only register thus used. |
74 | Currently, R2 are only implemented here (C has no complex type) */ | 83 | Currently, R2 are only implemented here (C has no complex type) */ |
75 | -- | 84 | -- |
76 | 1.8.3.1 | 85 | 2.17.1 |
77 | 86 | ||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch deleted file mode 100644 index 8bc47a43..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | From bcbfd9f69d858306a080aa7213e96ca6eca66106 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Fri, 29 Mar 2019 12:08:39 +0530 | ||
4 | Subject: [PATCH 58/61] [Patch,Microblaze] : We will check the possibility of | ||
5 | peephole2 optimization,if we can then we will fix the compiler issue. | ||
6 | |||
7 | --- | ||
8 | gcc/config/microblaze/microblaze.md | 63 ++++++++++++++++++++++--------------- | ||
9 | 1 file changed, 38 insertions(+), 25 deletions(-) | ||
10 | |||
11 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
12 | index 88aee9e..8bd175f 100644 | ||
13 | --- a/gcc/config/microblaze/microblaze.md | ||
14 | +++ b/gcc/config/microblaze/microblaze.md | ||
15 | @@ -880,31 +880,44 @@ | ||
16 | (set_attr "mode" "SI") | ||
17 | (set_attr "length" "4")]) | ||
18 | |||
19 | -(define_peephole2 | ||
20 | - [(set (match_operand:SI 0 "register_operand") | ||
21 | - (fix:SI (match_operand:SF 1 "register_operand"))) | ||
22 | - (set (pc) | ||
23 | - (if_then_else (match_operator 2 "ordered_comparison_operator" | ||
24 | - [(match_operand:SI 3 "register_operand") | ||
25 | - (match_operand:SI 4 "arith_operand")]) | ||
26 | - (label_ref (match_operand 5)) | ||
27 | - (pc)))] | ||
28 | - "TARGET_HARD_FLOAT && !TARGET_MB_64" | ||
29 | - [(set (match_dup 1) (match_dup 3))] | ||
30 | - | ||
31 | - { | ||
32 | - rtx condition; | ||
33 | - rtx cmp_op0 = operands[3]; | ||
34 | - rtx cmp_op1 = operands[4]; | ||
35 | - rtx comp_reg = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); | ||
36 | - | ||
37 | - emit_insn (gen_cstoresf4 (comp_reg, operands[2], | ||
38 | - gen_rtx_REG (SFmode, REGNO (cmp_op0)), | ||
39 | - gen_rtx_REG (SFmode, REGNO (cmp_op1)))); | ||
40 | - condition = gen_rtx_NE (SImode, comp_reg, const0_rtx); | ||
41 | - emit_jump_insn (gen_condjump (condition, operands[5])); | ||
42 | - } | ||
43 | -) | ||
44 | +;; peephole2 optimization will be done only if fint and if-then-else | ||
45 | +;; are dependent.added condition for the same. | ||
46 | +;; if they are dependent then gcc is giving "flow control insn inside a basic block" | ||
47 | +;; testcase: | ||
48 | +;; volatile float vec = 1.0; | ||
49 | +;; volatile int ci = 2; | ||
50 | +;; register int cj = (int)(vec); | ||
51 | +;;// ci=cj; | ||
52 | +;;// if (ci <0) { | ||
53 | +;; if (cj < 0) { | ||
54 | +;; ci = 0; | ||
55 | +;; } | ||
56 | +;; commenting for now.we will check the possibility of this optimization later | ||
57 | + | ||
58 | +;;(define_peephole2 | ||
59 | +;; [(set (match_operand:SI 0 "register_operand") | ||
60 | +;; (fix:SI (match_operand:SF 1 "register_operand"))) | ||
61 | +;; (set (pc) | ||
62 | +;; (if_then_else (match_operator 2 "ordered_comparison_operator" | ||
63 | +;; [(match_operand:SI 3 "register_operand") | ||
64 | +;; (match_operand:SI 4 "arith_operand")]) | ||
65 | +;; (label_ref (match_operand 5)) | ||
66 | +;; (pc)))] | ||
67 | +;; "TARGET_HARD_FLOAT && !TARGET_MB_64 && ((REGNO (operands[0])) == (REGNO (operands[3])))" | ||
68 | +;; [(set (match_dup 1) (match_dup 3))] | ||
69 | +;; { | ||
70 | +;; rtx condition; | ||
71 | +;; rtx cmp_op0 = operands[3]; | ||
72 | +;; rtx cmp_op1 = operands[4]; | ||
73 | +;; rtx comp_reg = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); | ||
74 | +;; | ||
75 | +;; emit_insn (gen_cstoresf4 (comp_reg, operands[2], | ||
76 | +;; gen_rtx_REG (SFmode, REGNO (cmp_op0)), | ||
77 | +;; gen_rtx_REG (SFmode, REGNO (cmp_op1)))); | ||
78 | +;; condition = gen_rtx_NE (SImode, comp_reg, const0_rtx); | ||
79 | +;; emit_jump_insn (gen_condjump (condition, operands[5])); | ||
80 | +;; } | ||
81 | +;;) | ||
82 | |||
83 | ;;---------------------------------------------------------------- | ||
84 | ;; Negation and one's complement | ||
85 | -- | ||
86 | 2.7.4 | ||
87 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch deleted file mode 100644 index 69b49898..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | From 8e7d7f3d2e103c34bbb28afe1338107b9fd824f0 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Tue, 16 Apr 2019 17:20:24 +0530 | ||
4 | Subject: [PATCH 58/63] Reverting the patch as kernel boot is not working with | ||
5 | this patch CR-1026413 Revert "[Patch,Microblaze]:reverting the cost check | ||
6 | before propagating constants." | ||
7 | |||
8 | This reverts commit 7156e379a67fa47a5fb9ede1448c0d528dbda65b. | ||
9 | --- | ||
10 | gcc/cprop.c | 4 ---- | ||
11 | 1 file changed, 4 deletions(-) | ||
12 | |||
13 | diff --git a/gcc/cprop.c b/gcc/cprop.c | ||
14 | index 42bcc81..65c0130 100644 | ||
15 | --- a/gcc/cprop.c | ||
16 | +++ b/gcc/cprop.c | ||
17 | @@ -733,7 +733,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
18 | int success = 0; | ||
19 | rtx set = single_set (insn); | ||
20 | |||
21 | -#if 0 | ||
22 | bool check_rtx_costs = true; | ||
23 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); | ||
24 | int old_cost = set ? set_rtx_cost (set, speed) : 0; | ||
25 | @@ -745,7 +744,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
26 | && (GET_CODE (XEXP (note, 0)) == CONST | ||
27 | || CONSTANT_P (XEXP (note, 0))))) | ||
28 | check_rtx_costs = false; | ||
29 | -#endif | ||
30 | |||
31 | /* Usually we substitute easy stuff, so we won't copy everything. | ||
32 | We however need to take care to not duplicate non-trivial CONST | ||
33 | @@ -754,7 +752,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
34 | |||
35 | validate_replace_src_group (from, to, insn); | ||
36 | |||
37 | -#if 0 | ||
38 | /* If TO is a constant, check the cost of the set after propagation | ||
39 | to the cost of the set before the propagation. If the cost is | ||
40 | higher, then do not replace FROM with TO. */ | ||
41 | @@ -767,7 +764,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
42 | return false; | ||
43 | } | ||
44 | |||
45 | -#endif | ||
46 | |||
47 | if (num_changes_pending () && apply_change_group ()) | ||
48 | success = 1; | ||
49 | -- | ||
50 | 2.7.4 | ||
51 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch new file mode 100644 index 00000000..e3c4b87b --- /dev/null +++ b/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch | |||
@@ -0,0 +1,29 @@ | |||
1 | From dd73d8ba32c0c24f17a54538b9bb54beb5d8d4e0 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
3 | Date: Thu, 13 Aug 2020 16:28:57 -0500 | ||
4 | Subject: [PATCH 58/58] microblaze: Avoid UINTPTR_TYPE macro redefinition | ||
5 | |||
6 | Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
7 | --- | ||
8 | gcc/config/microblaze/microblaze.h | 5 ----- | ||
9 | 1 file changed, 5 deletions(-) | ||
10 | |||
11 | diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h | ||
12 | index 5eb95c2600a..4cb98bac849 100644 | ||
13 | --- a/gcc/config/microblaze/microblaze.h | ||
14 | +++ b/gcc/config/microblaze/microblaze.h | ||
15 | @@ -246,11 +246,6 @@ extern enum pipeline_type microblaze_pipe; | ||
16 | #undef PTRDIFF_TYPE | ||
17 | #define PTRDIFF_TYPE (TARGET_MB_64 ? "long int" : "int") | ||
18 | |||
19 | -/*#undef INTPTR_TYPE | ||
20 | -#define INTPTR_TYPE (TARGET_MB_64 ? "long int" : "int")*/ | ||
21 | -#undef UINTPTR_TYPE | ||
22 | -#define UINTPTR_TYPE (TARGET_MB_64 ? "long unsigned int" : "unsigned int") | ||
23 | - | ||
24 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | ||
25 | ((((ALIGN) < BITS_PER_WORD) \ | ||
26 | && (TREE_CODE (TYPE) == ARRAY_TYPE \ | ||
27 | -- | ||
28 | 2.17.1 | ||
29 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch deleted file mode 100644 index 2e570330..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch +++ /dev/null | |||
@@ -1,466 +0,0 @@ | |||
1 | From e1a10a708f209704a3921cf66dd3ff4d0814befc Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Wed, 17 Apr 2019 12:36:16 +0530 | ||
4 | Subject: [PATCH 59/63] [Patch,MicroBlaze]: fixed typos in mul,div and mod | ||
5 | assembly files. | ||
6 | |||
7 | --- | ||
8 | libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++++++++---- | ||
9 | libgcc/config/microblaze/modsi3.S | 40 +++++++++++++++++++++++--- | ||
10 | libgcc/config/microblaze/mulsi3.S | 33 +++++++++++++++++++++- | ||
11 | libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++---- | ||
12 | libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++--- | ||
13 | 5 files changed, 212 insertions(+), 20 deletions(-) | ||
14 | |||
15 | diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S | ||
16 | index 2765e42..bd56522 100644 | ||
17 | --- a/libgcc/config/microblaze/divsi3.S | ||
18 | +++ b/libgcc/config/microblaze/divsi3.S | ||
19 | @@ -46,7 +46,7 @@ | ||
20 | __divsi3: | ||
21 | .frame r1,0,r15 | ||
22 | |||
23 | - ADDIK r1,r1,-32 | ||
24 | + ADDLIK r1,r1,-32 | ||
25 | SLI r28,r1,0 | ||
26 | SLI r29,r1,8 | ||
27 | SLI r30,r1,16 | ||
28 | @@ -61,13 +61,23 @@ __divsi3: | ||
29 | SWI r30,r1,8 | ||
30 | SWI r31,r1,12 | ||
31 | #endif | ||
32 | - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
33 | - BEQI r5,$LaResult_Is_Zero # Result is Zero | ||
34 | - BGEID r5,$LaR5_Pos | ||
35 | +#ifdef __arch64__ | ||
36 | + BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
37 | + BEAEQI r5,$LaResult_Is_Zero # Result is Zero | ||
38 | + BEAGEID r5,$LaR5_Pos | ||
39 | +#else | ||
40 | + BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
41 | + BEQI r5,$LaResult_Is_Zero # Result is Zero | ||
42 | + BGEID r5,$LaR5_Pos | ||
43 | +#endif | ||
44 | XOR r28,r5,r6 # Get the sign of the result | ||
45 | RSUBI r5,r5,0 # Make r5 positive | ||
46 | $LaR5_Pos: | ||
47 | - BGEI r6,$LaR6_Pos | ||
48 | +#ifdef __arch64__ | ||
49 | + BEAGEI r6,$LaR6_Pos | ||
50 | +#else | ||
51 | + BGEI r6,$LaR6_Pos | ||
52 | +#endif | ||
53 | RSUBI r6,r6,0 # Make r6 positive | ||
54 | $LaR6_Pos: | ||
55 | ADDIK r30,r0,0 # Clear mod | ||
56 | @@ -76,26 +86,51 @@ $LaR6_Pos: | ||
57 | |||
58 | # First part try to find the first '1' in the r5 | ||
59 | $LaDIV0: | ||
60 | - BLTI r5,$LaDIV2 # This traps r5 == 0x80000000 | ||
61 | +#ifdef __arch64__ | ||
62 | + BEALTI r5,$LaDIV2 # This traps r5 == 0x80000000 | ||
63 | +#else | ||
64 | + BLTI r5,$LaDIV2 # This traps r5 == 0x80000000 | ||
65 | +#endif | ||
66 | $LaDIV1: | ||
67 | ADD r5,r5,r5 # left shift logical r5 | ||
68 | +#ifdef __arch64__ | ||
69 | + BEAGTID r5,$LaDIV1 | ||
70 | +#else | ||
71 | BGTID r5,$LaDIV1 | ||
72 | +#endif | ||
73 | ADDIK r29,r29,-1 | ||
74 | $LaDIV2: | ||
75 | ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry | ||
76 | ADDC r30,r30,r30 # Move that bit into the Mod register | ||
77 | RSUB r31,r6,r30 # Try to subtract (r30 a r6) | ||
78 | +#ifdef __arch64__ | ||
79 | + BEALTI r31,$LaMOD_TOO_SMALL | ||
80 | +#else | ||
81 | BLTI r31,$LaMOD_TOO_SMALL | ||
82 | +#endif | ||
83 | OR r30,r0,r31 # Move the r31 to mod since the result was positive | ||
84 | ADDIK r3,r3,1 | ||
85 | $LaMOD_TOO_SMALL: | ||
86 | ADDIK r29,r29,-1 | ||
87 | +#ifdef __arch64__ | ||
88 | + BEAEQi r29,$LaLOOP_END | ||
89 | +#else | ||
90 | BEQi r29,$LaLOOP_END | ||
91 | +#endif | ||
92 | ADD r3,r3,r3 # Shift in the '1' into div | ||
93 | +#ifdef __arch64__ | ||
94 | + BREAI $LaDIV2 # Div2 | ||
95 | +#else | ||
96 | BRI $LaDIV2 # Div2 | ||
97 | +#endif | ||
98 | $LaLOOP_END: | ||
99 | +#ifdef __arch64__ | ||
100 | + BEAGEI r28,$LaRETURN_HERE | ||
101 | + BREAID $LaRETURN_HERE | ||
102 | +#else | ||
103 | BGEI r28,$LaRETURN_HERE | ||
104 | BRID $LaRETURN_HERE | ||
105 | +#endif | ||
106 | RSUBI r3,r3,0 # Negate the result | ||
107 | $LaDiv_By_Zero: | ||
108 | $LaResult_Is_Zero: | ||
109 | diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S | ||
110 | index b0e6cad..3632fad 100644 | ||
111 | --- a/libgcc/config/microblaze/modsi3.S | ||
112 | +++ b/libgcc/config/microblaze/modsi3.S | ||
113 | @@ -62,40 +62,72 @@ __modsi3: | ||
114 | swi r31,r1,12 | ||
115 | #endif | ||
116 | |||
117 | +#ifdef __arch64__ | ||
118 | + BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
119 | + BEAEQI r5,$LaResult_Is_Zero # Result is Zero | ||
120 | + BEAGEId r5,$LaR5_Pos | ||
121 | +#else | ||
122 | BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
123 | BEQI r5,$LaResult_Is_Zero # Result is Zero | ||
124 | BGEId r5,$LaR5_Pos | ||
125 | +#endif | ||
126 | ADD r28,r5,r0 # Get the sign of the result [ Depends only on the first arg] | ||
127 | RSUBI r5,r5,0 # Make r5 positive | ||
128 | $LaR5_Pos: | ||
129 | - BGEI r6,$LaR6_Pos | ||
130 | +#ifdef __arch64__ | ||
131 | + BEAGEI r6,$LaR6_Pos | ||
132 | +#else | ||
133 | + BGEI r6,$LaR6_Pos | ||
134 | +#endif | ||
135 | RSUBI r6,r6,0 # Make r6 positive | ||
136 | $LaR6_Pos: | ||
137 | ADDIK r3,r0,0 # Clear mod | ||
138 | ADDIK r30,r0,0 # clear div | ||
139 | - BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip | ||
140 | +#ifdef __arch64__ | ||
141 | + BEALTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip | ||
142 | # the first bit search. | ||
143 | +#else | ||
144 | + BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip | ||
145 | + # the first bit search. | ||
146 | +#endif | ||
147 | ADDIK r29,r0,32 # Initialize the loop count | ||
148 | # First part try to find the first '1' in the r5 | ||
149 | $LaDIV1: | ||
150 | ADD r5,r5,r5 # left shift logical r5 | ||
151 | - BGEID r5,$LaDIV1 # | ||
152 | +#ifdef __arch64__ | ||
153 | + BEAGEID r5,$LaDIV1 # | ||
154 | +#else | ||
155 | + BGEID r5,$LaDIV1 # | ||
156 | +#endif | ||
157 | ADDIK r29,r29,-1 | ||
158 | $LaDIV2: | ||
159 | ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry | ||
160 | ADDC r3,r3,r3 # Move that bit into the Mod register | ||
161 | rSUB r31,r6,r3 # Try to subtract (r30 a r6) | ||
162 | +#ifdef __arch64__ | ||
163 | + BEALTi r31,$LaMOD_TOO_SMALL | ||
164 | +#else | ||
165 | BLTi r31,$LaMOD_TOO_SMALL | ||
166 | +#endif | ||
167 | OR r3,r0,r31 # Move the r31 to mod since the result was positive | ||
168 | ADDIK r30,r30,1 | ||
169 | $LaMOD_TOO_SMALL: | ||
170 | ADDIK r29,r29,-1 | ||
171 | +#ifdef __arch64__ | ||
172 | + BEAEQi r29,$LaLOOP_END | ||
173 | + ADD r30,r30,r30 # Shift in the '1' into div | ||
174 | + BREAI $LaDIV2 # Div2 | ||
175 | +$LaLOOP_END: | ||
176 | + BEAGEI r28,$LaRETURN_HERE | ||
177 | + BREAId $LaRETURN_HERE | ||
178 | +#else | ||
179 | BEQi r29,$LaLOOP_END | ||
180 | ADD r30,r30,r30 # Shift in the '1' into div | ||
181 | BRI $LaDIV2 # Div2 | ||
182 | $LaLOOP_END: | ||
183 | BGEI r28,$LaRETURN_HERE | ||
184 | BRId $LaRETURN_HERE | ||
185 | +#endif | ||
186 | rsubi r3,r3,0 # Negate the result | ||
187 | $LaDiv_By_Zero: | ||
188 | $LaResult_Is_Zero: | ||
189 | @@ -108,7 +140,7 @@ $LaRETURN_HERE: | ||
190 | lli r29,r1,8 | ||
191 | lli r30,r1,16 | ||
192 | lli r31,r1,24 | ||
193 | - addik r1,r1,32 | ||
194 | + addlik r1,r1,32 | ||
195 | rtsd r15,8 | ||
196 | nop | ||
197 | #else | ||
198 | diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S | ||
199 | index e28c69a..991dbcd 100644 | ||
200 | --- a/libgcc/config/microblaze/mulsi3.S | ||
201 | +++ b/libgcc/config/microblaze/mulsi3.S | ||
202 | @@ -43,7 +43,37 @@ | ||
203 | .type __mulsi3,@function | ||
204 | #ifdef __arch64__ | ||
205 | .align 3 | ||
206 | -#endif | ||
207 | +__mulsi3: | ||
208 | + .frame r1,0,r15 | ||
209 | + add r3,r0,r0 | ||
210 | + BEAEQI r5,$L_Result_Is_Zero # Multiply by Zero | ||
211 | + BEAEQI r6,$L_Result_Is_Zero # Multiply by Zero | ||
212 | + BEAGEId r5,$L_R5_Pos | ||
213 | + XOR r4,r5,r6 # Get the sign of the result | ||
214 | + RSUBI r5,r5,0 # Make r5 positive | ||
215 | +$L_R5_Pos: | ||
216 | + BEAGEI r6,$L_R6_Pos | ||
217 | + RSUBI r6,r6,0 # Make r6 positive | ||
218 | +$L_R6_Pos: | ||
219 | + breai $L1 | ||
220 | +$L2: | ||
221 | + add r5,r5,r5 | ||
222 | +$L1: | ||
223 | + srl r6,r6 | ||
224 | + addc r7,r0,r0 | ||
225 | + beaeqi r7,$L2 | ||
226 | + beaneid r6,$L2 | ||
227 | + add r3,r3,r5 | ||
228 | + bealti r4,$L_NegateResult | ||
229 | + rtsd r15,8 | ||
230 | + nop | ||
231 | +$L_NegateResult: | ||
232 | + rtsd r15,8 | ||
233 | + rsub r3,r3,r0 | ||
234 | +$L_Result_Is_Zero: | ||
235 | + rtsd r15,8 | ||
236 | + addi r3,r0,0 | ||
237 | +#else | ||
238 | __mulsi3: | ||
239 | .frame r1,0,r15 | ||
240 | add r3,r0,r0 | ||
241 | @@ -74,5 +104,6 @@ $L_NegateResult: | ||
242 | $L_Result_Is_Zero: | ||
243 | rtsd r15,8 | ||
244 | addi r3,r0,0 | ||
245 | +#endif | ||
246 | .end __mulsi3 | ||
247 | .size __mulsi3, . - __mulsi3 | ||
248 | diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S | ||
249 | index b1e44b6..42b086e 100644 | ||
250 | --- a/libgcc/config/microblaze/udivsi3.S | ||
251 | +++ b/libgcc/config/microblaze/udivsi3.S | ||
252 | @@ -59,52 +59,96 @@ __udivsi3: | ||
253 | SWI r30,r1,4 | ||
254 | SWI r31,r1,8 | ||
255 | #endif | ||
256 | +#ifdef __arch64__ | ||
257 | + BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
258 | + BEAEQID r5,$LaResult_Is_Zero # Result is Zero | ||
259 | +#else | ||
260 | BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
261 | BEQID r5,$LaResult_Is_Zero # Result is Zero | ||
262 | +#endif | ||
263 | ADDIK r30,r0,0 # Clear mod | ||
264 | ADDIK r29,r0,32 # Initialize the loop count | ||
265 | |||
266 | # Check if r6 and r5 are equal # if yes, return 1 | ||
267 | RSUB r18,r5,r6 | ||
268 | +#ifdef __arch64__ | ||
269 | + BEAEQID r18,$LaRETURN_HERE | ||
270 | +#else | ||
271 | BEQID r18,$LaRETURN_HERE | ||
272 | +#endif | ||
273 | ADDIK r3,r0,1 | ||
274 | |||
275 | # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0 | ||
276 | XOR r18,r5,r6 | ||
277 | - BGEID r18,16 | ||
278 | +#ifdef __arch64__ | ||
279 | + BEAGEID r18,16 | ||
280 | +#else | ||
281 | + BGEID r18,16 | ||
282 | +#endif | ||
283 | ADD r3,r0,r0 # We would anyways clear r3 | ||
284 | +#ifdef __arch64__ | ||
285 | + BEALTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater | ||
286 | + BREAI $LCheckr6 | ||
287 | + RSUB r18,r6,r5 # MICROBLAZEcmp | ||
288 | + BEALTI r18,$LaRETURN_HERE | ||
289 | +#else | ||
290 | BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater | ||
291 | BRI $LCheckr6 | ||
292 | RSUB r18,r6,r5 # MICROBLAZEcmp | ||
293 | BLTI r18,$LaRETURN_HERE | ||
294 | - | ||
295 | +#endif | ||
296 | # If r6 [bit 31] is set, then return result as 1 | ||
297 | $LCheckr6: | ||
298 | - BGTI r6,$LaDIV0 | ||
299 | - BRID $LaRETURN_HERE | ||
300 | +#ifdef __arch64__ | ||
301 | + BEAGTI r6,$LaDIV0 | ||
302 | + BREAID $LaRETURN_HERE | ||
303 | +#else | ||
304 | + BGTI r6,$LaDIV0 | ||
305 | + BRID $LaRETURN_HERE | ||
306 | +#endif | ||
307 | ADDIK r3,r0,1 | ||
308 | |||
309 | # First part try to find the first '1' in the r5 | ||
310 | $LaDIV0: | ||
311 | +#ifdef __arch64__ | ||
312 | + BEALTI r5,$LaDIV2 | ||
313 | +#else | ||
314 | BLTI r5,$LaDIV2 | ||
315 | +#endif | ||
316 | $LaDIV1: | ||
317 | ADD r5,r5,r5 # left shift logical r5 | ||
318 | +#ifdef __arch64__ | ||
319 | + BEAGTID r5,$LaDIV1 | ||
320 | +#else | ||
321 | BGTID r5,$LaDIV1 | ||
322 | +#endif | ||
323 | ADDIK r29,r29,-1 | ||
324 | $LaDIV2: | ||
325 | ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry | ||
326 | ADDC r30,r30,r30 # Move that bit into the Mod register | ||
327 | RSUB r31,r6,r30 # Try to subtract (r30 a r6) | ||
328 | +#ifdef __arch64__ | ||
329 | + BEALTI r31,$LaMOD_TOO_SMALL | ||
330 | +#else | ||
331 | BLTI r31,$LaMOD_TOO_SMALL | ||
332 | +#endif | ||
333 | OR r30,r0,r31 # Move the r31 to mod since the result was positive | ||
334 | ADDIK r3,r3,1 | ||
335 | $LaMOD_TOO_SMALL: | ||
336 | ADDIK r29,r29,-1 | ||
337 | +#ifdef __arch64__ | ||
338 | + BEAEQi r29,$LaLOOP_END | ||
339 | + ADD r3,r3,r3 # Shift in the '1' into div | ||
340 | + BREAI $LaDIV2 # Div2 | ||
341 | +$LaLOOP_END: | ||
342 | + BREAI $LaRETURN_HERE | ||
343 | +#else | ||
344 | BEQi r29,$LaLOOP_END | ||
345 | ADD r3,r3,r3 # Shift in the '1' into div | ||
346 | BRI $LaDIV2 # Div2 | ||
347 | $LaLOOP_END: | ||
348 | BRI $LaRETURN_HERE | ||
349 | +#endif | ||
350 | $LaDiv_By_Zero: | ||
351 | $LaResult_Is_Zero: | ||
352 | OR r3,r0,r0 # set result to 0 | ||
353 | @@ -115,7 +159,7 @@ $LaRETURN_HERE: | ||
354 | LLI r29,r1,0 | ||
355 | LLI r30,r1,8 | ||
356 | LLI r31,r1,16 | ||
357 | - ADDIK r1,r1,24 | ||
358 | + ADDLIK r1,r1,24 | ||
359 | RTSD r15,8 | ||
360 | NOP | ||
361 | #else | ||
362 | diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S | ||
363 | index 1b3070e..91430a6 100644 | ||
364 | --- a/libgcc/config/microblaze/umodsi3.S | ||
365 | +++ b/libgcc/config/microblaze/umodsi3.S | ||
366 | @@ -46,7 +46,7 @@ | ||
367 | __umodsi3: | ||
368 | .frame r1,0,r15 | ||
369 | |||
370 | - addik r1,r1,-24 | ||
371 | + addlik r1,r1,-24 | ||
372 | sli r29,r1,0 | ||
373 | sli r30,r1,8 | ||
374 | sli r31,r1,16 | ||
375 | @@ -59,27 +59,77 @@ __umodsi3: | ||
376 | swi r30,r1,4 | ||
377 | swi r31,r1,8 | ||
378 | #endif | ||
379 | +#ifdef __arch64__ | ||
380 | + BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
381 | + BEAEQId r5,$LaResult_Is_Zero # Result is Zero | ||
382 | +#else | ||
383 | BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error | ||
384 | BEQId r5,$LaResult_Is_Zero # Result is Zero | ||
385 | +#endif | ||
386 | ADDIK r3,r0,0 # Clear div | ||
387 | ADDIK r30,r0,0 # clear mod | ||
388 | ADDIK r29,r0,32 # Initialize the loop count | ||
389 | |||
390 | # Check if r6 and r5 are equal # if yes, return 0 | ||
391 | rsub r18,r5,r6 | ||
392 | - beqi r18,$LaRETURN_HERE | ||
393 | |||
394 | +#ifdef __arch64__ | ||
395 | + beaeqi r18,$LaRETURN_HERE | ||
396 | +#else | ||
397 | + beqi r18,$LaRETURN_HERE | ||
398 | +#endif | ||
399 | # Check if (uns)r6 is greater than (uns)r5. In that case, just return r5 | ||
400 | xor r18,r5,r6 | ||
401 | +#ifdef __arch64__ | ||
402 | + beageid r18,16 | ||
403 | + addik r3,r5,0 | ||
404 | + bealti r6,$LaRETURN_HERE | ||
405 | + breai $LCheckr6 | ||
406 | + rsub r18,r5,r6 # MICROBLAZEcmp | ||
407 | + beagti r18,$LaRETURN_HERE | ||
408 | +#else | ||
409 | bgeid r18,16 | ||
410 | addik r3,r5,0 | ||
411 | blti r6,$LaRETURN_HERE | ||
412 | bri $LCheckr6 | ||
413 | rsub r18,r5,r6 # MICROBLAZEcmp | ||
414 | bgti r18,$LaRETURN_HERE | ||
415 | - | ||
416 | +#endif | ||
417 | # If r6 [bit 31] is set, then return result as r5-r6 | ||
418 | $LCheckr6: | ||
419 | +#ifdef __arch64__ | ||
420 | + beagtid r6,$LaDIV0 | ||
421 | + addik r3,r0,0 | ||
422 | + addik r18,r0,0x7fffffff | ||
423 | + and r5,r5,r18 | ||
424 | + and r6,r6,r18 | ||
425 | + breaid $LaRETURN_HERE | ||
426 | + rsub r3,r6,r5 | ||
427 | +# First part: try to find the first '1' in the r5 | ||
428 | +$LaDIV0: | ||
429 | + BEALTI r5,$LaDIV2 | ||
430 | +$LaDIV1: | ||
431 | + ADD r5,r5,r5 # left shift logical r5 | ||
432 | + BEAGEID r5,$LaDIV1 # | ||
433 | + ADDIK r29,r29,-1 | ||
434 | +$LaDIV2: | ||
435 | + ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry | ||
436 | + ADDC r3,r3,r3 # Move that bit into the Mod register | ||
437 | + rSUB r31,r6,r3 # Try to subtract (r3 a r6) | ||
438 | + BEALTi r31,$LaMOD_TOO_SMALL | ||
439 | + OR r3,r0,r31 # Move the r31 to mod since the result was positive | ||
440 | + ADDIK r30,r30,1 | ||
441 | +$LaMOD_TOO_SMALL: | ||
442 | + ADDIK r29,r29,-1 | ||
443 | + BEAEQi r29,$LaLOOP_END | ||
444 | + ADD r30,r30,r30 # Shift in the '1' into div | ||
445 | + BREAI $LaDIV2 # Div2 | ||
446 | +$LaLOOP_END: | ||
447 | + BREAI $LaRETURN_HERE | ||
448 | +$LaDiv_By_Zero: | ||
449 | +$LaResult_Is_Zero: | ||
450 | + or r3,r0,r0 # set result to 0 | ||
451 | +#else | ||
452 | bgtid r6,$LaDIV0 | ||
453 | addik r3,r0,0 | ||
454 | addik r18,r0,0x7fffffff | ||
455 | @@ -111,7 +161,7 @@ $LaLOOP_END: | ||
456 | $LaDiv_By_Zero: | ||
457 | $LaResult_Is_Zero: | ||
458 | or r3,r0,r0 # set result to 0 | ||
459 | - | ||
460 | +#endif | ||
461 | #ifdef __arch64__ | ||
462 | $LaRETURN_HERE: | ||
463 | # Restore values of CSRs and that of r3 and the divisor and the dividend | ||
464 | -- | ||
465 | 2.7.4 | ||
466 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch deleted file mode 100644 index be4dfad5..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | From 2f22090a7e8216f7a9f7e958b77ac83006a7ce89 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Tue, 16 Apr 2019 17:20:24 +0530 | ||
4 | Subject: [PATCH 59/61] Reverting the patch as kernel boot is not working with | ||
5 | this patch CR-1026413 Revert "[Patch,Microblaze]:reverting the cost check | ||
6 | before propagating constants." | ||
7 | |||
8 | This reverts commit 7156e379a67fa47a5fb9ede1448c0d528dbda65b. | ||
9 | --- | ||
10 | gcc/cprop.c | 4 ---- | ||
11 | 1 file changed, 4 deletions(-) | ||
12 | |||
13 | diff --git a/gcc/cprop.c b/gcc/cprop.c | ||
14 | index deb706b..e4df509 100644 | ||
15 | --- a/gcc/cprop.c | ||
16 | +++ b/gcc/cprop.c | ||
17 | @@ -733,7 +733,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
18 | int success = 0; | ||
19 | rtx set = single_set (insn); | ||
20 | |||
21 | -#if 0 | ||
22 | bool check_rtx_costs = true; | ||
23 | bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); | ||
24 | int old_cost = set ? set_rtx_cost (set, speed) : 0; | ||
25 | @@ -745,7 +744,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
26 | && (GET_CODE (XEXP (note, 0)) == CONST | ||
27 | || CONSTANT_P (XEXP (note, 0))))) | ||
28 | check_rtx_costs = false; | ||
29 | -#endif | ||
30 | |||
31 | /* Usually we substitute easy stuff, so we won't copy everything. | ||
32 | We however need to take care to not duplicate non-trivial CONST | ||
33 | @@ -754,7 +752,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
34 | |||
35 | validate_replace_src_group (from, to, insn); | ||
36 | |||
37 | -#if 0 | ||
38 | /* If TO is a constant, check the cost of the set after propagation | ||
39 | to the cost of the set before the propagation. If the cost is | ||
40 | higher, then do not replace FROM with TO. */ | ||
41 | @@ -767,7 +764,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) | ||
42 | return false; | ||
43 | } | ||
44 | |||
45 | -#endif | ||
46 | |||
47 | if (num_changes_pending () && apply_change_group ()) | ||
48 | success = 1; | ||
49 | -- | ||
50 | 2.7.4 | ||
51 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Author-Nagaraju-nmekala-xilinx.com.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Author-Nagaraju-nmekala-xilinx.com.patch deleted file mode 100644 index 690bc727..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0061-Author-Nagaraju-nmekala-xilinx.com.patch +++ /dev/null | |||
@@ -1,479 +0,0 @@ | |||
1 | From e1b8cfe6c0b4a0bd90ecbd3e85ae7114df21b6cc Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Thu, 18 Apr 2019 16:00:37 +0530 | ||
4 | Subject: [PATCH 61/62] Author: Nagaraju <nmekala@xilinx.com> Date: Wed Apr | ||
5 | 17 14:11:00 2019 +0530 | ||
6 | |||
7 | [Patch, microblaze]: MB-64 removal of barrel-shift instructions from default | ||
8 | By default MB-64 is generatting barrel-shift instructions. It has been | ||
9 | removed from default. Barrel-shift instructions will be generated only if | ||
10 | barrel-shifter is enabled. Similarly to double instructions as well. | ||
11 | |||
12 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | ||
13 | --- | ||
14 | gcc/config/microblaze/microblaze.c | 2 +- | ||
15 | gcc/config/microblaze/microblaze.md | 269 +++++++++++++++++++++++++++++++++--- | ||
16 | 2 files changed, 252 insertions(+), 19 deletions(-) | ||
17 | |||
18 | diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c | ||
19 | index 33d183e..c321b03 100644 | ||
20 | --- a/gcc/config/microblaze/microblaze.c | ||
21 | +++ b/gcc/config/microblaze/microblaze.c | ||
22 | @@ -3868,7 +3868,7 @@ microblaze_expand_divide (rtx operands[]) | ||
23 | emit_insn (gen_rtx_CLOBBER (Pmode, reg18)); | ||
24 | |||
25 | if (TARGET_MB_64) { | ||
26 | - emit_insn (gen_ashldi3_long (regt1, operands[1], GEN_INT(4))); | ||
27 | + emit_insn (gen_ashldi3 (regt1, operands[1], GEN_INT(4))); | ||
28 | emit_insn (gen_adddi3 (regt1, regt1, operands[2])); | ||
29 | } | ||
30 | else { | ||
31 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
32 | index 8bd175f..b5b60fb 100644 | ||
33 | --- a/gcc/config/microblaze/microblaze.md | ||
34 | +++ b/gcc/config/microblaze/microblaze.md | ||
35 | @@ -545,7 +545,7 @@ | ||
36 | [(set (match_operand:DF 0 "register_operand" "=d") | ||
37 | (plus:DF (match_operand:DF 1 "register_operand" "d") | ||
38 | (match_operand:DF 2 "register_operand" "d")))] | ||
39 | - "TARGET_MB_64" | ||
40 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
41 | "dadd\t%0,%1,%2" | ||
42 | [(set_attr "type" "fadd") | ||
43 | (set_attr "mode" "DF") | ||
44 | @@ -555,7 +555,7 @@ | ||
45 | [(set (match_operand:DF 0 "register_operand" "=d") | ||
46 | (minus:DF (match_operand:DF 1 "register_operand" "d") | ||
47 | (match_operand:DF 2 "register_operand" "d")))] | ||
48 | - "TARGET_MB_64" | ||
49 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
50 | "drsub\t%0,%2,%1" | ||
51 | [(set_attr "type" "frsub") | ||
52 | (set_attr "mode" "DF") | ||
53 | @@ -565,7 +565,7 @@ | ||
54 | [(set (match_operand:DF 0 "register_operand" "=d") | ||
55 | (mult:DF (match_operand:DF 1 "register_operand" "d") | ||
56 | (match_operand:DF 2 "register_operand" "d")))] | ||
57 | - "TARGET_MB_64" | ||
58 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
59 | "dmul\t%0,%1,%2" | ||
60 | [(set_attr "type" "fmul") | ||
61 | (set_attr "mode" "DF") | ||
62 | @@ -575,7 +575,7 @@ | ||
63 | [(set (match_operand:DF 0 "register_operand" "=d") | ||
64 | (div:DF (match_operand:DF 1 "register_operand" "d") | ||
65 | (match_operand:DF 2 "register_operand" "d")))] | ||
66 | - "TARGET_MB_64" | ||
67 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
68 | "ddiv\t%0,%2,%1" | ||
69 | [(set_attr "type" "fdiv") | ||
70 | (set_attr "mode" "DF") | ||
71 | @@ -585,7 +585,7 @@ | ||
72 | (define_insn "sqrtdf2" | ||
73 | [(set (match_operand:DF 0 "register_operand" "=d") | ||
74 | (sqrt:DF (match_operand:DF 1 "register_operand" "d")))] | ||
75 | - "TARGET_MB_64" | ||
76 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
77 | "dsqrt\t%0,%1" | ||
78 | [(set_attr "type" "fsqrt") | ||
79 | (set_attr "mode" "DF") | ||
80 | @@ -594,7 +594,7 @@ | ||
81 | (define_insn "floatdidf2" | ||
82 | [(set (match_operand:DF 0 "register_operand" "=d") | ||
83 | (float:DF (match_operand:DI 1 "register_operand" "d")))] | ||
84 | - "TARGET_MB_64" | ||
85 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
86 | "dbl\t%0,%1" | ||
87 | [(set_attr "type" "fcvt") | ||
88 | (set_attr "mode" "DF") | ||
89 | @@ -603,7 +603,7 @@ | ||
90 | (define_insn "fix_truncdfdi2" | ||
91 | [(set (match_operand:DI 0 "register_operand" "=d") | ||
92 | (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "d"))))] | ||
93 | - "TARGET_MB_64" | ||
94 | + "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" | ||
95 | "dlong\t%0,%1" | ||
96 | [(set_attr "type" "fcvt") | ||
97 | (set_attr "mode" "DI") | ||
98 | @@ -1299,6 +1299,34 @@ | ||
99 | (set_attr "mode" "DI") | ||
100 | (set_attr "length" "4")]) | ||
101 | |||
102 | +(define_insn "*movdi_internal2_bshift" | ||
103 | + [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d, d,d,R,m") | ||
104 | + (match_operand:DI 1 "move_src_operand" " d,I,Mnis,R,m,dJ,dJ"))] | ||
105 | + "TARGET_MB_64 && TARGET_BARREL_SHIFT" | ||
106 | + { | ||
107 | + switch (which_alternative) | ||
108 | + { | ||
109 | + case 0: | ||
110 | + return "addlk\t%0,%1,r0"; | ||
111 | + case 1: | ||
112 | + case 2: | ||
113 | + if (GET_CODE (operands[1]) == CONST_INT && | ||
114 | + (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888)) | ||
115 | + return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; | ||
116 | + else | ||
117 | + return "addlik\t%0,r0,%1"; | ||
118 | + case 3: | ||
119 | + case 4: | ||
120 | + return "ll%i1\t%0,%1"; | ||
121 | + case 5: | ||
122 | + case 6: | ||
123 | + return "sl%i0\t%z1,%0"; | ||
124 | + } | ||
125 | + } | ||
126 | + [(set_attr "type" "load,no_delay_load,no_delay_load,no_delay_load,no_delay_load,no_delay_store,no_delay_store") | ||
127 | + (set_attr "mode" "DI") | ||
128 | + (set_attr "length" "4,4,12,4,8,4,8")]) | ||
129 | + | ||
130 | (define_insn "*movdi_internal2" | ||
131 | [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d, d,d,R,m") | ||
132 | (match_operand:DI 1 "move_src_operand" " d,I,Mnis,R,m,dJ,dJ"))] | ||
133 | @@ -1312,7 +1340,15 @@ | ||
134 | case 2: | ||
135 | if (GET_CODE (operands[1]) == CONST_INT && | ||
136 | (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888)) | ||
137 | - return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; | ||
138 | + { | ||
139 | + operands[2] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
140 | + output_asm_insn ("addlik\t%0,r0,%h1", operands); | ||
141 | + output_asm_insn ("addlik\t%2,r0,32", operands); | ||
142 | + output_asm_insn ("addlik\t%2,%2,-1", operands); | ||
143 | + output_asm_insn ("beaneid\t%2,.-8", operands); | ||
144 | + output_asm_insn ("addlk\t%0,%0,%0", operands); | ||
145 | + return "addlik\t%0,%0,%j1 #li => la"; | ||
146 | + } | ||
147 | else | ||
148 | return "addlik\t%0,r0,%1"; | ||
149 | case 3: | ||
150 | @@ -1386,7 +1422,7 @@ | ||
151 | (define_insn "movdi_long_int" | ||
152 | [(set (match_operand:DI 0 "nonimmediate_operand" "=d") | ||
153 | (match_operand:DI 1 "general_operand" "i"))] | ||
154 | - "TARGET_MB_64" | ||
155 | + "TARGET_MB_64 && TARGET_BARREL_SHIFT" | ||
156 | "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; | ||
157 | [(set_attr "type" "no_delay_arith") | ||
158 | (set_attr "mode" "DI") | ||
159 | @@ -1653,6 +1689,33 @@ | ||
160 | ;; movdf_internal | ||
161 | ;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT | ||
162 | ;; | ||
163 | +(define_insn "*movdf_internal_64_bshift" | ||
164 | + [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m") | ||
165 | + (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))] | ||
166 | + "TARGET_MB_64 && TARGET_BARREL_SHIFT" | ||
167 | + { | ||
168 | + switch (which_alternative) | ||
169 | + { | ||
170 | + case 0: | ||
171 | + return "addlk\t%0,%1,r0"; | ||
172 | + case 1: | ||
173 | + return "addlk\t%0,r0,r0"; | ||
174 | + case 2: | ||
175 | + case 4: | ||
176 | + return "ll%i1\t%0,%1"; | ||
177 | + case 3: | ||
178 | + { | ||
179 | + return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo"; | ||
180 | + } | ||
181 | + case 5: | ||
182 | + return "sl%i0\t%1,%0"; | ||
183 | + } | ||
184 | + gcc_unreachable (); | ||
185 | + } | ||
186 | + [(set_attr "type" "no_delay_move,no_delay_move,no_delay_load,no_delay_load,no_delay_load,no_delay_store") | ||
187 | + (set_attr "mode" "DF") | ||
188 | + (set_attr "length" "4,4,4,16,4,4")]) | ||
189 | + | ||
190 | (define_insn "*movdf_internal_64" | ||
191 | [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m") | ||
192 | (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))] | ||
193 | @@ -1669,7 +1732,13 @@ | ||
194 | return "ll%i1\t%0,%1"; | ||
195 | case 3: | ||
196 | { | ||
197 | - return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo"; | ||
198 | + operands[2] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
199 | + output_asm_insn ("addlik\t%0,r0,%h1", operands); | ||
200 | + output_asm_insn ("addlik\t%2,r0,32", operands); | ||
201 | + output_asm_insn ("addlik\t%2,%2,-1", operands); | ||
202 | + output_asm_insn ("beaneid\t%2,.-8", operands); | ||
203 | + output_asm_insn ("addlk\t%0,%0,%0", operands); | ||
204 | + return "addlik\t%0,%0,%j1 #li => la"; | ||
205 | } | ||
206 | case 5: | ||
207 | return "sl%i0\t%1,%0"; | ||
208 | @@ -1789,11 +1858,21 @@ | ||
209 | "TARGET_MB_64" | ||
210 | { | ||
211 | ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) | ||
212 | -if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) | ||
213 | +if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT) | ||
214 | { | ||
215 | emit_insn(gen_ashldi3_long (operands[0], operands[1],operands[2])); | ||
216 | DONE; | ||
217 | } | ||
218 | +else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2])) | ||
219 | + { | ||
220 | + emit_insn(gen_ashldi3_const (operands[0], operands[1],operands[2])); | ||
221 | + DONE; | ||
222 | + } | ||
223 | +else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && GET_CODE (operands[2]) == REG) | ||
224 | + { | ||
225 | + emit_insn(gen_ashldi3_reg (operands[0], operands[1],operands[2])); | ||
226 | + DONE; | ||
227 | + } | ||
228 | else | ||
229 | FAIL; | ||
230 | } | ||
231 | @@ -1803,7 +1882,7 @@ else | ||
232 | [(set (match_operand:DI 0 "register_operand" "=d,d") | ||
233 | (ashift:DI (match_operand:DI 1 "register_operand" "d,d") | ||
234 | (match_operand:DI 2 "arith_operand" "I,d")))] | ||
235 | - "TARGET_MB_64" | ||
236 | + "TARGET_MB_64 && TARGET_BARREL_SHIFT" | ||
237 | "@ | ||
238 | bsllli\t%0,%1,%2 | ||
239 | bslll\t%0,%1,%2" | ||
240 | @@ -1811,6 +1890,51 @@ else | ||
241 | (set_attr "mode" "DI,DI") | ||
242 | (set_attr "length" "4,4")] | ||
243 | ) | ||
244 | + | ||
245 | +(define_insn "ashldi3_const" | ||
246 | + [(set (match_operand:DI 0 "register_operand" "=&d") | ||
247 | + (ashift:DI (match_operand:DI 1 "register_operand" "d") | ||
248 | + (match_operand:DI 2 "immediate_operand" "I")))] | ||
249 | + "TARGET_MB_64" | ||
250 | + { | ||
251 | + operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
252 | + | ||
253 | + output_asm_insn ("orli\t%3,r0,%2", operands); | ||
254 | + if (REGNO (operands[0]) != REGNO (operands[1])) | ||
255 | + output_asm_insn ("addlk\t%0,%1,r0", operands); | ||
256 | + | ||
257 | + output_asm_insn ("addlik\t%3,%3,-1", operands); | ||
258 | + output_asm_insn ("beaneid\t%3,.-8", operands); | ||
259 | + return "addlk\t%0,%0,%0"; | ||
260 | + } | ||
261 | + [(set_attr "type" "multi") | ||
262 | + (set_attr "mode" "DI") | ||
263 | + (set_attr "length" "20")] | ||
264 | +) | ||
265 | + | ||
266 | +(define_insn "ashldi3_reg" | ||
267 | + [(set (match_operand:DI 0 "register_operand" "=&d") | ||
268 | + (ashift:DI (match_operand:DI 1 "register_operand" "d") | ||
269 | + (match_operand:DI 2 "register_operand" "d")))] | ||
270 | + "TARGET_MB_64" | ||
271 | + { | ||
272 | + operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
273 | + output_asm_insn ("andli\t%3,%2,31", operands); | ||
274 | + if (REGNO (operands[0]) != REGNO (operands[1])) | ||
275 | + output_asm_insn ("addlk\t%0,r0,%1", operands); | ||
276 | + /* Exit the loop if zero shift. */ | ||
277 | + output_asm_insn ("beaeqid\t%3,.+24", operands); | ||
278 | + /* Emit the loop. */ | ||
279 | + output_asm_insn ("addlk\t%0,%0,r0", operands); | ||
280 | + output_asm_insn ("addlik\t%3,%3,-1", operands); | ||
281 | + output_asm_insn ("beaneid\t%3,.-8", operands); | ||
282 | + return "addlk\t%0,%0,%0"; | ||
283 | + } | ||
284 | + [(set_attr "type" "multi") | ||
285 | + (set_attr "mode" "DI") | ||
286 | + (set_attr "length" "28")] | ||
287 | +) | ||
288 | + | ||
289 | ;; The following patterns apply when there is no barrel shifter present | ||
290 | |||
291 | (define_insn "*ashlsi3_with_mul_delay" | ||
292 | @@ -1944,11 +2068,21 @@ else | ||
293 | "TARGET_MB_64" | ||
294 | { | ||
295 | ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) | ||
296 | -if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) | ||
297 | +if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT) | ||
298 | { | ||
299 | emit_insn(gen_ashrdi3_long (operands[0], operands[1],operands[2])); | ||
300 | DONE; | ||
301 | } | ||
302 | +else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2])) | ||
303 | + { | ||
304 | + emit_insn(gen_ashrdi3_const (operands[0], operands[1],operands[2])); | ||
305 | + DONE; | ||
306 | + } | ||
307 | +else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && GET_CODE (operands[2]) == REG) | ||
308 | + { | ||
309 | + emit_insn(gen_ashrdi3_reg (operands[0], operands[1],operands[2])); | ||
310 | + DONE; | ||
311 | + } | ||
312 | else | ||
313 | FAIL; | ||
314 | } | ||
315 | @@ -1958,7 +2092,7 @@ else | ||
316 | [(set (match_operand:DI 0 "register_operand" "=d,d") | ||
317 | (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d") | ||
318 | (match_operand:DI 2 "arith_operand" "I,d")))] | ||
319 | - "TARGET_MB_64" | ||
320 | + "TARGET_MB_64 && TARGET_BARREL_SHIFT" | ||
321 | "@ | ||
322 | bslrai\t%0,%1,%2 | ||
323 | bslra\t%0,%1,%2" | ||
324 | @@ -1966,6 +2100,51 @@ else | ||
325 | (set_attr "mode" "DI,DI") | ||
326 | (set_attr "length" "4,4")] | ||
327 | ) | ||
328 | + | ||
329 | +(define_insn "ashrdi3_const" | ||
330 | + [(set (match_operand:DI 0 "register_operand" "=&d") | ||
331 | + (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") | ||
332 | + (match_operand:DI 2 "immediate_operand" "I")))] | ||
333 | + "TARGET_MB_64" | ||
334 | + { | ||
335 | + operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
336 | + | ||
337 | + output_asm_insn ("orli\t%3,r0,%2", operands); | ||
338 | + if (REGNO (operands[0]) != REGNO (operands[1])) | ||
339 | + output_asm_insn ("addlk\t%0,%1,r0", operands); | ||
340 | + | ||
341 | + output_asm_insn ("addlik\t%3,%3,-1", operands); | ||
342 | + output_asm_insn ("beaneid\t%3,.-8", operands); | ||
343 | + return "srla\t%0,%0"; | ||
344 | + } | ||
345 | + [(set_attr "type" "arith") | ||
346 | + (set_attr "mode" "DI") | ||
347 | + (set_attr "length" "20")] | ||
348 | +) | ||
349 | + | ||
350 | +(define_insn "ashrdi3_reg" | ||
351 | + [(set (match_operand:DI 0 "register_operand" "=&d") | ||
352 | + (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") | ||
353 | + (match_operand:DI 2 "register_operand" "d")))] | ||
354 | + "TARGET_MB_64" | ||
355 | + { | ||
356 | + operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
357 | + output_asm_insn ("andli\t%3,%2,31", operands); | ||
358 | + if (REGNO (operands[0]) != REGNO (operands[1])) | ||
359 | + output_asm_insn ("addlk\t%0,r0,%1", operands); | ||
360 | + /* Exit the loop if zero shift. */ | ||
361 | + output_asm_insn ("beaeqid\t%3,.+24", operands); | ||
362 | + /* Emit the loop. */ | ||
363 | + output_asm_insn ("addlk\t%0,%0,r0", operands); | ||
364 | + output_asm_insn ("addlik\t%3,%3,-1", operands); | ||
365 | + output_asm_insn ("beaneid\t%3,.-8", operands); | ||
366 | + return "srla\t%0,%0"; | ||
367 | + } | ||
368 | + [(set_attr "type" "multi") | ||
369 | + (set_attr "mode" "DI") | ||
370 | + (set_attr "length" "28")] | ||
371 | +) | ||
372 | + | ||
373 | (define_expand "ashrsi3" | ||
374 | [(set (match_operand:SI 0 "register_operand" "=&d") | ||
375 | (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") | ||
376 | @@ -2083,11 +2262,21 @@ else | ||
377 | "TARGET_MB_64" | ||
378 | { | ||
379 | ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) | ||
380 | -if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) | ||
381 | +if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT) | ||
382 | { | ||
383 | emit_insn(gen_lshrdi3_long (operands[0], operands[1],operands[2])); | ||
384 | DONE; | ||
385 | } | ||
386 | +else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2])) | ||
387 | + { | ||
388 | + emit_insn(gen_lshrdi3_const (operands[0], operands[1],operands[2])); | ||
389 | + DONE; | ||
390 | + } | ||
391 | +else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && GET_CODE (operands[2]) == REG) | ||
392 | + { | ||
393 | + emit_insn(gen_lshrdi3_reg (operands[0], operands[1],operands[2])); | ||
394 | + DONE; | ||
395 | + } | ||
396 | else | ||
397 | FAIL; | ||
398 | } | ||
399 | @@ -2097,7 +2286,7 @@ else | ||
400 | [(set (match_operand:DI 0 "register_operand" "=d,d") | ||
401 | (lshiftrt:DI (match_operand:DI 1 "register_operand" "d,d") | ||
402 | (match_operand:DI 2 "arith_operand" "I,d")))] | ||
403 | - "TARGET_MB_64" | ||
404 | + "TARGET_MB_64 && TARGET_BARREL_SHIFT" | ||
405 | "@ | ||
406 | bslrli\t%0,%1,%2 | ||
407 | bslrl\t%0,%1,%2" | ||
408 | @@ -2106,6 +2295,50 @@ else | ||
409 | (set_attr "length" "4,4")] | ||
410 | ) | ||
411 | |||
412 | +(define_insn "lshrdi3_const" | ||
413 | + [(set (match_operand:DI 0 "register_operand" "=&d") | ||
414 | + (lshiftrt:DI (match_operand:DI 1 "register_operand" "d") | ||
415 | + (match_operand:DI 2 "immediate_operand" "I")))] | ||
416 | + "TARGET_MB_64" | ||
417 | + { | ||
418 | + operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
419 | + | ||
420 | + output_asm_insn ("orli\t%3,r0,%2", operands); | ||
421 | + if (REGNO (operands[0]) != REGNO (operands[1])) | ||
422 | + output_asm_insn ("addlk\t%0,%1,r0", operands); | ||
423 | + | ||
424 | + output_asm_insn ("addlik\t%3,%3,-1", operands); | ||
425 | + output_asm_insn ("beaneid\t%3,.-8", operands); | ||
426 | + return "srll\t%0,%0"; | ||
427 | + } | ||
428 | + [(set_attr "type" "multi") | ||
429 | + (set_attr "mode" "DI") | ||
430 | + (set_attr "length" "20")] | ||
431 | +) | ||
432 | + | ||
433 | +(define_insn "lshrdi3_reg" | ||
434 | + [(set (match_operand:DI 0 "register_operand" "=&d") | ||
435 | + (lshiftrt:DI (match_operand:DI 1 "register_operand" "d") | ||
436 | + (match_operand:DI 2 "register_operand" "d")))] | ||
437 | + "TARGET_MB_64" | ||
438 | + { | ||
439 | + operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); | ||
440 | + output_asm_insn ("andli\t%3,%2,31", operands); | ||
441 | + if (REGNO (operands[0]) != REGNO (operands[1])) | ||
442 | + output_asm_insn ("addlk\t%0,r0,%1", operands); | ||
443 | + /* Exit the loop if zero shift. */ | ||
444 | + output_asm_insn ("beaeqid\t%3,.+24", operands); | ||
445 | + /* Emit the loop. */ | ||
446 | + output_asm_insn ("addlk\t%0,%0,r0", operands); | ||
447 | + output_asm_insn ("addlik\t%3,%3,-1", operands); | ||
448 | + output_asm_insn ("beaneid\t%3,.-8", operands); | ||
449 | + return "srll\t%0,%0"; | ||
450 | + } | ||
451 | + [(set_attr "type" "multi") | ||
452 | + (set_attr "mode" "SI") | ||
453 | + (set_attr "length" "28")] | ||
454 | +) | ||
455 | + | ||
456 | (define_expand "lshrsi3" | ||
457 | [(set (match_operand:SI 0 "register_operand" "=&d") | ||
458 | (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") | ||
459 | @@ -2233,7 +2466,7 @@ else | ||
460 | (eq:DI | ||
461 | (match_operand:DI 1 "register_operand" "d") | ||
462 | (match_operand:DI 2 "register_operand" "d")))] | ||
463 | - "TARGET_MB_64" | ||
464 | + "TARGET_MB_64 && TARGET_PATTERN_COMPARE" | ||
465 | "pcmpleq\t%0,%1,%2" | ||
466 | [(set_attr "type" "arith") | ||
467 | (set_attr "mode" "DI") | ||
468 | @@ -2245,7 +2478,7 @@ else | ||
469 | (ne:DI | ||
470 | (match_operand:DI 1 "register_operand" "d") | ||
471 | (match_operand:DI 2 "register_operand" "d")))] | ||
472 | - "TARGET_MB_64" | ||
473 | + "TARGET_MB_64 && TARGET_PATTERN_COMPARE" | ||
474 | "pcmplne\t%0,%1,%2" | ||
475 | [(set_attr "type" "arith") | ||
476 | (set_attr "mode" "DI") | ||
477 | -- | ||
478 | 2.7.4 | ||
479 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch deleted file mode 100644 index e7dfa89c..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | From 612e6579116e6714417ea21e6c13b0968bb6aac2 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Wed, 8 May 2019 14:12:03 +0530 | ||
4 | Subject: [PATCH 62/62] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and | ||
5 | disable fivopts by default | ||
6 | |||
7 | Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default. | ||
8 | |||
9 | * gcc/common/config/microblaze/microblaze-common.c | ||
10 | (microblaze_option_optimization_table): Disable fivopts by default. | ||
11 | |||
12 | Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> | ||
13 | --- | ||
14 | gcc/common/config/microblaze/microblaze-common.c | 6 ++++-- | ||
15 | 1 file changed, 4 insertions(+), 2 deletions(-) | ||
16 | |||
17 | diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c | ||
18 | index fe45f2e..2873d4b 100644 | ||
19 | --- a/gcc/common/config/microblaze/microblaze-common.c | ||
20 | +++ b/gcc/common/config/microblaze/microblaze-common.c | ||
21 | @@ -27,13 +27,15 @@ | ||
22 | /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */ | ||
23 | static const struct default_options microblaze_option_optimization_table[] = | ||
24 | { | ||
25 | - /* Turn off ivopts by default. It messes up cse. */ | ||
26 | + /* Turn off ivopts by default. It messes up cse. | ||
27 | + { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, */ | ||
28 | { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 }, | ||
29 | - { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, | ||
30 | { OPT_LEVELS_NONE, 0, NULL, 0 } | ||
31 | }; | ||
32 | |||
33 | #undef TARGET_DEFAULT_TARGET_FLAGS | ||
34 | #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT | ||
35 | |||
36 | +#undef TARGET_OPTION_OPTIMIZATION_TABLE | ||
37 | +#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table | ||
38 | struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; | ||
39 | -- | ||
40 | 2.7.4 | ||
41 | |||
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend index 2f80661a..79b895fc 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend +++ b/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend | |||
@@ -1,69 +1,63 @@ | |||
1 | # Add MicroBlaze Patches (only when using MicroBlaze) | 1 | # Add MicroBlaze Patches (only when using MicroBlaze) |
2 | FILESEXTRAPATHS_append_microblaze := ":${THISDIR}/gcc-9" | 2 | FILESEXTRAPATHS_append_microblaze := ":${THISDIR}/gcc-10" |
3 | |||
3 | SRC_URI_append_microblaze = " \ | 4 | SRC_URI_append_microblaze = " \ |
4 | file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \ | 5 | file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \ |
5 | file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \ | 6 | file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \ |
6 | file://0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch \ | 7 | file://0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch \ |
7 | file://0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \ | 8 | file://0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \ |
8 | file://0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \ | 9 | file://0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \ |
9 | file://0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch \ | 10 | file://0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch \ |
10 | file://0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \ | 11 | file://0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \ |
11 | file://0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \ | 12 | file://0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \ |
12 | file://0009-Patch-microblaze-Fix-atomic-side-effects.patch \ | 13 | file://0009-Patch-microblaze-Fix-atomic-side-effects.patch \ |
13 | file://0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch \ | 14 | file://0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch \ |
14 | file://0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \ | 15 | file://0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \ |
15 | file://0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \ | 16 | file://0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \ |
16 | file://0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch \ | 17 | file://0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch \ |
17 | file://0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch \ | 18 | file://0014-Patch-microblaze-Disable-fivopts-by-default.patch \ |
18 | file://0015-Patch-microblaze-Disable-fivopts-by-default.patch \ | 19 | file://0015-Patch-microblaze-Removed-moddi3-routinue.patch \ |
19 | file://0016-Patch-microblaze-Removed-moddi3-routinue.patch \ | 20 | file://0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch \ |
20 | file://0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch \ | 21 | file://0017-Patch-microblaze-Add-optimized-lshrsi3.patch \ |
21 | file://0018-Patch-microblaze-Add-optimized-lshrsi3.patch \ | 22 | file://0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \ |
22 | file://0019-Patch-microblaze-Modified-trap-instruction.patch \ | 23 | file://0019-Patch-microblaze-Add-cbranchsi4_reg.patch \ |
23 | file://0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \ | 24 | file://0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \ |
24 | file://0021-Patch-microblaze-Add-cbranchsi4_reg.patch \ | 25 | file://0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch \ |
25 | file://0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \ | 26 | file://0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \ |
26 | file://0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch \ | 27 | file://0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \ |
27 | file://0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \ | 28 | file://0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \ |
28 | file://0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \ | 29 | file://0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch \ |
29 | file://0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \ | 30 | file://0026-Patch-microblaze-Correct-the-const-high-double-immed.patch \ |
30 | file://0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch \ | 31 | file://0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \ |
31 | file://0028-Patch-microblaze-Correct-the-const-high-double-immed.patch \ | 32 | file://0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \ |
32 | file://0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \ | 33 | file://0029-Patch-microblaze-Add-new-bit-field-instructions.patch \ |
33 | file://0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \ | 34 | file://0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \ |
34 | file://0031-Patch-microblaze-Add-new-bit-field-instructions.patch \ | 35 | file://0031-Fixing-the-issue-with-the-builtin_alloc.patch \ |
35 | file://0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \ | 36 | file://0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \ |
36 | file://0033-Fixing-the-bug-in-the-bit-field-instruction.patch \ | 37 | file://0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \ |
37 | file://0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch \ | 38 | file://0034-Intial-commit-of-64-bit-Microblaze.patch \ |
38 | file://0035-Fixing-the-issue-with-the-builtin_alloc.patch \ | 39 | file://0035-Intial-commit-for-64bit-MB-sources.patch \ |
39 | file://0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch \ | 40 | file://0036-re-arrangement-of-the-compare-branches.patch \ |
40 | file://0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \ | 41 | file://0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch \ |
41 | file://0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \ | 42 | file://0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch \ |
42 | file://0039-Intial-commit-of-64-bit-Microblaze.patch \ | 43 | file://0039-Fix-various-issues.patch \ |
43 | file://0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch \ | 44 | file://0040-Fixed-below-issues.patch \ |
44 | file://0041-Intial-commit-for-64bit-MB-sources.patch \ | 45 | file://0041-Fix-various.patch \ |
45 | file://0042-re-arrangement-of-the-compare-branches.patch \ | 46 | file://0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \ |
46 | file://0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch \ | 47 | file://0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \ |
47 | file://0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch \ | 48 | file://0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch \ |
48 | file://0045-Fixed-issues-like.patch \ | 49 | file://0045-fixing-the-typo-errors-in-umodsi3-file.patch \ |
49 | file://0046-Fixed-below-issues.patch \ | 50 | file://0046-fixing-the-32bit-LTO-related-issue9-1014024.patch \ |
50 | file://0047-Added-double-arith-instructions.patch \ | 51 | file://0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \ |
51 | file://0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \ | 52 | file://0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \ |
52 | file://0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \ | 53 | file://0049-fixing-the-long-long-long-mingw-toolchain-issue.patch \ |
53 | file://0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch \ | 54 | file://0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch \ |
54 | file://0051-fixing-the-typo-errors-in-umodsi3-file.patch \ | 55 | file://0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch \ |
55 | file://0052-fixing-the-32bit-LTO-related-issue9-1014024.patch \ | 56 | file://0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \ |
56 | file://0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \ | 57 | file://0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch \ |
57 | file://0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \ | 58 | file://0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \ |
58 | file://0055-fixing-the-long-long-long-mingw-toolchain-issue.patch \ | 59 | file://0055-Added-new-MB-64-single-register-arithmetic-instructi.patch \ |
59 | file://0056-Fix-the-MB-64-bug-of-handling-QI-objects.patch \ | 60 | file://0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \ |
60 | file://0057-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch \ | 61 | file://0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \ |
61 | file://0058-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch \ | 62 | file://0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch \ |
62 | file://0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \ | ||
63 | file://0060-Author-Nagaraju-nmekala-xilinx.com.patch \ | ||
64 | file://0061-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \ | ||
65 | file://0062-Added-new-MB-64-single-register-arithmetic-instructi.patch \ | ||
66 | file://0063-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \ | ||
67 | file://0064-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \ | ||
68 | file://0065-microblaze-multilib-hack.patch \ | ||
69 | " | 63 | " |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc index 4db9957c..906ef4db 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc +++ b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc | |||
@@ -5,43 +5,35 @@ LTTNGUST_microblaze = "" | |||
5 | FILESEXTRAPATHS_append := ":${THISDIR}/gdb" | 5 | FILESEXTRAPATHS_append := ":${THISDIR}/gdb" |
6 | 6 | ||
7 | SRC_URI_append_microblaze = " \ | 7 | SRC_URI_append_microblaze = " \ |
8 | file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ | 8 | file://0001-sim-Allow-microblaze-architecture.patch \ |
9 | file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \ | 9 | file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ |
10 | file://0004-Fix-relaxation-of-assembler-resolved-references.patch \ | 10 | file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \ |
11 | file://0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch \ | 11 | file://0005-Fix-relaxation-of-assembler-resolved-references.patch \ |
12 | file://0006-upstream-change-to-garbage-collection-sweep-causes-m.patch \ | 12 | file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \ |
13 | file://0007-Fix-bug-in-TLSTPREL-Relocation.patch \ | 13 | file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \ |
14 | file://0008-Added-Address-extension-instructions.patch \ | 14 | file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \ |
15 | file://0009-fixing-the-MAX_OPCODES-to-correct-value.patch \ | 15 | file://0009-Added-Address-extension-instructions.patch \ |
16 | file://0010-Add-new-bit-field-instructions.patch \ | 16 | file://0010-Add-new-bit-field-instructions.patch \ |
17 | file://0011-fixing-the-imm-bug.patch \ | 17 | file://0011-fixing-the-imm-bug.patch \ |
18 | file://0015-intial-commit-of-MB-64-bit.patch \ | 18 | file://0015-intial-commit-of-MB-64-bit.patch \ |
19 | file://0016-MB-X-initial-commit.patch \ | 19 | file://0016-MB-X-initial-commit.patch \ |
20 | file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \ | 20 | file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \ |
21 | file://0018-Added-relocations-for-MB-X.patch \ | 21 | file://0018-Added-relocations-for-MB-X.patch \ |
22 | file://0019-Fixed-MB-x-relocation-issues.patch \ | 22 | file://0019-Update-MB-x.patch \ |
23 | file://0020-Fixing-the-branch-related-issues.patch \ | 23 | file://0020-Various-fixes.patch \ |
24 | file://0021-Fixed-address-computation-issues-with-64bit-address.patch \ | 24 | file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \ |
25 | file://0022-Adding-new-relocation-to-support-64bit-rodata.patch \ | 25 | file://0022-fixing-the-.bss-relocation-issue.patch \ |
26 | file://0023-fixing-the-.bss-relocation-issue.patch \ | 26 | file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \ |
27 | file://0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \ | 27 | file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \ |
28 | file://0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch \ | 28 | file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \ |
29 | file://0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch \ | 29 | file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \ |
30 | file://0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch \ | 30 | file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \ |
31 | file://0029-fixing-the-long-long-long-mingw-toolchain-issue.patch \ | 31 | file://0033-Fix-various-compile-warnings.patch \ |
32 | file://0030-Added-support-to-new-arithmetic-single-register-inst.patch \ | 32 | file://0034-Add-initial-port-of-linux-gdbserver.patch \ |
33 | file://0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \ | 33 | file://0035-Initial-port-of-core-reading-support.patch \ |
34 | file://0032-Add-initial-port-of-linux-gdbserver.patch \ | 34 | file://0036-Fix-debug-message-when-register-is-unavailable.patch \ |
35 | file://0033-Initial-port-of-core-reading-support.patch \ | 35 | file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \ |
36 | file://0034-Fix-debug-message-when-register-is-unavailable.patch \ | 36 | file://0038-Initial-support-for-native-gdb.patch \ |
37 | file://0035-revert-master-rebase-changes-to-gdbserver.patch \ | 37 | file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \ |
38 | file://0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch \ | 38 | file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \ |
39 | file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \ | ||
40 | file://0038-Initial-support-for-native-gdb.patch \ | ||
41 | file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \ | ||
42 | file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \ | ||
43 | file://0041-patch-MicroBlaze-porting-GDB-for-linux.patch \ | ||
44 | file://0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \ | ||
45 | file://0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \ | ||
46 | file://0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch \ | ||
47 | " | 39 | " |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch new file mode 100644 index 00000000..6f054720 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch | |||
@@ -0,0 +1,40 @@ | |||
1 | From d23be47051b4410e2e74c6db6bf9a1a9f7195f6d Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
3 | Date: Thu, 6 Aug 2020 15:37:52 -0500 | ||
4 | Subject: [PATCH 01/40] sim: Allow microblaze* architecture | ||
5 | |||
6 | Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
7 | --- | ||
8 | sim/configure | 2 +- | ||
9 | sim/configure.tgt | 2 +- | ||
10 | 2 files changed, 2 insertions(+), 2 deletions(-) | ||
11 | |||
12 | diff --git a/sim/configure b/sim/configure | ||
13 | index 72f95cd5c7a..9e28cc78687 100755 | ||
14 | --- a/sim/configure | ||
15 | +++ b/sim/configure | ||
16 | @@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64" | ||
17 | |||
18 | |||
19 | ;; | ||
20 | - microblaze-*-*) | ||
21 | + microblaze*-*-*) | ||
22 | |||
23 | sim_arch=microblaze | ||
24 | subdirs="$subdirs microblaze" | ||
25 | diff --git a/sim/configure.tgt b/sim/configure.tgt | ||
26 | index 8a8e03d96f4..f6743fe8d41 100644 | ||
27 | --- a/sim/configure.tgt | ||
28 | +++ b/sim/configure.tgt | ||
29 | @@ -59,7 +59,7 @@ case "${target}" in | ||
30 | mcore-*-*) | ||
31 | SIM_ARCH(mcore) | ||
32 | ;; | ||
33 | - microblaze-*-*) | ||
34 | + microblaze*-*-*) | ||
35 | SIM_ARCH(microblaze) | ||
36 | ;; | ||
37 | mips*-*-*) | ||
38 | -- | ||
39 | 2.17.1 | ||
40 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch index 4b85d7c9..6967a3d7 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From f1cb2126c751d6c2526ea969918d5b51dd5b851f Mon Sep 17 00:00:00 2001 | 1 | From d7a3a238edac153f391a65ae45215a117d25bc48 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | 2 | From: David Holsgrove <david.holsgrove@xilinx.com> |
3 | Date: Wed, 8 May 2013 11:03:36 +1000 | 3 | Date: Wed, 8 May 2013 11:03:36 +1000 |
4 | Subject: [PATCH 01/43] Add wdc.ext.clear and wdc.ext.flush insns | 4 | Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns |
5 | 5 | ||
6 | Added two new instructions, wdc.ext.clear and wdc.ext.flush, | 6 | Added two new instructions, wdc.ext.clear and wdc.ext.flush, |
7 | to enable MicroBlaze to flush an external cache, which is | 7 | to enable MicroBlaze to flush an external cache, which is |
@@ -15,7 +15,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
15 | 2 files changed, 6 insertions(+), 3 deletions(-) | 15 | 2 files changed, 6 insertions(+), 3 deletions(-) |
16 | 16 | ||
17 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 17 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
18 | index 62ee3c9a4d..865151f95b 100644 | 18 | index 62ee3c9a4d1..865151f95b0 100644 |
19 | --- a/opcodes/microblaze-opc.h | 19 | --- a/opcodes/microblaze-opc.h |
20 | +++ b/opcodes/microblaze-opc.h | 20 | +++ b/opcodes/microblaze-opc.h |
21 | @@ -91,6 +91,7 @@ | 21 | @@ -91,6 +91,7 @@ |
@@ -46,7 +46,7 @@ index 62ee3c9a4d..865151f95b 100644 | |||
46 | {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, | 46 | {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, |
47 | {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, | 47 | {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, |
48 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 48 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
49 | index 5a2d3b0c8b..42f3dd3be5 100644 | 49 | index 5a2d3b0c8bb..42f3dd3be53 100644 |
50 | --- a/opcodes/microblaze-opcm.h | 50 | --- a/opcodes/microblaze-opcm.h |
51 | +++ b/opcodes/microblaze-opcm.h | 51 | +++ b/opcodes/microblaze-opcm.h |
52 | @@ -33,8 +33,8 @@ enum microblaze_instr | 52 | @@ -33,8 +33,8 @@ enum microblaze_instr |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch index 53415370..78e10261 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 68fe2e975f229cce08029b3a5afb06132f1cb31c Mon Sep 17 00:00:00 2001 | 1 | From 2e87167d8c5d40d8dfbd8d879d78ab0bd6f3bdfd Mon Sep 17 00:00:00 2001 |
2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> | 2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> |
3 | Date: Fri, 22 Jun 2012 01:20:20 +0200 | 3 | Date: Fri, 22 Jun 2012 01:20:20 +0200 |
4 | Subject: [PATCH 03/43] Disable the warning message for eh_frame_hdr | 4 | Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr |
5 | 5 | ||
6 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 6 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
7 | --- | 7 | --- |
@@ -9,7 +9,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | |||
9 | 1 file changed, 3 insertions(+) | 9 | 1 file changed, 3 insertions(+) |
10 | 10 | ||
11 | diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c | 11 | diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c |
12 | index a13e81ebb8..1824ba6e5b 100644 | 12 | index b622ffcee2a..26b180f1490 100644 |
13 | --- a/bfd/elf-eh-frame.c | 13 | --- a/bfd/elf-eh-frame.c |
14 | +++ b/bfd/elf-eh-frame.c | 14 | +++ b/bfd/elf-eh-frame.c |
15 | @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, | 15 | @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch index 7ba07a0c..d851c589 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-relaxation-of-assembler-resolved-references.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch | |||
@@ -1,17 +1,17 @@ | |||
1 | From 1ea25f31c38e606603bf406efebfb6cfc26aec38 Mon Sep 17 00:00:00 2001 | 1 | From 210bb23010e2c3e65f5f54c220d27da0590bab06 Mon Sep 17 00:00:00 2001 |
2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> | 2 | From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> |
3 | Date: Tue, 14 Feb 2012 01:00:22 +0100 | 3 | Date: Tue, 14 Feb 2012 01:00:22 +0100 |
4 | Subject: [PATCH 04/43] Fix relaxation of assembler resolved references | 4 | Subject: [PATCH 05/40] Fix relaxation of assembler resolved references |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/elf32-microblaze.c | 38 ++++++++++++++++++++++++++++++++++++++ | 7 | bfd/elf32-microblaze.c | 41 ++++++++++++++++++++++++++++++++++++++ |
8 | 2 files changed, 39 insertions(+) | 8 | 2 files changed, 42 insertions(+) |
9 | 9 | ||
10 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 10 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
11 | index e3c8027248..359484dd5e 100644 | 11 | index c187d83ee04..dfd82438e35 100644 |
12 | --- a/bfd/elf32-microblaze.c | 12 | --- a/bfd/elf32-microblaze.c |
13 | +++ b/bfd/elf32-microblaze.c | 13 | +++ b/bfd/elf32-microblaze.c |
14 | @@ -1973,6 +1973,44 @@ microblaze_elf_relax_section (bfd *abfd, | 14 | @@ -1973,6 +1973,47 @@ microblaze_elf_relax_section (bfd *abfd, |
15 | irelscanend = irelocs + o->reloc_count; | 15 | irelscanend = irelocs + o->reloc_count; |
16 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 16 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
17 | { | 17 | { |
@@ -44,9 +44,12 @@ index e3c8027248..359484dd5e 100644 | |||
44 | + elf_section_data (o)->this_hdr.contents = ocontents; | 44 | + elf_section_data (o)->this_hdr.contents = ocontents; |
45 | + } | 45 | + } |
46 | + } | 46 | + } |
47 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend | ||
48 | + + isym->st_value, sec); | ||
49 | + val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); | 47 | + val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); |
48 | + if (val != irelscan->r_addend) { | ||
49 | + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); | ||
50 | + } | ||
51 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend | ||
52 | + + isym->st_value, 0, sec); | ||
50 | + microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 53 | + microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
51 | + irelscan->r_addend); | 54 | + irelscan->r_addend); |
52 | + } | 55 | + } |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch index 18646195..eea29059 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch | |||
@@ -1,10 +1,12 @@ | |||
1 | From 62859c17077c559ad5e5db1cfbb496d5e8c3da68 Mon Sep 17 00:00:00 2001 | 1 | From d2aee40b9753b783853bf38d36d9b6e50d16cc20 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 6 Feb 2017 15:53:08 +0530 | 3 | Date: Mon, 6 Feb 2017 15:53:08 +0530 |
4 | Subject: [PATCH 05/43] [LOCAL]: Fixup debug_loc sections after linker | 4 | Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker |
5 | relaxation Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing reloc | 5 | relaxation |
6 | info from the assembler to the linker when the linker manages to fully | 6 | |
7 | resolve a local symbol reference. | 7 | Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing |
8 | reloc info from the assembler to the linker when the linker | ||
9 | manages to fully resolve a local symbol reference. | ||
8 | 10 | ||
9 | This is a workaround for design flaws in the assembler to | 11 | This is a workaround for design flaws in the assembler to |
10 | linker interface with regards to linker relaxation. | 12 | linker interface with regards to linker relaxation. |
@@ -12,44 +14,37 @@ linker interface with regards to linker relaxation. | |||
12 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 14 | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> |
13 | Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> | 15 | Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> |
14 | --- | 16 | --- |
15 | bfd/bfd-in2.h | 9 +++++-- | 17 | bfd/bfd-in2.h | 5 +++++ |
16 | bfd/elf32-microblaze.c | 53 ++++++++++++++++++++++++++++---------- | 18 | bfd/elf32-microblaze.c | 39 +++++++++++++++++++++++++++++++------- |
17 | bfd/libbfd.h | 1 + | 19 | bfd/libbfd.h | 1 + |
18 | bfd/reloc.c | 6 +++++ | 20 | bfd/reloc.c | 6 ++++++ |
19 | include/elf/microblaze.h | 2 ++ | 21 | include/elf/microblaze.h | 1 + |
20 | 7 files changed, 64 insertions(+), 16 deletions(-) | 22 | 7 files changed, 52 insertions(+), 7 deletions(-) |
21 | 23 | ||
22 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 24 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
23 | index e25da50aaf..721531886a 100644 | 25 | index 6f3e41da376..52c81b10b6d 100644 |
24 | --- a/bfd/bfd-in2.h | 26 | --- a/bfd/bfd-in2.h |
25 | +++ b/bfd/bfd-in2.h | 27 | +++ b/bfd/bfd-in2.h |
26 | @@ -5866,10 +5866,15 @@ value relative to the read-write small data area anchor */ | 28 | @@ -5363,6 +5363,11 @@ value relative to the read-write small data area anchor */ |
27 | expressions of the form "Symbol Op Symbol" */ | 29 | expressions of the form "Symbol Op Symbol" */ |
28 | BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, | 30 | BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, |
29 | 31 | ||
30 | -/* This is a 64 bit reloc that stores the 32 bit pc relative | ||
31 | +/* This is a 32 bit reloc that stores the 32 bit pc relative | 32 | +/* This is a 32 bit reloc that stores the 32 bit pc relative |
32 | value in two words (with an imm instruction). No relocation is | 33 | +value in two words (with an imm instruction). No relocation is |
33 | done here - only used for relaxing */ | 34 | +done here - only used for relaxing */ |
34 | - BFD_RELOC_MICROBLAZE_64_NONE, | ||
35 | + BFD_RELOC_MICROBLAZE_32_NONE, | 35 | + BFD_RELOC_MICROBLAZE_32_NONE, |
36 | + | 36 | + |
37 | +/* This is a 64 bit reloc that stores the 32 bit pc relative | ||
38 | + * +value in two words (with an imm instruction). No relocation is | ||
39 | + * +done here - only used for relaxing */ | ||
40 | + BFD_RELOC_MICROBLAZE_64_NONE, | ||
41 | |||
42 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 37 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
43 | value in two words (with an imm instruction). The relocation is | 38 | value in two words (with an imm instruction). No relocation is |
39 | done here - only used for relaxing */ | ||
44 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 40 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
45 | index 359484dd5e..1c69c269c7 100644 | 41 | index dfd82438e35..cbba704e691 100644 |
46 | --- a/bfd/elf32-microblaze.c | 42 | --- a/bfd/elf32-microblaze.c |
47 | +++ b/bfd/elf32-microblaze.c | 43 | +++ b/bfd/elf32-microblaze.c |
48 | @@ -176,7 +176,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 44 | @@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
49 | 0x0000ffff, /* Dest Mask. */ | 45 | 0x0000ffff, /* Dest Mask. */ |
50 | FALSE), /* PC relative offset? */ | 46 | FALSE), /* PC relative offset? */ |
51 | 47 | ||
52 | - /* This reloc does nothing. Used for relaxation. */ | ||
53 | + HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ | 48 | + HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ |
54 | + 0, /* Rightshift. */ | 49 | + 0, /* Rightshift. */ |
55 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ | 50 | + 2, /* Size (0 = byte, 1 = short, 2 = long). */ |
@@ -64,10 +59,9 @@ index 359484dd5e..1c69c269c7 100644 | |||
64 | + 0, /* Dest Mask. */ | 59 | + 0, /* Dest Mask. */ |
65 | + FALSE), /* PC relative offset? */ | 60 | + FALSE), /* PC relative offset? */ |
66 | + | 61 | + |
67 | + /* This reloc does nothing. Used for relaxation. */ | 62 | /* This reloc does nothing. Used for relaxation. */ |
68 | HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ | 63 | HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ |
69 | 0, /* Rightshift. */ | 64 | 0, /* Rightshift. */ |
70 | 3, /* Size (0 = byte, 1 = short, 2 = long). */ | ||
71 | @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, | 65 | @@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
72 | case BFD_RELOC_NONE: | 66 | case BFD_RELOC_NONE: |
73 | microblaze_reloc = R_MICROBLAZE_NONE; | 67 | microblaze_reloc = R_MICROBLAZE_NONE; |
@@ -78,7 +72,7 @@ index 359484dd5e..1c69c269c7 100644 | |||
78 | case BFD_RELOC_MICROBLAZE_64_NONE: | 72 | case BFD_RELOC_MICROBLAZE_64_NONE: |
79 | microblaze_reloc = R_MICROBLAZE_64_NONE; | 73 | microblaze_reloc = R_MICROBLAZE_64_NONE; |
80 | break; | 74 | break; |
81 | @@ -1918,6 +1935,7 @@ microblaze_elf_relax_section (bfd *abfd, | 75 | @@ -1918,14 +1935,22 @@ microblaze_elf_relax_section (bfd *abfd, |
82 | } | 76 | } |
83 | break; | 77 | break; |
84 | case R_MICROBLAZE_NONE: | 78 | case R_MICROBLAZE_NONE: |
@@ -86,7 +80,9 @@ index 359484dd5e..1c69c269c7 100644 | |||
86 | { | 80 | { |
87 | /* This was a PC-relative instruction that was | 81 | /* This was a PC-relative instruction that was |
88 | completely resolved. */ | 82 | completely resolved. */ |
89 | @@ -1926,12 +1944,18 @@ microblaze_elf_relax_section (bfd *abfd, | 83 | int sfix, efix; |
84 | + unsigned int val; | ||
85 | bfd_vma target_address; | ||
90 | target_address = irel->r_addend + irel->r_offset; | 86 | target_address = irel->r_addend + irel->r_offset; |
91 | sfix = calc_fixup (irel->r_offset, 0, sec); | 87 | sfix = calc_fixup (irel->r_offset, 0, sec); |
92 | efix = calc_fixup (target_address, 0, sec); | 88 | efix = calc_fixup (target_address, 0, sec); |
@@ -99,20 +95,12 @@ index 359484dd5e..1c69c269c7 100644 | |||
99 | irel->r_addend -= (efix - sfix); | 95 | irel->r_addend -= (efix - sfix); |
100 | /* Should use HOWTO. */ | 96 | /* Should use HOWTO. */ |
101 | microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, | 97 | microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, |
102 | irel->r_addend); | 98 | @@ -1973,12 +1998,16 @@ microblaze_elf_relax_section (bfd *abfd, |
103 | - } | ||
104 | - break; | ||
105 | + } | ||
106 | + break; | ||
107 | case R_MICROBLAZE_64_NONE: | ||
108 | { | ||
109 | /* This was a PC-relative 64-bit instruction that was | ||
110 | @@ -1973,12 +1997,16 @@ microblaze_elf_relax_section (bfd *abfd, | ||
111 | irelscanend = irelocs + o->reloc_count; | 99 | irelscanend = irelocs + o->reloc_count; |
112 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 100 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
113 | { | 101 | { |
114 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) | 102 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) |
115 | + if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) | 103 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) |
116 | { | 104 | { |
117 | unsigned int val; | 105 | unsigned int val; |
118 | 106 | ||
@@ -125,22 +113,12 @@ index 359484dd5e..1c69c269c7 100644 | |||
125 | /* This was a PC-relative instruction that was completely resolved. */ | 113 | /* This was a PC-relative instruction that was completely resolved. */ |
126 | if (ocontents == NULL) | 114 | if (ocontents == NULL) |
127 | { | 115 | { |
128 | @@ -1999,18 +2027,17 @@ microblaze_elf_relax_section (bfd *abfd, | 116 | @@ -2006,14 +2035,10 @@ microblaze_elf_relax_section (bfd *abfd, |
129 | (file_ptr) 0, | 117 | if (val != irelscan->r_addend) { |
130 | o->rawsize)) | 118 | fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); |
131 | goto error_return; | 119 | } |
132 | - elf_section_data (o)->this_hdr.contents = ocontents; | 120 | - irelscan->r_addend -= calc_fixup (irelscan->r_addend |
133 | - } | 121 | - + isym->st_value, 0, sec); |
134 | - } | ||
135 | - irelscan->r_addend -= calc_fixup (irelscan->r_addend | ||
136 | - + isym->st_value, sec); | ||
137 | + elf_section_data (o)->this_hdr.contents = ocontents; | ||
138 | + } | ||
139 | + } | ||
140 | val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); | ||
141 | + if (val != irelscan->r_addend) { | ||
142 | + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); | ||
143 | + } | ||
144 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); | 122 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); |
145 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 123 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
146 | irelscan->r_addend); | 124 | irelscan->r_addend); |
@@ -151,20 +129,20 @@ index 359484dd5e..1c69c269c7 100644 | |||
151 | if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) | 129 | if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
152 | { | 130 | { |
153 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 131 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
154 | @@ -2070,7 +2097,7 @@ microblaze_elf_relax_section (bfd *abfd, | 132 | @@ -2073,7 +2098,7 @@ microblaze_elf_relax_section (bfd *abfd, |
155 | elf_section_data (o)->this_hdr.contents = ocontents; | 133 | elf_section_data (o)->this_hdr.contents = ocontents; |
156 | } | 134 | } |
157 | } | 135 | } |
158 | - irelscan->r_addend -= calc_fixup (irel->r_addend | 136 | - irelscan->r_addend -= calc_fixup (irel->r_addend |
159 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend | 137 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend |
160 | + isym->st_value, | 138 | + isym->st_value, |
161 | 0, | 139 | 0, |
162 | sec); | 140 | sec); |
163 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 141 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
164 | index 36284d71a9..feb9fada1e 100644 | 142 | index 44cefbd66d4..a01891f3423 100644 |
165 | --- a/bfd/libbfd.h | 143 | --- a/bfd/libbfd.h |
166 | +++ b/bfd/libbfd.h | 144 | +++ b/bfd/libbfd.h |
167 | @@ -2901,6 +2901,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 145 | @@ -2903,6 +2903,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
168 | "BFD_RELOC_MICROBLAZE_32_ROSDA", | 146 | "BFD_RELOC_MICROBLAZE_32_ROSDA", |
169 | "BFD_RELOC_MICROBLAZE_32_RWSDA", | 147 | "BFD_RELOC_MICROBLAZE_32_RWSDA", |
170 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 148 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
@@ -173,10 +151,10 @@ index 36284d71a9..feb9fada1e 100644 | |||
173 | "BFD_RELOC_MICROBLAZE_64_GOTPC", | 151 | "BFD_RELOC_MICROBLAZE_64_GOTPC", |
174 | "BFD_RELOC_MICROBLAZE_64_GOT", | 152 | "BFD_RELOC_MICROBLAZE_64_GOT", |
175 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 153 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
176 | index e6446a7809..87753ae4f0 100644 | 154 | index b00b79f3190..78f13180c71 100644 |
177 | --- a/bfd/reloc.c | 155 | --- a/bfd/reloc.c |
178 | +++ b/bfd/reloc.c | 156 | +++ b/bfd/reloc.c |
179 | @@ -6795,6 +6795,12 @@ ENUM | 157 | @@ -6806,6 +6806,12 @@ ENUM |
180 | ENUMDOC | 158 | ENUMDOC |
181 | This is a 32 bit reloc for the microblaze to handle | 159 | This is a 32 bit reloc for the microblaze to handle |
182 | expressions of the form "Symbol Op Symbol" | 160 | expressions of the form "Symbol Op Symbol" |
@@ -190,15 +168,14 @@ index e6446a7809..87753ae4f0 100644 | |||
190 | BFD_RELOC_MICROBLAZE_64_NONE | 168 | BFD_RELOC_MICROBLAZE_64_NONE |
191 | ENUMDOC | 169 | ENUMDOC |
192 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h | 170 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h |
193 | index 830b5ad446..6ee0966444 100644 | 171 | index 830b5ad4461..0dba2c0f44f 100644 |
194 | --- a/include/elf/microblaze.h | 172 | --- a/include/elf/microblaze.h |
195 | +++ b/include/elf/microblaze.h | 173 | +++ b/include/elf/microblaze.h |
196 | @@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) | 174 | @@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) |
197 | RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ | 175 | RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ |
198 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ | 176 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ |
199 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ | 177 | RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ |
200 | + RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) | 178 | + RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) |
201 | + | ||
202 | END_RELOC_NUMBERS (R_MICROBLAZE_max) | 179 | END_RELOC_NUMBERS (R_MICROBLAZE_max) |
203 | 180 | ||
204 | /* Global base address names. */ | 181 | /* Global base address names. */ |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch index 35d44be4..09a17eda 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 72fe91edf03a0270ecd9df795f1a1eaded3b7d15 Mon Sep 17 00:00:00 2001 | 1 | From df187bca3d19a3e5c36182929e7e14bc6a49aad5 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | 2 | From: David Holsgrove <david.holsgrove@xilinx.com> |
3 | Date: Wed, 27 Feb 2013 13:56:11 +1000 | 3 | Date: Wed, 27 Feb 2013 13:56:11 +1000 |
4 | Subject: [PATCH 06/43] upstream change to garbage collection sweep causes mb | 4 | Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb |
5 | regression | 5 | regression |
6 | 6 | ||
7 | Upstream change for PR13177 now clears the def_regular during gc_sweep of a | 7 | Upstream change for PR13177 now clears the def_regular during gc_sweep of a |
@@ -23,10 +23,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
23 | 1 file changed, 1 deletion(-) | 23 | 1 file changed, 1 deletion(-) |
24 | 24 | ||
25 | diff --git a/bfd/elflink.c b/bfd/elflink.c | 25 | diff --git a/bfd/elflink.c b/bfd/elflink.c |
26 | index e50c0e4b38..09d43e3ca5 100644 | 26 | index 7078a2fb6f4..7926fdf63be 100644 |
27 | --- a/bfd/elflink.c | 27 | --- a/bfd/elflink.c |
28 | +++ b/bfd/elflink.c | 28 | +++ b/bfd/elflink.c |
29 | @@ -6187,7 +6187,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) | 29 | @@ -6274,7 +6274,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) |
30 | 30 | ||
31 | inf = (struct elf_gc_sweep_symbol_info *) data; | 31 | inf = (struct elf_gc_sweep_symbol_info *) data; |
32 | (*inf->hide_symbol) (inf->info, h, TRUE); | 32 | (*inf->hide_symbol) (inf->info, h, TRUE); |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch index a5cc8114..c37a5aed 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Fix-bug-in-TLSTPREL-Relocation.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 2ea146401a9aed9e3b6cc07e1b6c0f81e5a0527c Mon Sep 17 00:00:00 2001 | 1 | From 0f1d7bd04916af6172780335dc6abc11d45564f2 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 15 Jun 2015 16:50:30 +0530 | 3 | Date: Mon, 15 Jun 2015 16:50:30 +0530 |
4 | Subject: [PATCH 07/43] Fix bug in TLSTPREL Relocation | 4 | Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation |
5 | 5 | ||
6 | Fixed the problem related to the fixup/relocations TLSTPREL. | 6 | Fixed the problem related to the fixup/relocations TLSTPREL. |
7 | When the fixup is applied the addend is not added at the correct offset | 7 | When the fixup is applied the addend is not added at the correct offset |
@@ -13,7 +13,7 @@ big & little-endian compilers | |||
13 | 1 file changed, 2 insertions(+), 2 deletions(-) | 13 | 1 file changed, 2 insertions(+), 2 deletions(-) |
14 | 14 | ||
15 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 15 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
16 | index 1c69c269c7..d19a6dca84 100644 | 16 | index cbba704e691..cc4c0568c68 100644 |
17 | --- a/bfd/elf32-microblaze.c | 17 | --- a/bfd/elf32-microblaze.c |
18 | +++ b/bfd/elf32-microblaze.c | 18 | +++ b/bfd/elf32-microblaze.c |
19 | @@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 19 | @@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch index 933e51e1..c9903a40 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-Address-extension-instructions.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From a4b50cb6f4b8d2f4e7d3b28bbc2f8110277e441d Mon Sep 17 00:00:00 2001 | 1 | From c0bb923f0978d5767048274cd778c8cbcef184ec Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 18 Jan 2016 12:28:21 +0530 | 3 | Date: Mon, 18 Jan 2016 12:28:21 +0530 |
4 | Subject: [PATCH 08/43] Added Address extension instructions | 4 | Subject: [PATCH 09/40] Added Address extension instructions |
5 | 5 | ||
6 | This patch adds the support of new instructions which are required | 6 | This patch adds the support of new instructions which are required |
7 | for supporting Address extension feature. | 7 | for supporting Address extension feature. |
@@ -13,17 +13,27 @@ ChangeLog: | |||
13 | 13 | ||
14 | *microblaze-opc.h (op_code_struct): Update | 14 | *microblaze-opc.h (op_code_struct): Update |
15 | Added new instructions | 15 | Added new instructions |
16 | Set MAX_OPCODES to matching value | ||
16 | *microblaze-opcm.h (microblaze_instr): Update | 17 | *microblaze-opcm.h (microblaze_instr): Update |
17 | Added new instructions | 18 | Added new instructions |
18 | --- | 19 | --- |
19 | opcodes/microblaze-opc.h | 11 +++++++++++ | 20 | opcodes/microblaze-opc.h | 19 +++++++++++++++---- |
20 | opcodes/microblaze-opcm.h | 10 +++++----- | 21 | opcodes/microblaze-opcm.h | 12 ++++++------ |
21 | 2 files changed, 16 insertions(+), 5 deletions(-) | 22 | 2 files changed, 21 insertions(+), 10 deletions(-) |
22 | 23 | ||
23 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 24 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
24 | index 865151f95b..330f1040e7 100644 | 25 | index 865151f95b0..d9a84e575e8 100644 |
25 | --- a/opcodes/microblaze-opc.h | 26 | --- a/opcodes/microblaze-opc.h |
26 | +++ b/opcodes/microblaze-opc.h | 27 | +++ b/opcodes/microblaze-opc.h |
28 | @@ -102,7 +102,7 @@ | ||
29 | #define DELAY_SLOT 1 | ||
30 | #define NO_DELAY_SLOT 0 | ||
31 | |||
32 | -#define MAX_OPCODES 291 | ||
33 | +#define MAX_OPCODES 299 | ||
34 | |||
35 | struct op_code_struct | ||
36 | { | ||
27 | @@ -178,8 +178,11 @@ struct op_code_struct | 37 | @@ -178,8 +178,11 @@ struct op_code_struct |
28 | {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, | 38 | {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, |
29 | {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, | 39 | {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, |
@@ -61,6 +71,20 @@ index 865151f95b..330f1040e7 100644 | |||
61 | {"lbui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst }, | 71 | {"lbui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst }, |
62 | {"lhui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst }, | 72 | {"lhui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst }, |
63 | {"lwi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst }, | 73 | {"lwi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst }, |
74 | @@ -258,10 +267,10 @@ struct op_code_struct | ||
75 | {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, | ||
76 | {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst }, | ||
77 | {"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst }, | ||
78 | - {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst }, | ||
79 | + {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, mbi_fadd, arithmetic_inst }, | ||
80 | {"frsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst }, | ||
81 | - {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst }, | ||
82 | - {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst }, | ||
83 | + {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, mbi_fmul, arithmetic_inst }, | ||
84 | + {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, mbi_fdiv, arithmetic_inst }, | ||
85 | {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst }, | ||
86 | {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst }, | ||
87 | {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst }, | ||
64 | @@ -405,6 +414,8 @@ struct op_code_struct | 88 | @@ -405,6 +414,8 @@ struct op_code_struct |
65 | {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst }, | 89 | {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst }, |
66 | {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst }, | 90 | {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst }, |
@@ -71,10 +95,10 @@ index 865151f95b..330f1040e7 100644 | |||
71 | {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, | 95 | {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, |
72 | {"", 0, 0, 0, 0, 0, 0, 0, 0}, | 96 | {"", 0, 0, 0, 0, 0, 0, 0, 0}, |
73 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 97 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
74 | index 42f3dd3be5..1c39dbf50b 100644 | 98 | index 42f3dd3be53..8be6e97a1d5 100644 |
75 | --- a/opcodes/microblaze-opcm.h | 99 | --- a/opcodes/microblaze-opcm.h |
76 | +++ b/opcodes/microblaze-opcm.h | 100 | +++ b/opcodes/microblaze-opcm.h |
77 | @@ -33,13 +33,13 @@ enum microblaze_instr | 101 | @@ -33,14 +33,14 @@ enum microblaze_instr |
78 | /* 'or/and/xor' are C++ keywords. */ | 102 | /* 'or/and/xor' are C++ keywords. */ |
79 | microblaze_or, microblaze_and, microblaze_xor, | 103 | microblaze_or, microblaze_and, microblaze_xor, |
80 | andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, | 104 | andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, |
@@ -88,11 +112,13 @@ index 42f3dd3be5..1c39dbf50b 100644 | |||
88 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, | 112 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, |
89 | - bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, | 113 | - bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, |
90 | - shr, sw, swr, swx, lbui, lhui, lwi, | 114 | - shr, sw, swr, swx, lbui, lhui, lwi, |
115 | - sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | ||
91 | + bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, | 116 | + bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, |
92 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, | 117 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, |
93 | sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | 118 | + sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
94 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, | 119 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, |
95 | fint, fsqrt, | 120 | fint, fsqrt, |
121 | tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, | ||
96 | -- | 122 | -- |
97 | 2.17.1 | 123 | 2.17.1 |
98 | 124 | ||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0009-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-fixing-the-MAX_OPCODES-to-correct-value.patch deleted file mode 100644 index 8b51a7a7..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0009-fixing-the-MAX_OPCODES-to-correct-value.patch +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | From 9c7c893866ab6b63942b86be6134c34b96272306 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju Mekala <nmekala@xilix.com> | ||
3 | Date: Thu, 28 Jan 2016 14:07:34 +0530 | ||
4 | Subject: [PATCH 09/43] fixing the MAX_OPCODES to correct value | ||
5 | |||
6 | --- | ||
7 | opcodes/microblaze-opc.h | 2 +- | ||
8 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
9 | |||
10 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | ||
11 | index 330f1040e7..2a6b841232 100644 | ||
12 | --- a/opcodes/microblaze-opc.h | ||
13 | +++ b/opcodes/microblaze-opc.h | ||
14 | @@ -102,7 +102,7 @@ | ||
15 | #define DELAY_SLOT 1 | ||
16 | #define NO_DELAY_SLOT 0 | ||
17 | |||
18 | -#define MAX_OPCODES 291 | ||
19 | +#define MAX_OPCODES 299 | ||
20 | |||
21 | struct op_code_struct | ||
22 | { | ||
23 | -- | ||
24 | 2.17.1 | ||
25 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch index 11d45a23..f94410d5 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 55acba095458b872b500e978af946733a9f33021 Mon Sep 17 00:00:00 2001 | 1 | From 32058fa03c18d710b3029108e967be687d00516c Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 18 Jul 2016 12:24:28 +0530 | 3 | Date: Mon, 18 Jul 2016 12:24:28 +0530 |
4 | Subject: [PATCH 10/43] Add new bit-field instructions | 4 | Subject: [PATCH 10/40] Add new bit-field instructions |
5 | 5 | ||
6 | This patches adds new bsefi and bsifi instructions. | 6 | This patches adds new bsefi and bsifi instructions. |
7 | BSEFI- The instruction shall extract a bit field from a | 7 | BSEFI- The instruction shall extract a bit field from a |
@@ -13,47 +13,48 @@ The rest of the bits in the destination register shall be unchanged | |||
13 | 13 | ||
14 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> | 14 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
15 | --- | 15 | --- |
16 | opcodes/microblaze-dis.c | 16 +++++++++ | 16 | opcodes/microblaze-dis.c | 17 +++++++++ |
17 | opcodes/microblaze-opc.h | 12 ++++++- | 17 | opcodes/microblaze-opc.h | 12 ++++++- |
18 | opcodes/microblaze-opcm.h | 6 +++- | 18 | opcodes/microblaze-opcm.h | 6 +++- |
19 | 4 files changed, 102 insertions(+), 3 deletions(-) | 19 | 4 files changed, 103 insertions(+), 3 deletions(-) |
20 | 20 | ||
21 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 21 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
22 | index f691740dfd..f8aaf27873 100644 | 22 | index 2b3aa8e0786..356f1da22ed 100644 |
23 | --- a/opcodes/microblaze-dis.c | 23 | --- a/opcodes/microblaze-dis.c |
24 | +++ b/opcodes/microblaze-dis.c | 24 | +++ b/opcodes/microblaze-dis.c |
25 | @@ -73,6 +73,18 @@ get_field_imm5_mbar (long instr) | 25 | @@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) |
26 | return(strdup(tmpstr)); | 26 | return p; |
27 | } | 27 | } |
28 | 28 | ||
29 | +static char * | 29 | +static char * |
30 | +get_field_imm5width (long instr) | 30 | +get_field_imm5width (struct string_buf *buf, long instr) |
31 | +{ | 31 | +{ |
32 | + char tmpstr[25]; | 32 | + char *p = strbuf (buf); |
33 | + | 33 | + |
34 | + if (instr & 0x00004000) | 34 | + if (instr & 0x00004000) |
35 | + sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ | 35 | + sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ |
36 | + else | 36 | + else |
37 | + sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ | 37 | + sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ |
38 | + return (strdup (tmpstr)); | 38 | + return p; |
39 | +} | 39 | +} |
40 | + | 40 | + |
41 | static char * | 41 | static char * |
42 | get_field_rfsl (long instr) | 42 | get_field_rfsl (struct string_buf *buf, long instr) |
43 | { | 43 | { |
44 | @@ -396,6 +408,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 44 | @@ -426,6 +438,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
45 | /* For mbar 16 or sleep insn. */ | 45 | case INST_TYPE_NONE: |
46 | case INST_TYPE_NONE: | 46 | break; |
47 | break; | 47 | /* For tuqula instruction */ |
48 | + /* For bit field insns. */ | 48 | + /* For bit field insns. */ |
49 | + case INST_TYPE_RD_R1_IMM5_IMM5: | 49 | + case INST_TYPE_RD_R1_IMM5_IMM5: |
50 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst)); | 50 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); |
51 | + break; | 51 | + break; |
52 | /* For tuqula instruction */ | 52 | + /* For tuqula instruction */ |
53 | case INST_TYPE_RD: | 53 | case INST_TYPE_RD: |
54 | print_func (stream, "\t%s", get_field_rd (inst)); | 54 | print_func (stream, "\t%s", get_field_rd (&buf, inst)); |
55 | break; | ||
55 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 56 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
56 | index 2a6b841232..ce8ac351b5 100644 | 57 | index d9a84e575e8..d3b234e1fcd 100644 |
57 | --- a/opcodes/microblaze-opc.h | 58 | --- a/opcodes/microblaze-opc.h |
58 | +++ b/opcodes/microblaze-opc.h | 59 | +++ b/opcodes/microblaze-opc.h |
59 | @@ -59,6 +59,9 @@ | 60 | @@ -59,6 +59,9 @@ |
@@ -104,7 +105,7 @@ index 2a6b841232..ce8ac351b5 100644 | |||
104 | #endif /* MICROBLAZE_OPC */ | 105 | #endif /* MICROBLAZE_OPC */ |
105 | 106 | ||
106 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 107 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
107 | index 1c39dbf50b..28662694cd 100644 | 108 | index 8be6e97a1d5..c3b2b8f0f6e 100644 |
108 | --- a/opcodes/microblaze-opcm.h | 109 | --- a/opcodes/microblaze-opcm.h |
109 | +++ b/opcodes/microblaze-opcm.h | 110 | +++ b/opcodes/microblaze-opcm.h |
110 | @@ -29,7 +29,7 @@ enum microblaze_instr | 111 | @@ -29,7 +29,7 @@ enum microblaze_instr |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch index b6f2920a..3f3c8141 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch | |||
@@ -1,15 +1,15 @@ | |||
1 | From f42a99be023e3f933c0a228ac8e08d59c59ec8d7 Mon Sep 17 00:00:00 2001 | 1 | From 121b64d9dafd3119925a7e95a09fa9f388e53922 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Mon, 10 Jul 2017 16:07:28 +0530 | 3 | Date: Mon, 10 Jul 2017 16:07:28 +0530 |
4 | Subject: [PATCH 11/43] fixing the imm bug. with relax option imm -1 is also | 4 | Subject: [PATCH 11/40] fixing the imm bug. |
5 | getting removed this is corrected now. | ||
6 | 5 | ||
6 | with relax option imm -1 is also getting removed this is corrected now. | ||
7 | --- | 7 | --- |
8 | bfd/elf32-microblaze.c | 3 +-- | 8 | bfd/elf32-microblaze.c | 3 +-- |
9 | 1 file changed, 1 insertion(+), 2 deletions(-) | 9 | 1 file changed, 1 insertion(+), 2 deletions(-) |
10 | 10 | ||
11 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 11 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
12 | index d19a6dca84..d001437b3f 100644 | 12 | index cc4c0568c68..cb7271f5017 100644 |
13 | --- a/bfd/elf32-microblaze.c | 13 | --- a/bfd/elf32-microblaze.c |
14 | +++ b/bfd/elf32-microblaze.c | 14 | +++ b/bfd/elf32-microblaze.c |
15 | @@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd, | 15 | @@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd, |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch index 96cab28a..bda74adc 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From b42fae987795bb210476dcaa5e086f42602208f8 Mon Sep 17 00:00:00 2001 | 1 | From 48e5b2505d97ca936e9946c3945c72bdcfc1743e Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sun, 30 Sep 2018 16:28:28 +0530 | 3 | Date: Sun, 30 Sep 2018 16:28:28 +0530 |
4 | Subject: [PATCH 15/43] intial commit of MB 64-bit | 4 | Subject: [PATCH 15/40] intial commit of MB 64-bit |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/Makefile.am | 2 + | 7 | bfd/Makefile.am | 2 + |
@@ -9,69 +9,77 @@ Subject: [PATCH 15/43] intial commit of MB 64-bit | |||
9 | bfd/config.bfd | 4 + | 9 | bfd/config.bfd | 4 + |
10 | bfd/configure | 2 + | 10 | bfd/configure | 2 + |
11 | bfd/configure.ac | 2 + | 11 | bfd/configure.ac | 2 + |
12 | bfd/cpu-microblaze.c | 52 +- | 12 | bfd/cpu-microblaze.c | 55 +- |
13 | bfd/elf64-microblaze.c | 3584 ++++++++++++++++++++++++++++ | 13 | bfd/doc/Makefile.in | 1 + |
14 | bfd/elf64-microblaze.c | 3560 ++++++++++++++++++++++++++++ | ||
14 | bfd/targets.c | 6 + | 15 | bfd/targets.c | 6 + |
15 | include/elf/common.h | 1 + | 16 | include/elf/common.h | 1 + |
16 | opcodes/microblaze-dis.c | 39 +- | 17 | ld/Makefile.am | 4 + |
18 | ld/Makefile.in | 7 + | ||
19 | ld/configure.tgt | 3 + | ||
20 | ld/emulparams/elf64microblaze.sh | 23 + | ||
21 | ld/emulparams/elf64microblazeel.sh | 23 + | ||
22 | opcodes/microblaze-dis.c | 43 +- | ||
17 | opcodes/microblaze-opc.h | 162 +- | 23 | opcodes/microblaze-opc.h | 162 +- |
18 | opcodes/microblaze-opcm.h | 20 +- | 24 | opcodes/microblaze-opcm.h | 20 +- |
19 | 19 files changed, 4181 insertions(+), 41 deletions(-) | 25 | 20 files changed, 4156 insertions(+), 43 deletions(-) |
20 | create mode 100644 bfd/elf64-microblaze.c | 26 | create mode 100644 bfd/elf64-microblaze.c |
27 | create mode 100644 ld/emulparams/elf64microblaze.sh | ||
28 | create mode 100644 ld/emulparams/elf64microblazeel.sh | ||
21 | 29 | ||
22 | diff --git a/bfd/Makefile.am b/bfd/Makefile.am | 30 | diff --git a/bfd/Makefile.am b/bfd/Makefile.am |
23 | index a9191555ad..c5fd250812 100644 | 31 | index e5bd28f03f5..35ecb83a1a1 100644 |
24 | --- a/bfd/Makefile.am | 32 | --- a/bfd/Makefile.am |
25 | +++ b/bfd/Makefile.am | 33 | +++ b/bfd/Makefile.am |
26 | @@ -570,6 +570,7 @@ BFD64_BACKENDS = \ | 34 | @@ -558,6 +558,7 @@ BFD64_BACKENDS = \ |
27 | elf64-riscv.lo \ | 35 | elf64-ia64.lo \ |
28 | elfxx-riscv.lo \ | 36 | elf64-ia64-vms.lo \ |
29 | elf64-s390.lo \ | 37 | elfxx-ia64.lo \ |
30 | + elf64-microblaze.lo \ | 38 | + elf64-microblaze.lo \ |
31 | elf64-sparc.lo \ | 39 | elfn32-mips.lo \ |
32 | elf64-tilegx.lo \ | 40 | elf64-mips.lo \ |
33 | elf64-x86-64.lo \ | 41 | elfxx-mips.lo \ |
34 | @@ -603,6 +604,7 @@ BFD64_BACKENDS_CFILES = \ | 42 | @@ -597,6 +598,7 @@ BFD64_BACKENDS_CFILES = \ |
35 | elf64-nfp.c \ | 43 | elf64-gen.c \ |
36 | elf64-ppc.c \ | 44 | elf64-hppa.c \ |
37 | elf64-s390.c \ | 45 | elf64-ia64-vms.c \ |
38 | + elf64-microblaze.c \ | 46 | + elf64-microblaze.c \ |
39 | elf64-sparc.c \ | 47 | elf64-mips.c \ |
40 | elf64-tilegx.c \ | 48 | elf64-mmix.c \ |
41 | elf64-x86-64.c \ | 49 | elf64-nfp.c \ |
42 | diff --git a/bfd/Makefile.in b/bfd/Makefile.in | 50 | diff --git a/bfd/Makefile.in b/bfd/Makefile.in |
43 | index 896df52042..fd457cba1e 100644 | 51 | index 15334f10c55..89a2470ec8f 100644 |
44 | --- a/bfd/Makefile.in | 52 | --- a/bfd/Makefile.in |
45 | +++ b/bfd/Makefile.in | 53 | +++ b/bfd/Makefile.in |
46 | @@ -995,6 +995,7 @@ BFD64_BACKENDS = \ | 54 | @@ -984,6 +984,7 @@ BFD64_BACKENDS = \ |
47 | elf64-riscv.lo \ | 55 | elf64-ia64.lo \ |
48 | elfxx-riscv.lo \ | 56 | elf64-ia64-vms.lo \ |
49 | elf64-s390.lo \ | 57 | elfxx-ia64.lo \ |
50 | + elf64-microblaze.lo \ | 58 | + elf64-microblaze.lo \ |
51 | elf64-sparc.lo \ | 59 | elfn32-mips.lo \ |
52 | elf64-tilegx.lo \ | 60 | elf64-mips.lo \ |
53 | elf64-x86-64.lo \ | 61 | elfxx-mips.lo \ |
54 | @@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \ | 62 | @@ -1023,6 +1024,7 @@ BFD64_BACKENDS_CFILES = \ |
55 | elf64-nfp.c \ | 63 | elf64-gen.c \ |
56 | elf64-ppc.c \ | 64 | elf64-hppa.c \ |
57 | elf64-s390.c \ | 65 | elf64-ia64-vms.c \ |
58 | + elf64-microblaze.c \ | 66 | + elf64-microblaze.c \ |
59 | elf64-sparc.c \ | 67 | elf64-mips.c \ |
60 | elf64-tilegx.c \ | 68 | elf64-mmix.c \ |
61 | elf64-x86-64.c \ | 69 | elf64-nfp.c \ |
62 | @@ -1494,6 +1496,7 @@ distclean-compile: | 70 | @@ -1504,6 +1506,7 @@ distclean-compile: |
63 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ | 71 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@ |
64 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ | 72 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@ |
65 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ | 73 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@ |
66 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ | 74 | +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ |
67 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ | 75 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@ |
68 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ | 76 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@ |
69 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ | 77 | @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@ |
70 | diff --git a/bfd/config.bfd b/bfd/config.bfd | 78 | diff --git a/bfd/config.bfd b/bfd/config.bfd |
71 | index f13812b7c7..a98c220db5 100644 | 79 | index 0a96927e0ed..1fcae568c36 100644 |
72 | --- a/bfd/config.bfd | 80 | --- a/bfd/config.bfd |
73 | +++ b/bfd/config.bfd | 81 | +++ b/bfd/config.bfd |
74 | @@ -850,11 +850,15 @@ case "${targ}" in | 82 | @@ -842,11 +842,15 @@ case "${targ}" in |
75 | microblazeel*-*) | 83 | microblazeel*-*) |
76 | targ_defvec=microblaze_elf32_le_vec | 84 | targ_defvec=microblaze_elf32_le_vec |
77 | targ_selvecs=microblaze_elf32_vec | 85 | targ_selvecs=microblaze_elf32_vec |
@@ -88,36 +96,36 @@ index f13812b7c7..a98c220db5 100644 | |||
88 | 96 | ||
89 | #ifdef BFD64 | 97 | #ifdef BFD64 |
90 | diff --git a/bfd/configure b/bfd/configure | 98 | diff --git a/bfd/configure b/bfd/configure |
91 | index 8d6c94aef2..3defb1f784 100755 | 99 | index abd7b2a83e5..731c059eba0 100755 |
92 | --- a/bfd/configure | 100 | --- a/bfd/configure |
93 | +++ b/bfd/configure | 101 | +++ b/bfd/configure |
94 | @@ -14847,6 +14847,8 @@ do | 102 | @@ -14804,6 +14804,8 @@ do |
95 | rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; | 103 | metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;; |
96 | s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; | 104 | microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
97 | s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; | 105 | microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
98 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 106 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
99 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 107 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
100 | score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 108 | mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
101 | score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 109 | mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
102 | sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; | 110 | mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
103 | diff --git a/bfd/configure.ac b/bfd/configure.ac | 111 | diff --git a/bfd/configure.ac b/bfd/configure.ac |
104 | index 5f02c41520..d3010b47dc 100644 | 112 | index 7eee83ae4d4..b87f6183b98 100644 |
105 | --- a/bfd/configure.ac | 113 | --- a/bfd/configure.ac |
106 | +++ b/bfd/configure.ac | 114 | +++ b/bfd/configure.ac |
107 | @@ -615,6 +615,8 @@ do | 115 | @@ -540,6 +540,8 @@ do |
108 | rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; | 116 | metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;; |
109 | s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; | 117 | microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
110 | s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; | 118 | microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;; |
111 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 119 | + microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
112 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; | 120 | + microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; |
113 | score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 121 | mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
114 | score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; | 122 | mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
115 | sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; | 123 | mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;; |
116 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c | 124 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c |
117 | index 9bc2eb3de9..c91ba46f75 100644 | 125 | index 4e05d73f01b..4b48b310c6a 100644 |
118 | --- a/bfd/cpu-microblaze.c | 126 | --- a/bfd/cpu-microblaze.c |
119 | +++ b/bfd/cpu-microblaze.c | 127 | +++ b/bfd/cpu-microblaze.c |
120 | @@ -23,7 +23,24 @@ | 128 | @@ -23,7 +23,25 @@ |
121 | #include "bfd.h" | 129 | #include "bfd.h" |
122 | #include "libbfd.h" | 130 | #include "libbfd.h" |
123 | 131 | ||
@@ -138,15 +146,16 @@ index 9bc2eb3de9..c91ba46f75 100644 | |||
138 | + bfd_default_compatible, /* Architecture comparison function. */ | 146 | + bfd_default_compatible, /* Architecture comparison function. */ |
139 | + bfd_default_scan, /* String to architecture conversion. */ | 147 | + bfd_default_scan, /* String to architecture conversion. */ |
140 | + bfd_arch_default_fill, /* Default fill. */ | 148 | + bfd_arch_default_fill, /* Default fill. */ |
141 | + &bfd_microblaze_arch[1] /* Next in list. */ | 149 | + &bfd_microblaze_arch[1], /* Next in list. */ |
150 | + 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
142 | +}, | 151 | +}, |
143 | { | 152 | { |
144 | 32, /* 32 bits in a word. */ | 153 | 32, /* Bits in a word. */ |
145 | 32, /* 32 bits in an address. */ | 154 | 32, /* Bits in an address. */ |
146 | @@ -38,4 +55,37 @@ const bfd_arch_info_type bfd_microblaze_arch = | 155 | @@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch = |
147 | bfd_default_scan, /* String to architecture conversion. */ | ||
148 | bfd_arch_default_fill, /* Default fill. */ | 156 | bfd_arch_default_fill, /* Default fill. */ |
149 | NULL /* Next in list. */ | 157 | NULL, /* Next in list. */ |
158 | 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
150 | +} | 159 | +} |
151 | +#else | 160 | +#else |
152 | +{ | 161 | +{ |
@@ -162,7 +171,8 @@ index 9bc2eb3de9..c91ba46f75 100644 | |||
162 | + bfd_default_compatible, /* Architecture comparison function. */ | 171 | + bfd_default_compatible, /* Architecture comparison function. */ |
163 | + bfd_default_scan, /* String to architecture conversion. */ | 172 | + bfd_default_scan, /* String to architecture conversion. */ |
164 | + bfd_arch_default_fill, /* Default fill. */ | 173 | + bfd_arch_default_fill, /* Default fill. */ |
165 | + &bfd_microblaze_arch[1] /* Next in list. */ | 174 | + &bfd_microblaze_arch[1], /* Next in list. */ |
175 | + 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
166 | +}, | 176 | +}, |
167 | +{ | 177 | +{ |
168 | + 64, /* 32 bits in a word. */ | 178 | + 64, /* 32 bits in a word. */ |
@@ -177,16 +187,29 @@ index 9bc2eb3de9..c91ba46f75 100644 | |||
177 | + bfd_default_compatible, /* Architecture comparison function. */ | 187 | + bfd_default_compatible, /* Architecture comparison function. */ |
178 | + bfd_default_scan, /* String to architecture conversion. */ | 188 | + bfd_default_scan, /* String to architecture conversion. */ |
179 | + bfd_arch_default_fill, /* Default fill. */ | 189 | + bfd_arch_default_fill, /* Default fill. */ |
180 | + NULL /* Next in list. */ | 190 | + NULL, /* Next in list. */ |
191 | + 0 /* Maximum offset of a reloc from the start of an insn. */ | ||
181 | +} | 192 | +} |
182 | +#endif | 193 | +#endif |
183 | }; | 194 | }; |
195 | diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in | ||
196 | index 0115dfc406c..d75411d2af7 100644 | ||
197 | --- a/bfd/doc/Makefile.in | ||
198 | +++ b/bfd/doc/Makefile.in | ||
199 | @@ -375,6 +375,7 @@ pdfdir = @pdfdir@ | ||
200 | prefix = @prefix@ | ||
201 | program_transform_name = @program_transform_name@ | ||
202 | psdir = @psdir@ | ||
203 | +runstatedir = @runstatedir@ | ||
204 | sbindir = @sbindir@ | ||
205 | sharedstatedir = @sharedstatedir@ | ||
206 | srcdir = @srcdir@ | ||
184 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 207 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
185 | new file mode 100644 | 208 | new file mode 100644 |
186 | index 0000000000..0f43ae6ea8 | 209 | index 00000000000..fa4b95e47e0 |
187 | --- /dev/null | 210 | --- /dev/null |
188 | +++ b/bfd/elf64-microblaze.c | 211 | +++ b/bfd/elf64-microblaze.c |
189 | @@ -0,0 +1,3584 @@ | 212 | @@ -0,0 +1,3560 @@ |
190 | +/* Xilinx MicroBlaze-specific support for 32-bit ELF | 213 | +/* Xilinx MicroBlaze-specific support for 32-bit ELF |
191 | + | 214 | + |
192 | + Copyright (C) 2009-2016 Free Software Foundation, Inc. | 215 | + Copyright (C) 2009-2016 Free Software Foundation, Inc. |
@@ -844,7 +867,7 @@ index 0000000000..0f43ae6ea8 | |||
844 | + | 867 | + |
845 | +/* Set the howto pointer for a RCE ELF reloc. */ | 868 | +/* Set the howto pointer for a RCE ELF reloc. */ |
846 | + | 869 | + |
847 | +static void | 870 | +static bfd_boolean |
848 | +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, | 871 | +microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, |
849 | + arelent * cache_ptr, | 872 | + arelent * cache_ptr, |
850 | + Elf_Internal_Rela * dst) | 873 | + Elf_Internal_Rela * dst) |
@@ -858,13 +881,14 @@ index 0000000000..0f43ae6ea8 | |||
858 | + r_type = ELF64_R_TYPE (dst->r_info); | 881 | + r_type = ELF64_R_TYPE (dst->r_info); |
859 | + if (r_type >= R_MICROBLAZE_max) | 882 | + if (r_type >= R_MICROBLAZE_max) |
860 | + { | 883 | + { |
861 | + (*_bfd_error_handler) (_("%B: unrecognised MicroBlaze reloc number: %d"), | 884 | + (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"), |
862 | + abfd, r_type); | 885 | + abfd, r_type); |
863 | + bfd_set_error (bfd_error_bad_value); | 886 | + bfd_set_error (bfd_error_bad_value); |
864 | + r_type = R_MICROBLAZE_NONE; | 887 | + return FALSE; |
865 | + } | 888 | + } |
866 | + | 889 | + |
867 | + cache_ptr->howto = microblaze_elf_howto_table [r_type]; | 890 | + cache_ptr->howto = microblaze_elf_howto_table [r_type]; |
891 | + return TRUE; | ||
868 | +} | 892 | +} |
869 | + | 893 | + |
870 | +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ | 894 | +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ |
@@ -1263,7 +1287,7 @@ index 0000000000..0f43ae6ea8 | |||
1263 | + /* Only relocate if the symbol is defined. */ | 1287 | + /* Only relocate if the symbol is defined. */ |
1264 | + if (sec) | 1288 | + if (sec) |
1265 | + { | 1289 | + { |
1266 | + name = bfd_get_section_name (sec->owner, sec); | 1290 | + name = bfd_section_name (sec); |
1267 | + | 1291 | + |
1268 | + if (strcmp (name, ".sdata2") == 0 | 1292 | + if (strcmp (name, ".sdata2") == 0 |
1269 | + || strcmp (name, ".sbss2") == 0) | 1293 | + || strcmp (name, ".sbss2") == 0) |
@@ -1292,7 +1316,7 @@ index 0000000000..0f43ae6ea8 | |||
1292 | + bfd_get_filename (input_bfd), | 1316 | + bfd_get_filename (input_bfd), |
1293 | + sym_name, | 1317 | + sym_name, |
1294 | + microblaze_elf_howto_table[(int) r_type]->name, | 1318 | + microblaze_elf_howto_table[(int) r_type]->name, |
1295 | + bfd_get_section_name (sec->owner, sec)); | 1319 | + bfd_section_name (sec)); |
1296 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ | 1320 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ |
1297 | + ret = FALSE; | 1321 | + ret = FALSE; |
1298 | + continue; | 1322 | + continue; |
@@ -1308,7 +1332,7 @@ index 0000000000..0f43ae6ea8 | |||
1308 | + /* Only relocate if the symbol is defined. */ | 1332 | + /* Only relocate if the symbol is defined. */ |
1309 | + if (sec) | 1333 | + if (sec) |
1310 | + { | 1334 | + { |
1311 | + name = bfd_get_section_name (sec->owner, sec); | 1335 | + name = bfd_section_name (sec); |
1312 | + | 1336 | + |
1313 | + if (strcmp (name, ".sdata") == 0 | 1337 | + if (strcmp (name, ".sdata") == 0 |
1314 | + || strcmp (name, ".sbss") == 0) | 1338 | + || strcmp (name, ".sbss") == 0) |
@@ -1337,7 +1361,7 @@ index 0000000000..0f43ae6ea8 | |||
1337 | + bfd_get_filename (input_bfd), | 1361 | + bfd_get_filename (input_bfd), |
1338 | + sym_name, | 1362 | + sym_name, |
1339 | + microblaze_elf_howto_table[(int) r_type]->name, | 1363 | + microblaze_elf_howto_table[(int) r_type]->name, |
1340 | + bfd_get_section_name (sec->owner, sec)); | 1364 | + bfd_section_name (sec)); |
1341 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ | 1365 | + /*bfd_set_error (bfd_error_bad_value); ??? why? */ |
1342 | + ret = FALSE; | 1366 | + ret = FALSE; |
1343 | + continue; | 1367 | + continue; |
@@ -1399,6 +1423,7 @@ index 0000000000..0f43ae6ea8 | |||
1399 | + goto dogot; | 1423 | + goto dogot; |
1400 | + case (int) R_MICROBLAZE_TLSLD: | 1424 | + case (int) R_MICROBLAZE_TLSLD: |
1401 | + tls_type = (TLS_TLS | TLS_LD); | 1425 | + tls_type = (TLS_TLS | TLS_LD); |
1426 | + /* Fall through. */ | ||
1402 | + dogot: | 1427 | + dogot: |
1403 | + case (int) R_MICROBLAZE_GOT_64: | 1428 | + case (int) R_MICROBLAZE_GOT_64: |
1404 | + { | 1429 | + { |
@@ -1699,7 +1724,7 @@ index 0000000000..0f43ae6ea8 | |||
1699 | + { | 1724 | + { |
1700 | + BFD_FAIL (); | 1725 | + BFD_FAIL (); |
1701 | + (*_bfd_error_handler) | 1726 | + (*_bfd_error_handler) |
1702 | + (_("%B: probably compiled without -fPIC?"), | 1727 | + (_("%pB: probably compiled without -fPIC?"), |
1703 | + input_bfd); | 1728 | + input_bfd); |
1704 | + bfd_set_error (bfd_error_bad_value); | 1729 | + bfd_set_error (bfd_error_bad_value); |
1705 | + return FALSE; | 1730 | + return FALSE; |
@@ -1753,7 +1778,7 @@ index 0000000000..0f43ae6ea8 | |||
1753 | + name = (bfd_elf_string_from_elf_section | 1778 | + name = (bfd_elf_string_from_elf_section |
1754 | + (input_bfd, symtab_hdr->sh_link, sym->st_name)); | 1779 | + (input_bfd, symtab_hdr->sh_link, sym->st_name)); |
1755 | + if (name == NULL || *name == '\0') | 1780 | + if (name == NULL || *name == '\0') |
1756 | + name = bfd_section_name (input_bfd, sec); | 1781 | + name = bfd_section_name (sec); |
1757 | + } | 1782 | + } |
1758 | + | 1783 | + |
1759 | + if (errmsg != NULL) | 1784 | + if (errmsg != NULL) |
@@ -1798,21 +1823,6 @@ index 0000000000..0f43ae6ea8 | |||
1798 | + return ret; | 1823 | + return ret; |
1799 | +} | 1824 | +} |
1800 | + | 1825 | + |
1801 | +/* Merge backend specific data from an object file to the output | ||
1802 | + object file when linking. | ||
1803 | + | ||
1804 | + Note: We only use this hook to catch endian mismatches. */ | ||
1805 | +static bfd_boolean | ||
1806 | +microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | ||
1807 | +{ | ||
1808 | + /* Check if we have the same endianess. */ | ||
1809 | + if (! _bfd_generic_verify_endian_match (ibfd, obfd)) | ||
1810 | + return FALSE; | ||
1811 | + | ||
1812 | + return TRUE; | ||
1813 | +} | ||
1814 | + | ||
1815 | + | ||
1816 | +/* Calculate fixup value for reference. */ | 1826 | +/* Calculate fixup value for reference. */ |
1817 | + | 1827 | + |
1818 | +static int | 1828 | +static int |
@@ -2129,7 +2139,7 @@ index 0000000000..0f43ae6ea8 | |||
2129 | + irelscanend = irelocs + o->reloc_count; | 2139 | + irelscanend = irelocs + o->reloc_count; |
2130 | + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 2140 | + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
2131 | + { | 2141 | + { |
2132 | + if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) | 2142 | + if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) |
2133 | + { | 2143 | + { |
2134 | + unsigned int val; | 2144 | + unsigned int val; |
2135 | + | 2145 | + |
@@ -2488,17 +2498,6 @@ index 0000000000..0f43ae6ea8 | |||
2488 | + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); | 2498 | + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
2489 | +} | 2499 | +} |
2490 | + | 2500 | + |
2491 | +/* Update the got entry reference counts for the section being removed. */ | ||
2492 | + | ||
2493 | +static bfd_boolean | ||
2494 | +microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED, | ||
2495 | + struct bfd_link_info * info ATTRIBUTE_UNUSED, | ||
2496 | + asection * sec ATTRIBUTE_UNUSED, | ||
2497 | + const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED) | ||
2498 | +{ | ||
2499 | + return TRUE; | ||
2500 | +} | ||
2501 | + | ||
2502 | +/* PIC support. */ | 2501 | +/* PIC support. */ |
2503 | + | 2502 | + |
2504 | +#define PLT_ENTRY_SIZE 16 | 2503 | +#define PLT_ENTRY_SIZE 16 |
@@ -2531,13 +2530,13 @@ index 0000000000..0f43ae6ea8 | |||
2531 | + if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL) | 2530 | + if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL) |
2532 | + htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got"); | 2531 | + htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got"); |
2533 | + if (htab->srelgot == NULL | 2532 | + if (htab->srelgot == NULL |
2534 | + || ! bfd_set_section_flags (dynobj, htab->srelgot, SEC_ALLOC | 2533 | + || ! bfd_set_section_flags (htab->srelgot, SEC_ALLOC |
2535 | + | SEC_LOAD | 2534 | + | SEC_LOAD |
2536 | + | SEC_HAS_CONTENTS | 2535 | + | SEC_HAS_CONTENTS |
2537 | + | SEC_IN_MEMORY | 2536 | + | SEC_IN_MEMORY |
2538 | + | SEC_LINKER_CREATED | 2537 | + | SEC_LINKER_CREATED |
2539 | + | SEC_READONLY) | 2538 | + | SEC_READONLY) |
2540 | + || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2)) | 2539 | + || ! bfd_set_section_alignment (htab->srelgot, 2)) |
2541 | + return FALSE; | 2540 | + return FALSE; |
2542 | + return TRUE; | 2541 | + return TRUE; |
2543 | +} | 2542 | +} |
@@ -2618,7 +2617,7 @@ index 0000000000..0f43ae6ea8 | |||
2618 | + | 2617 | + |
2619 | + /* PR15323, ref flags aren't set for references in the same | 2618 | + /* PR15323, ref flags aren't set for references in the same |
2620 | + object. */ | 2619 | + object. */ |
2621 | + h->root.non_ir_ref = 1; | 2620 | + h->root.non_ir_ref_regular = 1; |
2622 | + } | 2621 | + } |
2623 | + | 2622 | + |
2624 | + switch (r_type) | 2623 | + switch (r_type) |
@@ -2654,6 +2653,7 @@ index 0000000000..0f43ae6ea8 | |||
2654 | + tls_type |= (TLS_TLS | TLS_LD); | 2653 | + tls_type |= (TLS_TLS | TLS_LD); |
2655 | + dogottls: | 2654 | + dogottls: |
2656 | + sec->has_tls_reloc = 1; | 2655 | + sec->has_tls_reloc = 1; |
2656 | + /* Fall through. */ | ||
2657 | + case R_MICROBLAZE_GOT_64: | 2657 | + case R_MICROBLAZE_GOT_64: |
2658 | + if (htab->sgot == NULL) | 2658 | + if (htab->sgot == NULL) |
2659 | + { | 2659 | + { |
@@ -2927,12 +2927,12 @@ index 0000000000..0f43ae6ea8 | |||
2927 | + /* If this is a weak symbol, and there is a real definition, the | 2927 | + /* If this is a weak symbol, and there is a real definition, the |
2928 | + processor independent code will have arranged for us to see the | 2928 | + processor independent code will have arranged for us to see the |
2929 | + real definition first, and we can just use the same value. */ | 2929 | + real definition first, and we can just use the same value. */ |
2930 | + if (h->u.weakdef != NULL) | 2930 | + if (h->is_weakalias) |
2931 | + { | 2931 | + { |
2932 | + BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined | 2932 | + struct elf_link_hash_entry *def = weakdef (h); |
2933 | + || h->u.weakdef->root.type == bfd_link_hash_defweak); | 2933 | + BFD_ASSERT (def->root.type == bfd_link_hash_defined); |
2934 | + h->root.u.def.section = h->u.weakdef->root.u.def.section; | 2934 | + h->root.u.def.section = def->root.u.def.section; |
2935 | + h->root.u.def.value = h->u.weakdef->root.u.def.value; | 2935 | + h->root.u.def.value = def->root.u.def.value; |
2936 | + return TRUE; | 2936 | + return TRUE; |
2937 | + } | 2937 | + } |
2938 | + | 2938 | + |
@@ -3004,9 +3004,9 @@ index 0000000000..0f43ae6ea8 | |||
3004 | + sdynbss = htab->sdynbss; | 3004 | + sdynbss = htab->sdynbss; |
3005 | + /* Apply the required alignment. */ | 3005 | + /* Apply the required alignment. */ |
3006 | + sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two)); | 3006 | + sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two)); |
3007 | + if (power_of_two > bfd_get_section_alignment (dynobj, sdynbss)) | 3007 | + if (power_of_two > bfd_section_alignment (sdynbss)) |
3008 | + { | 3008 | + { |
3009 | + if (! bfd_set_section_alignment (dynobj, sdynbss, power_of_two)) | 3009 | + if (! bfd_set_section_alignment (sdynbss, power_of_two)) |
3010 | + return FALSE; | 3010 | + return FALSE; |
3011 | + } | 3011 | + } |
3012 | + | 3012 | + |
@@ -3353,7 +3353,7 @@ index 0000000000..0f43ae6ea8 | |||
3353 | + | 3353 | + |
3354 | + /* It's OK to base decisions on the section name, because none | 3354 | + /* It's OK to base decisions on the section name, because none |
3355 | + of the dynobj section names depend upon the input files. */ | 3355 | + of the dynobj section names depend upon the input files. */ |
3356 | + name = bfd_get_section_name (dynobj, s); | 3356 | + name = bfd_section_name (s); |
3357 | + | 3357 | + |
3358 | + if (strncmp (name, ".rela", 5) == 0) | 3358 | + if (strncmp (name, ".rela", 5) == 0) |
3359 | + { | 3359 | + { |
@@ -3721,7 +3721,7 @@ index 0000000000..0f43ae6ea8 | |||
3721 | + put into .sbss. */ | 3721 | + put into .sbss. */ |
3722 | + *secp = bfd_make_section_old_way (abfd, ".sbss"); | 3722 | + *secp = bfd_make_section_old_way (abfd, ".sbss"); |
3723 | + if (*secp == NULL | 3723 | + if (*secp == NULL |
3724 | + || ! bfd_set_section_flags (abfd, *secp, SEC_IS_COMMON)) | 3724 | + || ! bfd_set_section_flags (*secp, SEC_IS_COMMON)) |
3725 | + return FALSE; | 3725 | + return FALSE; |
3726 | + | 3726 | + |
3727 | + *valp = sym->st_size; | 3727 | + *valp = sym->st_size; |
@@ -3748,11 +3748,10 @@ index 0000000000..0f43ae6ea8 | |||
3748 | +#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name | 3748 | +#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name |
3749 | +#define elf_backend_relocate_section microblaze_elf_relocate_section | 3749 | +#define elf_backend_relocate_section microblaze_elf_relocate_section |
3750 | +#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section | 3750 | +#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section |
3751 | +#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data | 3751 | +#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match |
3752 | +#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup | 3752 | +#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup |
3753 | + | 3753 | + |
3754 | +#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook | 3754 | +#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook |
3755 | +#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook | ||
3756 | +#define elf_backend_check_relocs microblaze_elf_check_relocs | 3755 | +#define elf_backend_check_relocs microblaze_elf_check_relocs |
3757 | +#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol | 3756 | +#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol |
3758 | +#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create | 3757 | +#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create |
@@ -3772,10 +3771,10 @@ index 0000000000..0f43ae6ea8 | |||
3772 | + | 3771 | + |
3773 | +#include "elf64-target.h" | 3772 | +#include "elf64-target.h" |
3774 | diff --git a/bfd/targets.c b/bfd/targets.c | 3773 | diff --git a/bfd/targets.c b/bfd/targets.c |
3775 | index 158168cb3b..ef567a30c8 100644 | 3774 | index fb0c669e7f7..97b0e473e16 100644 |
3776 | --- a/bfd/targets.c | 3775 | --- a/bfd/targets.c |
3777 | +++ b/bfd/targets.c | 3776 | +++ b/bfd/targets.c |
3778 | @@ -706,6 +706,8 @@ extern const bfd_target mep_elf32_le_vec; | 3777 | @@ -779,6 +779,8 @@ extern const bfd_target mep_elf32_le_vec; |
3779 | extern const bfd_target metag_elf32_vec; | 3778 | extern const bfd_target metag_elf32_vec; |
3780 | extern const bfd_target microblaze_elf32_vec; | 3779 | extern const bfd_target microblaze_elf32_vec; |
3781 | extern const bfd_target microblaze_elf32_le_vec; | 3780 | extern const bfd_target microblaze_elf32_le_vec; |
@@ -3784,7 +3783,7 @@ index 158168cb3b..ef567a30c8 100644 | |||
3784 | extern const bfd_target mips_ecoff_be_vec; | 3783 | extern const bfd_target mips_ecoff_be_vec; |
3785 | extern const bfd_target mips_ecoff_le_vec; | 3784 | extern const bfd_target mips_ecoff_le_vec; |
3786 | extern const bfd_target mips_ecoff_bele_vec; | 3785 | extern const bfd_target mips_ecoff_bele_vec; |
3787 | @@ -1073,6 +1075,10 @@ static const bfd_target * const _bfd_target_vector[] = | 3786 | @@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_target_vector[] = |
3788 | 3787 | ||
3789 | &metag_elf32_vec, | 3788 | &metag_elf32_vec, |
3790 | 3789 | ||
@@ -3796,7 +3795,7 @@ index 158168cb3b..ef567a30c8 100644 | |||
3796 | 3795 | ||
3797 | &mips_ecoff_be_vec, | 3796 | &mips_ecoff_be_vec, |
3798 | diff --git a/include/elf/common.h b/include/elf/common.h | 3797 | diff --git a/include/elf/common.h b/include/elf/common.h |
3799 | index e8faf67be3..ca89da1631 100644 | 3798 | index 75c4fb7e9d7..1584e1c87d0 100644 |
3800 | --- a/include/elf/common.h | 3799 | --- a/include/elf/common.h |
3801 | +++ b/include/elf/common.h | 3800 | +++ b/include/elf/common.h |
3802 | @@ -339,6 +339,7 @@ | 3801 | @@ -339,6 +339,7 @@ |
@@ -3808,101 +3807,105 @@ index e8faf67be3..ca89da1631 100644 | |||
3808 | #define EM_CSKY 252 /* C-SKY processor family. */ | 3807 | #define EM_CSKY 252 /* C-SKY processor family. */ |
3809 | 3808 | ||
3810 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 3809 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
3811 | index f8aaf27873..20ea6a885a 100644 | 3810 | index 356f1da22ed..437f536e96a 100644 |
3812 | --- a/opcodes/microblaze-dis.c | 3811 | --- a/opcodes/microblaze-dis.c |
3813 | +++ b/opcodes/microblaze-dis.c | 3812 | +++ b/opcodes/microblaze-dis.c |
3814 | @@ -33,6 +33,7 @@ | 3813 | @@ -33,6 +33,7 @@ |
3815 | #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW) | 3814 | #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) |
3816 | #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW) | 3815 | #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) |
3817 | #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) | 3816 | #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) |
3818 | +#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) | 3817 | +#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) |
3819 | #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) | 3818 | #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) |
3820 | 3819 | ||
3821 | 3820 | #define NUM_STRBUFS 3 | |
3822 | @@ -56,11 +57,20 @@ get_field_imm (long instr) | 3821 | @@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr) |
3823 | } | 3822 | } |
3824 | 3823 | ||
3825 | static char * | 3824 | static char * |
3826 | -get_field_imm5 (long instr) | 3825 | -get_field_imm5 (struct string_buf *buf, long instr) |
3827 | +get_field_imml (long instr) | 3826 | +get_field_imml (struct string_buf *buf, long instr) |
3828 | { | 3827 | { |
3829 | char tmpstr[25]; | 3828 | char *p = strbuf (buf); |
3830 | 3829 | ||
3831 | - sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); | 3830 | - sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); |
3832 | + sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); | 3831 | + sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); |
3833 | + return (strdup (tmpstr)); | 3832 | + return p; |
3834 | +} | 3833 | +} |
3835 | + | 3834 | + |
3836 | +static char * | 3835 | +static char * |
3837 | +get_field_imms (long instr) | 3836 | +get_field_imms (struct string_buf *buf, long instr) |
3838 | +{ | 3837 | +{ |
3839 | + char tmpstr[25]; | 3838 | + char *p = strbuf (buf); |
3840 | + | 3839 | + |
3841 | + sprintf (tmpstr, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); | 3840 | + sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); |
3842 | return (strdup (tmpstr)); | 3841 | return p; |
3843 | } | 3842 | } |
3844 | 3843 | ||
3845 | @@ -74,14 +84,14 @@ get_field_imm5_mbar (long instr) | 3844 | @@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) |
3846 | } | 3845 | } |
3847 | 3846 | ||
3848 | static char * | 3847 | static char * |
3849 | -get_field_imm5width (long instr) | 3848 | -get_field_imm5width (struct string_buf *buf, long instr) |
3850 | +get_field_immw (long instr) | 3849 | +get_field_immw (struct string_buf *buf, long instr) |
3851 | { | 3850 | { |
3852 | char tmpstr[25]; | 3851 | char *p = strbuf (buf); |
3853 | 3852 | ||
3854 | if (instr & 0x00004000) | 3853 | if (instr & 0x00004000) |
3855 | - sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ | 3854 | - sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ |
3856 | + sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ | 3855 | + sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ |
3857 | else | 3856 | else |
3858 | - sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ | 3857 | - sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ |
3859 | + sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ | 3858 | + sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ |
3860 | return (strdup (tmpstr)); | 3859 | return p; |
3861 | } | 3860 | } |
3862 | 3861 | ||
3863 | @@ -286,9 +296,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 3862 | @@ -306,9 +316,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
3864 | } | 3863 | } |
3865 | } | 3864 | } |
3866 | break; | 3865 | break; |
3867 | - case INST_TYPE_RD_R1_IMM5: | 3866 | - case INST_TYPE_RD_R1_IMM5: |
3868 | + case INST_TYPE_RD_R1_IMML: | 3867 | + case INST_TYPE_RD_R1_IMML: |
3869 | + print_func (stream, "\t%s, %s, %s", get_field_rd (inst), | 3868 | print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), |
3870 | + get_field_r1(inst), get_field_imm (inst)); | 3869 | - get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst)); |
3870 | + get_field_r1(&buf, inst), get_field_imm (&buf, inst)); | ||
3871 | + /* TODO: Also print symbol */ | 3871 | + /* TODO: Also print symbol */ |
3872 | + break; | ||
3872 | + case INST_TYPE_RD_R1_IMMS: | 3873 | + case INST_TYPE_RD_R1_IMMS: |
3873 | print_func (stream, "\t%s, %s, %s", get_field_rd (inst), | 3874 | + print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), |
3874 | - get_field_r1(inst), get_field_imm5 (inst)); | 3875 | + get_field_r1(&buf, inst), get_field_imms (&buf, inst)); |
3875 | + get_field_r1(inst), get_field_imms (inst)); | ||
3876 | break; | 3876 | break; |
3877 | case INST_TYPE_RD_RFSL: | 3877 | case INST_TYPE_RD_RFSL: |
3878 | print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst)); | 3878 | print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), |
3879 | @@ -386,6 +400,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 3879 | @@ -412,9 +427,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
3880 | } | 3880 | } |
3881 | } | 3881 | } |
3882 | break; | 3882 | break; |
3883 | - case INST_TYPE_RD_R2: | ||
3884 | - print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), | ||
3885 | - get_field_r2 (&buf, inst)); | ||
3883 | + case INST_TYPE_IMML: | 3886 | + case INST_TYPE_IMML: |
3884 | + print_func (stream, "\t%s", get_field_imml (inst)); | 3887 | + print_func (stream, "\t%s", get_field_imml (&buf, inst)); |
3885 | + /* TODO: Also print symbol */ | 3888 | + /* TODO: Also print symbol */ |
3886 | + break; | 3889 | + break; |
3887 | case INST_TYPE_RD_R2: | 3890 | + case INST_TYPE_RD_R2: |
3888 | print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst)); | 3891 | + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); |
3889 | break; | 3892 | break; |
3890 | @@ -409,9 +427,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 3893 | case INST_TYPE_R2: |
3891 | case INST_TYPE_NONE: | 3894 | print_func (stream, "\t%s", get_field_r2 (&buf, inst)); |
3892 | break; | 3895 | @@ -439,8 +457,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
3896 | break; | ||
3897 | /* For tuqula instruction */ | ||
3893 | /* For bit field insns. */ | 3898 | /* For bit field insns. */ |
3894 | - case INST_TYPE_RD_R1_IMM5_IMM5: | 3899 | - case INST_TYPE_RD_R1_IMM5_IMM5: |
3895 | - print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst)); | 3900 | - print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); |
3896 | - break; | ||
3897 | + case INST_TYPE_RD_R1_IMMW_IMMS: | 3901 | + case INST_TYPE_RD_R1_IMMW_IMMS: |
3898 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst), get_field_r1(inst), | 3902 | + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), |
3899 | + get_field_immw (inst), get_field_imms (inst)); | 3903 | + get_field_immw (&buf, inst), get_field_imms (&buf, inst)); |
3900 | + break; | 3904 | break; |
3901 | /* For tuqula instruction */ | 3905 | /* For tuqula instruction */ |
3902 | case INST_TYPE_RD: | 3906 | case INST_TYPE_RD: |
3903 | print_func (stream, "\t%s", get_field_rd (inst)); | ||
3904 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 3907 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
3905 | index ce8ac351b5..985834b8df 100644 | 3908 | index d3b234e1fcd..28dc991c430 100644 |
3906 | --- a/opcodes/microblaze-opc.h | 3909 | --- a/opcodes/microblaze-opc.h |
3907 | +++ b/opcodes/microblaze-opc.h | 3910 | +++ b/opcodes/microblaze-opc.h |
3908 | @@ -40,7 +40,7 @@ | 3911 | @@ -40,7 +40,7 @@ |
@@ -4130,7 +4133,7 @@ index ce8ac351b5..985834b8df 100644 | |||
4130 | #endif /* MICROBLAZE_OPC */ | 4133 | #endif /* MICROBLAZE_OPC */ |
4131 | 4134 | ||
4132 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 4135 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
4133 | index 28662694cd..076dbcd0b3 100644 | 4136 | index c3b2b8f0f6e..ad475a4af15 100644 |
4134 | --- a/opcodes/microblaze-opcm.h | 4137 | --- a/opcodes/microblaze-opcm.h |
4135 | +++ b/opcodes/microblaze-opcm.h | 4138 | +++ b/opcodes/microblaze-opcm.h |
4136 | @@ -25,6 +25,7 @@ | 4139 | @@ -25,6 +25,7 @@ |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch index d4441443..8bf07398 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch | |||
@@ -1,31 +1,31 @@ | |||
1 | From 92419bfa472c29b96ff85a9769b9301539867364 Mon Sep 17 00:00:00 2001 | 1 | From f82b24b2685d0cde8f8fdd0a1dcffe7b76b2027c Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sun, 30 Sep 2018 16:31:26 +0530 | 3 | Date: Sun, 30 Sep 2018 16:31:26 +0530 |
4 | Subject: [PATCH 16/43] MB-X initial commit code cleanup is needed. | 4 | Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed. |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/bfd-in2.h | 10 +++ | 7 | bfd/bfd-in2.h | 10 +++ |
8 | bfd/elf32-microblaze.c | 65 +++++++++++++++- | 8 | bfd/elf32-microblaze.c | 63 +++++++++++++++++- |
9 | bfd/elf64-microblaze.c | 61 ++++++++++++++- | 9 | bfd/elf64-microblaze.c | 59 +++++++++++++++++ |
10 | bfd/libbfd.h | 2 + | 10 | bfd/libbfd.h | 2 + |
11 | bfd/reloc.c | 12 +++ | 11 | bfd/reloc.c | 12 ++++ |
12 | include/elf/microblaze.h | 2 + | 12 | include/elf/microblaze.h | 2 + |
13 | opcodes/microblaze-opc.h | 4 +- | 13 | opcodes/microblaze-opc.h | 4 +- |
14 | opcodes/microblaze-opcm.h | 4 +- | 14 | opcodes/microblaze-opcm.h | 4 +- |
15 | 9 files changed, 277 insertions(+), 35 deletions(-) | 15 | 9 files changed, 243 insertions(+), 40 deletions(-) |
16 | 16 | ||
17 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 17 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
18 | index 721531886a..4f777059d8 100644 | 18 | index 52c81b10b6d..c6738960bb2 100644 |
19 | --- a/bfd/bfd-in2.h | 19 | --- a/bfd/bfd-in2.h |
20 | +++ b/bfd/bfd-in2.h | 20 | +++ b/bfd/bfd-in2.h |
21 | @@ -5876,11 +5876,21 @@ done here - only used for relaxing */ | 21 | @@ -5373,11 +5373,21 @@ value in two words (with an imm instruction). No relocation is |
22 | * +done here - only used for relaxing */ | 22 | done here - only used for relaxing */ |
23 | BFD_RELOC_MICROBLAZE_64_NONE, | 23 | BFD_RELOC_MICROBLAZE_64_NONE, |
24 | 24 | ||
25 | +/* This is a 64 bit reloc that stores the 32 bit pc relative | 25 | +/* This is a 64 bit reloc that stores the 32 bit pc relative |
26 | + * +value in two words (with an imml instruction). No relocation is | 26 | +value in two words (with an imml instruction). No relocation is |
27 | + * +done here - only used for relaxing */ | 27 | +done here - only used for relaxing */ |
28 | + BFD_RELOC_MICROBLAZE_64, | 28 | + BFD_RELOC_MICROBLAZE_64, |
29 | + | 29 | + |
30 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 30 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
31 | value in two words (with an imm instruction). The relocation is | 31 | value in two words (with an imm instruction). The relocation is |
@@ -41,7 +41,7 @@ index 721531886a..4f777059d8 100644 | |||
41 | value in two words (with an imm instruction). The relocation is | 41 | value in two words (with an imm instruction). The relocation is |
42 | GOT offset */ | 42 | GOT offset */ |
43 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 43 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
44 | index d001437b3f..035e71f311 100644 | 44 | index cb7271f5017..a31b407cfbf 100644 |
45 | --- a/bfd/elf32-microblaze.c | 45 | --- a/bfd/elf32-microblaze.c |
46 | +++ b/bfd/elf32-microblaze.c | 46 | +++ b/bfd/elf32-microblaze.c |
47 | @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 47 | @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -67,7 +67,7 @@ index d001437b3f..035e71f311 100644 | |||
67 | 0, /* Rightshift. */ | 67 | 0, /* Rightshift. */ |
68 | @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 68 | @@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
69 | 0x0000ffff, /* Dest Mask. */ | 69 | 0x0000ffff, /* Dest Mask. */ |
70 | TRUE), /* PC relative offset? */ | 70 | TRUE), /* PC relative offset? */ |
71 | 71 | ||
72 | + /* A 64 bit GOTPC relocation. Table-entry not really used. */ | 72 | + /* A 64 bit GOTPC relocation. Table-entry not really used. */ |
73 | + HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ | 73 | + HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ |
@@ -103,15 +103,6 @@ index d001437b3f..035e71f311 100644 | |||
103 | case BFD_RELOC_MICROBLAZE_64_GOT: | 103 | case BFD_RELOC_MICROBLAZE_64_GOT: |
104 | microblaze_reloc = R_MICROBLAZE_GOT_64; | 104 | microblaze_reloc = R_MICROBLAZE_GOT_64; |
105 | break; | 105 | break; |
106 | @@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | ||
107 | if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) | ||
108 | { | ||
109 | relocation += addend; | ||
110 | - if (r_type == R_MICROBLAZE_32) | ||
111 | + if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) | ||
112 | bfd_put_32 (input_bfd, relocation, contents + offset); | ||
113 | else | ||
114 | { | ||
115 | @@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd, | 106 | @@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd, |
116 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); | 107 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); |
117 | } | 108 | } |
@@ -119,7 +110,7 @@ index d001437b3f..035e71f311 100644 | |||
119 | + case R_MICROBLAZE_IMML_64: | 110 | + case R_MICROBLAZE_IMML_64: |
120 | + { | 111 | + { |
121 | + /* This was a PC-relative instruction that was | 112 | + /* This was a PC-relative instruction that was |
122 | + completely resolved. */ | 113 | + completely resolved. */ |
123 | + int sfix, efix; | 114 | + int sfix, efix; |
124 | + unsigned int val; | 115 | + unsigned int val; |
125 | + bfd_vma target_address; | 116 | + bfd_vma target_address; |
@@ -141,21 +132,21 @@ index d001437b3f..035e71f311 100644 | |||
141 | case R_MICROBLAZE_NONE: | 132 | case R_MICROBLAZE_NONE: |
142 | case R_MICROBLAZE_32_NONE: | 133 | case R_MICROBLAZE_32_NONE: |
143 | { | 134 | { |
144 | @@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd, | 135 | @@ -2038,9 +2095,9 @@ microblaze_elf_relax_section (bfd *abfd, |
145 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 136 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
146 | irelscan->r_addend); | 137 | irelscan->r_addend); |
147 | } | 138 | } |
148 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) | 139 | - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
149 | - { | 140 | - { |
150 | - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 141 | - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
151 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) | 142 | + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
152 | + { | 143 | + { |
153 | + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 144 | + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
154 | 145 | ||
155 | /* Look at the reloc only if the value has been resolved. */ | 146 | /* Look at the reloc only if the value has been resolved. */ |
156 | if (isym->st_shndx == shndx | 147 | if (isym->st_shndx == shndx |
157 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 148 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
158 | index 0f43ae6ea8..56a45f2a05 100644 | 149 | index fa4b95e47e0..d55700fc513 100644 |
159 | --- a/bfd/elf64-microblaze.c | 150 | --- a/bfd/elf64-microblaze.c |
160 | +++ b/bfd/elf64-microblaze.c | 151 | +++ b/bfd/elf64-microblaze.c |
161 | @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 152 | @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -218,7 +209,7 @@ index 0f43ae6ea8..56a45f2a05 100644 | |||
218 | case BFD_RELOC_MICROBLAZE_64_GOT: | 209 | case BFD_RELOC_MICROBLAZE_64_GOT: |
219 | microblaze_reloc = R_MICROBLAZE_GOT_64; | 210 | microblaze_reloc = R_MICROBLAZE_GOT_64; |
220 | break; | 211 | break; |
221 | @@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 212 | @@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
222 | break; /* Do nothing. */ | 213 | break; /* Do nothing. */ |
223 | 214 | ||
224 | case (int) R_MICROBLAZE_GOTPC_64: | 215 | case (int) R_MICROBLAZE_GOTPC_64: |
@@ -226,23 +217,14 @@ index 0f43ae6ea8..56a45f2a05 100644 | |||
226 | relocation = htab->sgotplt->output_section->vma | 217 | relocation = htab->sgotplt->output_section->vma |
227 | + htab->sgotplt->output_offset; | 218 | + htab->sgotplt->output_offset; |
228 | relocation -= (input_section->output_section->vma | 219 | relocation -= (input_section->output_section->vma |
229 | @@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 220 | @@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd, |
230 | if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) | ||
231 | { | ||
232 | relocation += addend; | ||
233 | - if (r_type == R_MICROBLAZE_32) | ||
234 | + if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) | ||
235 | bfd_put_32 (input_bfd, relocation, contents + offset); | ||
236 | else | ||
237 | { | ||
238 | @@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd, | ||
239 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); | 221 | irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); |
240 | } | 222 | } |
241 | break; | 223 | break; |
242 | + case R_MICROBLAZE_IMML_64: | 224 | + case R_MICROBLAZE_IMML_64: |
243 | + { | 225 | + { |
244 | + /* This was a PC-relative instruction that was | 226 | + /* This was a PC-relative instruction that was |
245 | + completely resolved. */ | 227 | + completely resolved. */ |
246 | + int sfix, efix; | 228 | + int sfix, efix; |
247 | + unsigned int val; | 229 | + unsigned int val; |
248 | + bfd_vma target_address; | 230 | + bfd_vma target_address; |
@@ -265,10 +247,10 @@ index 0f43ae6ea8..56a45f2a05 100644 | |||
265 | case R_MICROBLAZE_32_NONE: | 247 | case R_MICROBLAZE_32_NONE: |
266 | { | 248 | { |
267 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 249 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
268 | index feb9fada1e..450653f2d8 100644 | 250 | index a01891f3423..4e71991273e 100644 |
269 | --- a/bfd/libbfd.h | 251 | --- a/bfd/libbfd.h |
270 | +++ b/bfd/libbfd.h | 252 | +++ b/bfd/libbfd.h |
271 | @@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 253 | @@ -2905,7 +2905,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
272 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 254 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
273 | "BFD_RELOC_MICROBLAZE_32_NONE", | 255 | "BFD_RELOC_MICROBLAZE_32_NONE", |
274 | "BFD_RELOC_MICROBLAZE_64_NONE", | 256 | "BFD_RELOC_MICROBLAZE_64_NONE", |
@@ -279,10 +261,10 @@ index feb9fada1e..450653f2d8 100644 | |||
279 | "BFD_RELOC_MICROBLAZE_64_PLT", | 261 | "BFD_RELOC_MICROBLAZE_64_PLT", |
280 | "BFD_RELOC_MICROBLAZE_64_GOTOFF", | 262 | "BFD_RELOC_MICROBLAZE_64_GOTOFF", |
281 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 263 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
282 | index 87753ae4f0..ccf29f54cf 100644 | 264 | index 78f13180c71..8b3cc604738 100644 |
283 | --- a/bfd/reloc.c | 265 | --- a/bfd/reloc.c |
284 | +++ b/bfd/reloc.c | 266 | +++ b/bfd/reloc.c |
285 | @@ -6803,12 +6803,24 @@ ENUMDOC | 267 | @@ -6814,12 +6814,24 @@ ENUMDOC |
286 | done here - only used for relaxing | 268 | done here - only used for relaxing |
287 | ENUM | 269 | ENUM |
288 | BFD_RELOC_MICROBLAZE_64_NONE | 270 | BFD_RELOC_MICROBLAZE_64_NONE |
@@ -308,7 +290,7 @@ index 87753ae4f0..ccf29f54cf 100644 | |||
308 | This is a 64 bit reloc that stores the 32 bit pc relative | 290 | This is a 64 bit reloc that stores the 32 bit pc relative |
309 | value in two words (with an imm instruction). The relocation is | 291 | value in two words (with an imm instruction). The relocation is |
310 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h | 292 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h |
311 | index 6ee0966444..16b2736577 100644 | 293 | index 0dba2c0f44f..030eb99a1a0 100644 |
312 | --- a/include/elf/microblaze.h | 294 | --- a/include/elf/microblaze.h |
313 | +++ b/include/elf/microblaze.h | 295 | +++ b/include/elf/microblaze.h |
314 | @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) | 296 | @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) |
@@ -317,11 +299,11 @@ index 6ee0966444..16b2736577 100644 | |||
317 | RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) | 299 | RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) |
318 | + RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) | 300 | + RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) |
319 | + RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ | 301 | + RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ |
320 | |||
321 | END_RELOC_NUMBERS (R_MICROBLAZE_max) | 302 | END_RELOC_NUMBERS (R_MICROBLAZE_max) |
322 | 303 | ||
304 | /* Global base address names. */ | ||
323 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 305 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
324 | index 985834b8df..9b6264b61c 100644 | 306 | index 28dc991c430..46263bc7e16 100644 |
325 | --- a/opcodes/microblaze-opc.h | 307 | --- a/opcodes/microblaze-opc.h |
326 | +++ b/opcodes/microblaze-opc.h | 308 | +++ b/opcodes/microblaze-opc.h |
327 | @@ -538,8 +538,8 @@ struct op_code_struct | 309 | @@ -538,8 +538,8 @@ struct op_code_struct |
@@ -336,7 +318,7 @@ index 985834b8df..9b6264b61c 100644 | |||
336 | {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, | 318 | {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, |
337 | {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, | 319 | {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, |
338 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 320 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
339 | index 076dbcd0b3..5f2e190d23 100644 | 321 | index ad475a4af15..ee01cdb7d9b 100644 |
340 | --- a/opcodes/microblaze-opcm.h | 322 | --- a/opcodes/microblaze-opcm.h |
341 | +++ b/opcodes/microblaze-opcm.h | 323 | +++ b/opcodes/microblaze-opcm.h |
342 | @@ -40,8 +40,8 @@ enum microblaze_instr | 324 | @@ -40,8 +40,8 @@ enum microblaze_instr |
@@ -344,9 +326,9 @@ index 076dbcd0b3..5f2e190d23 100644 | |||
344 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, | 326 | brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, |
345 | bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, | 327 | bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, |
346 | - sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, | 328 | - sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, |
347 | - sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | 329 | - sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
348 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, | 330 | + sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, |
349 | + sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, | 331 | + sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, |
350 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, | 332 | fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, |
351 | fint, fsqrt, | 333 | fint, fsqrt, |
352 | tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, | 334 | tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch index 26938396..eaf24505 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch | |||
@@ -1,15 +1,16 @@ | |||
1 | From 4010e83aa48f0415e4478d70871aa87cb204d350 Mon Sep 17 00:00:00 2001 | 1 | From b6ec3e2295ba33d2c8f48500d75a147ffd84a656 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 11 Sep 2018 13:48:33 +0530 | 3 | Date: Tue, 11 Sep 2018 13:48:33 +0530 |
4 | Subject: [PATCH 17/43] [Patch,Microblaze] : negl instruction is overriding | 4 | Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding |
5 | rsubl,fixed it by changing the instruction order... | 5 | rsubl |
6 | 6 | ||
7 | fixed it by changing the instruction order... | ||
7 | --- | 8 | --- |
8 | opcodes/microblaze-opc.h | 4 ++-- | 9 | opcodes/microblaze-opc.h | 4 ++-- |
9 | 1 file changed, 2 insertions(+), 2 deletions(-) | 10 | 1 file changed, 2 insertions(+), 2 deletions(-) |
10 | 11 | ||
11 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 12 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
12 | index 9b6264b61c..824afc0ab0 100644 | 13 | index 46263bc7e16..f4ee8f43372 100644 |
13 | --- a/opcodes/microblaze-opc.h | 14 | --- a/opcodes/microblaze-opc.h |
14 | +++ b/opcodes/microblaze-opc.h | 15 | +++ b/opcodes/microblaze-opc.h |
15 | @@ -275,9 +275,7 @@ struct op_code_struct | 16 | @@ -275,9 +275,7 @@ struct op_code_struct |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch index 93ec10fd..742f9e34 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch | |||
@@ -1,47 +1,47 @@ | |||
1 | From b625d19f8b86dd81c32f21793cc3e038ca275e57 Mon Sep 17 00:00:00 2001 | 1 | From 982f37caabea84cee52426844e73365f0cb93f3d Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 11 Sep 2018 17:30:17 +0530 | 3 | Date: Tue, 11 Sep 2018 17:30:17 +0530 |
4 | Subject: [PATCH 18/43] Added relocations for MB-X | 4 | Subject: [PATCH 18/40] Added relocations for MB-X |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/bfd-in2.h | 11 +++-- | 7 | bfd/bfd-in2.h | 11 +++++--- |
8 | bfd/libbfd.h | 4 +- | 8 | bfd/libbfd.h | 4 +-- |
9 | bfd/reloc.c | 26 ++++++----- | 9 | bfd/reloc.c | 26 +++++++++--------- |
10 | 4 files changed, 62 insertions(+), 69 deletions(-) | 10 | 4 files changed, 63 insertions(+), 32 deletions(-) |
11 | 11 | ||
12 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 12 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
13 | index 4f777059d8..de46e78902 100644 | 13 | index c6738960bb2..3899352b1d5 100644 |
14 | --- a/bfd/bfd-in2.h | 14 | --- a/bfd/bfd-in2.h |
15 | +++ b/bfd/bfd-in2.h | 15 | +++ b/bfd/bfd-in2.h |
16 | @@ -5872,15 +5872,20 @@ done here - only used for relaxing */ | 16 | @@ -5369,15 +5369,20 @@ done here - only used for relaxing */ |
17 | BFD_RELOC_MICROBLAZE_32_NONE, | 17 | BFD_RELOC_MICROBLAZE_32_NONE, |
18 | 18 | ||
19 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 19 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
20 | - * +value in two words (with an imm instruction). No relocation is | 20 | -value in two words (with an imm instruction). No relocation is |
21 | + * +value in two words (with an imml instruction). No relocation is | 21 | +value in two words (with an imml instruction). No relocation is |
22 | * +done here - only used for relaxing */ | 22 | done here - only used for relaxing */ |
23 | - BFD_RELOC_MICROBLAZE_64_NONE, | 23 | - BFD_RELOC_MICROBLAZE_64_NONE, |
24 | + BFD_RELOC_MICROBLAZE_64_PCREL, | 24 | + BFD_RELOC_MICROBLAZE_64_PCREL, |
25 | 25 | ||
26 | -/* This is a 64 bit reloc that stores the 32 bit pc relative | 26 | -/* This is a 64 bit reloc that stores the 32 bit pc relative |
27 | +/* This is a 64 bit reloc that stores the 32 bit relative | 27 | +/* This is a 64 bit reloc that stores the 32 bit relative |
28 | * +value in two words (with an imml instruction). No relocation is | 28 | value in two words (with an imml instruction). No relocation is |
29 | * +done here - only used for relaxing */ | 29 | done here - only used for relaxing */ |
30 | BFD_RELOC_MICROBLAZE_64, | 30 | BFD_RELOC_MICROBLAZE_64, |
31 | 31 | ||
32 | +/* This is a 64 bit reloc that stores the 32 bit pc relative | 32 | +/* This is a 64 bit reloc that stores the 32 bit pc relative |
33 | + * +value in two words (with an imm instruction). No relocation is | 33 | +value in two words (with an imm instruction). No relocation is |
34 | + * +done here - only used for relaxing */ | 34 | +done here - only used for relaxing */ |
35 | + BFD_RELOC_MICROBLAZE_64_NONE, | 35 | + BFD_RELOC_MICROBLAZE_64_NONE, |
36 | + | 36 | + |
37 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 37 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
38 | value in two words (with an imm instruction). The relocation is | 38 | value in two words (with an imm instruction). The relocation is |
39 | PC-relative GOT offset */ | 39 | PC-relative GOT offset */ |
40 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 40 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
41 | index 450653f2d8..d87a183d5e 100644 | 41 | index 4e71991273e..46be3891390 100644 |
42 | --- a/bfd/libbfd.h | 42 | --- a/bfd/libbfd.h |
43 | +++ b/bfd/libbfd.h | 43 | +++ b/bfd/libbfd.h |
44 | @@ -2903,14 +2903,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 44 | @@ -2905,14 +2905,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
45 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 45 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
46 | "BFD_RELOC_MICROBLAZE_32_NONE", | 46 | "BFD_RELOC_MICROBLAZE_32_NONE", |
47 | "BFD_RELOC_MICROBLAZE_64_NONE", | 47 | "BFD_RELOC_MICROBLAZE_64_NONE", |
@@ -59,10 +59,10 @@ index 450653f2d8..d87a183d5e 100644 | |||
59 | "BFD_RELOC_MICROBLAZE_64_TLSGD", | 59 | "BFD_RELOC_MICROBLAZE_64_TLSGD", |
60 | "BFD_RELOC_MICROBLAZE_64_TLSLD", | 60 | "BFD_RELOC_MICROBLAZE_64_TLSLD", |
61 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 61 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
62 | index ccf29f54cf..861f2d48c0 100644 | 62 | index 8b3cc604738..98a156f061f 100644 |
63 | --- a/bfd/reloc.c | 63 | --- a/bfd/reloc.c |
64 | +++ b/bfd/reloc.c | 64 | +++ b/bfd/reloc.c |
65 | @@ -6803,24 +6803,12 @@ ENUMDOC | 65 | @@ -6814,24 +6814,12 @@ ENUMDOC |
66 | done here - only used for relaxing | 66 | done here - only used for relaxing |
67 | ENUM | 67 | ENUM |
68 | BFD_RELOC_MICROBLAZE_64_NONE | 68 | BFD_RELOC_MICROBLAZE_64_NONE |
@@ -87,7 +87,7 @@ index ccf29f54cf..861f2d48c0 100644 | |||
87 | ENUMDOC | 87 | ENUMDOC |
88 | This is a 64 bit reloc that stores the 32 bit pc relative | 88 | This is a 64 bit reloc that stores the 32 bit pc relative |
89 | value in two words (with an imm instruction). The relocation is | 89 | value in two words (with an imm instruction). The relocation is |
90 | @@ -6906,6 +6894,20 @@ ENUMDOC | 90 | @@ -6917,6 +6905,20 @@ ENUMDOC |
91 | value in two words (with an imm instruction). The relocation is | 91 | value in two words (with an imm instruction). The relocation is |
92 | relative offset from start of TEXT. | 92 | relative offset from start of TEXT. |
93 | 93 | ||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch index 4a35a597..fc5c9464 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixed-MB-x-relocation-issues.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch | |||
@@ -1,26 +1,27 @@ | |||
1 | From f190b9380c325b48697755328f4193791a758e55 Mon Sep 17 00:00:00 2001 | 1 | From 0bb779328b8564b008a6134826f043b4326f4904 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 28 Sep 2018 12:04:55 +0530 | 3 | Date: Fri, 28 Sep 2018 12:04:55 +0530 |
4 | Subject: [PATCH 19/43] -Fixed MB-x relocation issues -Added imml for required | 4 | Subject: [PATCH 19/40] Update MB-x |
5 | MB-x instructions | ||
6 | 5 | ||
6 | -Fixed MB-x relocation issues | ||
7 | -Added imml for required MB-x instructions | ||
7 | --- | 8 | --- |
8 | bfd/elf64-microblaze.c | 68 ++++++++++++++--- | 9 | bfd/elf64-microblaze.c | 68 ++++++++++-- |
9 | 3 files changed, 167 insertions(+), 55 deletions(-) | 10 | 3 files changed, 209 insertions(+), 82 deletions(-) |
10 | 11 | ||
11 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 12 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
12 | index 56a45f2a05..54a2461037 100644 | 13 | index d55700fc513..f8f52870639 100644 |
13 | --- a/bfd/elf64-microblaze.c | 14 | --- a/bfd/elf64-microblaze.c |
14 | +++ b/bfd/elf64-microblaze.c | 15 | +++ b/bfd/elf64-microblaze.c |
15 | @@ -1476,8 +1476,17 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 16 | @@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
16 | relocation -= (input_section->output_section->vma | 17 | relocation -= (input_section->output_section->vma |
17 | + input_section->output_offset | 18 | + input_section->output_offset |
18 | + offset + INST_WORD_SIZE); | 19 | + offset + INST_WORD_SIZE); |
19 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, | 20 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
20 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 21 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
21 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) | 22 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) |
22 | + { | 23 | + { |
23 | + insn &= ~0x00ffffff; | 24 | + insn &= ~0x00ffffff; |
24 | + insn |= (relocation >> 16) & 0xffffff; | 25 | + insn |= (relocation >> 16) & 0xffffff; |
25 | + bfd_put_32 (input_bfd, insn, | 26 | + bfd_put_32 (input_bfd, insn, |
26 | contents + offset + endian); | 27 | contents + offset + endian); |
@@ -31,7 +32,7 @@ index 56a45f2a05..54a2461037 100644 | |||
31 | bfd_put_16 (input_bfd, relocation & 0xffff, | 32 | bfd_put_16 (input_bfd, relocation & 0xffff, |
32 | contents + offset + endian + INST_WORD_SIZE); | 33 | contents + offset + endian + INST_WORD_SIZE); |
33 | } | 34 | } |
34 | @@ -1567,11 +1576,28 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 35 | @@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
35 | else | 36 | else |
36 | { | 37 | { |
37 | if (r_type == R_MICROBLAZE_64_PCREL) | 38 | if (r_type == R_MICROBLAZE_64_PCREL) |
@@ -41,7 +42,7 @@ index 56a45f2a05..54a2461037 100644 | |||
41 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, | 42 | - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
42 | + { | 43 | + { |
43 | + if (!input_section->output_section->vma && | 44 | + if (!input_section->output_section->vma && |
44 | + !input_section->output_offset && !offset) | 45 | + !input_section->output_offset && !offset) |
45 | + relocation -= (input_section->output_section->vma | 46 | + relocation -= (input_section->output_section->vma |
46 | + + input_section->output_offset | 47 | + + input_section->output_offset |
47 | + + offset); | 48 | + + offset); |
@@ -51,9 +52,9 @@ index 56a45f2a05..54a2461037 100644 | |||
51 | + + offset + INST_WORD_SIZE); | 52 | + + offset + INST_WORD_SIZE); |
52 | + } | 53 | + } |
53 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 54 | + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
54 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) | 55 | + if (insn == 0xb2000000 || insn == 0xb2ffffff) |
55 | + { | 56 | + { |
56 | + insn &= ~0x00ffffff; | 57 | + insn &= ~0x00ffffff; |
57 | + insn |= (relocation >> 16) & 0xffffff; | 58 | + insn |= (relocation >> 16) & 0xffffff; |
58 | + bfd_put_32 (input_bfd, insn, | 59 | + bfd_put_32 (input_bfd, insn, |
59 | contents + offset + endian); | 60 | contents + offset + endian); |
@@ -64,7 +65,7 @@ index 56a45f2a05..54a2461037 100644 | |||
64 | bfd_put_16 (input_bfd, relocation & 0xffff, | 65 | bfd_put_16 (input_bfd, relocation & 0xffff, |
65 | contents + offset + endian + INST_WORD_SIZE); | 66 | contents + offset + endian + INST_WORD_SIZE); |
66 | } | 67 | } |
67 | @@ -1690,9 +1716,19 @@ static void | 68 | @@ -1677,9 +1703,19 @@ static void |
68 | microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 69 | microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
69 | { | 70 | { |
70 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); | 71 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); |
@@ -87,7 +88,7 @@ index 56a45f2a05..54a2461037 100644 | |||
87 | } | 88 | } |
88 | 89 | ||
89 | /* Read-modify-write into the bfd, an immediate value into appropriate fields of | 90 | /* Read-modify-write into the bfd, an immediate value into appropriate fields of |
90 | @@ -1704,10 +1740,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 91 | @@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
91 | unsigned long instr_lo; | 92 | unsigned long instr_lo; |
92 | 93 | ||
93 | instr_hi = bfd_get_32 (abfd, bfd_addr); | 94 | instr_hi = bfd_get_32 (abfd, bfd_addr); |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixing-the-branch-related-issues.patch deleted file mode 100644 index 2e790dc1..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixing-the-branch-related-issues.patch +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | From 534688ca48be148ade9bb1daf77c41c4b221ac0e Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju Mekala <nmekala@xilix.com> | ||
3 | Date: Sun, 30 Sep 2018 17:06:58 +0530 | ||
4 | Subject: [PATCH 20/43] Fixing the branch related issues | ||
5 | |||
6 | --- | ||
7 | bfd/elf64-microblaze.c | 2 +- | ||
8 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
9 | |||
10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | ||
11 | index 54a2461037..e9b3cf3a86 100644 | ||
12 | --- a/bfd/elf64-microblaze.c | ||
13 | +++ b/bfd/elf64-microblaze.c | ||
14 | @@ -2532,7 +2532,7 @@ microblaze_elf_check_relocs (bfd * abfd, | ||
15 | |||
16 | /* PR15323, ref flags aren't set for references in the same | ||
17 | object. */ | ||
18 | - h->root.non_ir_ref = 1; | ||
19 | + h->root.non_ir_ref_regular = 1; | ||
20 | } | ||
21 | |||
22 | switch (r_type) | ||
23 | -- | ||
24 | 2.17.1 | ||
25 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0021-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch index dffdbd3a..eb0bc982 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0021-Fixed-address-computation-issues-with-64bit-address.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch | |||
@@ -1,9 +1,10 @@ | |||
1 | From a19471b62a23803a062693a61c783efc05e2cd33 Mon Sep 17 00:00:00 2001 | 1 | From 188a60b441711f663f07dc3c3902c8c5d590eb6c Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Tue, 9 Oct 2018 10:14:22 +0530 | 3 | Date: Tue, 9 Oct 2018 10:14:22 +0530 |
4 | Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address - | 4 | Subject: [PATCH 20/40] Various fixes |
5 | Fixed imml dissassamble issue | ||
6 | 5 | ||
6 | - Fixed address computation issues with 64bit address | ||
7 | - Fixed imml dissassamble issue | ||
7 | --- | 8 | --- |
8 | bfd/bfd-in2.h | 5 +++ | 9 | bfd/bfd-in2.h | 5 +++ |
9 | bfd/elf64-microblaze.c | 14 ++++---- | 10 | bfd/elf64-microblaze.c | 14 ++++---- |
@@ -11,23 +12,23 @@ Subject: [PATCH 21/43] - Fixed address computation issues with 64bit address - | |||
11 | 4 files changed, 79 insertions(+), 16 deletions(-) | 12 | 4 files changed, 79 insertions(+), 16 deletions(-) |
12 | 13 | ||
13 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 14 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
14 | index de46e78902..33c9cb62d9 100644 | 15 | index 3899352b1d5..91761bf6964 100644 |
15 | --- a/bfd/bfd-in2.h | 16 | --- a/bfd/bfd-in2.h |
16 | +++ b/bfd/bfd-in2.h | 17 | +++ b/bfd/bfd-in2.h |
17 | @@ -5881,6 +5881,11 @@ done here - only used for relaxing */ | 18 | @@ -5378,6 +5378,11 @@ value in two words (with an imml instruction). No relocation is |
18 | * +done here - only used for relaxing */ | 19 | done here - only used for relaxing */ |
19 | BFD_RELOC_MICROBLAZE_64, | 20 | BFD_RELOC_MICROBLAZE_64, |
20 | 21 | ||
21 | +/* This is a 64 bit reloc that stores the 32 bit relative | 22 | +/* This is a 64 bit reloc that stores the 32 bit relative |
22 | + * +value in two words (with an imml instruction). No relocation is | 23 | +value in two words (with an imml instruction). No relocation is |
23 | + * +done here - only used for relaxing */ | 24 | +done here - only used for relaxing */ |
24 | + BFD_RELOC_MICROBLAZE_EA64, | 25 | + BFD_RELOC_MICROBLAZE_EA64, |
25 | + | 26 | + |
26 | /* This is a 64 bit reloc that stores the 32 bit pc relative | 27 | /* This is a 64 bit reloc that stores the 32 bit pc relative |
27 | * +value in two words (with an imm instruction). No relocation is | 28 | value in two words (with an imm instruction). No relocation is |
28 | * +done here - only used for relaxing */ | 29 | done here - only used for relaxing */ |
29 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 30 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
30 | index e9b3cf3a86..40f10aac6d 100644 | 31 | index f8f52870639..17e58748a0b 100644 |
31 | --- a/bfd/elf64-microblaze.c | 32 | --- a/bfd/elf64-microblaze.c |
32 | +++ b/bfd/elf64-microblaze.c | 33 | +++ b/bfd/elf64-microblaze.c |
33 | @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 34 | @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -70,7 +71,7 @@ index e9b3cf3a86..40f10aac6d 100644 | |||
70 | microblaze_reloc = R_MICROBLAZE_IMML_64; | 71 | microblaze_reloc = R_MICROBLAZE_IMML_64; |
71 | break; | 72 | break; |
72 | case BFD_RELOC_MICROBLAZE_64_GOTPC: | 73 | case BFD_RELOC_MICROBLAZE_64_GOTPC: |
73 | @@ -1969,7 +1969,7 @@ microblaze_elf_relax_section (bfd *abfd, | 74 | @@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd, |
74 | efix = calc_fixup (target_address, 0, sec); | 75 | efix = calc_fixup (target_address, 0, sec); |
75 | 76 | ||
76 | /* Validate the in-band val. */ | 77 | /* Validate the in-band val. */ |
@@ -80,16 +81,16 @@ index e9b3cf3a86..40f10aac6d 100644 | |||
80 | fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); | 81 | fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); |
81 | } | 82 | } |
82 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 83 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
83 | index 20ea6a885a..f679a43606 100644 | 84 | index 437f536e96a..24ede714858 100644 |
84 | --- a/opcodes/microblaze-dis.c | 85 | --- a/opcodes/microblaze-dis.c |
85 | +++ b/opcodes/microblaze-dis.c | 86 | +++ b/opcodes/microblaze-dis.c |
86 | @@ -61,7 +61,7 @@ get_field_imml (long instr) | 87 | @@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr) |
87 | { | 88 | { |
88 | char tmpstr[25]; | 89 | char *p = strbuf (buf); |
89 | 90 | ||
90 | - sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); | 91 | - sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); |
91 | + sprintf (tmpstr, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); | 92 | + sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); |
92 | return (strdup (tmpstr)); | 93 | return p; |
93 | } | 94 | } |
94 | 95 | ||
95 | -- | 96 | -- |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0022-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch index e79b6626..0d212ccc 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0022-Adding-new-relocation-to-support-64bit-rodata.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch | |||
@@ -1,17 +1,17 @@ | |||
1 | From 2aa455f838644cd804ec93aeea0d30bb265e91df Mon Sep 17 00:00:00 2001 | 1 | From a485fdf959afb6cd079f482eeea9d3186e6393f8 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Sat, 13 Oct 2018 21:17:01 +0530 | 3 | Date: Sat, 13 Oct 2018 21:17:01 +0530 |
4 | Subject: [PATCH 22/43] Adding new relocation to support 64bit rodata | 4 | Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/elf64-microblaze.c | 11 +++++++-- | 7 | bfd/elf64-microblaze.c | 11 +++++++-- |
8 | 2 files changed, 54 insertions(+), 6 deletions(-) | 8 | 2 files changed, 54 insertions(+), 6 deletions(-) |
9 | 9 | ||
10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
11 | index 40f10aac6d..4d9b90647f 100644 | 11 | index 17e58748a0b..b62c47e8514 100644 |
12 | --- a/bfd/elf64-microblaze.c | 12 | --- a/bfd/elf64-microblaze.c |
13 | +++ b/bfd/elf64-microblaze.c | 13 | +++ b/bfd/elf64-microblaze.c |
14 | @@ -1461,6 +1461,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 14 | @@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
15 | case (int) R_MICROBLAZE_64_PCREL : | 15 | case (int) R_MICROBLAZE_64_PCREL : |
16 | case (int) R_MICROBLAZE_64: | 16 | case (int) R_MICROBLAZE_64: |
17 | case (int) R_MICROBLAZE_32: | 17 | case (int) R_MICROBLAZE_32: |
@@ -19,16 +19,16 @@ index 40f10aac6d..4d9b90647f 100644 | |||
19 | { | 19 | { |
20 | /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols | 20 | /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols |
21 | from removed linkonce sections, or sections discarded by | 21 | from removed linkonce sections, or sections discarded by |
22 | @@ -1470,6 +1471,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 22 | @@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
23 | relocation += addend; | 23 | relocation += addend; |
24 | if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) | 24 | if (r_type == R_MICROBLAZE_32) |
25 | bfd_put_32 (input_bfd, relocation, contents + offset); | 25 | bfd_put_32 (input_bfd, relocation, contents + offset); |
26 | + else if (r_type == R_MICROBLAZE_IMML_64) | 26 | + else if (r_type == R_MICROBLAZE_IMML_64) |
27 | + bfd_put_64 (input_bfd, relocation, contents + offset); | 27 | + bfd_put_64 (input_bfd, relocation, contents + offset); |
28 | else | 28 | else |
29 | { | 29 | { |
30 | if (r_type == R_MICROBLAZE_64_PCREL) | 30 | if (r_type == R_MICROBLAZE_64_PCREL) |
31 | @@ -1547,7 +1550,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 31 | @@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
32 | } | 32 | } |
33 | else | 33 | else |
34 | { | 34 | { |
@@ -37,7 +37,7 @@ index 40f10aac6d..4d9b90647f 100644 | |||
37 | { | 37 | { |
38 | outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); | 38 | outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); |
39 | outrel.r_addend = relocation + addend; | 39 | outrel.r_addend = relocation + addend; |
40 | @@ -1573,6 +1576,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 40 | @@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
41 | relocation += addend; | 41 | relocation += addend; |
42 | if (r_type == R_MICROBLAZE_32) | 42 | if (r_type == R_MICROBLAZE_32) |
43 | bfd_put_32 (input_bfd, relocation, contents + offset); | 43 | bfd_put_32 (input_bfd, relocation, contents + offset); |
@@ -46,7 +46,7 @@ index 40f10aac6d..4d9b90647f 100644 | |||
46 | else | 46 | else |
47 | { | 47 | { |
48 | if (r_type == R_MICROBLAZE_64_PCREL) | 48 | if (r_type == R_MICROBLAZE_64_PCREL) |
49 | @@ -2085,7 +2090,8 @@ microblaze_elf_relax_section (bfd *abfd, | 49 | @@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd, |
50 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, | 50 | microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, |
51 | irelscan->r_addend); | 51 | irelscan->r_addend); |
52 | } | 52 | } |
@@ -56,7 +56,7 @@ index 40f10aac6d..4d9b90647f 100644 | |||
56 | { | 56 | { |
57 | isym = isymbuf + ELF64_R_SYM (irelscan->r_info); | 57 | isym = isymbuf + ELF64_R_SYM (irelscan->r_info); |
58 | 58 | ||
59 | @@ -2591,6 +2597,7 @@ microblaze_elf_check_relocs (bfd * abfd, | 59 | @@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd, |
60 | case R_MICROBLAZE_64: | 60 | case R_MICROBLAZE_64: |
61 | case R_MICROBLAZE_64_PCREL: | 61 | case R_MICROBLAZE_64_PCREL: |
62 | case R_MICROBLAZE_32: | 62 | case R_MICROBLAZE_32: |
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch index d1ec5dbf..aa512b87 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0023-fixing-the-.bss-relocation-issue.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch | |||
@@ -1,35 +1,35 @@ | |||
1 | From 3f031961082caec9e172ff0224a51c08ab6e19c3 Mon Sep 17 00:00:00 2001 | 1 | From 24f96f4e86895b41aae21f775599a857939d002f Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Wed, 24 Oct 2018 12:34:37 +0530 | 3 | Date: Wed, 24 Oct 2018 12:34:37 +0530 |
4 | Subject: [PATCH 23/43] fixing the .bss relocation issue | 4 | Subject: [PATCH 22/40] fixing the .bss relocation issue |
5 | 5 | ||
6 | --- | 6 | --- |
7 | bfd/elf64-microblaze.c | 18 ++++++++++++------ | 7 | bfd/elf64-microblaze.c | 18 ++++++++++++------ |
8 | 1 file changed, 12 insertions(+), 6 deletions(-) | 8 | 1 file changed, 12 insertions(+), 6 deletions(-) |
9 | 9 | ||
10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
11 | index 4d9b90647f..184b7d560d 100644 | 11 | index b62c47e8514..cb3b40b574c 100644 |
12 | --- a/bfd/elf64-microblaze.c | 12 | --- a/bfd/elf64-microblaze.c |
13 | +++ b/bfd/elf64-microblaze.c | 13 | +++ b/bfd/elf64-microblaze.c |
14 | @@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 14 | @@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
15 | + input_section->output_offset | 15 | + input_section->output_offset |
16 | + offset + INST_WORD_SIZE); | 16 | + offset + INST_WORD_SIZE); |
17 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 17 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
18 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) | 18 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) |
19 | + if ((insn & 0xff000000) == 0xb2000000) | 19 | + if ((insn & 0xff000000) == 0xb2000000) |
20 | { | 20 | { |
21 | insn &= ~0x00ffffff; | 21 | insn &= ~0x00ffffff; |
22 | insn |= (relocation >> 16) & 0xffffff; | 22 | insn |= (relocation >> 16) & 0xffffff; |
23 | @@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | 23 | @@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
24 | + offset + INST_WORD_SIZE); | 24 | + offset + INST_WORD_SIZE); |
25 | } | 25 | } |
26 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); | 26 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
27 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) | 27 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) |
28 | + if ((insn & 0xff000000) == 0xb2000000) | 28 | + if ((insn & 0xff000000) == 0xb2000000) |
29 | { | 29 | { |
30 | insn &= ~0x00ffffff; | 30 | insn &= ~0x00ffffff; |
31 | insn |= (relocation >> 16) & 0xffffff; | 31 | insn |= (relocation >> 16) & 0xffffff; |
32 | @@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 32 | @@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
33 | { | 33 | { |
34 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); | 34 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); |
35 | 35 | ||
@@ -38,7 +38,7 @@ index 4d9b90647f..184b7d560d 100644 | |||
38 | { | 38 | { |
39 | instr &= ~0x00ffffff; | 39 | instr &= ~0x00ffffff; |
40 | instr |= (val & 0xffffff); | 40 | instr |= (val & 0xffffff); |
41 | @@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) | 41 | @@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
42 | unsigned long instr_lo; | 42 | unsigned long instr_lo; |
43 | 43 | ||
44 | instr_hi = bfd_get_32 (abfd, bfd_addr); | 44 | instr_hi = bfd_get_32 (abfd, bfd_addr); |
@@ -47,7 +47,7 @@ index 4d9b90647f..184b7d560d 100644 | |||
47 | { | 47 | { |
48 | instr_hi &= ~0x00ffffff; | 48 | instr_hi &= ~0x00ffffff; |
49 | instr_hi |= (val >> 16) & 0xffffff; | 49 | instr_hi |= (val >> 16) & 0xffffff; |
50 | @@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd, | 50 | @@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd, |
51 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents | 51 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents |
52 | + irelscan->r_offset | 52 | + irelscan->r_offset |
53 | + INST_WORD_SIZE); | 53 | + INST_WORD_SIZE); |
@@ -59,7 +59,7 @@ index 4d9b90647f..184b7d560d 100644 | |||
59 | immediate |= (instr_lo & 0x0000ffff); | 59 | immediate |= (instr_lo & 0x0000ffff); |
60 | offset = calc_fixup (irelscan->r_addend, 0, sec); | 60 | offset = calc_fixup (irelscan->r_addend, 0, sec); |
61 | immediate -= offset; | 61 | immediate -= offset; |
62 | @@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd, | 62 | @@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd, |
63 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents | 63 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents |
64 | + irelscan->r_offset | 64 | + irelscan->r_offset |
65 | + INST_WORD_SIZE); | 65 | + INST_WORD_SIZE); |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch index d0ca677c..c645781e 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 50bd636604305329b302b9fbbb692795d26f5fa5 Mon Sep 17 00:00:00 2001 | 1 | From cd5868dca5b4a728e6418459d871f5c9ca68253e Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Wed, 28 Nov 2018 14:00:29 +0530 | 3 | Date: Wed, 28 Nov 2018 14:00:29 +0530 |
4 | Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. | 4 | Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. |
5 | It was adjusting only lower 16bits. | 5 | It was adjusting only lower 16bits. |
6 | 6 | ||
7 | --- | 7 | --- |
@@ -10,10 +10,10 @@ Subject: [PATCH 24/43] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. | |||
10 | 2 files changed, 4 insertions(+), 4 deletions(-) | 10 | 2 files changed, 4 insertions(+), 4 deletions(-) |
11 | 11 | ||
12 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 12 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
13 | index 035e71f311..2d8c062a42 100644 | 13 | index a31b407cfbf..04816a4a187 100644 |
14 | --- a/bfd/elf32-microblaze.c | 14 | --- a/bfd/elf32-microblaze.c |
15 | +++ b/bfd/elf32-microblaze.c | 15 | +++ b/bfd/elf32-microblaze.c |
16 | @@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd, | 16 | @@ -2023,8 +2023,8 @@ microblaze_elf_relax_section (bfd *abfd, |
17 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); | 17 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); |
18 | efix = calc_fixup (target_address, 0, sec); | 18 | efix = calc_fixup (target_address, 0, sec); |
19 | irel->r_addend -= (efix - sfix); | 19 | irel->r_addend -= (efix - sfix); |
@@ -25,10 +25,10 @@ index 035e71f311..2d8c062a42 100644 | |||
25 | break; | 25 | break; |
26 | } | 26 | } |
27 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | 27 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
28 | index 184b7d560d..ef6a87062b 100644 | 28 | index cb3b40b574c..b002b414d64 100644 |
29 | --- a/bfd/elf64-microblaze.c | 29 | --- a/bfd/elf64-microblaze.c |
30 | +++ b/bfd/elf64-microblaze.c | 30 | +++ b/bfd/elf64-microblaze.c |
31 | @@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd, | 31 | @@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd, |
32 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); | 32 | sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); |
33 | efix = calc_fixup (target_address, 0, sec); | 33 | efix = calc_fixup (target_address, 0, sec); |
34 | irel->r_addend -= (efix - sfix); | 34 | irel->r_addend -= (efix - sfix); |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch deleted file mode 100644 index fba32c08..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | From b8c4b1fa22137d18d4ada7e350948035705f402f Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Sun, 2 Dec 2018 14:49:14 +0530 | ||
4 | Subject: [PATCH 25/43] [Patch,MicroBlaze]: fixed Build issue which are due to | ||
5 | conflicts in patches. | ||
6 | |||
7 | --- | ||
8 | bfd/elf32-microblaze.c | 1 + | ||
9 | bfd/elf64-microblaze.c | 12 ++++++------ | ||
10 | 3 files changed, 9 insertions(+), 8 deletions(-) | ||
11 | |||
12 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | ||
13 | index 2d8c062a42..6a795c5069 100644 | ||
14 | --- a/bfd/elf32-microblaze.c | ||
15 | +++ b/bfd/elf32-microblaze.c | ||
16 | @@ -1996,6 +1996,7 @@ microblaze_elf_relax_section (bfd *abfd, | ||
17 | /* This was a PC-relative instruction that was | ||
18 | completely resolved. */ | ||
19 | int sfix, efix; | ||
20 | + unsigned int val; | ||
21 | bfd_vma target_address; | ||
22 | target_address = irel->r_addend + irel->r_offset; | ||
23 | sfix = calc_fixup (irel->r_offset, 0, sec); | ||
24 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | ||
25 | index ef6a87062b..bed534e7dd 100644 | ||
26 | --- a/bfd/elf64-microblaze.c | ||
27 | +++ b/bfd/elf64-microblaze.c | ||
28 | @@ -2854,14 +2854,14 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info, | ||
29 | /* If this is a weak symbol, and there is a real definition, the | ||
30 | processor independent code will have arranged for us to see the | ||
31 | real definition first, and we can just use the same value. */ | ||
32 | - if (h->u.weakdef != NULL) | ||
33 | + if (h->is_weakalias) | ||
34 | { | ||
35 | - BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined | ||
36 | - || h->u.weakdef->root.type == bfd_link_hash_defweak); | ||
37 | - h->root.u.def.section = h->u.weakdef->root.u.def.section; | ||
38 | - h->root.u.def.value = h->u.weakdef->root.u.def.value; | ||
39 | + struct elf_link_hash_entry *def = weakdef (h); | ||
40 | + BFD_ASSERT (def->root.type == bfd_link_hash_defined); | ||
41 | + h->root.u.def.section = def->root.u.def.section; | ||
42 | + h->root.u.def.value = def->root.u.def.value; | ||
43 | return TRUE; | ||
44 | - } | ||
45 | + } | ||
46 | |||
47 | /* This is a reference to a symbol defined by a dynamic object which | ||
48 | is not a function. */ | ||
49 | -- | ||
50 | 2.17.1 | ||
51 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch index 0fd14f6d..f5bf917a 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-Microblaze-Binutils-security-check-is-causing-.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch | |||
@@ -1,26 +1,27 @@ | |||
1 | From 282a60ab92e6705853dac30fd38aaf298d7f02b0 Mon Sep 17 00:00:00 2001 | 1 | From 25a67af22ad040f87b3c14185c338828d4e26908 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 11 Mar 2019 14:23:58 +0530 | 3 | Date: Mon, 11 Mar 2019 14:23:58 +0530 |
4 | Subject: [PATCH 28/43] [Patch,Microblaze] : Binutils security check is causing | 4 | Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing |
5 | build error for windows builds.commenting for now. | 5 | build error for windows builds.commenting for now. |
6 | 6 | ||
7 | --- | 7 | --- |
8 | bfd/elf-attrs.c | 2 ++ | 8 | bfd/elf-attrs.c | 3 +++ |
9 | 1 file changed, 2 insertions(+) | 9 | 1 file changed, 3 insertions(+) |
10 | 10 | ||
11 | diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c | 11 | diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c |
12 | index bfe135e7fb..feb5cb37f5 100644 | 12 | index bfe135e7fbb..abf267ad42e 100644 |
13 | --- a/bfd/elf-attrs.c | 13 | --- a/bfd/elf-attrs.c |
14 | +++ b/bfd/elf-attrs.c | 14 | +++ b/bfd/elf-attrs.c |
15 | @@ -440,6 +440,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) | 15 | @@ -440,6 +440,8 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) |
16 | /* PR 17512: file: 2844a11d. */ | 16 | /* PR 17512: file: 2844a11d. */ |
17 | if (hdr->sh_size == 0) | 17 | if (hdr->sh_size == 0) |
18 | return; | 18 | return; |
19 | + | ||
19 | + #if 0 | 20 | + #if 0 |
20 | if (hdr->sh_size > bfd_get_file_size (abfd)) | 21 | if (hdr->sh_size > bfd_get_file_size (abfd)) |
21 | { | 22 | { |
22 | /* xgettext:c-format */ | 23 | /* xgettext:c-format */ |
23 | @@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) | 24 | @@ -448,6 +450,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) |
24 | bfd_set_error (bfd_error_invalid_operation); | 25 | bfd_set_error (bfd_error_invalid_operation); |
25 | return; | 26 | return; |
26 | } | 27 | } |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch deleted file mode 100644 index 38245cbd..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | From 212c40ed034096069f3ab0dac74ccfb79063b84c Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Tue, 26 Feb 2019 17:31:41 +0530 | ||
4 | Subject: [PATCH 26/43] [Patch,Microblaze] : changes of "PR22458, failure to | ||
5 | choose a matching ELF target" is causing "Multiple Prevailing definition | ||
6 | errors",added check for best_match elf. | ||
7 | |||
8 | --- | ||
9 | bfd/format.c | 5 +++++ | ||
10 | 1 file changed, 5 insertions(+) | ||
11 | |||
12 | diff --git a/bfd/format.c b/bfd/format.c | ||
13 | index 97a92291a8..3a74cc49d2 100644 | ||
14 | --- a/bfd/format.c | ||
15 | +++ b/bfd/format.c | ||
16 | @@ -292,7 +292,12 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) | ||
17 | |||
18 | /* Don't check the default target twice. */ | ||
19 | if (*target == &binary_vec | ||
20 | +#if !BFD_SUPPORTS_PLUGINS | ||
21 | || (!abfd->target_defaulted && *target == save_targ)) | ||
22 | +#else | ||
23 | + || (!abfd->target_defaulted && *target == save_targ) | ||
24 | + || (*target)->match_priority > best_match) | ||
25 | +#endif | ||
26 | continue; | ||
27 | |||
28 | /* If we already tried a match, the bfd is modified and may | ||
29 | -- | ||
30 | 2.17.1 | ||
31 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch index 0da9e7b4..f5ddce41 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0029-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch | |||
@@ -1,14 +1,14 @@ | |||
1 | From fcb9c923a78a6a6141626f4c2a82579cfc4e43d6 Mon Sep 17 00:00:00 2001 | 1 | From b9e89f0698fd0e3b0e965986681f9fd90d3dc313 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Thu, 29 Nov 2018 17:59:25 +0530 | 3 | Date: Thu, 29 Nov 2018 17:59:25 +0530 |
4 | Subject: [PATCH 29/43] fixing the long & long long mingw toolchain issue | 4 | Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue |
5 | 5 | ||
6 | --- | 6 | --- |
7 | opcodes/microblaze-opc.h | 4 ++-- | 7 | opcodes/microblaze-opc.h | 4 ++-- |
8 | 2 files changed, 7 insertions(+), 7 deletions(-) | 8 | 2 files changed, 7 insertions(+), 7 deletions(-) |
9 | 9 | ||
10 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 10 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
11 | index 824afc0ab0..d59ee0a95f 100644 | 11 | index f4ee8f43372..c8c2addc351 100644 |
12 | --- a/opcodes/microblaze-opc.h | 12 | --- a/opcodes/microblaze-opc.h |
13 | +++ b/opcodes/microblaze-opc.h | 13 | +++ b/opcodes/microblaze-opc.h |
14 | @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr"; | 14 | @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr"; |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0030-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch index 79d7f4fe..bf05816d 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0030-Added-support-to-new-arithmetic-single-register-inst.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch | |||
@@ -1,47 +1,55 @@ | |||
1 | From f36d3bdd09f5c9987199f08ea3dd98bf45a9e18e Mon Sep 17 00:00:00 2001 | 1 | From efc3fd518cdb7e8bf82ac27b98b946001f83a2bf Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju <nmekala@xilinx.com> | 2 | From: Nagaraju <nmekala@xilinx.com> |
3 | Date: Fri, 23 Aug 2019 16:18:43 +0530 | 3 | Date: Fri, 23 Aug 2019 16:18:43 +0530 |
4 | Subject: [PATCH 30/43] Added support to new arithmetic single register | 4 | Subject: [PATCH 27/40] Added support to new arithmetic single register |
5 | instructions | 5 | instructions |
6 | 6 | ||
7 | --- | 7 | --- |
8 | opcodes/microblaze-dis.c | 12 +++ | 8 | opcodes/microblaze-dis.c | 13 +++- |
9 | opcodes/microblaze-opc.h | 43 ++++++++++- | 9 | opcodes/microblaze-opc.h | 45 +++++++++++- |
10 | opcodes/microblaze-opcm.h | 5 +- | 10 | opcodes/microblaze-opcm.h | 5 +- |
11 | 4 files changed, 201 insertions(+), 6 deletions(-) | 11 | 4 files changed, 201 insertions(+), 7 deletions(-) |
12 | 12 | ||
13 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c | 13 | diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c |
14 | index f679a43606..e5e880cb1c 100644 | 14 | index 24ede714858..e93d9b890ba 100644 |
15 | --- a/opcodes/microblaze-dis.c | 15 | --- a/opcodes/microblaze-dis.c |
16 | +++ b/opcodes/microblaze-dis.c | 16 | +++ b/opcodes/microblaze-dis.c |
17 | @@ -114,6 +114,15 @@ get_field_imm15 (long instr) | 17 | @@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr) |
18 | return (strdup (tmpstr)); | 18 | return p; |
19 | } | 19 | } |
20 | 20 | ||
21 | +static char * | 21 | +static char * |
22 | +get_field_imm16 (long instr) | 22 | +get_field_imm16 (struct string_buf *buf, long instr) |
23 | +{ | 23 | +{ |
24 | + char tmpstr[25]; | 24 | + char *p = strbuf (buf); |
25 | + | 25 | + |
26 | + sprintf (tmpstr, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW)); | 26 | + sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW)); |
27 | + return (strdup (tmpstr)); | 27 | + return p; |
28 | +} | 28 | +} |
29 | + | 29 | + |
30 | static char * | 30 | static char * |
31 | get_field_special (long instr, struct op_code_struct * op) | 31 | get_field_special (struct string_buf *buf, long instr, |
32 | { | 32 | struct op_code_struct *op) |
33 | @@ -419,6 +428,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | 33 | @@ -448,6 +457,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) |
34 | case INST_TYPE_RD_IMM15: | 34 | print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), |
35 | print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst)); | 35 | get_field_imm15 (&buf, inst)); |
36 | break; | 36 | break; |
37 | + case INST_TYPE_RD_IMML: | 37 | + case INST_TYPE_RD_IMML: |
38 | + print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm16 (inst)); | 38 | + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); |
39 | + break; | 39 | + break; |
40 | /* For mbar insn. */ | 40 | /* For mbar insn. */ |
41 | case INST_TYPE_IMM5: | 41 | case INST_TYPE_IMM5: |
42 | print_func (stream, "\t%s", get_field_imm5_mbar (inst)); | 42 | print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst)); |
43 | @@ -455,7 +467,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) | ||
44 | /* For mbar 16 or sleep insn. */ | ||
45 | case INST_TYPE_NONE: | ||
46 | break; | ||
47 | - /* For tuqula instruction */ | ||
48 | /* For bit field insns. */ | ||
49 | case INST_TYPE_RD_R1_IMMW_IMMS: | ||
50 | print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), | ||
43 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 51 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
44 | index d59ee0a95f..0774f70e08 100644 | 52 | index c8c2addc351..eaf4a1bd9f9 100644 |
45 | --- a/opcodes/microblaze-opc.h | 53 | --- a/opcodes/microblaze-opc.h |
46 | +++ b/opcodes/microblaze-opc.h | 54 | +++ b/opcodes/microblaze-opc.h |
47 | @@ -69,6 +69,7 @@ | 55 | @@ -69,6 +69,7 @@ |
@@ -94,7 +102,7 @@ index d59ee0a95f..0774f70e08 100644 | |||
94 | /* New Mask for msrset, msrclr insns. */ | 102 | /* New Mask for msrset, msrclr insns. */ |
95 | #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ | 103 | #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ |
96 | /* Mask for mbar insn. */ | 104 | /* Mask for mbar insn. */ |
97 | @@ -114,7 +143,7 @@ | 105 | @@ -114,13 +143,13 @@ |
98 | #define DELAY_SLOT 1 | 106 | #define DELAY_SLOT 1 |
99 | #define NO_DELAY_SLOT 0 | 107 | #define NO_DELAY_SLOT 0 |
100 | 108 | ||
@@ -103,6 +111,13 @@ index d59ee0a95f..0774f70e08 100644 | |||
103 | 111 | ||
104 | struct op_code_struct | 112 | struct op_code_struct |
105 | { | 113 | { |
114 | const char * name; | ||
115 | short inst_type; /* Registers and immediate values involved. */ | ||
116 | - short inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */ | ||
117 | + int inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */ | ||
118 | short delay_slots; /* Info about delay slots needed after this instr. */ | ||
119 | short immval_mask; | ||
120 | unsigned long bit_sequence; /* All the fixed bits for the op are set and | ||
106 | @@ -444,13 +473,21 @@ struct op_code_struct | 121 | @@ -444,13 +473,21 @@ struct op_code_struct |
107 | {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, | 122 | {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, |
108 | {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, | 123 | {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, |
@@ -140,7 +155,7 @@ index d59ee0a95f..0774f70e08 100644 | |||
140 | {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, | 155 | {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, |
141 | {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, | 156 | {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, |
142 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h | 157 | diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h |
143 | index 5f2e190d23..4d2ee2dd0d 100644 | 158 | index ee01cdb7d9b..31726c9b01a 100644 |
144 | --- a/opcodes/microblaze-opcm.h | 159 | --- a/opcodes/microblaze-opcm.h |
145 | +++ b/opcodes/microblaze-opcm.h | 160 | +++ b/opcodes/microblaze-opcm.h |
146 | @@ -61,7 +61,9 @@ enum microblaze_instr | 161 | @@ -61,7 +61,9 @@ enum microblaze_instr |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch index 0be07120..01d615da 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0031-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch | |||
@@ -1,15 +1,15 @@ | |||
1 | From a15e73a33b3f395f2096e252b655775ed8424c14 Mon Sep 17 00:00:00 2001 | 1 | From 953a4eb8152c0aca3e36ccc22a8950c9e68965b5 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 26 Aug 2019 15:29:42 +0530 | 3 | Date: Mon, 26 Aug 2019 15:29:42 +0530 |
4 | Subject: [PATCH 31/43] [Patch,MicroBlaze] : double imml generation for 64 bit | 4 | Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit |
5 | values. | 5 | values. |
6 | 6 | ||
7 | --- | 7 | --- |
8 | opcodes/microblaze-opc.h | 4 +- | 8 | opcodes/microblaze-opc.h | 4 +- |
9 | 2 files changed, 263 insertions(+), 63 deletions(-) | 9 | 2 files changed, 264 insertions(+), 64 deletions(-) |
10 | 10 | ||
11 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | 11 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h |
12 | index 0774f70e08..bd9d91cd57 100644 | 12 | index eaf4a1bd9f9..79c3cf0d1a1 100644 |
13 | --- a/opcodes/microblaze-opc.h | 13 | --- a/opcodes/microblaze-opc.h |
14 | +++ b/opcodes/microblaze-opc.h | 14 | +++ b/opcodes/microblaze-opc.h |
15 | @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr"; | 15 | @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr"; |
@@ -18,7 +18,7 @@ index 0774f70e08..bd9d91cd57 100644 | |||
18 | 18 | ||
19 | -#define MIN_IMML ((long long) 0xffffff8000000000L) | 19 | -#define MIN_IMML ((long long) 0xffffff8000000000L) |
20 | -#define MAX_IMML ((long long) 0x0000007fffffffffL) | 20 | -#define MAX_IMML ((long long) 0x0000007fffffffffL) |
21 | +#define MIN_IMML ((long long) -9223372036854775808) | 21 | +#define MIN_IMML ((long long) -9223372036854775807) |
22 | +#define MAX_IMML ((long long) 9223372036854775807) | 22 | +#define MAX_IMML ((long long) 9223372036854775807) |
23 | 23 | ||
24 | #endif /* MICROBLAZE_OPC */ | 24 | #endif /* MICROBLAZE_OPC */ |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch new file mode 100644 index 00000000..4172595b --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch | |||
@@ -0,0 +1,60 @@ | |||
1 | From c59684852ecd37d6f82363f2cf0e1de1f770aab7 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
3 | Date: Fri, 17 Jul 2020 09:20:54 -0500 | ||
4 | Subject: [PATCH 33/40] Fix various compile warnings | ||
5 | |||
6 | Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> | ||
7 | --- | ||
8 | bfd/elf64-microblaze.c | 9 +++++---- | ||
9 | 2 files changed, 10 insertions(+), 10 deletions(-) | ||
10 | |||
11 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c | ||
12 | index b002b414d64..8308f1ebd09 100644 | ||
13 | --- a/bfd/elf64-microblaze.c | ||
14 | +++ b/bfd/elf64-microblaze.c | ||
15 | @@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | ||
16 | /* Set the howto pointer for a RCE ELF reloc. */ | ||
17 | |||
18 | static bfd_boolean | ||
19 | -microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, | ||
20 | +microblaze_elf_info_to_howto (bfd * abfd, | ||
21 | arelent * cache_ptr, | ||
22 | Elf_Internal_Rela * dst) | ||
23 | { | ||
24 | @@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, | ||
25 | r_type = ELF64_R_TYPE (dst->r_info); | ||
26 | if (r_type >= R_MICROBLAZE_max) | ||
27 | { | ||
28 | - (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"), | ||
29 | + _bfd_error_handler (_("%pB: unsupported relocation type %#x"), | ||
30 | abfd, r_type); | ||
31 | bfd_set_error (bfd_error_bad_value); | ||
32 | return FALSE; | ||
33 | } | ||
34 | |||
35 | cache_ptr->howto = microblaze_elf_howto_table [r_type]; | ||
36 | - return TRUE; | ||
37 | + return TRUE; | ||
38 | } | ||
39 | |||
40 | /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ | ||
41 | @@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, | ||
42 | else | ||
43 | { | ||
44 | BFD_FAIL (); | ||
45 | - (*_bfd_error_handler) | ||
46 | + _bfd_error_handler | ||
47 | (_("%pB: probably compiled without -fPIC?"), | ||
48 | input_bfd); | ||
49 | bfd_set_error (bfd_error_bad_value); | ||
50 | @@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd, | ||
51 | goto dogottls; | ||
52 | case R_MICROBLAZE_TLSLD: | ||
53 | tls_type |= (TLS_TLS | TLS_LD); | ||
54 | + /* Fall through. */ | ||
55 | dogottls: | ||
56 | sec->has_tls_reloc = 1; | ||
57 | /* Fall through. */ | ||
58 | -- | ||
59 | 2.17.1 | ||
60 | |||
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch index 7ac89d2d..ff1c606c 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Add-initial-port-of-linux-gdbserver.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From c347f9727cc86bb0174dc001446c0670e7306692 Mon Sep 17 00:00:00 2001 | 1 | From c5eee33cd39dbb9c44bdad2025a5c848139c55f2 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Mon, 23 Jan 2017 19:07:44 +0530 | 3 | Date: Mon, 23 Jan 2017 19:07:44 +0530 |
4 | Subject: [PATCH 32/43] Add initial port of linux gdbserver add | 4 | Subject: [PATCH 34/40] Add initial port of linux gdbserver add |
5 | gdb_proc_service_h to gdbserver microblaze-linux | 5 | gdb_proc_service_h to gdbserver microblaze-linux |
6 | 6 | ||
7 | gdbserver needs to initialise the microblaze registers | 7 | gdbserver needs to initialise the microblaze registers |
@@ -21,17 +21,21 @@ Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> | |||
21 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | 21 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> |
22 | --- | 22 | --- |
23 | gdb/configure.host | 3 + | 23 | gdb/configure.host | 3 + |
24 | gdb/features/microblaze-linux.xml | 12 ++ | ||
25 | gdb/gdbserver/Makefile.in | 4 + | ||
26 | gdb/gdbserver/configure.srv | 8 ++ | ||
24 | gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++ | 27 | gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++ |
25 | gdb/microblaze-linux-tdep.c | 29 +++- | 28 | gdb/microblaze-linux-tdep.c | 29 +++- |
26 | gdb/microblaze-tdep.c | 35 ++++- | 29 | gdb/microblaze-tdep.c | 35 ++++- |
27 | gdb/microblaze-tdep.h | 4 +- | 30 | gdb/microblaze-tdep.h | 4 +- |
28 | gdb/regformats/reg-microblaze.dat | 41 ++++++ | 31 | gdb/regformats/reg-microblaze.dat | 41 ++++++ |
29 | 6 files changed, 298 insertions(+), 3 deletions(-) | 32 | 9 files changed, 322 insertions(+), 3 deletions(-) |
33 | create mode 100644 gdb/features/microblaze-linux.xml | ||
30 | create mode 100644 gdb/gdbserver/linux-microblaze-low.c | 34 | create mode 100644 gdb/gdbserver/linux-microblaze-low.c |
31 | create mode 100644 gdb/regformats/reg-microblaze.dat | 35 | create mode 100644 gdb/regformats/reg-microblaze.dat |
32 | 36 | ||
33 | diff --git a/gdb/configure.host b/gdb/configure.host | 37 | diff --git a/gdb/configure.host b/gdb/configure.host |
34 | index c87f997abc..de8d6b00f3 100644 | 38 | index ce528237291..cf1a08e8b28 100644 |
35 | --- a/gdb/configure.host | 39 | --- a/gdb/configure.host |
36 | +++ b/gdb/configure.host | 40 | +++ b/gdb/configure.host |
37 | @@ -65,6 +65,7 @@ hppa*) gdb_host_cpu=pa ;; | 41 | @@ -65,6 +65,7 @@ hppa*) gdb_host_cpu=pa ;; |
@@ -51,9 +55,75 @@ index c87f997abc..de8d6b00f3 100644 | |||
51 | powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) | 55 | powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) |
52 | gdb_host=aix ;; | 56 | gdb_host=aix ;; |
53 | powerpc*-*-freebsd*) gdb_host=fbsd ;; | 57 | powerpc*-*-freebsd*) gdb_host=fbsd ;; |
58 | diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml | ||
59 | new file mode 100644 | ||
60 | index 00000000000..8983e66eb3d | ||
61 | --- /dev/null | ||
62 | +++ b/gdb/features/microblaze-linux.xml | ||
63 | @@ -0,0 +1,12 @@ | ||
64 | +<?xml version="1.0"?> | ||
65 | +<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc. | ||
66 | + | ||
67 | + Copying and distribution of this file, with or without modification, | ||
68 | + are permitted in any medium without royalty provided the copyright | ||
69 | + notice and this notice are preserved. --> | ||
70 | + | ||
71 | +<!DOCTYPE target SYSTEM "gdb-target.dtd"> | ||
72 | +<target> | ||
73 | + <osabi>GNU/Linux</osabi> | ||
74 | + <xi:include href="microblaze-core.xml"/> | ||
75 | +</target> | ||
76 | diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in | ||
77 | index 16a9f2fd380..fb4762a22d5 100644 | ||
78 | --- a/gdb/gdbserver/Makefile.in | ||
79 | +++ b/gdb/gdbserver/Makefile.in | ||
80 | @@ -172,6 +172,7 @@ SFILES = \ | ||
81 | $(srcdir)/linux-low.c \ | ||
82 | $(srcdir)/linux-m32r-low.c \ | ||
83 | $(srcdir)/linux-m68k-low.c \ | ||
84 | + $(srcdir)/linux-microblaze-low.c \ | ||
85 | $(srcdir)/linux-mips-low.c \ | ||
86 | $(srcdir)/linux-nios2-low.c \ | ||
87 | $(srcdir)/linux-ppc-low.c \ | ||
88 | @@ -231,6 +232,7 @@ SFILES = \ | ||
89 | $(srcdir)/nat/linux-namespaces.c \ | ||
90 | $(srcdir)/nat/linux-osdata.c \ | ||
91 | $(srcdir)/nat/linux-personality.c \ | ||
92 | + $(srcdir)/nat/microblaze-linux.c \ | ||
93 | $(srcdir)/nat/mips-linux-watch.c \ | ||
94 | $(srcdir)/nat/ppc-linux.c \ | ||
95 | $(srcdir)/nat/fork-inferior.c \ | ||
96 | @@ -657,6 +659,8 @@ gdbsupport/%.o: ../gdbsupport/%.c | ||
97 | |||
98 | %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh) | ||
99 | $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@ | ||
100 | +microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh) | ||
101 | + $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c | ||
102 | |||
103 | # | ||
104 | # Dependency tracking. | ||
105 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | ||
106 | index 1a4ab8e3361..e0d2b2fe04a 100644 | ||
107 | --- a/gdb/gdbserver/configure.srv | ||
108 | +++ b/gdb/gdbserver/configure.srv | ||
109 | @@ -184,6 +184,14 @@ case "${target}" in | ||
110 | srv_linux_usrregs=yes | ||
111 | srv_linux_thread_db=yes | ||
112 | ;; | ||
113 | + microblaze*-*-linux*) srv_regobj="microblaze-linux.o" | ||
114 | + srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | ||
115 | + srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | ||
116 | + srv_xmlfiles="microblaze-linux.xml" | ||
117 | + srv_linux_regsets=yes | ||
118 | + srv_linux_usrregs=yes | ||
119 | + srv_linux_thread_db=yes | ||
120 | + ;; | ||
121 | powerpc*-*-linux*) srv_regobj="powerpc-32l.o" | ||
122 | srv_regobj="${srv_regobj} powerpc-altivec32l.o" | ||
123 | srv_regobj="${srv_regobj} powerpc-vsx32l.o" | ||
54 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c | 124 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c |
55 | new file mode 100644 | 125 | new file mode 100644 |
56 | index 0000000000..cba5d6fc58 | 126 | index 00000000000..cba5d6fc585 |
57 | --- /dev/null | 127 | --- /dev/null |
58 | +++ b/gdb/gdbserver/linux-microblaze-low.c | 128 | +++ b/gdb/gdbserver/linux-microblaze-low.c |
59 | @@ -0,0 +1,189 @@ | 129 | @@ -0,0 +1,189 @@ |
@@ -247,7 +317,7 @@ index 0000000000..cba5d6fc58 | |||
247 | + microblaze_supply_ptrace_register, | 317 | + microblaze_supply_ptrace_register, |
248 | +}; | 318 | +}; |
249 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | 319 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c |
250 | index 4e5f60cd4e..7ab650a1cc 100644 | 320 | index 3bb9b5682ac..42c219d32f3 100644 |
251 | --- a/gdb/microblaze-linux-tdep.c | 321 | --- a/gdb/microblaze-linux-tdep.c |
252 | +++ b/gdb/microblaze-linux-tdep.c | 322 | +++ b/gdb/microblaze-linux-tdep.c |
253 | @@ -37,6 +37,22 @@ | 323 | @@ -37,6 +37,22 @@ |
@@ -273,17 +343,14 @@ index 4e5f60cd4e..7ab650a1cc 100644 | |||
273 | static int | 343 | static int |
274 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 344 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
275 | struct bp_target_info *bp_tgt) | 345 | struct bp_target_info *bp_tgt) |
276 | @@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 346 | @@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
277 | int val; | ||
278 | int bplen; | ||
279 | gdb_byte old_contents[BREAKPOINT_MAX]; | ||
280 | + struct cleanup *cleanup; | ||
281 | |||
282 | /* Determine appropriate breakpoint contents and size for this address. */ | 347 | /* Determine appropriate breakpoint contents and size for this address. */ |
283 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | 348 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
284 | 349 | ||
285 | + /* Make sure we see the memory breakpoints. */ | 350 | + /* Make sure we see the memory breakpoints. */ |
286 | + cleanup = make_show_memory_breakpoints_cleanup (1); | 351 | + scoped_restore restore_memory |
352 | + = make_scoped_restore_show_memory_breakpoints (1); | ||
353 | + | ||
287 | val = target_read_memory (addr, old_contents, bplen); | 354 | val = target_read_memory (addr, old_contents, bplen); |
288 | 355 | ||
289 | /* If our breakpoint is no longer at the address, this means that the | 356 | /* If our breakpoint is no longer at the address, this means that the |
@@ -296,10 +363,8 @@ index 4e5f60cd4e..7ab650a1cc 100644 | |||
296 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); | 363 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); |
297 | + } | 364 | + } |
298 | 365 | ||
299 | + do_cleanups (cleanup); | ||
300 | return val; | 366 | return val; |
301 | } | 367 | } |
302 | |||
303 | @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info, | 368 | @@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info, |
304 | /* Trampolines. */ | 369 | /* Trampolines. */ |
305 | tramp_frame_prepend_unwinder (gdbarch, | 370 | tramp_frame_prepend_unwinder (gdbarch, |
@@ -312,7 +377,7 @@ index 4e5f60cd4e..7ab650a1cc 100644 | |||
312 | 377 | ||
313 | void | 378 | void |
314 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | 379 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c |
315 | index 1248acbdc9..730a2b281f 100644 | 380 | index 17871229c80..0168e4881ed 100644 |
316 | --- a/gdb/microblaze-tdep.c | 381 | --- a/gdb/microblaze-tdep.c |
317 | +++ b/gdb/microblaze-tdep.c | 382 | +++ b/gdb/microblaze-tdep.c |
318 | @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc) | 383 | @@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc) |
@@ -329,7 +394,6 @@ index 1248acbdc9..730a2b281f 100644 | |||
329 | + int val; | 394 | + int val; |
330 | + int bplen; | 395 | + int bplen; |
331 | + gdb_byte old_contents[BREAKPOINT_MAX]; | 396 | + gdb_byte old_contents[BREAKPOINT_MAX]; |
332 | + struct cleanup *cleanup; | ||
333 | + | 397 | + |
334 | + /* Determine appropriate breakpoint contents and size for this address. */ | 398 | + /* Determine appropriate breakpoint contents and size for this address. */ |
335 | + bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | 399 | + bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
@@ -337,7 +401,9 @@ index 1248acbdc9..730a2b281f 100644 | |||
337 | + error (_("Software breakpoints not implemented for this target.")); | 401 | + error (_("Software breakpoints not implemented for this target.")); |
338 | + | 402 | + |
339 | + /* Make sure we see the memory breakpoints. */ | 403 | + /* Make sure we see the memory breakpoints. */ |
340 | + cleanup = make_show_memory_breakpoints_cleanup (1); | 404 | + scoped_restore restore_memory |
405 | + = make_scoped_restore_show_memory_breakpoints (1); | ||
406 | + | ||
341 | + val = target_read_memory (addr, old_contents, bplen); | 407 | + val = target_read_memory (addr, old_contents, bplen); |
342 | + | 408 | + |
343 | + /* If our breakpoint is no longer at the address, this means that the | 409 | + /* If our breakpoint is no longer at the address, this means that the |
@@ -349,7 +415,6 @@ index 1248acbdc9..730a2b281f 100644 | |||
349 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); | 415 | + microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); |
350 | + } | 416 | + } |
351 | + | 417 | + |
352 | + do_cleanups (cleanup); | ||
353 | + return val; | 418 | + return val; |
354 | +} | 419 | +} |
355 | 420 | ||
@@ -370,7 +435,7 @@ index 1248acbdc9..730a2b281f 100644 | |||
370 | + | 435 | + |
371 | } | 436 | } |
372 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 437 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
373 | index a0048148e4..63aab84ef6 100644 | 438 | index 4fbdf9933f0..db0772643dc 100644 |
374 | --- a/gdb/microblaze-tdep.h | 439 | --- a/gdb/microblaze-tdep.h |
375 | +++ b/gdb/microblaze-tdep.h | 440 | +++ b/gdb/microblaze-tdep.h |
376 | @@ -117,6 +117,8 @@ struct microblaze_frame_cache | 441 | @@ -117,6 +117,8 @@ struct microblaze_frame_cache |
@@ -385,7 +450,7 @@ index a0048148e4..63aab84ef6 100644 | |||
385 | #endif /* microblaze-tdep.h */ | 450 | #endif /* microblaze-tdep.h */ |
386 | diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat | 451 | diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat |
387 | new file mode 100644 | 452 | new file mode 100644 |
388 | index 0000000000..bd8a438442 | 453 | index 00000000000..bd8a4384424 |
389 | --- /dev/null | 454 | --- /dev/null |
390 | +++ b/gdb/regformats/reg-microblaze.dat | 455 | +++ b/gdb/regformats/reg-microblaze.dat |
391 | @@ -0,0 +1,41 @@ | 456 | @@ -0,0 +1,41 @@ |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0033-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch index e60893ef..171a0bf4 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0033-Initial-port-of-core-reading-support.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch | |||
@@ -1,22 +1,22 @@ | |||
1 | From a9d58bc9edc348ed15d62598f2a0d0862aaf4e61 Mon Sep 17 00:00:00 2001 | 1 | From f8cbcd1ef78f6ce9ae8d3382bf2bb0d1e770d201 Mon Sep 17 00:00:00 2001 |
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
3 | Date: Tue, 24 Jan 2017 14:55:56 +0530 | 3 | Date: Tue, 24 Jan 2017 14:55:56 +0530 |
4 | Subject: [PATCH 33/43] Initial port of core reading support Added support for | 4 | Subject: [PATCH 35/40] Initial port of core reading support Added support for |
5 | reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO | 5 | reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO |
6 | information for rebuilding ".reg" sections of core dumps at run time. | 6 | information for rebuilding ".reg" sections of core dumps at run time. |
7 | 7 | ||
8 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> | 8 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> |
9 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | 9 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> |
10 | --- | 10 | --- |
11 | bfd/elf32-microblaze.c | 84 ++++++++++++++++++++++++++++++++++ | 11 | bfd/elf32-microblaze.c | 84 +++++++++++++++++++++++++++++++++++++ |
12 | gdb/configure.tgt | 2 +- | 12 | gdb/configure.tgt | 2 +- |
13 | gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++ | 13 | gdb/microblaze-linux-tdep.c | 17 +++++++- |
14 | gdb/microblaze-tdep.c | 90 +++++++++++++++++++++++++++++++++++++ | 14 | gdb/microblaze-tdep.c | 48 +++++++++++++++++++++ |
15 | gdb/microblaze-tdep.h | 27 +++++++++++ | 15 | gdb/microblaze-tdep.h | 27 ++++++++++++ |
16 | 5 files changed, 259 insertions(+), 1 deletion(-) | 16 | 5 files changed, 176 insertions(+), 2 deletions(-) |
17 | 17 | ||
18 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 18 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
19 | index 6a795c5069..c280431df6 100644 | 19 | index 04816a4a187..cb7a98d307e 100644 |
20 | --- a/bfd/elf32-microblaze.c | 20 | --- a/bfd/elf32-microblaze.c |
21 | +++ b/bfd/elf32-microblaze.c | 21 | +++ b/bfd/elf32-microblaze.c |
22 | @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) | 22 | @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) |
@@ -107,7 +107,7 @@ index 6a795c5069..c280431df6 100644 | |||
107 | /* ELF linker hash entry. */ | 107 | /* ELF linker hash entry. */ |
108 | 108 | ||
109 | struct elf32_mb_link_hash_entry | 109 | struct elf32_mb_link_hash_entry |
110 | @@ -3672,4 +3753,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, | 110 | @@ -3673,4 +3754,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, |
111 | #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections | 111 | #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections |
112 | #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook | 112 | #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook |
113 | 113 | ||
@@ -116,10 +116,10 @@ index 6a795c5069..c280431df6 100644 | |||
116 | + | 116 | + |
117 | #include "elf32-target.h" | 117 | #include "elf32-target.h" |
118 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt | 118 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt |
119 | index 27f122ad04..622bd486b3 100644 | 119 | index caa42be1c01..f0386568460 100644 |
120 | --- a/gdb/configure.tgt | 120 | --- a/gdb/configure.tgt |
121 | +++ b/gdb/configure.tgt | 121 | +++ b/gdb/configure.tgt |
122 | @@ -397,7 +397,7 @@ mep-*-*) | 122 | @@ -400,7 +400,7 @@ mep-*-*) |
123 | 123 | ||
124 | microblaze*-linux-*|microblaze*-*-linux*) | 124 | microblaze*-linux-*|microblaze*-*-linux*) |
125 | # Target: Xilinx MicroBlaze running Linux | 125 | # Target: Xilinx MicroBlaze running Linux |
@@ -129,65 +129,34 @@ index 27f122ad04..622bd486b3 100644 | |||
129 | gdb_sim=../sim/microblaze/libsim.a | 129 | gdb_sim=../sim/microblaze/libsim.a |
130 | ;; | 130 | ;; |
131 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | 131 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c |
132 | index 7ab650a1cc..e2225d778a 100644 | 132 | index 42c219d32f3..0afb6efeba3 100644 |
133 | --- a/gdb/microblaze-linux-tdep.c | 133 | --- a/gdb/microblaze-linux-tdep.c |
134 | +++ b/gdb/microblaze-linux-tdep.c | 134 | +++ b/gdb/microblaze-linux-tdep.c |
135 | @@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame = | 135 | @@ -36,6 +36,7 @@ |
136 | #include "frame-unwind.h" | ||
137 | #include "tramp-frame.h" | ||
138 | #include "linux-tdep.h" | ||
139 | +#include "glibc-tdep.h" | ||
140 | |||
141 | static int microblaze_debug_flag = 0; | ||
142 | |||
143 | @@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame = | ||
136 | microblaze_linux_sighandler_cache_init | 144 | microblaze_linux_sighandler_cache_init |
137 | }; | 145 | }; |
138 | 146 | ||
139 | +const struct microblaze_gregset microblaze_linux_core_gregset; | 147 | - |
140 | + | ||
141 | +static void | ||
142 | +microblaze_linux_supply_core_gregset (const struct regset *regset, | ||
143 | + struct regcache *regcache, | ||
144 | + int regnum, const void *gregs, size_t len) | ||
145 | +{ | ||
146 | + microblaze_supply_gregset (µblaze_linux_core_gregset, regcache, | ||
147 | + regnum, gregs); | ||
148 | +} | ||
149 | + | ||
150 | +static void | ||
151 | +microblaze_linux_collect_core_gregset (const struct regset *regset, | ||
152 | + const struct regcache *regcache, | ||
153 | + int regnum, void *gregs, size_t len) | ||
154 | +{ | ||
155 | + microblaze_collect_gregset (µblaze_linux_core_gregset, regcache, | ||
156 | + regnum, gregs); | ||
157 | +} | ||
158 | + | ||
159 | +static void | ||
160 | +microblaze_linux_supply_core_fpregset (const struct regset *regset, | ||
161 | + struct regcache *regcache, | ||
162 | + int regnum, const void *fpregs, size_t len) | ||
163 | +{ | ||
164 | + /* FIXME. */ | ||
165 | + microblaze_supply_fpregset (regcache, regnum, fpregs); | ||
166 | +} | ||
167 | + | ||
168 | +static void | ||
169 | +microblaze_linux_collect_core_fpregset (const struct regset *regset, | ||
170 | + const struct regcache *regcache, | ||
171 | + int regnum, void *fpregs, size_t len) | ||
172 | +{ | ||
173 | + /* FIXME. */ | ||
174 | + microblaze_collect_fpregset (regcache, regnum, fpregs); | ||
175 | +} | ||
176 | |||
177 | static void | 148 | static void |
178 | microblaze_linux_init_abi (struct gdbarch_info info, | 149 | microblaze_linux_init_abi (struct gdbarch_info info, |
179 | struct gdbarch *gdbarch) | 150 | struct gdbarch *gdbarch) |
180 | { | 151 | { |
181 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | 152 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
182 | + | 153 | + |
183 | + tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset, | ||
184 | + microblaze_linux_collect_core_gregset); | ||
185 | + tdep->sizeof_gregset = 200; | 154 | + tdep->sizeof_gregset = 200; |
186 | + | 155 | + |
187 | linux_init_abi (info, gdbarch); | 156 | linux_init_abi (info, gdbarch); |
188 | 157 | ||
189 | set_gdbarch_memory_remove_breakpoint (gdbarch, | 158 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
190 | @@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info, | 159 | @@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info, |
191 | tramp_frame_prepend_unwinder (gdbarch, | 160 | tramp_frame_prepend_unwinder (gdbarch, |
192 | µblaze_linux_sighandler_tramp_frame); | 161 | µblaze_linux_sighandler_tramp_frame); |
193 | 162 | ||
@@ -202,109 +171,50 @@ index 7ab650a1cc..e2225d778a 100644 | |||
202 | + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | 171 | + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
203 | + set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); | 172 | + set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
204 | + | 173 | + |
205 | + set_gdbarch_regset_from_core_section (gdbarch, | ||
206 | + microblaze_regset_from_core_section); | ||
207 | + | ||
208 | /* Enable TLS support. */ | 174 | /* Enable TLS support. */ |
209 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | 175 | set_gdbarch_fetch_tls_load_module_address (gdbarch, |
210 | svr4_fetch_objfile_link_map); | 176 | svr4_fetch_objfile_link_map); |
211 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | 177 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c |
212 | index 730a2b281f..49713ea9b1 100644 | 178 | index 0168e4881ed..98944f38d2a 100644 |
213 | --- a/gdb/microblaze-tdep.c | 179 | --- a/gdb/microblaze-tdep.c |
214 | +++ b/gdb/microblaze-tdep.c | 180 | +++ b/gdb/microblaze-tdep.c |
215 | @@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc) | 181 | @@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) |
216 | constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; | ||
217 | |||
218 | typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; | ||
219 | +static CORE_ADDR | ||
220 | +microblaze_store_arguments (struct regcache *regcache, int nargs, | ||
221 | + struct value **args, CORE_ADDR sp, | ||
222 | + int struct_return, CORE_ADDR struct_addr) | ||
223 | +{ | ||
224 | + error (_("store_arguments not implemented")); | ||
225 | + return sp; | ||
226 | +} | ||
227 | static int | ||
228 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
229 | struct bp_target_info *bp_tgt) | ||
230 | @@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame, | ||
231 | return cache->base; | ||
232 | } | ||
233 | |||
234 | +static const struct frame_unwind * | ||
235 | +microblaze_frame_sniffer (struct frame_info *next_frame) | ||
236 | +{ | ||
237 | + return µblaze_frame_unwind; | ||
238 | +} | ||
239 | + | ||
240 | static const struct frame_base microblaze_frame_base = | ||
241 | { | ||
242 | µblaze_frame_unwind, | ||
243 | @@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) | ||
244 | tdesc_microblaze_with_stack_protect); | 182 | tdesc_microblaze_with_stack_protect); |
245 | } | 183 | } |
246 | 184 | ||
247 | +void | 185 | +void |
248 | +microblaze_supply_gregset (const struct microblaze_gregset *gregset, | 186 | +microblaze_supply_gregset (const struct regset *regset, |
249 | + struct regcache *regcache, | 187 | + struct regcache *regcache, |
250 | + int regnum, const void *gregs) | 188 | + int regnum, const void *gregs) |
251 | +{ | 189 | +{ |
252 | + unsigned int *regs = gregs; | 190 | + const unsigned int *regs = (const unsigned int *)gregs; |
253 | + if (regnum >= 0) | 191 | + if (regnum >= 0) |
254 | + regcache_raw_supply (regcache, regnum, regs + regnum); | 192 | + regcache->raw_supply (regnum, regs + regnum); |
255 | + | 193 | + |
256 | + if (regnum == -1) { | 194 | + if (regnum == -1) { |
257 | + int i; | 195 | + int i; |
258 | + | 196 | + |
259 | + for (i = 0; i < 50; i++) { | 197 | + for (i = 0; i < 50; i++) { |
260 | + regcache_raw_supply (regcache, i, regs + i); | 198 | + regcache->raw_supply (i, regs + i); |
261 | + } | 199 | + } |
262 | + } | 200 | + } |
263 | +} | 201 | +} |
264 | + | 202 | + |
265 | + | 203 | + |
266 | +void | ||
267 | +microblaze_collect_gregset (const struct microblaze_gregset *gregset, | ||
268 | + const struct regcache *regcache, | ||
269 | + int regnum, void *gregs) | ||
270 | +{ | ||
271 | + /* FIXME. */ | ||
272 | +} | ||
273 | + | ||
274 | +void | ||
275 | +microblaze_supply_fpregset (struct regcache *regcache, | ||
276 | + int regnum, const void *fpregs) | ||
277 | +{ | ||
278 | + /* FIXME. */ | ||
279 | +} | ||
280 | + | ||
281 | +void | ||
282 | +microblaze_collect_fpregset (const struct regcache *regcache, | ||
283 | + int regnum, void *fpregs) | ||
284 | +{ | ||
285 | + /* FIXME. */ | ||
286 | +} | ||
287 | + | ||
288 | + | ||
289 | +/* Return the appropriate register set for the core section identified | 204 | +/* Return the appropriate register set for the core section identified |
290 | + by SECT_NAME and SECT_SIZE. */ | 205 | + by SECT_NAME and SECT_SIZE. */ |
291 | + | 206 | + |
292 | +const struct regset * | 207 | +static void |
293 | +microblaze_regset_from_core_section (struct gdbarch *gdbarch, | 208 | +microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, |
294 | + const char *sect_name, size_t sect_size) | 209 | + iterate_over_regset_sections_cb *cb, |
210 | + void *cb_data, | ||
211 | + const struct regcache *regcache) | ||
295 | +{ | 212 | +{ |
296 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | 213 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
297 | + | 214 | + |
298 | + microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name); | 215 | + cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); |
299 | + | ||
300 | + if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) | ||
301 | + return tdep->gregset; | ||
302 | + | ||
303 | + if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) | ||
304 | + return tdep->fpregset; | ||
305 | + | 216 | + |
306 | + microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n"); | 217 | + cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); |
307 | + return NULL; | ||
308 | +} | 218 | +} |
309 | + | 219 | + |
310 | + | 220 | + |
@@ -312,7 +222,7 @@ index 730a2b281f..49713ea9b1 100644 | |||
312 | static struct gdbarch * | 222 | static struct gdbarch * |
313 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 223 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
314 | { | 224 | { |
315 | @@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 225 | @@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
316 | tdep = XCNEW (struct gdbarch_tdep); | 226 | tdep = XCNEW (struct gdbarch_tdep); |
317 | gdbarch = gdbarch_alloc (&info, tdep); | 227 | gdbarch = gdbarch_alloc (&info, tdep); |
318 | 228 | ||
@@ -323,7 +233,7 @@ index 730a2b281f..49713ea9b1 100644 | |||
323 | set_gdbarch_long_double_bit (gdbarch, 128); | 233 | set_gdbarch_long_double_bit (gdbarch, 128); |
324 | 234 | ||
325 | set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); | 235 | set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); |
326 | @@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 236 | @@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
327 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); | 237 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
328 | if (tdesc_data != NULL) | 238 | if (tdesc_data != NULL) |
329 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | 239 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); |
@@ -331,14 +241,14 @@ index 730a2b281f..49713ea9b1 100644 | |||
331 | + | 241 | + |
332 | + /* If we have register sets, enable the generic core file support. */ | 242 | + /* If we have register sets, enable the generic core file support. */ |
333 | + if (tdep->gregset) { | 243 | + if (tdep->gregset) { |
334 | + set_gdbarch_regset_from_core_section (gdbarch, | 244 | + set_gdbarch_iterate_over_regset_sections (gdbarch, |
335 | + microblaze_regset_from_core_section); | 245 | + microblaze_iterate_over_regset_sections); |
336 | + } | 246 | + } |
337 | 247 | ||
338 | return gdbarch; | 248 | return gdbarch; |
339 | } | 249 | } |
340 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 250 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
341 | index 63aab84ef6..02650f61d9 100644 | 251 | index db0772643dc..8f41ba19351 100644 |
342 | --- a/gdb/microblaze-tdep.h | 252 | --- a/gdb/microblaze-tdep.h |
343 | +++ b/gdb/microblaze-tdep.h | 253 | +++ b/gdb/microblaze-tdep.h |
344 | @@ -22,8 +22,22 @@ | 254 | @@ -22,8 +22,22 @@ |
@@ -368,10 +278,10 @@ index 63aab84ef6..02650f61d9 100644 | |||
368 | #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} | 278 | #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} |
369 | #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} | 279 | #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} |
370 | 280 | ||
371 | +extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset, | 281 | +extern void microblaze_supply_gregset (const struct regset *regset, |
372 | + struct regcache *regcache, | 282 | + struct regcache *regcache, |
373 | + int regnum, const void *gregs); | 283 | + int regnum, const void *gregs); |
374 | +extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset, | 284 | +extern void microblaze_collect_gregset (const struct regset *regset, |
375 | + const struct regcache *regcache, | 285 | + const struct regcache *regcache, |
376 | + int regnum, void *gregs); | 286 | + int regnum, void *gregs); |
377 | +extern void microblaze_supply_fpregset (struct regcache *regcache, | 287 | +extern void microblaze_supply_fpregset (struct regcache *regcache, |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0035-revert-master-rebase-changes-to-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0035-revert-master-rebase-changes-to-gdbserver.patch deleted file mode 100644 index 0fe5c082..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0035-revert-master-rebase-changes-to-gdbserver.patch +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | From 6f2d2fd5a214126e2c81dfb0dada3001ba353419 Mon Sep 17 00:00:00 2001 | ||
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | ||
3 | Date: Mon, 22 Jul 2013 11:16:05 +1000 | ||
4 | Subject: [PATCH 35/43] revert master-rebase changes to gdbserver | ||
5 | |||
6 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
7 | --- | ||
8 | gdb/gdbserver/configure.srv | 7 +++++++ | ||
9 | 1 file changed, 7 insertions(+) | ||
10 | |||
11 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | ||
12 | index bec72e2b19..153dcb4c71 100644 | ||
13 | --- a/gdb/gdbserver/configure.srv | ||
14 | +++ b/gdb/gdbserver/configure.srv | ||
15 | @@ -210,6 +210,13 @@ case "${target}" in | ||
16 | srv_linux_usrregs=yes | ||
17 | srv_linux_thread_db=yes | ||
18 | ;; | ||
19 | + microblaze*-*-linux*) srv_regobj=microblaze-linux.o | ||
20 | + srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | ||
21 | + srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | ||
22 | + srv_linux_regsets=yes | ||
23 | + srv_linux_usrregs=yes | ||
24 | + srv_linux_thread_db=yes | ||
25 | + ;; | ||
26 | powerpc*-*-linux*) srv_regobj="powerpc-32l.o" | ||
27 | srv_regobj="${srv_regobj} powerpc-altivec32l.o" | ||
28 | srv_regobj="${srv_regobj} powerpc-cell32l.o" | ||
29 | -- | ||
30 | 2.17.1 | ||
31 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0034-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch index f0ec43b1..f0c182d3 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0034-Fix-debug-message-when-register-is-unavailable.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 9e42c672613131b25da90e58aefd2d39e497c3f6 Mon Sep 17 00:00:00 2001 | 1 | From 41fd9d3645d610ff65171e9a44427711232cb4b8 Mon Sep 17 00:00:00 2001 |
2 | From: Nathan Rossi <nathan.rossi@petalogix.com> | 2 | From: Nathan Rossi <nathan.rossi@petalogix.com> |
3 | Date: Tue, 8 May 2012 18:11:17 +1000 | 3 | Date: Tue, 8 May 2012 18:11:17 +1000 |
4 | Subject: [PATCH 34/43] Fix debug message when register is unavailable | 4 | Subject: [PATCH 36/40] Fix debug message when register is unavailable |
5 | 5 | ||
6 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | 6 | Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> |
7 | --- | 7 | --- |
@@ -9,10 +9,10 @@ Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> | |||
9 | 1 file changed, 10 insertions(+), 3 deletions(-) | 9 | 1 file changed, 10 insertions(+), 3 deletions(-) |
10 | 10 | ||
11 | diff --git a/gdb/frame.c b/gdb/frame.c | 11 | diff --git a/gdb/frame.c b/gdb/frame.c |
12 | index d8b5f819f1..49706dc97c 100644 | 12 | index c746a6a231e..571722c7351 100644 |
13 | --- a/gdb/frame.c | 13 | --- a/gdb/frame.c |
14 | +++ b/gdb/frame.c | 14 | +++ b/gdb/frame.c |
15 | @@ -1227,12 +1227,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum) | 15 | @@ -1255,12 +1255,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum) |
16 | else | 16 | else |
17 | { | 17 | { |
18 | int i; | 18 | int i; |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch deleted file mode 100644 index 111d8059..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver-previous-c.patch +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | From a21f56098eb41e20ba2e6995e6dc72acdea045a0 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Mon, 30 Apr 2018 17:09:55 +0530 | ||
4 | Subject: [PATCH 36/43] revert master-rebase changes to gdbserver , previous | ||
5 | commit typo's | ||
6 | |||
7 | --- | ||
8 | gdb/gdbserver/Makefile.in | 2 ++ | ||
9 | 1 file changed, 2 insertions(+) | ||
10 | |||
11 | diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in | ||
12 | index f5fc55034e..73ca5fd7c5 100644 | ||
13 | --- a/gdb/gdbserver/Makefile.in | ||
14 | +++ b/gdb/gdbserver/Makefile.in | ||
15 | @@ -169,6 +169,7 @@ SFILES = \ | ||
16 | $(srcdir)/linux-low.c \ | ||
17 | $(srcdir)/linux-m32r-low.c \ | ||
18 | $(srcdir)/linux-m68k-low.c \ | ||
19 | + $(srcdir)/linux-microblaze-low.c \ | ||
20 | $(srcdir)/linux-mips-low.c \ | ||
21 | $(srcdir)/linux-nios2-low.c \ | ||
22 | $(srcdir)/linux-ppc-low.c \ | ||
23 | @@ -226,6 +227,7 @@ SFILES = \ | ||
24 | $(srcdir)/nat/linux-osdata.c \ | ||
25 | $(srcdir)/nat/linux-personality.c \ | ||
26 | $(srcdir)/nat/mips-linux-watch.c \ | ||
27 | + $(srcdir)/nat/microblaze-linux.c \ | ||
28 | $(srcdir)/nat/ppc-linux.c \ | ||
29 | $(srcdir)/nat/fork-inferior.c \ | ||
30 | $(srcdir)/target/waitstatus.c | ||
31 | -- | ||
32 | 2.17.1 | ||
33 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch index 16b891bd..1e0bffbe 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch | |||
@@ -1,7 +1,7 @@ | |||
1 | From 62bda7ae7bf0880201c4872c54e5b530b2fec27b Mon Sep 17 00:00:00 2001 | 1 | From 7b22823ae82445f52384e6c0bd85431294868eb7 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@xilinx.com> | 2 | From: David Holsgrove <david.holsgrove@xilinx.com> |
3 | Date: Mon, 16 Dec 2013 16:37:32 +1000 | 3 | Date: Mon, 16 Dec 2013 16:37:32 +1000 |
4 | Subject: [PATCH 37/43] microblaze: Add build_gdbserver=yes to top level | 4 | Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level |
5 | configure.tgt | 5 | configure.tgt |
6 | 6 | ||
7 | For Microblaze linux toolchains, set the build_gdbserver=yes | 7 | For Microblaze linux toolchains, set the build_gdbserver=yes |
@@ -16,10 +16,10 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | |||
16 | 1 file changed, 1 insertion(+) | 16 | 1 file changed, 1 insertion(+) |
17 | 17 | ||
18 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt | 18 | diff --git a/gdb/configure.tgt b/gdb/configure.tgt |
19 | index 622bd486b3..989523735b 100644 | 19 | index f0386568460..ae238c17cd5 100644 |
20 | --- a/gdb/configure.tgt | 20 | --- a/gdb/configure.tgt |
21 | +++ b/gdb/configure.tgt | 21 | +++ b/gdb/configure.tgt |
22 | @@ -405,6 +405,7 @@ microblaze*-*-*) | 22 | @@ -408,6 +408,7 @@ microblaze*-*-*) |
23 | # Target: Xilinx MicroBlaze running standalone | 23 | # Target: Xilinx MicroBlaze running standalone |
24 | gdb_target_obs="microblaze-tdep.o" | 24 | gdb_target_obs="microblaze-tdep.o" |
25 | gdb_sim=../sim/microblaze/libsim.a | 25 | gdb_sim=../sim/microblaze/libsim.a |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch index ca37355c..afde3ce8 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch | |||
@@ -1,62 +1,43 @@ | |||
1 | From fef2dfc9c55d19be25262175a4fa4921167a30b7 Mon Sep 17 00:00:00 2001 | 1 | From a06b9c4860af1f8f18ccb7c0653c76c623636034 Mon Sep 17 00:00:00 2001 |
2 | From: David Holsgrove <david.holsgrove@petalogix.com> | 2 | From: David Holsgrove <david.holsgrove@petalogix.com> |
3 | Date: Fri, 20 Jul 2012 15:18:35 +1000 | 3 | Date: Fri, 20 Jul 2012 15:18:35 +1000 |
4 | Subject: [PATCH 38/43] Initial support for native gdb | 4 | Subject: [PATCH 38/40] Initial support for native gdb |
5 | 5 | ||
6 | microblaze: Follow PPC method of getting setting registers | 6 | microblaze: Follow PPC method of getting setting registers |
7 | using PTRACE PEEK/POKE | 7 | using PTRACE PEEK/POKE |
8 | 8 | ||
9 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> | 9 | Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> |
10 | |||
11 | Conflicts: | ||
12 | gdb/Makefile.in | ||
13 | --- | 10 | --- |
14 | gdb/Makefile.in | 4 +- | 11 | gdb/Makefile.in | 2 + |
15 | gdb/config/microblaze/linux.mh | 9 + | 12 | gdb/config/microblaze/linux.mh | 9 + |
16 | gdb/microblaze-linux-nat.c | 431 +++++++++++++++++++++++++++++++++ | 13 | gdb/microblaze-linux-nat.c | 431 +++++++++++++++++++++++++++++++++ |
17 | 3 files changed, 443 insertions(+), 1 deletion(-) | 14 | 3 files changed, 442 insertions(+) |
18 | create mode 100644 gdb/config/microblaze/linux.mh | 15 | create mode 100644 gdb/config/microblaze/linux.mh |
19 | create mode 100644 gdb/microblaze-linux-nat.c | 16 | create mode 100644 gdb/microblaze-linux-nat.c |
20 | 17 | ||
21 | diff --git a/gdb/Makefile.in b/gdb/Makefile.in | 18 | diff --git a/gdb/Makefile.in b/gdb/Makefile.in |
22 | index 5614cc3386..d620580498 100644 | 19 | index c3e074b21fe..cbcd8f43326 100644 |
23 | --- a/gdb/Makefile.in | 20 | --- a/gdb/Makefile.in |
24 | +++ b/gdb/Makefile.in | 21 | +++ b/gdb/Makefile.in |
25 | @@ -1316,6 +1316,7 @@ HFILES_NO_SRCDIR = \ | 22 | @@ -1337,6 +1337,7 @@ HFILES_NO_SRCDIR = \ |
26 | memory-map.h \ | 23 | memory-map.h \ |
27 | memrange.h \ | 24 | memrange.h \ |
28 | microblaze-tdep.h \ | 25 | microblaze-tdep.h \ |
29 | + microblaze-linux-tdep.h \ | 26 | + microblaze-linux-tdep.h \ |
30 | mips-linux-tdep.h \ | 27 | mips-linux-tdep.h \ |
31 | mips-nbsd-tdep.h \ | 28 | mips-nbsd-tdep.h \ |
32 | mips-tdep.h \ | 29 | mips-tdep.h \ |
33 | @@ -1349,6 +1350,7 @@ HFILES_NO_SRCDIR = \ | 30 | @@ -2261,6 +2262,7 @@ ALLDEPFILES = \ |
34 | prologue-value.h \ | ||
35 | psympriv.h \ | ||
36 | psymtab.h \ | ||
37 | + ia64-hpux-tdep.h \ | ||
38 | ravenscar-thread.h \ | ||
39 | record.h \ | ||
40 | record-full.h \ | ||
41 | @@ -2263,6 +2265,7 @@ ALLDEPFILES = \ | ||
42 | m68k-tdep.c \ | 31 | m68k-tdep.c \ |
43 | microblaze-linux-tdep.c \ | 32 | microblaze-linux-tdep.c \ |
44 | microblaze-tdep.c \ | 33 | microblaze-tdep.c \ |
45 | + microblaze-linux-nat.c \ | 34 | + microblaze-linux-nat.c \ |
46 | mingw-hdep.c \ | 35 | mingw-hdep.c \ |
47 | mips-fbsd-nat.c \ | 36 | mips-fbsd-nat.c \ |
48 | mips-fbsd-tdep.c \ | 37 | mips-fbsd-tdep.c \ |
49 | @@ -2365,7 +2368,6 @@ ALLDEPFILES = \ | ||
50 | xtensa-linux-tdep.c \ | ||
51 | xtensa-tdep.c \ | ||
52 | xtensa-xtregs.c \ | ||
53 | - common/mingw-strerror.c \ | ||
54 | common/posix-strerror.c | ||
55 | |||
56 | # Some files need explicit build rules (due to -Werror problems) or due | ||
57 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh | 38 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh |
58 | new file mode 100644 | 39 | new file mode 100644 |
59 | index 0000000000..a4eaf540e1 | 40 | index 00000000000..a4eaf540e1d |
60 | --- /dev/null | 41 | --- /dev/null |
61 | +++ b/gdb/config/microblaze/linux.mh | 42 | +++ b/gdb/config/microblaze/linux.mh |
62 | @@ -0,0 +1,9 @@ | 43 | @@ -0,0 +1,9 @@ |
@@ -71,7 +52,7 @@ index 0000000000..a4eaf540e1 | |||
71 | +LOADLIBES = -ldl $(RDYNAMIC) | 52 | +LOADLIBES = -ldl $(RDYNAMIC) |
72 | diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c | 53 | diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c |
73 | new file mode 100644 | 54 | new file mode 100644 |
74 | index 0000000000..e9b8c9c522 | 55 | index 00000000000..e9b8c9c5221 |
75 | --- /dev/null | 56 | --- /dev/null |
76 | +++ b/gdb/microblaze-linux-nat.c | 57 | +++ b/gdb/microblaze-linux-nat.c |
77 | @@ -0,0 +1,431 @@ | 58 | @@ -0,0 +1,431 @@ |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch index b8fb68bc..fb4b35e5 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch | |||
@@ -1,20 +1,19 @@ | |||
1 | From e3e7d58035fb75b6cf33689352c6e22309c6dbde Mon Sep 17 00:00:00 2001 | 1 | From f13ffe15c10e5d4b5c87761ae9735144d4c8da17 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Fri, 17 Feb 2017 14:09:40 +0530 | 3 | Date: Fri, 17 Feb 2017 14:09:40 +0530 |
4 | Subject: [PATCH 39/43] Fixing the issues related to GDB-7.12 added all the | 4 | Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12 |
5 | required function which are new in 7.12 and removed few deprecated functions | ||
6 | from 7.6 | ||
7 | 5 | ||
6 | added all the required function which are new in 7.12 and removed | ||
7 | few deprecated functions from 7.6 | ||
8 | --- | 8 | --- |
9 | gdb/config/microblaze/linux.mh | 4 +- | 9 | gdb/config/microblaze/linux.mh | 4 +- |
10 | gdb/gdbserver/configure.srv | 3 +- | 10 | gdb/gdbserver/configure.srv | 3 +- |
11 | gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++---- | 11 | gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++---- |
12 | gdb/microblaze-linux-tdep.c | 68 +++++++++++++++++-- | ||
13 | gdb/microblaze-tdep.h | 1 + | 12 | gdb/microblaze-tdep.h | 1 + |
14 | 5 files changed, 153 insertions(+), 20 deletions(-) | 13 | 4 files changed, 89 insertions(+), 16 deletions(-) |
15 | 14 | ||
16 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh | 15 | diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh |
17 | index a4eaf540e1..74a53b854a 100644 | 16 | index a4eaf540e1d..74a53b854a4 100644 |
18 | --- a/gdb/config/microblaze/linux.mh | 17 | --- a/gdb/config/microblaze/linux.mh |
19 | +++ b/gdb/config/microblaze/linux.mh | 18 | +++ b/gdb/config/microblaze/linux.mh |
20 | @@ -1,9 +1,11 @@ | 19 | @@ -1,9 +1,11 @@ |
@@ -31,21 +30,21 @@ index a4eaf540e1..74a53b854a 100644 | |||
31 | 30 | ||
32 | LOADLIBES = -ldl $(RDYNAMIC) | 31 | LOADLIBES = -ldl $(RDYNAMIC) |
33 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | 32 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv |
34 | index 153dcb4c71..201b7ae190 100644 | 33 | index e0d2b2fe04a..26db2dd2461 100644 |
35 | --- a/gdb/gdbserver/configure.srv | 34 | --- a/gdb/gdbserver/configure.srv |
36 | +++ b/gdb/gdbserver/configure.srv | 35 | +++ b/gdb/gdbserver/configure.srv |
37 | @@ -211,8 +211,7 @@ case "${target}" in | 36 | @@ -185,8 +185,7 @@ case "${target}" in |
38 | srv_linux_thread_db=yes | 37 | srv_linux_thread_db=yes |
39 | ;; | 38 | ;; |
40 | microblaze*-*-linux*) srv_regobj=microblaze-linux.o | 39 | microblaze*-*-linux*) srv_regobj="microblaze-linux.o" |
41 | - srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " | 40 | - srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o " |
42 | - srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" | 41 | - srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o" |
43 | + srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " | 42 | + srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " |
43 | srv_xmlfiles="microblaze-linux.xml" | ||
44 | srv_linux_regsets=yes | 44 | srv_linux_regsets=yes |
45 | srv_linux_usrregs=yes | 45 | srv_linux_usrregs=yes |
46 | srv_linux_thread_db=yes | ||
47 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c | 46 | diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c |
48 | index cba5d6fc58..a2733f3c21 100644 | 47 | index cba5d6fc585..a2733f3c21c 100644 |
49 | --- a/gdb/gdbserver/linux-microblaze-low.c | 48 | --- a/gdb/gdbserver/linux-microblaze-low.c |
50 | +++ b/gdb/gdbserver/linux-microblaze-low.c | 49 | +++ b/gdb/gdbserver/linux-microblaze-low.c |
51 | @@ -39,10 +39,11 @@ static int microblaze_regmap[] = | 50 | @@ -39,10 +39,11 @@ static int microblaze_regmap[] = |
@@ -200,100 +199,8 @@ index cba5d6fc58..a2733f3c21 100644 | |||
200 | +{ | 199 | +{ |
201 | + init_registers_microblaze (); | 200 | + init_registers_microblaze (); |
202 | +} | 201 | +} |
203 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
204 | index e2225d778a..011e513941 100644 | ||
205 | --- a/gdb/microblaze-linux-tdep.c | ||
206 | +++ b/gdb/microblaze-linux-tdep.c | ||
207 | @@ -29,13 +29,76 @@ | ||
208 | #include "regcache.h" | ||
209 | #include "value.h" | ||
210 | #include "osabi.h" | ||
211 | -#include "regset.h" | ||
212 | #include "solib-svr4.h" | ||
213 | #include "microblaze-tdep.h" | ||
214 | #include "trad-frame.h" | ||
215 | #include "frame-unwind.h" | ||
216 | #include "tramp-frame.h" | ||
217 | #include "linux-tdep.h" | ||
218 | +#include "glibc-tdep.h" | ||
219 | + | ||
220 | +#include "gdb_assert.h" | ||
221 | + | ||
222 | +#ifndef REGSET_H | ||
223 | +#define REGSET_H 1 | ||
224 | + | ||
225 | +struct gdbarch; | ||
226 | +struct regcache; | ||
227 | + | ||
228 | +/* Data structure for the supported register notes in a core file. */ | ||
229 | +struct core_regset_section | ||
230 | +{ | ||
231 | + const char *sect_name; | ||
232 | + int size; | ||
233 | + const char *human_name; | ||
234 | +}; | ||
235 | + | ||
236 | +/* Data structure describing a register set. */ | ||
237 | + | ||
238 | +typedef void (supply_regset_ftype) (const struct regset *, struct regcache *, | ||
239 | + int, const void *, size_t); | ||
240 | +typedef void (collect_regset_ftype) (const struct regset *, | ||
241 | + const struct regcache *, | ||
242 | + int, void *, size_t); | ||
243 | + | ||
244 | +struct regset | ||
245 | +{ | ||
246 | + /* Data pointer for private use by the methods below, presumably | ||
247 | + providing some sort of description of the register set. */ | ||
248 | + const void *descr; | ||
249 | + | ||
250 | + /* Function supplying values in a register set to a register cache. */ | ||
251 | + supply_regset_ftype *supply_regset; | ||
252 | + | ||
253 | + /* Function collecting values in a register set from a register cache. */ | ||
254 | + collect_regset_ftype *collect_regset; | ||
255 | + | ||
256 | + /* Architecture associated with the register set. */ | ||
257 | + struct gdbarch *arch; | ||
258 | +}; | ||
259 | + | ||
260 | +#endif | ||
261 | + | ||
262 | +/* Allocate a fresh 'struct regset' whose supply_regset function is | ||
263 | + SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET. | ||
264 | + If the regset has no collect_regset function, pass NULL for | ||
265 | + COLLECT_REGSET. | ||
266 | + | ||
267 | + The object returned is allocated on ARCH's obstack. */ | ||
268 | + | ||
269 | +struct regset * | ||
270 | +regset_alloc (struct gdbarch *arch, | ||
271 | + supply_regset_ftype *supply_regset, | ||
272 | + collect_regset_ftype *collect_regset) | ||
273 | +{ | ||
274 | + struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset); | ||
275 | + | ||
276 | + regset->arch = arch; | ||
277 | + regset->supply_regset = supply_regset; | ||
278 | + regset->collect_regset = collect_regset; | ||
279 | + | ||
280 | + return regset; | ||
281 | +} | ||
282 | |||
283 | static int microblaze_debug_flag = 0; | ||
284 | |||
285 | @@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
286 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | ||
287 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); | ||
288 | |||
289 | - set_gdbarch_regset_from_core_section (gdbarch, | ||
290 | - microblaze_regset_from_core_section); | ||
291 | - | ||
292 | /* Enable TLS support. */ | ||
293 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | ||
294 | svr4_fetch_objfile_link_map); | ||
295 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 202 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
296 | index 02650f61d9..3777cbb6a8 100644 | 203 | index 8f41ba19351..d2112dc07e1 100644 |
297 | --- a/gdb/microblaze-tdep.h | 204 | --- a/gdb/microblaze-tdep.h |
298 | +++ b/gdb/microblaze-tdep.h | 205 | +++ b/gdb/microblaze-tdep.h |
299 | @@ -24,6 +24,7 @@ | 206 | @@ -24,6 +24,7 @@ |
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch index e89d4049..7ac8f07f 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch | |||
@@ -1,35 +1,31 @@ | |||
1 | From ecaa548038df1ebf653ef3c3429e49c207461b19 Mon Sep 17 00:00:00 2001 | 1 | From 4e5a4e94cb1dd61646230100f883bd27a39cd896 Mon Sep 17 00:00:00 2001 |
2 | From: Nagaraju Mekala <nmekala@xilix.com> | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
3 | Date: Thu, 31 Jan 2019 14:36:00 +0530 | 3 | Date: Thu, 31 Jan 2019 14:36:00 +0530 |
4 | Subject: [PATCH 40/43] [Patch, microblaze]: Adding 64 bit MB support Added new | 4 | Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support |
5 | architecture to Microblaze 64-bit support to GDB Signed-off-by :Nagaraju | ||
6 | Mekala <nmekala@xilix.com> | ||
7 | 5 | ||
8 | Merged on top of binutils work. | 6 | Added new architecture to Microblaze 64-bit support to GDB |
9 | 7 | ||
10 | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | 8 | Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> |
11 | --- | 9 | --- |
12 | bfd/archures.c | 2 + | 10 | bfd/archures.c | 2 + |
13 | bfd/bfd-in2.h | 2 + | 11 | bfd/bfd-in2.h | 2 + |
14 | bfd/cpu-microblaze.c | 12 +- | 12 | bfd/cpu-microblaze.c | 16 +- |
15 | bfd/elf32-microblaze.c | 93 +------- | 13 | bfd/elf32-microblaze.c | 9 + |
16 | gdb/Makefile.in | 2 +- | ||
17 | gdb/features/Makefile | 3 + | 14 | gdb/features/Makefile | 3 + |
18 | gdb/features/microblaze-core.xml | 6 +- | 15 | gdb/features/microblaze-core.xml | 6 +- |
19 | gdb/features/microblaze-stack-protect.xml | 4 +- | 16 | gdb/features/microblaze-with-stack-protect.c | 4 +- |
20 | gdb/features/microblaze-with-stack-protect.c | 8 +- | ||
21 | gdb/features/microblaze.c | 6 +- | 17 | gdb/features/microblaze.c | 6 +- |
22 | gdb/features/microblaze64-core.xml | 69 ++++++ | 18 | gdb/features/microblaze64-core.xml | 69 +++++++ |
23 | gdb/features/microblaze64-stack-protect.xml | 12 + | 19 | gdb/features/microblaze64-stack-protect.xml | 12 ++ |
24 | .../microblaze64-with-stack-protect.c | 79 +++++++ | 20 | .../microblaze64-with-stack-protect.c | 79 ++++++++ |
25 | .../microblaze64-with-stack-protect.xml | 12 + | 21 | .../microblaze64-with-stack-protect.xml | 12 ++ |
26 | gdb/features/microblaze64.c | 77 +++++++ | 22 | gdb/features/microblaze64.c | 77 ++++++++ |
27 | gdb/features/microblaze64.xml | 11 + | 23 | gdb/features/microblaze64.xml | 11 ++ |
28 | gdb/microblaze-tdep.c | 207 ++++++++++++++++-- | 24 | gdb/microblaze-linux-tdep.c | 29 ++- |
29 | gdb/microblaze-tdep.h | 8 +- | 25 | gdb/microblaze-tdep.c | 176 ++++++++++++++++-- |
26 | gdb/microblaze-tdep.h | 9 +- | ||
30 | .../microblaze-with-stack-protect.dat | 4 +- | 27 | .../microblaze-with-stack-protect.dat | 4 +- |
31 | opcodes/microblaze-opc.h | 1 - | 28 | 20 files changed, 504 insertions(+), 40 deletions(-) |
32 | 22 files changed, 504 insertions(+), 134 deletions(-) | ||
33 | create mode 100644 gdb/features/microblaze64-core.xml | 29 | create mode 100644 gdb/features/microblaze64-core.xml |
34 | create mode 100644 gdb/features/microblaze64-stack-protect.xml | 30 | create mode 100644 gdb/features/microblaze64-stack-protect.xml |
35 | create mode 100644 gdb/features/microblaze64-with-stack-protect.c | 31 | create mode 100644 gdb/features/microblaze64-with-stack-protect.c |
@@ -38,10 +34,10 @@ Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | |||
38 | create mode 100644 gdb/features/microblaze64.xml | 34 | create mode 100644 gdb/features/microblaze64.xml |
39 | 35 | ||
40 | diff --git a/bfd/archures.c b/bfd/archures.c | 36 | diff --git a/bfd/archures.c b/bfd/archures.c |
41 | index 647cf0d8d4..3fdf7c3c0e 100644 | 37 | index 7866c6095b5..abc1541afe6 100644 |
42 | --- a/bfd/archures.c | 38 | --- a/bfd/archures.c |
43 | +++ b/bfd/archures.c | 39 | +++ b/bfd/archures.c |
44 | @@ -512,6 +512,8 @@ DESCRIPTION | 40 | @@ -513,6 +513,8 @@ DESCRIPTION |
45 | . bfd_arch_lm32, {* Lattice Mico32. *} | 41 | . bfd_arch_lm32, {* Lattice Mico32. *} |
46 | .#define bfd_mach_lm32 1 | 42 | .#define bfd_mach_lm32 1 |
47 | . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} | 43 | . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} |
@@ -51,10 +47,10 @@ index 647cf0d8d4..3fdf7c3c0e 100644 | |||
51 | . bfd_arch_tilegx, {* Tilera TILE-Gx. *} | 47 | . bfd_arch_tilegx, {* Tilera TILE-Gx. *} |
52 | .#define bfd_mach_tilepro 1 | 48 | .#define bfd_mach_tilepro 1 |
53 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 49 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
54 | index 33c9cb62d9..db624c62b9 100644 | 50 | index 91761bf6964..cc34ce0d8c3 100644 |
55 | --- a/bfd/bfd-in2.h | 51 | --- a/bfd/bfd-in2.h |
56 | +++ b/bfd/bfd-in2.h | 52 | +++ b/bfd/bfd-in2.h |
57 | @@ -2411,6 +2411,8 @@ enum bfd_architecture | 53 | @@ -1896,6 +1896,8 @@ enum bfd_architecture |
58 | bfd_arch_lm32, /* Lattice Mico32. */ | 54 | bfd_arch_lm32, /* Lattice Mico32. */ |
59 | #define bfd_mach_lm32 1 | 55 | #define bfd_mach_lm32 1 |
60 | bfd_arch_microblaze,/* Xilinx MicroBlaze. */ | 56 | bfd_arch_microblaze,/* Xilinx MicroBlaze. */ |
@@ -64,7 +60,7 @@ index 33c9cb62d9..db624c62b9 100644 | |||
64 | bfd_arch_tilegx, /* Tilera TILE-Gx. */ | 60 | bfd_arch_tilegx, /* Tilera TILE-Gx. */ |
65 | #define bfd_mach_tilepro 1 | 61 | #define bfd_mach_tilepro 1 |
66 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c | 62 | diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c |
67 | index c91ba46f75..8e7bcead28 100644 | 63 | index 4b48b310c6a..a32c4a33d75 100644 |
68 | --- a/bfd/cpu-microblaze.c | 64 | --- a/bfd/cpu-microblaze.c |
69 | +++ b/bfd/cpu-microblaze.c | 65 | +++ b/bfd/cpu-microblaze.c |
70 | @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 66 | @@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
@@ -78,16 +74,23 @@ index c91ba46f75..8e7bcead28 100644 | |||
78 | "microblaze", /* Architecture name. */ | 74 | "microblaze", /* Architecture name. */ |
79 | "MicroBlaze", /* Printable name. */ | 75 | "MicroBlaze", /* Printable name. */ |
80 | 3, /* Section align power. */ | 76 | 3, /* Section align power. */ |
81 | @@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 77 | @@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
82 | 32, /* 32 bits in an address. */ | 78 | 0 /* Maximum offset of a reloc from the start of an insn. */ |
83 | 8, /* 8 bits in a byte. */ | 79 | }, |
84 | bfd_arch_microblaze, /* Architecture. */ | 80 | { |
81 | - 32, /* Bits in a word. */ | ||
82 | - 32, /* Bits in an address. */ | ||
83 | - 8, /* Bits in a byte. */ | ||
84 | + 32, /* 32 bits in a word. */ | ||
85 | + 32, /* 32 bits in an address. */ | ||
86 | + 8, /* 8 bits in a byte. */ | ||
87 | bfd_arch_microblaze, /* Architecture number. */ | ||
85 | - 0, /* Machine number - 0 for now. */ | 88 | - 0, /* Machine number - 0 for now. */ |
86 | + bfd_mach_microblaze, /* 32 bit Machine */ | 89 | + bfd_mach_microblaze, /* 32 bit Machine */ |
87 | "microblaze", /* Architecture name. */ | 90 | "microblaze", /* Architecture name. */ |
88 | "MicroBlaze", /* Printable name. */ | 91 | "MicroBlaze", /* Printable name. */ |
89 | 3, /* Section align power. */ | 92 | 3, /* Section align power. */ |
90 | @@ -62,7 +62,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 93 | @@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
91 | 32, /* 32 bits in an address. */ | 94 | 32, /* 32 bits in an address. */ |
92 | 8, /* 8 bits in a byte. */ | 95 | 8, /* 8 bits in a byte. */ |
93 | bfd_arch_microblaze, /* Architecture. */ | 96 | bfd_arch_microblaze, /* Architecture. */ |
@@ -96,110 +99,20 @@ index c91ba46f75..8e7bcead28 100644 | |||
96 | "microblaze", /* Architecture name. */ | 99 | "microblaze", /* Architecture name. */ |
97 | "MicroBlaze", /* Printable name. */ | 100 | "MicroBlaze", /* Printable name. */ |
98 | 3, /* Section align power. */ | 101 | 3, /* Section align power. */ |
99 | @@ -76,8 +76,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] = | 102 | @@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] = |
100 | 64, /* 32 bits in a word. */ | ||
101 | 64, /* 32 bits in an address. */ | 103 | 64, /* 32 bits in an address. */ |
102 | 8, /* 8 bits in a byte. */ | 104 | 8, /* 8 bits in a byte. */ |
103 | - bfd_arch_microblaze, /* Architecture. */ | 105 | bfd_arch_microblaze, /* Architecture. */ |
104 | - 0, /* Machine number - 0 for now. */ | 106 | - 0, /* Machine number - 0 for now. */ |
105 | + bfd_arch_microblaze, /* Architecture. */ | ||
106 | + bfd_mach_microblaze64, /* 64 bit Machine */ | 107 | + bfd_mach_microblaze64, /* 64 bit Machine */ |
107 | "microblaze", /* Architecture name. */ | 108 | "microblaze", /* Architecture name. */ |
108 | "MicroBlaze", /* Printable name. */ | 109 | "MicroBlaze", /* Printable name. */ |
109 | 3, /* Section align power. */ | 110 | 3, /* Section align power. */ |
110 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 111 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
111 | index c280431df6..f9996eae12 100644 | 112 | index cb7a98d307e..e4a70150190 100644 |
112 | --- a/bfd/elf32-microblaze.c | 113 | --- a/bfd/elf32-microblaze.c |
113 | +++ b/bfd/elf32-microblaze.c | 114 | +++ b/bfd/elf32-microblaze.c |
114 | @@ -767,87 +767,6 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) | 115 | @@ -3684,6 +3684,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, |
115 | return _bfd_elf_is_local_label_name (abfd, name); | ||
116 | } | ||
117 | |||
118 | -/* Support for core dump NOTE sections. */ | ||
119 | -static bfd_boolean | ||
120 | -microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) | ||
121 | -{ | ||
122 | - int offset; | ||
123 | - unsigned int size; | ||
124 | - | ||
125 | - switch (note->descsz) | ||
126 | - { | ||
127 | - default: | ||
128 | - return FALSE; | ||
129 | - | ||
130 | - case 228: /* Linux/MicroBlaze */ | ||
131 | - /* pr_cursig */ | ||
132 | - elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); | ||
133 | - | ||
134 | - /* pr_pid */ | ||
135 | - elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); | ||
136 | - | ||
137 | - /* pr_reg */ | ||
138 | - offset = 72; | ||
139 | - size = 50 * 4; | ||
140 | - | ||
141 | - break; | ||
142 | - } | ||
143 | - | ||
144 | - /* Make a ".reg/999" section. */ | ||
145 | - return _bfd_elfcore_make_pseudosection (abfd, ".reg", | ||
146 | - size, note->descpos + offset); | ||
147 | -} | ||
148 | - | ||
149 | -static bfd_boolean | ||
150 | -microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) | ||
151 | -{ | ||
152 | - switch (note->descsz) | ||
153 | - { | ||
154 | - default: | ||
155 | - return FALSE; | ||
156 | - | ||
157 | - case 128: /* Linux/MicroBlaze elf_prpsinfo */ | ||
158 | - elf_tdata (abfd)->core->program | ||
159 | - = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); | ||
160 | - elf_tdata (abfd)->core->command | ||
161 | - = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80); | ||
162 | - } | ||
163 | - | ||
164 | - /* Note that for some reason, a spurious space is tacked | ||
165 | - onto the end of the args in some (at least one anyway) | ||
166 | - implementations, so strip it off if it exists. */ | ||
167 | - | ||
168 | - { | ||
169 | - char *command = elf_tdata (abfd)->core->command; | ||
170 | - int n = strlen (command); | ||
171 | - | ||
172 | - if (0 < n && command[n - 1] == ' ') | ||
173 | - command[n - 1] = '\0'; | ||
174 | - } | ||
175 | - | ||
176 | - return TRUE; | ||
177 | -} | ||
178 | - | ||
179 | -/* The microblaze linker (like many others) needs to keep track of | ||
180 | - the number of relocs that it decides to copy as dynamic relocs in | ||
181 | - check_relocs for each symbol. This is so that it can later discard | ||
182 | - them if they are found to be unnecessary. We store the information | ||
183 | - in a field extending the regular ELF linker hash table. */ | ||
184 | - | ||
185 | -struct elf32_mb_dyn_relocs | ||
186 | -{ | ||
187 | - struct elf32_mb_dyn_relocs *next; | ||
188 | - | ||
189 | - /* The input section of the reloc. */ | ||
190 | - asection *sec; | ||
191 | - | ||
192 | - /* Total number of relocs copied for the input section. */ | ||
193 | - bfd_size_type count; | ||
194 | - | ||
195 | - /* Number of pc-relative relocs copied for the input section. */ | ||
196 | - bfd_size_type pc_count; | ||
197 | -}; | ||
198 | - | ||
199 | /* ELF linker hash entry. */ | ||
200 | |||
201 | struct elf32_mb_link_hash_entry | ||
202 | @@ -3683,6 +3602,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, | ||
203 | return TRUE; | 116 | return TRUE; |
204 | } | 117 | } |
205 | 118 | ||
@@ -214,44 +127,28 @@ index c280431df6..f9996eae12 100644 | |||
214 | /* Hook called by the linker routine which adds symbols from an object | 127 | /* Hook called by the linker routine which adds symbols from an object |
215 | file. We use it to put .comm items in .sbss, and not .bss. */ | 128 | file. We use it to put .comm items in .sbss, and not .bss. */ |
216 | 129 | ||
217 | @@ -3752,8 +3679,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, | 130 | @@ -3756,5 +3764,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, |
218 | #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol | 131 | |
219 | #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections | 132 | #define elf_backend_grok_prstatus microblaze_elf_grok_prstatus |
220 | #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook | 133 | #define elf_backend_grok_psinfo microblaze_elf_grok_psinfo |
221 | - | ||
222 | -#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus | ||
223 | -#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo | ||
224 | +#define elf_backend_object_p elf_microblaze_object_p | 134 | +#define elf_backend_object_p elf_microblaze_object_p |
225 | 135 | ||
226 | #include "elf32-target.h" | 136 | #include "elf32-target.h" |
227 | diff --git a/gdb/Makefile.in b/gdb/Makefile.in | ||
228 | index d620580498..69b003f8cb 100644 | ||
229 | --- a/gdb/Makefile.in | ||
230 | +++ b/gdb/Makefile.in | ||
231 | @@ -2265,7 +2265,7 @@ ALLDEPFILES = \ | ||
232 | m68k-tdep.c \ | ||
233 | microblaze-linux-tdep.c \ | ||
234 | microblaze-tdep.c \ | ||
235 | - microblaze-linux-nat.c \ | ||
236 | + microblaze-linux-nat.c \ | ||
237 | mingw-hdep.c \ | ||
238 | mips-fbsd-nat.c \ | ||
239 | mips-fbsd-tdep.c \ | ||
240 | diff --git a/gdb/features/Makefile b/gdb/features/Makefile | 137 | diff --git a/gdb/features/Makefile b/gdb/features/Makefile |
241 | index 3d84ca09a1..fdeec19753 100644 | 138 | index 9a98b0542c4..438e0c5a3fe 100644 |
242 | --- a/gdb/features/Makefile | 139 | --- a/gdb/features/Makefile |
243 | +++ b/gdb/features/Makefile | 140 | +++ b/gdb/features/Makefile |
244 | @@ -64,6 +64,7 @@ WHICH = aarch64 \ | 141 | @@ -48,6 +48,7 @@ WHICH = arm/arm-with-iwmmxt arm/arm-with-vfpv2 arm/arm-with-vfpv3 \ |
245 | i386/x32-avx-avx512-linux \ | 142 | arm/arm-with-neon \ |
246 | mips-linux mips-dsp-linux \ | 143 | mips-linux mips-dsp-linux \ |
247 | microblaze-with-stack-protect \ | 144 | microblaze-with-stack-protect \ |
248 | + microblaze64-with-stack-protect \ | 145 | + microblaze64-with-stack-protect \ |
249 | mips64-linux mips64-dsp-linux \ | 146 | mips64-linux mips64-dsp-linux \ |
250 | nios2-linux \ | 147 | nios2-linux \ |
251 | rs6000/powerpc-32 \ | 148 | rs6000/powerpc-32 \ |
252 | @@ -135,7 +136,9 @@ XMLTOC = \ | 149 | @@ -111,7 +112,9 @@ XMLTOC = \ |
253 | arm/arm-with-vfpv2.xml \ | 150 | arc-v2.xml \ |
254 | arm/arm-with-vfpv3.xml \ | 151 | arc-arcompact.xml \ |
255 | microblaze-with-stack-protect.xml \ | 152 | microblaze-with-stack-protect.xml \ |
256 | + microblaze64-with-stack-protect.xml \ | 153 | + microblaze64-with-stack-protect.xml \ |
257 | microblaze.xml \ | 154 | microblaze.xml \ |
@@ -260,7 +157,7 @@ index 3d84ca09a1..fdeec19753 100644 | |||
260 | mips-linux.xml \ | 157 | mips-linux.xml \ |
261 | mips64-dsp-linux.xml \ | 158 | mips64-dsp-linux.xml \ |
262 | diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml | 159 | diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml |
263 | index 88c93e5d66..5bc3e49f84 100644 | 160 | index f272650a41b..d1f2282fd1e 100644 |
264 | --- a/gdb/features/microblaze-core.xml | 161 | --- a/gdb/features/microblaze-core.xml |
265 | +++ b/gdb/features/microblaze-core.xml | 162 | +++ b/gdb/features/microblaze-core.xml |
266 | @@ -8,7 +8,7 @@ | 163 | @@ -8,7 +8,7 @@ |
@@ -285,24 +182,11 @@ index 88c93e5d66..5bc3e49f84 100644 | |||
285 | <reg name="rtlbsx" bitsize="32"/> | 182 | <reg name="rtlbsx" bitsize="32"/> |
286 | <reg name="rtlblo" bitsize="32"/> | 183 | <reg name="rtlblo" bitsize="32"/> |
287 | <reg name="rtlbhi" bitsize="32"/> | 184 | <reg name="rtlbhi" bitsize="32"/> |
288 | + <reg name="slr" bitsize="32"/> | 185 | + <reg name="rslr" bitsize="32"/> |
289 | + <reg name="shr" bitsize="32"/> | 186 | + <reg name="rshr" bitsize="32"/> |
290 | </feature> | ||
291 | diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml | ||
292 | index 870c148bb0..a7f27b903c 100644 | ||
293 | --- a/gdb/features/microblaze-stack-protect.xml | ||
294 | +++ b/gdb/features/microblaze-stack-protect.xml | ||
295 | @@ -7,6 +7,6 @@ | ||
296 | |||
297 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
298 | <feature name="org.gnu.gdb.microblaze.stack-protect"> | ||
299 | - <reg name="rslr" bitsize="32"/> | ||
300 | - <reg name="rshr" bitsize="32"/> | ||
301 | + <reg name="slr" bitsize="32"/> | ||
302 | + <reg name="shr" bitsize="32"/> | ||
303 | </feature> | 187 | </feature> |
304 | diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c | 188 | diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c |
305 | index b39aa19887..609934e2b4 100644 | 189 | index b39aa198874..ab162fd2588 100644 |
306 | --- a/gdb/features/microblaze-with-stack-protect.c | 190 | --- a/gdb/features/microblaze-with-stack-protect.c |
307 | +++ b/gdb/features/microblaze-with-stack-protect.c | 191 | +++ b/gdb/features/microblaze-with-stack-protect.c |
308 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) | 192 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) |
@@ -323,19 +207,8 @@ index b39aa19887..609934e2b4 100644 | |||
323 | tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); | 207 | tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); |
324 | tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); | 208 | tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); |
325 | tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); | 209 | tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); |
326 | @@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) | ||
327 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
328 | |||
329 | feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect"); | ||
330 | - tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); | ||
331 | - tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); | ||
332 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); | ||
333 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); | ||
334 | |||
335 | tdesc_microblaze_with_stack_protect = result; | ||
336 | } | ||
337 | diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c | 210 | diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c |
338 | index 6c86fc0770..ceb98ca8b8 100644 | 211 | index 6c86fc07700..7919ac96e62 100644 |
339 | --- a/gdb/features/microblaze.c | 212 | --- a/gdb/features/microblaze.c |
340 | +++ b/gdb/features/microblaze.c | 213 | +++ b/gdb/features/microblaze.c |
341 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) | 214 | @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) |
@@ -360,14 +233,14 @@ index 6c86fc0770..ceb98ca8b8 100644 | |||
360 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | 233 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); |
361 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | 234 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); |
362 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | 235 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); |
363 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | 236 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); |
364 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | 237 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); |
365 | 238 | ||
366 | tdesc_microblaze = result; | 239 | tdesc_microblaze = result; |
367 | } | 240 | } |
368 | diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml | 241 | diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml |
369 | new file mode 100644 | 242 | new file mode 100644 |
370 | index 0000000000..96e99e2fb2 | 243 | index 00000000000..b9adadfade6 |
371 | --- /dev/null | 244 | --- /dev/null |
372 | +++ b/gdb/features/microblaze64-core.xml | 245 | +++ b/gdb/features/microblaze64-core.xml |
373 | @@ -0,0 +1,69 @@ | 246 | @@ -0,0 +1,69 @@ |
@@ -437,12 +310,12 @@ index 0000000000..96e99e2fb2 | |||
437 | + <reg name="rtlbsx" bitsize="32"/> | 310 | + <reg name="rtlbsx" bitsize="32"/> |
438 | + <reg name="rtlblo" bitsize="32"/> | 311 | + <reg name="rtlblo" bitsize="32"/> |
439 | + <reg name="rtlbhi" bitsize="32"/> | 312 | + <reg name="rtlbhi" bitsize="32"/> |
440 | + <reg name="slr" bitsize="64"/> | 313 | + <reg name="rslr" bitsize="64"/> |
441 | + <reg name="shr" bitsize="64"/> | 314 | + <reg name="rshr" bitsize="64"/> |
442 | +</feature> | 315 | +</feature> |
443 | diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml | 316 | diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml |
444 | new file mode 100644 | 317 | new file mode 100644 |
445 | index 0000000000..1bbf5fc3ce | 318 | index 00000000000..9d7ea8b9fd7 |
446 | --- /dev/null | 319 | --- /dev/null |
447 | +++ b/gdb/features/microblaze64-stack-protect.xml | 320 | +++ b/gdb/features/microblaze64-stack-protect.xml |
448 | @@ -0,0 +1,12 @@ | 321 | @@ -0,0 +1,12 @@ |
@@ -455,12 +328,12 @@ index 0000000000..1bbf5fc3ce | |||
455 | + | 328 | + |
456 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | 329 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> |
457 | +<feature name="org.gnu.gdb.microblaze64.stack-protect"> | 330 | +<feature name="org.gnu.gdb.microblaze64.stack-protect"> |
458 | + <reg name="slr" bitsize="64"/> | 331 | + <reg name="rslr" bitsize="64"/> |
459 | + <reg name="shr" bitsize="64"/> | 332 | + <reg name="rshr" bitsize="64"/> |
460 | +</feature> | 333 | +</feature> |
461 | diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c | 334 | diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c |
462 | new file mode 100644 | 335 | new file mode 100644 |
463 | index 0000000000..f448c9a749 | 336 | index 00000000000..249cb534daa |
464 | --- /dev/null | 337 | --- /dev/null |
465 | +++ b/gdb/features/microblaze64-with-stack-protect.c | 338 | +++ b/gdb/features/microblaze64-with-stack-protect.c |
466 | @@ -0,0 +1,79 @@ | 339 | @@ -0,0 +1,79 @@ |
@@ -538,14 +411,14 @@ index 0000000000..f448c9a749 | |||
538 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | 411 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); |
539 | + | 412 | + |
540 | + feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect"); | 413 | + feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect"); |
541 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | 414 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); |
542 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | 415 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); |
543 | + | 416 | + |
544 | + tdesc_microblaze64_with_stack_protect = result; | 417 | + tdesc_microblaze64_with_stack_protect = result; |
545 | +} | 418 | +} |
546 | diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml | 419 | diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml |
547 | new file mode 100644 | 420 | new file mode 100644 |
548 | index 0000000000..0e9f01611f | 421 | index 00000000000..0e9f01611f3 |
549 | --- /dev/null | 422 | --- /dev/null |
550 | +++ b/gdb/features/microblaze64-with-stack-protect.xml | 423 | +++ b/gdb/features/microblaze64-with-stack-protect.xml |
551 | @@ -0,0 +1,12 @@ | 424 | @@ -0,0 +1,12 @@ |
@@ -563,7 +436,7 @@ index 0000000000..0e9f01611f | |||
563 | +</target> | 436 | +</target> |
564 | diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c | 437 | diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c |
565 | new file mode 100644 | 438 | new file mode 100644 |
566 | index 0000000000..1aa37c4512 | 439 | index 00000000000..5d3e2c8cd91 |
567 | --- /dev/null | 440 | --- /dev/null |
568 | +++ b/gdb/features/microblaze64.c | 441 | +++ b/gdb/features/microblaze64.c |
569 | @@ -0,0 +1,77 @@ | 442 | @@ -0,0 +1,77 @@ |
@@ -639,14 +512,14 @@ index 0000000000..1aa37c4512 | |||
639 | + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | 512 | + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); |
640 | + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | 513 | + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); |
641 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | 514 | + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); |
642 | + tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | 515 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); |
643 | + tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | 516 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); |
644 | + | 517 | + |
645 | + tdesc_microblaze64 = result; | 518 | + tdesc_microblaze64 = result; |
646 | +} | 519 | +} |
647 | diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml | 520 | diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml |
648 | new file mode 100644 | 521 | new file mode 100644 |
649 | index 0000000000..515d18e65c | 522 | index 00000000000..515d18e65cf |
650 | --- /dev/null | 523 | --- /dev/null |
651 | +++ b/gdb/features/microblaze64.xml | 524 | +++ b/gdb/features/microblaze64.xml |
652 | @@ -0,0 +1,11 @@ | 525 | @@ -0,0 +1,11 @@ |
@@ -661,8 +534,55 @@ index 0000000000..515d18e65c | |||
661 | +<target> | 534 | +<target> |
662 | + <xi:include href="microblaze64-core.xml"/> | 535 | + <xi:include href="microblaze64-core.xml"/> |
663 | +</target> | 536 | +</target> |
537 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
538 | index 0afb6efeba3..48459a76991 100644 | ||
539 | --- a/gdb/microblaze-linux-tdep.c | ||
540 | +++ b/gdb/microblaze-linux-tdep.c | ||
541 | @@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
542 | |||
543 | /* BFD target for core files. */ | ||
544 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
545 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
546 | + { | ||
547 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
548 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); | ||
549 | + MICROBLAZE_REGISTER_SIZE=8; | ||
550 | + } | ||
551 | + else | ||
552 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
553 | + } | ||
554 | else | ||
555 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
556 | + { | ||
557 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
558 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); | ||
559 | + MICROBLAZE_REGISTER_SIZE=8; | ||
560 | + } | ||
561 | + else | ||
562 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
563 | + } | ||
564 | + | ||
565 | + switch (info.bfd_arch_info->mach) | ||
566 | + { | ||
567 | + case bfd_mach_microblaze64: | ||
568 | + set_gdbarch_ptr_bit (gdbarch, 64); | ||
569 | + break; | ||
570 | + } | ||
571 | |||
572 | |||
573 | /* Shared library handling. */ | ||
574 | @@ -176,6 +197,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
575 | void | ||
576 | _initialize_microblaze_linux_tdep (void) | ||
577 | { | ||
578 | - gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, | ||
579 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, | ||
580 | + microblaze_linux_init_abi); | ||
581 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, | ||
582 | microblaze_linux_init_abi); | ||
583 | } | ||
664 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | 584 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c |
665 | index 49713ea9b1..0605283c9e 100644 | 585 | index 98944f38d2a..5c0d6dd48ae 100644 |
666 | --- a/gdb/microblaze-tdep.c | 586 | --- a/gdb/microblaze-tdep.c |
667 | +++ b/gdb/microblaze-tdep.c | 587 | +++ b/gdb/microblaze-tdep.c |
668 | @@ -40,7 +40,9 @@ | 588 | @@ -40,7 +40,9 @@ |
@@ -675,57 +595,34 @@ index 49713ea9b1..0605283c9e 100644 | |||
675 | 595 | ||
676 | /* Instruction macros used for analyzing the prologue. */ | 596 | /* Instruction macros used for analyzing the prologue. */ |
677 | /* This set of instruction macros need to be changed whenever the | 597 | /* This set of instruction macros need to be changed whenever the |
678 | @@ -75,12 +77,13 @@ static const char *microblaze_register_names[] = | 598 | @@ -79,8 +81,9 @@ static const char *microblaze_register_names[] = |
679 | "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", | ||
680 | "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", | ||
681 | "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", | ||
682 | - "rslr", "rshr" | ||
683 | + "slr", "shr" | ||
684 | }; | 599 | }; |
685 | 600 | ||
686 | #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) | 601 | #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) |
687 | 602 | - | |
603 | + | ||
688 | static unsigned int microblaze_debug_flag = 0; | 604 | static unsigned int microblaze_debug_flag = 0; |
689 | +int reg_size = 4; | 605 | +int MICROBLAZE_REGISTER_SIZE = 4; |
690 | 606 | ||
691 | static void ATTRIBUTE_PRINTF (1, 2) | 607 | static void ATTRIBUTE_PRINTF (1, 2) |
692 | microblaze_debug (const char *fmt, ...) | 608 | microblaze_debug (const char *fmt, ...) |
693 | @@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs, | 609 | @@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc) |
694 | error (_("store_arguments not implemented")); | 610 | constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; |
695 | return sp; | 611 | |
696 | } | 612 | typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; |
697 | +#if 0 | 613 | +#if 0 |
698 | static int | 614 | static int |
699 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 615 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
700 | struct bp_target_info *bp_tgt) | 616 | struct bp_target_info *bp_tgt) |
701 | @@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | 617 | @@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
702 | int val; | ||
703 | int bplen; | ||
704 | gdb_byte old_contents[BREAKPOINT_MAX]; | ||
705 | - struct cleanup *cleanup; | ||
706 | + //struct cleanup *cleanup; | ||
707 | 618 | ||
708 | /* Determine appropriate breakpoint contents and size for this address. */ | ||
709 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | ||
710 | @@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
711 | error (_("Software breakpoints not implemented for this target.")); | ||
712 | |||
713 | /* Make sure we see the memory breakpoints. */ | ||
714 | - cleanup = make_show_memory_breakpoints_cleanup (1); | ||
715 | + scoped_restore | ||
716 | + cleanup = make_scoped_restore_show_memory_breakpoints (1); | ||
717 | val = target_read_memory (addr, old_contents, bplen); | ||
718 | |||
719 | /* If our breakpoint is no longer at the address, this means that the | ||
720 | @@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
721 | return val; | 619 | return val; |
722 | } | 620 | } |
723 | |||
724 | +#endif | 621 | +#endif |
622 | |||
725 | /* Allocate and initialize a frame cache. */ | 623 | /* Allocate and initialize a frame cache. */ |
726 | 624 | ||
727 | static struct microblaze_frame_cache * | 625 | @@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, |
728 | @@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, | ||
729 | gdb_byte *valbuf) | 626 | gdb_byte *valbuf) |
730 | { | 627 | { |
731 | gdb_byte buf[8]; | 628 | gdb_byte buf[8]; |
@@ -733,19 +630,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
733 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ | 630 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ |
734 | switch (TYPE_LENGTH (type)) | 631 | switch (TYPE_LENGTH (type)) |
735 | { | 632 | { |
736 | case 1: /* return last byte in the register. */ | 633 | @@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) |
737 | regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); | ||
738 | - memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1); | ||
739 | + memcpy(valbuf, buf + reg_size - 1, 1); | ||
740 | return; | ||
741 | case 2: /* return last 2 bytes in register. */ | ||
742 | regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); | ||
743 | - memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2); | ||
744 | + memcpy(valbuf, buf + reg_size - 2, 2); | ||
745 | return; | ||
746 | case 4: /* for sizes 4 or 8, copy the required length. */ | ||
747 | case 8: | ||
748 | @@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) | ||
749 | return (TYPE_LENGTH (type) == 16); | 634 | return (TYPE_LENGTH (type) == 16); |
750 | } | 635 | } |
751 | 636 | ||
@@ -857,16 +742,14 @@ index 49713ea9b1..0605283c9e 100644 | |||
857 | +} | 742 | +} |
858 | +#endif | 743 | +#endif |
859 | + | 744 | + |
860 | +static void | ||
861 | +microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) | ||
862 | +{ | ||
863 | + regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc); | ||
864 | +} | ||
865 | + | ||
866 | static int dwarf2_to_reg_map[78] = | 745 | static int dwarf2_to_reg_map[78] = |
867 | { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ | 746 | { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ |
868 | 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ | 747 | 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ |
869 | @@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) | 748 | @@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
749 | return -1; | ||
750 | } | ||
751 | |||
752 | +#if 0 | ||
870 | static void | 753 | static void |
871 | microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) | 754 | microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) |
872 | { | 755 | { |
@@ -882,46 +765,27 @@ index 49713ea9b1..0605283c9e 100644 | |||
882 | - tdesc_microblaze_with_stack_protect); | 765 | - tdesc_microblaze_with_stack_protect); |
883 | + tdesc_microblaze64_with_stack_protect); | 766 | + tdesc_microblaze64_with_stack_protect); |
884 | } | 767 | } |
768 | +#endif | ||
885 | 769 | ||
886 | void | 770 | void |
887 | @@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset, | 771 | microblaze_supply_gregset (const struct regset *regset, |
888 | struct regcache *regcache, | 772 | struct regcache *regcache, |
889 | int regnum, const void *gregs) | 773 | int regnum, const void *gregs) |
890 | { | 774 | { |
891 | - unsigned int *regs = gregs; | 775 | - const unsigned int *regs = (const unsigned int *)gregs; |
892 | + const gdb_byte *regs = (const gdb_byte *) gregs; | 776 | + const gdb_byte *regs = (const gdb_byte *) gregs; |
893 | if (regnum >= 0) | 777 | if (regnum >= 0) |
894 | - regcache_raw_supply (regcache, regnum, regs + regnum); | 778 | regcache->raw_supply (regnum, regs + regnum); |
895 | + regcache->raw_supply (regnum, regs + regnum); | ||
896 | |||
897 | if (regnum == -1) { | ||
898 | int i; | ||
899 | 779 | ||
900 | for (i = 0; i < 50; i++) { | 780 | @@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, |
901 | - regcache_raw_supply (regcache, i, regs + i); | ||
902 | + regcache->raw_supply (regnum, regs + i); | ||
903 | } | ||
904 | } | ||
905 | } | 781 | } |
906 | @@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch, | ||
907 | } | ||
908 | |||
909 | 782 | ||
910 | +static void | ||
911 | +make_regs (struct gdbarch *arch) | ||
912 | +{ | ||
913 | + struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
914 | + int mach = gdbarch_bfd_arch_info (arch)->mach; | ||
915 | + | ||
916 | + if (mach == bfd_mach_microblaze64) | ||
917 | + { | ||
918 | + set_gdbarch_ptr_bit (arch, 64); | ||
919 | + } | ||
920 | +} | ||
921 | 783 | ||
784 | - | ||
922 | static struct gdbarch * | 785 | static struct gdbarch * |
923 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 786 | microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
924 | @@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 787 | { |
788 | @@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | ||
925 | if (arches != NULL) | 789 | if (arches != NULL) |
926 | return arches->gdbarch; | 790 | return arches->gdbarch; |
927 | if (tdesc == NULL) | 791 | if (tdesc == NULL) |
@@ -931,7 +795,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
931 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) | 795 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) |
932 | + { | 796 | + { |
933 | + tdesc = tdesc_microblaze64; | 797 | + tdesc = tdesc_microblaze64; |
934 | + reg_size = 8; | 798 | + MICROBLAZE_REGISTER_SIZE = 8; |
935 | + } | 799 | + } |
936 | + else | 800 | + else |
937 | + tdesc = tdesc_microblaze; | 801 | + tdesc = tdesc_microblaze; |
@@ -939,7 +803,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
939 | /* Check any target description for validity. */ | 803 | /* Check any target description for validity. */ |
940 | if (tdesc_has_registers (tdesc)) | 804 | if (tdesc_has_registers (tdesc)) |
941 | { | 805 | { |
942 | @@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 806 | @@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
943 | int valid_p; | 807 | int valid_p; |
944 | int i; | 808 | int i; |
945 | 809 | ||
@@ -980,7 +844,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
980 | } | 844 | } |
981 | 845 | ||
982 | if (!valid_p) | 846 | if (!valid_p) |
983 | @@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 847 | @@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
984 | tdesc_data_cleanup (tdesc_data); | 848 | tdesc_data_cleanup (tdesc_data); |
985 | return NULL; | 849 | return NULL; |
986 | } | 850 | } |
@@ -988,7 +852,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
988 | } | 852 | } |
989 | 853 | ||
990 | /* Allocate space for the new architecture. */ | 854 | /* Allocate space for the new architecture. */ |
991 | @@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 855 | @@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
992 | /* Register numbers of various important registers. */ | 856 | /* Register numbers of various important registers. */ |
993 | set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); | 857 | set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); |
994 | set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); | 858 | set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); |
@@ -1006,7 +870,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1006 | /* Map Dwarf2 registers to GDB registers. */ | 870 | /* Map Dwarf2 registers to GDB registers. */ |
1007 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); | 871 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); |
1008 | 872 | ||
1009 | @@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 873 | @@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
1010 | microblaze_breakpoint::kind_from_pc); | 874 | microblaze_breakpoint::kind_from_pc); |
1011 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, | 875 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, |
1012 | microblaze_breakpoint::bp_from_kind); | 876 | microblaze_breakpoint::bp_from_kind); |
@@ -1024,21 +888,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1024 | 888 | ||
1025 | frame_base_set_default (gdbarch, µblaze_frame_base); | 889 | frame_base_set_default (gdbarch, µblaze_frame_base); |
1026 | 890 | ||
1027 | @@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | 891 | @@ -840,6 +980,8 @@ _initialize_microblaze_tdep (void) |
1028 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | ||
1029 | //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); | ||
1030 | |||
1031 | - /* If we have register sets, enable the generic core file support. */ | ||
1032 | + /* If we have register sets, enable the generic core file support. | ||
1033 | if (tdep->gregset) { | ||
1034 | set_gdbarch_regset_from_core_section (gdbarch, | ||
1035 | microblaze_regset_from_core_section); | ||
1036 | - } | ||
1037 | + }*/ | ||
1038 | |||
1039 | return gdbarch; | ||
1040 | } | ||
1041 | @@ -882,6 +1039,8 @@ _initialize_microblaze_tdep (void) | ||
1042 | 892 | ||
1043 | initialize_tdesc_microblaze_with_stack_protect (); | 893 | initialize_tdesc_microblaze_with_stack_protect (); |
1044 | initialize_tdesc_microblaze (); | 894 | initialize_tdesc_microblaze (); |
@@ -1048,7 +898,7 @@ index 49713ea9b1..0605283c9e 100644 | |||
1048 | add_setshow_zuinteger_cmd ("microblaze", class_maintenance, | 898 | add_setshow_zuinteger_cmd ("microblaze", class_maintenance, |
1049 | µblaze_debug_flag, _("\ | 899 | µblaze_debug_flag, _("\ |
1050 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h | 900 | diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h |
1051 | index 3777cbb6a8..55f5dd1962 100644 | 901 | index d2112dc07e1..bd03e969b9b 100644 |
1052 | --- a/gdb/microblaze-tdep.h | 902 | --- a/gdb/microblaze-tdep.h |
1053 | +++ b/gdb/microblaze-tdep.h | 903 | +++ b/gdb/microblaze-tdep.h |
1054 | @@ -27,7 +27,7 @@ struct microblaze_gregset | 904 | @@ -27,7 +27,7 @@ struct microblaze_gregset |
@@ -1072,17 +922,18 @@ index 3777cbb6a8..55f5dd1962 100644 | |||
1072 | }; | 922 | }; |
1073 | 923 | ||
1074 | struct microblaze_frame_cache | 924 | struct microblaze_frame_cache |
1075 | @@ -128,7 +128,7 @@ struct microblaze_frame_cache | 925 | @@ -128,7 +128,8 @@ struct microblaze_frame_cache |
1076 | struct trad_frame_saved_reg *saved_regs; | 926 | struct trad_frame_saved_reg *saved_regs; |
1077 | }; | 927 | }; |
1078 | /* All registers are 32 bits. */ | 928 | /* All registers are 32 bits. */ |
1079 | -#define MICROBLAZE_REGISTER_SIZE 4 | 929 | -#define MICROBLAZE_REGISTER_SIZE 4 |
1080 | +//#define MICROBLAZE_REGISTER_SIZE 8 | 930 | +extern int microblaze_reg_size; |
931 | +#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size | ||
1081 | 932 | ||
1082 | /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. | 933 | /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. |
1083 | Only used for native debugging. */ | 934 | Only used for native debugging. */ |
1084 | diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat | 935 | diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat |
1085 | index 8040a7b3fd..450e321d49 100644 | 936 | index 8040a7b3fd0..450e321d49e 100644 |
1086 | --- a/gdb/regformats/microblaze-with-stack-protect.dat | 937 | --- a/gdb/regformats/microblaze-with-stack-protect.dat |
1087 | +++ b/gdb/regformats/microblaze-with-stack-protect.dat | 938 | +++ b/gdb/regformats/microblaze-with-stack-protect.dat |
1088 | @@ -60,5 +60,5 @@ expedite:r1,rpc | 939 | @@ -60,5 +60,5 @@ expedite:r1,rpc |
@@ -1093,18 +944,6 @@ index 8040a7b3fd..450e321d49 100644 | |||
1093 | -32:rshr | 944 | -32:rshr |
1094 | +32:slr | 945 | +32:slr |
1095 | +32:shr | 946 | +32:shr |
1096 | diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h | ||
1097 | index bd9d91cd57..12d4456bc2 100644 | ||
1098 | --- a/opcodes/microblaze-opc.h | ||
1099 | +++ b/opcodes/microblaze-opc.h | ||
1100 | @@ -134,7 +134,6 @@ | ||
1101 | #define ORLI_MASK 0xA0000000 | ||
1102 | #define XORLI_MASK 0xA8000000 | ||
1103 | |||
1104 | - | ||
1105 | /* New Mask for msrset, msrclr insns. */ | ||
1106 | #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ | ||
1107 | /* Mask for mbar insn. */ | ||
1108 | -- | 947 | -- |
1109 | 2.17.1 | 948 | 2.17.1 |
1110 | 949 | ||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0041-patch-MicroBlaze-porting-GDB-for-linux.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0041-patch-MicroBlaze-porting-GDB-for-linux.patch deleted file mode 100644 index 7d63e63e..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0041-patch-MicroBlaze-porting-GDB-for-linux.patch +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | From 3f830717572e074a21840549b48265ec00d67bd1 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mahesh Bodapati <mbodapat@xilinx.com> | ||
3 | Date: Thu, 12 Dec 2019 14:56:17 +0530 | ||
4 | Subject: [PATCH 41/43] [patch,MicroBlaze] : porting GDB for linux | ||
5 | |||
6 | --- | ||
7 | gdb/features/microblaze-linux.xml | 12 ++++++++++ | ||
8 | gdb/gdbserver/Makefile.in | 2 ++ | ||
9 | gdb/gdbserver/configure.srv | 3 ++- | ||
10 | gdb/microblaze-linux-tdep.c | 39 ++++++++++++++++++++++++------- | ||
11 | 4 files changed, 47 insertions(+), 9 deletions(-) | ||
12 | create mode 100644 gdb/features/microblaze-linux.xml | ||
13 | |||
14 | diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml | ||
15 | new file mode 100644 | ||
16 | index 0000000000..8983e66eb3 | ||
17 | --- /dev/null | ||
18 | +++ b/gdb/features/microblaze-linux.xml | ||
19 | @@ -0,0 +1,12 @@ | ||
20 | +<?xml version="1.0"?> | ||
21 | +<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc. | ||
22 | + | ||
23 | + Copying and distribution of this file, with or without modification, | ||
24 | + are permitted in any medium without royalty provided the copyright | ||
25 | + notice and this notice are preserved. --> | ||
26 | + | ||
27 | +<!DOCTYPE target SYSTEM "gdb-target.dtd"> | ||
28 | +<target> | ||
29 | + <osabi>GNU/Linux</osabi> | ||
30 | + <xi:include href="microblaze-core.xml"/> | ||
31 | +</target> | ||
32 | diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in | ||
33 | index 73ca5fd7c5..f5d8663ec8 100644 | ||
34 | --- a/gdb/gdbserver/Makefile.in | ||
35 | +++ b/gdb/gdbserver/Makefile.in | ||
36 | @@ -639,6 +639,8 @@ common/%.o: ../common/%.c | ||
37 | |||
38 | %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh) | ||
39 | $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@ | ||
40 | +microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh) | ||
41 | + $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c | ||
42 | |||
43 | # | ||
44 | # Dependency tracking. | ||
45 | diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv | ||
46 | index 201b7ae190..e5ed6498a8 100644 | ||
47 | --- a/gdb/gdbserver/configure.srv | ||
48 | +++ b/gdb/gdbserver/configure.srv | ||
49 | @@ -210,8 +210,9 @@ case "${target}" in | ||
50 | srv_linux_usrregs=yes | ||
51 | srv_linux_thread_db=yes | ||
52 | ;; | ||
53 | - microblaze*-*-linux*) srv_regobj=microblaze-linux.o | ||
54 | + microblaze*-*-linux*) srv_regobj="microblaze-linux.o" | ||
55 | srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " | ||
56 | + srv_xmlfiles="microblaze-linux.xml" | ||
57 | srv_linux_regsets=yes | ||
58 | srv_linux_usrregs=yes | ||
59 | srv_linux_thread_db=yes | ||
60 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
61 | index 011e513941..e3d2a7508d 100644 | ||
62 | --- a/gdb/microblaze-linux-tdep.c | ||
63 | +++ b/gdb/microblaze-linux-tdep.c | ||
64 | @@ -41,7 +41,7 @@ | ||
65 | |||
66 | #ifndef REGSET_H | ||
67 | #define REGSET_H 1 | ||
68 | - | ||
69 | +int MICROBLAZE_REGISTER_SIZE=4; | ||
70 | struct gdbarch; | ||
71 | struct regcache; | ||
72 | |||
73 | @@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...) | ||
74 | va_end (args); | ||
75 | } | ||
76 | } | ||
77 | - | ||
78 | +#if 0 | ||
79 | static int | ||
80 | microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
81 | struct bp_target_info *bp_tgt) | ||
82 | @@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
83 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); | ||
84 | |||
85 | /* Make sure we see the memory breakpoints. */ | ||
86 | - cleanup = make_show_memory_breakpoints_cleanup (1); | ||
87 | + cleanup = make_scoped_restore_show_memory_breakpoints (1); | ||
88 | val = target_read_memory (addr, old_contents, bplen); | ||
89 | |||
90 | /* If our breakpoint is no longer at the address, this means that the | ||
91 | @@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, | ||
92 | do_cleanups (cleanup); | ||
93 | return val; | ||
94 | } | ||
95 | +#endif | ||
96 | |||
97 | static void | ||
98 | microblaze_linux_sigtramp_cache (struct frame_info *next_frame, | ||
99 | @@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
100 | |||
101 | linux_init_abi (info, gdbarch); | ||
102 | |||
103 | - set_gdbarch_memory_remove_breakpoint (gdbarch, | ||
104 | - microblaze_linux_memory_remove_breakpoint); | ||
105 | +// set_gdbarch_memory_remove_breakpoint (gdbarch, | ||
106 | +// microblaze_linux_memory_remove_breakpoint); | ||
107 | |||
108 | /* Shared library handling. */ | ||
109 | set_solib_svr4_fetch_link_map_offsets (gdbarch, | ||
110 | @@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
111 | |||
112 | /* BFD target for core files. */ | ||
113 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
114 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
115 | + { | ||
116 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
117 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); | ||
118 | + MICROBLAZE_REGISTER_SIZE=8; | ||
119 | + } | ||
120 | + else | ||
121 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); | ||
122 | + } | ||
123 | else | ||
124 | - set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
125 | + { | ||
126 | + if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { | ||
127 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); | ||
128 | + MICROBLAZE_REGISTER_SIZE=8; | ||
129 | + } | ||
130 | + else | ||
131 | + set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); | ||
132 | + } | ||
133 | |||
134 | + switch (info.bfd_arch_info->mach) | ||
135 | + { | ||
136 | + case bfd_mach_microblaze64: | ||
137 | + set_gdbarch_ptr_bit (gdbarch, 64); | ||
138 | + break; | ||
139 | + } | ||
140 | |||
141 | /* Shared library handling. */ | ||
142 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); | ||
143 | @@ -278,6 +299,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, | ||
144 | void | ||
145 | _initialize_microblaze_linux_tdep (void) | ||
146 | { | ||
147 | - gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, | ||
148 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, | ||
149 | + microblaze_linux_init_abi); | ||
150 | + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, | ||
151 | microblaze_linux_init_abi); | ||
152 | } | ||
153 | -- | ||
154 | 2.17.1 | ||
155 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch deleted file mode 100644 index 06e63f3c..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0042-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | From 746453e0f35fd669cfacabfe223b8e7007a99797 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Thu, 19 Dec 2019 12:22:04 +0530 | ||
4 | Subject: [PATCH 42/43] Correcting the register names from slr & shr to rslr & | ||
5 | rshr | ||
6 | |||
7 | --- | ||
8 | gdb/features/microblaze-core.xml | 4 ++-- | ||
9 | gdb/features/microblaze-stack-protect.xml | 4 ++-- | ||
10 | gdb/features/microblaze-with-stack-protect.c | 4 ++-- | ||
11 | gdb/features/microblaze.c | 4 ++-- | ||
12 | gdb/features/microblaze64-core.xml | 4 ++-- | ||
13 | gdb/features/microblaze64-stack-protect.xml | 4 ++-- | ||
14 | gdb/features/microblaze64-with-stack-protect.c | 4 ++-- | ||
15 | gdb/features/microblaze64.c | 4 ++-- | ||
16 | gdb/microblaze-tdep.c | 2 +- | ||
17 | 9 files changed, 17 insertions(+), 17 deletions(-) | ||
18 | |||
19 | diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml | ||
20 | index 5bc3e49f84..6f73f4eb84 100644 | ||
21 | --- a/gdb/features/microblaze-core.xml | ||
22 | +++ b/gdb/features/microblaze-core.xml | ||
23 | @@ -64,6 +64,6 @@ | ||
24 | <reg name="rtlbsx" bitsize="32"/> | ||
25 | <reg name="rtlblo" bitsize="32"/> | ||
26 | <reg name="rtlbhi" bitsize="32"/> | ||
27 | - <reg name="slr" bitsize="32"/> | ||
28 | - <reg name="shr" bitsize="32"/> | ||
29 | + <reg name="rslr" bitsize="32"/> | ||
30 | + <reg name="rshr" bitsize="32"/> | ||
31 | </feature> | ||
32 | diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml | ||
33 | index a7f27b903c..870c148bb0 100644 | ||
34 | --- a/gdb/features/microblaze-stack-protect.xml | ||
35 | +++ b/gdb/features/microblaze-stack-protect.xml | ||
36 | @@ -7,6 +7,6 @@ | ||
37 | |||
38 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
39 | <feature name="org.gnu.gdb.microblaze.stack-protect"> | ||
40 | - <reg name="slr" bitsize="32"/> | ||
41 | - <reg name="shr" bitsize="32"/> | ||
42 | + <reg name="rslr" bitsize="32"/> | ||
43 | + <reg name="rshr" bitsize="32"/> | ||
44 | </feature> | ||
45 | diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c | ||
46 | index 609934e2b4..ab162fd258 100644 | ||
47 | --- a/gdb/features/microblaze-with-stack-protect.c | ||
48 | +++ b/gdb/features/microblaze-with-stack-protect.c | ||
49 | @@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) | ||
50 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
51 | |||
52 | feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect"); | ||
53 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); | ||
54 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); | ||
55 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); | ||
56 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); | ||
57 | |||
58 | tdesc_microblaze_with_stack_protect = result; | ||
59 | } | ||
60 | diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c | ||
61 | index ceb98ca8b8..7919ac96e6 100644 | ||
62 | --- a/gdb/features/microblaze.c | ||
63 | +++ b/gdb/features/microblaze.c | ||
64 | @@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void) | ||
65 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | ||
66 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | ||
67 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
68 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | ||
69 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | ||
70 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); | ||
71 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); | ||
72 | |||
73 | tdesc_microblaze = result; | ||
74 | } | ||
75 | diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml | ||
76 | index 96e99e2fb2..b9adadfade 100644 | ||
77 | --- a/gdb/features/microblaze64-core.xml | ||
78 | +++ b/gdb/features/microblaze64-core.xml | ||
79 | @@ -64,6 +64,6 @@ | ||
80 | <reg name="rtlbsx" bitsize="32"/> | ||
81 | <reg name="rtlblo" bitsize="32"/> | ||
82 | <reg name="rtlbhi" bitsize="32"/> | ||
83 | - <reg name="slr" bitsize="64"/> | ||
84 | - <reg name="shr" bitsize="64"/> | ||
85 | + <reg name="rslr" bitsize="64"/> | ||
86 | + <reg name="rshr" bitsize="64"/> | ||
87 | </feature> | ||
88 | diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml | ||
89 | index 1bbf5fc3ce..9d7ea8b9fd 100644 | ||
90 | --- a/gdb/features/microblaze64-stack-protect.xml | ||
91 | +++ b/gdb/features/microblaze64-stack-protect.xml | ||
92 | @@ -7,6 +7,6 @@ | ||
93 | |||
94 | <!DOCTYPE feature SYSTEM "gdb-target.dtd"> | ||
95 | <feature name="org.gnu.gdb.microblaze64.stack-protect"> | ||
96 | - <reg name="slr" bitsize="64"/> | ||
97 | - <reg name="shr" bitsize="64"/> | ||
98 | + <reg name="rslr" bitsize="64"/> | ||
99 | + <reg name="rshr" bitsize="64"/> | ||
100 | </feature> | ||
101 | diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c | ||
102 | index f448c9a749..249cb534da 100644 | ||
103 | --- a/gdb/features/microblaze64-with-stack-protect.c | ||
104 | +++ b/gdb/features/microblaze64-with-stack-protect.c | ||
105 | @@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void) | ||
106 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
107 | |||
108 | feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect"); | ||
109 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | ||
110 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | ||
111 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); | ||
112 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); | ||
113 | |||
114 | tdesc_microblaze64_with_stack_protect = result; | ||
115 | } | ||
116 | diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c | ||
117 | index 1aa37c4512..5d3e2c8cd9 100644 | ||
118 | --- a/gdb/features/microblaze64.c | ||
119 | +++ b/gdb/features/microblaze64.c | ||
120 | @@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void) | ||
121 | tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); | ||
122 | tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); | ||
123 | tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); | ||
124 | - tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); | ||
125 | - tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); | ||
126 | + tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64"); | ||
127 | + tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64"); | ||
128 | |||
129 | tdesc_microblaze64 = result; | ||
130 | } | ||
131 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | ||
132 | index 0605283c9e..7a0c2527f4 100644 | ||
133 | --- a/gdb/microblaze-tdep.c | ||
134 | +++ b/gdb/microblaze-tdep.c | ||
135 | @@ -77,7 +77,7 @@ static const char *microblaze_register_names[] = | ||
136 | "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", | ||
137 | "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", | ||
138 | "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", | ||
139 | - "slr", "shr" | ||
140 | + "rslr", "rshr" | ||
141 | }; | ||
142 | |||
143 | #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) | ||
144 | -- | ||
145 | 2.17.1 | ||
146 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch deleted file mode 100644 index 0b6cae62..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0043-Removing-the-header-gdb_assert.h-from-MB-target-file.patch +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | From 8cb6a265c2108ff7117c07e106604b46238c6ae7 Mon Sep 17 00:00:00 2001 | ||
2 | From: Nagaraju <nmekala@xilinx.com> | ||
3 | Date: Fri, 17 Jan 2020 15:45:48 +0530 | ||
4 | Subject: [PATCH 43/43] Removing the header "gdb_assert.h" from MB target file | ||
5 | |||
6 | --- | ||
7 | gdb/microblaze-linux-tdep.c | 1 - | ||
8 | 1 file changed, 1 deletion(-) | ||
9 | |||
10 | diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c | ||
11 | index e3d2a7508d..5ef937219c 100644 | ||
12 | --- a/gdb/microblaze-linux-tdep.c | ||
13 | +++ b/gdb/microblaze-linux-tdep.c | ||
14 | @@ -37,7 +37,6 @@ | ||
15 | #include "linux-tdep.h" | ||
16 | #include "glibc-tdep.h" | ||
17 | |||
18 | -#include "gdb_assert.h" | ||
19 | |||
20 | #ifndef REGSET_H | ||
21 | #define REGSET_H 1 | ||
22 | -- | ||
23 | 2.17.1 | ||
24 | |||
diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch deleted file mode 100644 index ace6aabd..00000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0044-gdb-microblaze-linux-nat.c-Fix-target-compilation-of.patch +++ /dev/null | |||
@@ -1,363 +0,0 @@ | |||
1 | From 8d75e232d3513a184180d797ef20bf53d3543fa7 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mark Hatle <mark.hatle@xilinx.com> | ||
3 | Date: Mon, 20 Jan 2020 12:48:13 -0800 | ||
4 | Subject: [PATCH] gdb/microblaze-linux-nat.c: Fix target compilation of gdb | ||
5 | |||
6 | Add the nat to the configure file | ||
7 | |||
8 | Remove gdb_assert.h and gdb_string.h. | ||
9 | |||
10 | Adjust include for opcodes as well. | ||
11 | |||
12 | Update to match latest style of components, similar to ppc-linux-nat.c | ||
13 | |||
14 | Update: | ||
15 | get_regcache_arch(regcache) to regcache->arch() | ||
16 | regcache_raw_supply(regcache, ...) to regcache->raw_supply(...) | ||
17 | regcache_raw_collect(regcache, ...) to regcache->raw_collect(...) | ||
18 | |||
19 | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> | ||
20 | --- | ||
21 | gdb/configure.nat | 4 + | ||
22 | gdb/microblaze-linux-nat.c | 149 +++++++++++++------------------------ | ||
23 | gdb/microblaze-tdep.c | 3 +- | ||
24 | 3 files changed, 57 insertions(+), 99 deletions(-) | ||
25 | |||
26 | diff --git a/gdb/configure.nat b/gdb/configure.nat | ||
27 | index 64ee101d83..f0f6c2f5bc 100644 | ||
28 | --- a/gdb/configure.nat | ||
29 | +++ b/gdb/configure.nat | ||
30 | @@ -261,6 +261,10 @@ case ${gdb_host} in | ||
31 | # Host: Motorola m68k running GNU/Linux. | ||
32 | NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o" | ||
33 | ;; | ||
34 | + microblaze*) | ||
35 | + # Host: Microblaze, running Linux | ||
36 | + NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o" | ||
37 | + ;; | ||
38 | mips) | ||
39 | # Host: Linux/MIPS | ||
40 | NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \ | ||
41 | diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c | ||
42 | index e9b8c9c522..e09a86bb3f 100644 | ||
43 | --- a/gdb/microblaze-linux-nat.c | ||
44 | +++ b/gdb/microblaze-linux-nat.c | ||
45 | @@ -36,11 +36,9 @@ | ||
46 | #include "dwarf2-frame.h" | ||
47 | #include "osabi.h" | ||
48 | |||
49 | -#include "gdb_assert.h" | ||
50 | -#include "gdb_string.h" | ||
51 | #include "target-descriptions.h" | ||
52 | -#include "opcodes/microblaze-opcm.h" | ||
53 | -#include "opcodes/microblaze-dis.h" | ||
54 | +#include "../opcodes/microblaze-opcm.h" | ||
55 | +#include "../opcodes/microblaze-dis.h" | ||
56 | |||
57 | #include "linux-nat.h" | ||
58 | #include "target-descriptions.h" | ||
59 | @@ -61,34 +59,27 @@ | ||
60 | /* Defines ps_err_e, struct ps_prochandle. */ | ||
61 | #include "gdb_proc_service.h" | ||
62 | |||
63 | -/* On GNU/Linux, threads are implemented as pseudo-processes, in which | ||
64 | - case we may be tracing more than one process at a time. In that | ||
65 | - case, inferior_ptid will contain the main process ID and the | ||
66 | - individual thread (process) ID. get_thread_id () is used to get | ||
67 | - the thread id if it's available, and the process id otherwise. */ | ||
68 | - | ||
69 | -int | ||
70 | -get_thread_id (ptid_t ptid) | ||
71 | -{ | ||
72 | - int tid = TIDGET (ptid); | ||
73 | - if (0 == tid) | ||
74 | - tid = PIDGET (ptid); | ||
75 | - return tid; | ||
76 | -} | ||
77 | - | ||
78 | -#define GET_THREAD_ID(PTID) get_thread_id (PTID) | ||
79 | - | ||
80 | /* Non-zero if our kernel may support the PTRACE_GETREGS and | ||
81 | PTRACE_SETREGS requests, for reading and writing the | ||
82 | general-purpose registers. Zero if we've tried one of | ||
83 | them and gotten an error. */ | ||
84 | int have_ptrace_getsetregs = 1; | ||
85 | |||
86 | +struct microblaze_linux_nat_target final : public linux_nat_target | ||
87 | +{ | ||
88 | + /* Add our register access methods. */ | ||
89 | + void fetch_registers (struct regcache *, int) override; | ||
90 | + void store_registers (struct regcache *, int) override; | ||
91 | + | ||
92 | + const struct target_desc *read_description () override; | ||
93 | +}; | ||
94 | + | ||
95 | +static microblaze_linux_nat_target the_microblaze_linux_nat_target; | ||
96 | + | ||
97 | static int | ||
98 | microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) | ||
99 | { | ||
100 | int u_addr = -1; | ||
101 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
102 | /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace | ||
103 | interface, and not the wordsize of the program's ABI. */ | ||
104 | int wordsize = sizeof (long); | ||
105 | @@ -105,18 +96,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) | ||
106 | static void | ||
107 | fetch_register (struct regcache *regcache, int tid, int regno) | ||
108 | { | ||
109 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
110 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
111 | + struct gdbarch *gdbarch = regcache->arch(); | ||
112 | /* This isn't really an address. But ptrace thinks of it as one. */ | ||
113 | CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); | ||
114 | int bytes_transferred; | ||
115 | - unsigned int offset; /* Offset of registers within the u area. */ | ||
116 | - char buf[MAX_REGISTER_SIZE]; | ||
117 | + char buf[sizeof(long)]; | ||
118 | |||
119 | if (regaddr == -1) | ||
120 | { | ||
121 | memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ | ||
122 | - regcache_raw_supply (regcache, regno, buf); | ||
123 | + regcache->raw_supply (regno, buf); | ||
124 | return; | ||
125 | } | ||
126 | |||
127 | @@ -149,14 +138,14 @@ fetch_register (struct regcache *regcache, int tid, int regno) | ||
128 | { | ||
129 | /* Little-endian values are always found at the left end of the | ||
130 | bytes transferred. */ | ||
131 | - regcache_raw_supply (regcache, regno, buf); | ||
132 | + regcache->raw_supply (regno, buf); | ||
133 | } | ||
134 | else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
135 | { | ||
136 | /* Big-endian values are found at the right end of the bytes | ||
137 | transferred. */ | ||
138 | size_t padding = (bytes_transferred - register_size (gdbarch, regno)); | ||
139 | - regcache_raw_supply (regcache, regno, buf + padding); | ||
140 | + regcache->raw_supply (regno, buf + padding); | ||
141 | } | ||
142 | else | ||
143 | internal_error (__FILE__, __LINE__, | ||
144 | @@ -175,8 +164,6 @@ fetch_register (struct regcache *regcache, int tid, int regno) | ||
145 | static int | ||
146 | fetch_all_gp_regs (struct regcache *regcache, int tid) | ||
147 | { | ||
148 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
149 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
150 | gdb_gregset_t gregset; | ||
151 | |||
152 | if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) | ||
153 | @@ -204,8 +191,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid) | ||
154 | static void | ||
155 | fetch_gp_regs (struct regcache *regcache, int tid) | ||
156 | { | ||
157 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
158 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
159 | int i; | ||
160 | |||
161 | if (have_ptrace_getsetregs) | ||
162 | @@ -219,17 +204,29 @@ fetch_gp_regs (struct regcache *regcache, int tid) | ||
163 | fetch_register (regcache, tid, i); | ||
164 | } | ||
165 | |||
166 | +/* Fetch registers from the child process. Fetch all registers if | ||
167 | + regno == -1, otherwise fetch all general registers or all floating | ||
168 | + point registers depending upon the value of regno. */ | ||
169 | +void | ||
170 | +microblaze_linux_nat_target::fetch_registers (struct regcache *regcache, int regno) | ||
171 | +{ | ||
172 | + pid_t tid = get_ptrace_pid (regcache->ptid ()); | ||
173 | + | ||
174 | + if (regno == -1) | ||
175 | + fetch_gp_regs (regcache, tid); | ||
176 | + else | ||
177 | + fetch_register (regcache, tid, regno); | ||
178 | +} | ||
179 | |||
180 | static void | ||
181 | store_register (const struct regcache *regcache, int tid, int regno) | ||
182 | { | ||
183 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
184 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
185 | + struct gdbarch *gdbarch = regcache->arch(); | ||
186 | /* This isn't really an address. But ptrace thinks of it as one. */ | ||
187 | CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); | ||
188 | int i; | ||
189 | size_t bytes_to_transfer; | ||
190 | - char buf[MAX_REGISTER_SIZE]; | ||
191 | + char buf[sizeof(long)]; | ||
192 | |||
193 | if (regaddr == -1) | ||
194 | return; | ||
195 | @@ -242,13 +239,13 @@ store_register (const struct regcache *regcache, int tid, int regno) | ||
196 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) | ||
197 | { | ||
198 | /* Little-endian values always sit at the left end of the buffer. */ | ||
199 | - regcache_raw_collect (regcache, regno, buf); | ||
200 | + regcache->raw_collect (regno, buf); | ||
201 | } | ||
202 | else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | ||
203 | { | ||
204 | /* Big-endian values sit at the right end of the buffer. */ | ||
205 | size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); | ||
206 | - regcache_raw_collect (regcache, regno, buf + padding); | ||
207 | + regcache->raw_collect (regno, buf + padding); | ||
208 | } | ||
209 | |||
210 | for (i = 0; i < bytes_to_transfer; i += sizeof (long)) | ||
211 | @@ -281,8 +278,6 @@ store_register (const struct regcache *regcache, int tid, int regno) | ||
212 | static int | ||
213 | store_all_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
214 | { | ||
215 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
216 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
217 | gdb_gregset_t gregset; | ||
218 | |||
219 | if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) | ||
220 | @@ -319,8 +314,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
221 | static void | ||
222 | store_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
223 | { | ||
224 | - struct gdbarch *gdbarch = get_regcache_arch (regcache); | ||
225 | - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | ||
226 | int i; | ||
227 | |||
228 | if (have_ptrace_getsetregs) | ||
229 | @@ -335,33 +328,10 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno) | ||
230 | } | ||
231 | |||
232 | |||
233 | -/* Fetch registers from the child process. Fetch all registers if | ||
234 | - regno == -1, otherwise fetch all general registers or all floating | ||
235 | - point registers depending upon the value of regno. */ | ||
236 | - | ||
237 | -static void | ||
238 | -microblaze_linux_fetch_inferior_registers (struct target_ops *ops, | ||
239 | - struct regcache *regcache, int regno) | ||
240 | -{ | ||
241 | - /* Get the thread id for the ptrace call. */ | ||
242 | - int tid = GET_THREAD_ID (inferior_ptid); | ||
243 | - | ||
244 | - if (regno == -1) | ||
245 | - fetch_gp_regs (regcache, tid); | ||
246 | - else | ||
247 | - fetch_register (regcache, tid, regno); | ||
248 | -} | ||
249 | - | ||
250 | -/* Store registers back into the inferior. Store all registers if | ||
251 | - regno == -1, otherwise store all general registers or all floating | ||
252 | - point registers depending upon the value of regno. */ | ||
253 | - | ||
254 | -static void | ||
255 | -microblaze_linux_store_inferior_registers (struct target_ops *ops, | ||
256 | - struct regcache *regcache, int regno) | ||
257 | +void | ||
258 | +microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno) | ||
259 | { | ||
260 | - /* Get the thread id for the ptrace call. */ | ||
261 | - int tid = GET_THREAD_ID (inferior_ptid); | ||
262 | + pid_t tid = get_ptrace_pid (regcache->ptid ()); | ||
263 | |||
264 | if (regno >= 0) | ||
265 | store_register (regcache, tid, regno); | ||
266 | @@ -373,59 +343,44 @@ microblaze_linux_store_inferior_registers (struct target_ops *ops, | ||
267 | thread debugging. */ | ||
268 | |||
269 | void | ||
270 | -fill_gregset (const struct regcache *regcache, | ||
271 | - gdb_gregset_t *gregsetp, int regno) | ||
272 | +supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | ||
273 | { | ||
274 | - microblaze_collect_gregset (NULL, regcache, regno, gregsetp); | ||
275 | + microblaze_supply_gregset (NULL, regcache, -1, gregsetp); | ||
276 | } | ||
277 | |||
278 | void | ||
279 | -supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | ||
280 | +fill_gregset (const struct regcache *regcache, | ||
281 | + gdb_gregset_t *gregsetp, int regno) | ||
282 | { | ||
283 | - microblaze_supply_gregset (NULL, regcache, -1, gregsetp); | ||
284 | + microblaze_collect_gregset (NULL, regcache, regno, gregsetp); | ||
285 | } | ||
286 | |||
287 | void | ||
288 | -fill_fpregset (const struct regcache *regcache, | ||
289 | - gdb_fpregset_t *fpregsetp, int regno) | ||
290 | +supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | ||
291 | { | ||
292 | /* FIXME. */ | ||
293 | + return; | ||
294 | } | ||
295 | |||
296 | void | ||
297 | -supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | ||
298 | +fill_fpregset (const struct regcache *regcache, | ||
299 | + gdb_fpregset_t *fpregsetp, int regno) | ||
300 | { | ||
301 | /* FIXME. */ | ||
302 | + return; | ||
303 | } | ||
304 | |||
305 | -static const struct target_desc * | ||
306 | -microblaze_linux_read_description (struct target_ops *ops) | ||
307 | +const struct target_desc * | ||
308 | +microblaze_linux_nat_target::read_description () | ||
309 | { | ||
310 | - CORE_ADDR microblaze_hwcap = 0; | ||
311 | - | ||
312 | - if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1) | ||
313 | - return NULL; | ||
314 | - | ||
315 | return NULL; | ||
316 | } | ||
317 | |||
318 | - | ||
319 | -void _initialize_microblaze_linux_nat (void); | ||
320 | - | ||
321 | void | ||
322 | _initialize_microblaze_linux_nat (void) | ||
323 | { | ||
324 | - struct target_ops *t; | ||
325 | - | ||
326 | - /* Fill in the generic GNU/Linux methods. */ | ||
327 | - t = linux_target (); | ||
328 | - | ||
329 | - /* Add our register access methods. */ | ||
330 | - t->to_fetch_registers = microblaze_linux_fetch_inferior_registers; | ||
331 | - t->to_store_registers = microblaze_linux_store_inferior_registers; | ||
332 | - | ||
333 | - t->to_read_description = microblaze_linux_read_description; | ||
334 | + linux_target = &the_microblaze_linux_nat_target; | ||
335 | |||
336 | /* Register the target. */ | ||
337 | - linux_nat_add_target (t); | ||
338 | + add_inf_child_target (linux_target); | ||
339 | } | ||
340 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | ||
341 | index 7a0c2527f4..23deb24d26 100644 | ||
342 | --- a/gdb/microblaze-tdep.c | ||
343 | +++ b/gdb/microblaze-tdep.c | ||
344 | @@ -657,7 +657,7 @@ static std::vector<CORE_ADDR> | ||
345 | microblaze_software_single_step (struct regcache *regcache) | ||
346 | { | ||
347 | // struct gdbarch *arch = get_frame_arch(frame); | ||
348 | - struct gdbarch *arch = get_regcache_arch (regcache); | ||
349 | + struct gdbarch *arch = regcache->arch(); | ||
350 | struct address_space *aspace = get_regcache_aspace (regcache); | ||
351 | // struct address_space *aspace = get_frame_address_space (frame); | ||
352 | struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
353 | @@ -876,7 +876,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch, | ||
354 | static void | ||
355 | make_regs (struct gdbarch *arch) | ||
356 | { | ||
357 | - struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
358 | int mach = gdbarch_bfd_arch_info (arch)->mach; | ||
359 | |||
360 | if (mach == bfd_mach_microblaze64) | ||
361 | -- | ||
362 | 2.17.1 | ||
363 | |||