73 files changed, 1629 insertions, 663 deletions

diff --git a/MAINTAINERS.md b/MAINTAINERS.md
index d14b73e5..6a61ba3b 100644
--- a/MAINTAINERS.md
+++ b/MAINTAINERS.md
@@ -17,9 +17,9 @@ https://www.openembedded.org/wiki/How_to_submit_a_patch_to_OpenEmbedded
 
 **Maintainers:**
 
-        Mark Hatle <mark.hatle@xilinx.com>
-        Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com>
-        John Toomey <john.toomey@xilinx.com>
+        Mark Hatle <mark.hatle@amd.com>
+        Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
+        John Toomey <john.toomey@amd.com>
 
 > **Note:**
 
diff --git a/meta-xilinx-bsp/conf/layer.conf b/meta-xilinx-bsp/conf/layer.conf
index a46909bf..38d13529 100644
--- a/meta-xilinx-bsp/conf/layer.conf
+++ b/meta-xilinx-bsp/conf/layer.conf
@@ -17,3 +17,5 @@ BBFILE_PRIORITY_xilinx-bsp = "5"
 LAYERDEPENDS_xilinx-bsp = "xilinx"
 
 LAYERSERIES_COMPAT_xilinx-bsp = "kirkstone"
+
+PREFERRED_VERSION_kc705-bitstream ?= "${XILINX_RELEASE_VERSION}"
diff --git a/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend
index 2640c2c2..0b41fb1f 100644
--- a/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend
+++ b/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend
@@ -32,4 +32,6 @@ YAML_DT_BOARD_FLAGS:k26 ?= "{BOARD zynqmp-sm-k26-reva}"
 YAML_DT_BOARD_FLAGS:zcu670 ?= "{BOARD zcu670-revb}"
 YAML_DT_BOARD_FLAGS:vpk120 ?= "{BOARD versal-vpk120-reva}"
 YAML_DT_BOARD_FLAGS:vpk-sc ?= "{BOARD zynqmp-vpk120-reva}"
-
+YAML_DT_BOARD_FLAGS:vpk180 ?= "{BOARD versal-vpk180-reva}"
+YAML_DT_BOARD_FLAGS:vhk158 ?= "{BOARD versal-vhk158-reva}"
+YAML_DT_BOARD_FLAGS:vek280 ?= "{BOARD versal-vek280-reva}"
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
index 83f8c57b..9ab3f24e 100644
--- a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
@@ -4,12 +4,6 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
 COMPATIBLE_MACHINE:qemu-zynq7 = ".*"
 SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts"
 
-COMPATIBLE_MACHINE:kc705-microblazeel = ".*"
-SRC_URI:append:kc705-microblazeel = " \
-                file://kc705-microblazeel.dts \
-                file://pl.dtsi \
-                file://system-conf.dtsi \
-                "
 SRC_URI:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' file://pnc.dtsi', '', d)}"
 
 do_configure:append() {
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
deleted file mode 100644
index 45e488c1..00000000
--- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
+++ /dev/null
@@ -1,56 +0,0 @@
-/dts-v1/;
-/include/ "pl.dtsi"
-/include/ "system-conf.dtsi"
-/ {
-        hard-reset-gpios = <&reset_gpio 0 1>;
-        aliases {
-                ethernet0 = &axi_ethernet;
-                i2c0 = &iic_main;
-                serial0 = &rs232_uart;
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x80000000 0x40000000>;
-        };
-};
-
-&iic_main {
-        i2cswitch@74 {
-                compatible = "nxp,pca9548";
-                #address-cells = <1>;
-                #size-cells = <0>;
-                reg = <0x74>;
-                i2c@0 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        reg = <0>;
-                        si570: clock-generator@5d {
-                                #clock-cells = <0>;
-                                compatible = "silabs,si570";
-                                temperature-stability = <50>;
-                                reg = <0x5d>;
-                                factory-fout = <156250000>;
-                                clock-frequency = <148500000>;
-                        };
-                };
-                i2c@3 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        reg = <3>;
-                        eeprom@54 {
-                                compatible = "at,24c08";
-                                reg = <0x54>;
-                        };
-                };
-        };
-};
-
-&axi_ethernet {
-        phy-handle = <&phy0>;
-        axi_ethernet_mdio: mdio {
-                phy0: phy@7 {
-                        device_type = "ethernet-phy";
-                        reg = <7>;
-                };
-        };
-};
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
deleted file mode 100644
index 43bc2ab7..00000000
--- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
+++ /dev/null
@@ -1,445 +0,0 @@
-/ {
-        #address-cells = <1>;
-        #size-cells = <1>;
-        compatible = "xlnx,microblaze";
-        model = "Xilinx MicroBlaze";
-        cpus {
-                #address-cells = <1>;
-                #cpus = <1>;
-                #size-cells = <0>;
-                microblaze_0: cpu@0 {
-                        bus-handle = <&amba_pl>;
-                        clock-frequency = <200000000>;
-                        clocks = <&clk_cpu>;
-                        compatible = "xlnx,microblaze-10.0";
-                        d-cache-baseaddr = <0x0000000080000000>;
-                        d-cache-highaddr = <0x00000000bfffffff>;
-                        d-cache-line-size = <0x20>;
-                        d-cache-size = <0x4000>;
-                        device_type = "cpu";
-                        i-cache-baseaddr = <0x0000000080000000>;
-                        i-cache-highaddr = <0x00000000bfffffff>;
-                        i-cache-line-size = <0x10>;
-                        i-cache-size = <0x4000>;
-                        interrupt-handle = <&microblaze_0_axi_intc>;
-                        model = "microblaze,10.0";
-                        timebase-frequency = <200000000>;
-                        xlnx,addr-size = <0x20>;
-                        xlnx,addr-tag-bits = <0x10>;
-                        xlnx,allow-dcache-wr = <0x1>;
-                        xlnx,allow-icache-wr = <0x1>;
-                        xlnx,area-optimized = <0x0>;
-                        xlnx,async-interrupt = <0x1>;
-                        xlnx,async-wakeup = <0x3>;
-                        xlnx,avoid-primitives = <0x0>;
-                        xlnx,base-vectors = <0x0000000000000000>;
-                        xlnx,branch-target-cache-size = <0x0>;
-                        xlnx,cache-byte-size = <0x4000>;
-                        xlnx,d-axi = <0x1>;
-                        xlnx,d-lmb = <0x1>;
-                        xlnx,d-lmb-mon = <0x0>;
-                        xlnx,daddr-size = <0x20>;
-                        xlnx,data-size = <0x20>;
-                        xlnx,dc-axi-mon = <0x0>;
-                        xlnx,dcache-addr-tag = <0x10>;
-                        xlnx,dcache-always-used = <0x1>;
-                        xlnx,dcache-byte-size = <0x4000>;
-                        xlnx,dcache-data-width = <0x0>;
-                        xlnx,dcache-force-tag-lutram = <0x0>;
-                        xlnx,dcache-line-len = <0x8>;
-                        xlnx,dcache-use-writeback = <0x0>;
-                        xlnx,dcache-victims = <0x0>;
-                        xlnx,debug-counter-width = <0x20>;
-                        xlnx,debug-enabled = <0x1>;
-                        xlnx,debug-event-counters = <0x5>;
-                        xlnx,debug-external-trace = <0x0>;
-                        xlnx,debug-interface = <0x0>;
-                        xlnx,debug-latency-counters = <0x1>;
-                        xlnx,debug-profile-size = <0x0>;
-                        xlnx,debug-trace-async-reset = <0x0>;
-                        xlnx,debug-trace-size = <0x2000>;
-                        xlnx,div-zero-exception = <0x1>;
-                        xlnx,dp-axi-mon = <0x0>;
-                        xlnx,dynamic-bus-sizing = <0x0>;
-                        xlnx,ecc-use-ce-exception = <0x0>;
-                        xlnx,edge-is-positive = <0x1>;
-                        xlnx,enable-discrete-ports = <0x0>;
-                        xlnx,endianness = <0x1>;
-                        xlnx,fault-tolerant = <0x0>;
-                        xlnx,fpu-exception = <0x0>;
-                        xlnx,freq = <0xbebc200>;
-                        xlnx,fsl-exception = <0x0>;
-                        xlnx,fsl-links = <0x0>;
-                        xlnx,i-axi = <0x0>;
-                        xlnx,i-lmb = <0x1>;
-                        xlnx,i-lmb-mon = <0x0>;
-                        xlnx,iaddr-size = <0x20>;
-                        xlnx,ic-axi-mon = <0x0>;
-                        xlnx,icache-always-used = <0x1>;
-                        xlnx,icache-data-width = <0x0>;
-                        xlnx,icache-force-tag-lutram = <0x0>;
-                        xlnx,icache-line-len = <0x4>;
-                        xlnx,icache-streams = <0x1>;
-                        xlnx,icache-victims = <0x8>;
-                        xlnx,ill-opcode-exception = <0x1>;
-                        xlnx,imprecise-exceptions = <0x0>;
-                        xlnx,instr-size = <0x20>;
-                        xlnx,interconnect = <0x2>;
-                        xlnx,interrupt-is-edge = <0x0>;
-                        xlnx,interrupt-mon = <0x0>;
-                        xlnx,ip-axi-mon = <0x0>;
-                        xlnx,lockstep-master = <0x0>;
-                        xlnx,lockstep-select = <0x0>;
-                        xlnx,lockstep-slave = <0x0>;
-                        xlnx,mmu-dtlb-size = <0x4>;
-                        xlnx,mmu-itlb-size = <0x2>;
-                        xlnx,mmu-privileged-instr = <0x0>;
-                        xlnx,mmu-tlb-access = <0x3>;
-                        xlnx,mmu-zones = <0x2>;
-                        xlnx,num-sync-ff-clk = <0x2>;
-                        xlnx,num-sync-ff-clk-debug = <0x2>;
-                        xlnx,num-sync-ff-clk-irq = <0x1>;
-                        xlnx,num-sync-ff-dbg-clk = <0x1>;
-                        xlnx,num-sync-ff-dbg-trace-clk = <0x2>;
-                        xlnx,number-of-pc-brk = <0x1>;
-                        xlnx,number-of-rd-addr-brk = <0x0>;
-                        xlnx,number-of-wr-addr-brk = <0x0>;
-                        xlnx,opcode-0x0-illegal = <0x1>;
-                        xlnx,optimization = <0x0>;
-                        xlnx,pc-width = <0x20>;
-                        xlnx,piaddr-size = <0x20>;
-                        xlnx,pvr = <0x2>;
-                        xlnx,pvr-user1 = <0x00>;
-                        xlnx,pvr-user2 = <0x00000000>;
-                        xlnx,reset-msr = <0x00000000>;
-                        xlnx,reset-msr-bip = <0x0>;
-                        xlnx,reset-msr-dce = <0x0>;
-                        xlnx,reset-msr-ee = <0x0>;
-                        xlnx,reset-msr-eip = <0x0>;
-                        xlnx,reset-msr-ice = <0x0>;
-                        xlnx,reset-msr-ie = <0x0>;
-                        xlnx,sco = <0x0>;
-                        xlnx,trace = <0x0>;
-                        xlnx,unaligned-exceptions = <0x1>;
-                        xlnx,use-barrel = <0x1>;
-                        xlnx,use-branch-target-cache = <0x0>;
-                        xlnx,use-config-reset = <0x0>;
-                        xlnx,use-dcache = <0x1>;
-                        xlnx,use-div = <0x1>;
-                        xlnx,use-ext-brk = <0x0>;
-                        xlnx,use-ext-nm-brk = <0x0>;
-                        xlnx,use-extended-fsl-instr = <0x0>;
-                        xlnx,use-fpu = <0x0>;
-                        xlnx,use-hw-mul = <0x2>;
-                        xlnx,use-icache = <0x1>;
-                        xlnx,use-interrupt = <0x2>;
-                        xlnx,use-mmu = <0x3>;
-                        xlnx,use-msr-instr = <0x1>;
-                        xlnx,use-non-secure = <0x0>;
-                        xlnx,use-pcmp-instr = <0x1>;
-                        xlnx,use-reorder-instr = <0x1>;
-                        xlnx,use-stack-protection = <0x0>;
-                };
-        };
-        clocks {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                clk_cpu: clk_cpu@0 {
-                        #clock-cells = <0>;
-                        clock-frequency = <200000000>;
-                        clock-output-names = "clk_cpu";
-                        compatible = "fixed-clock";
-                        reg = <0>;
-                };
-                clk_bus_0: clk_bus_0@1 {
-                        #clock-cells = <0>;
-                        clock-frequency = <200000000>;
-                        clock-output-names = "clk_bus_0";
-                        compatible = "fixed-clock";
-                        reg = <1>;
-                };
-        };
-        amba_pl: amba_pl {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "simple-bus";
-                ranges ;
-                axi_ethernet: ethernet@40c00000 {
-                        axistream-connected = <&axi_ethernet_dma>;
-                        axistream-control-connected = <&axi_ethernet_dma>;
-                        clock-frequency = <100000000>;
-                        compatible = "xlnx,axi-ethernet-1.00.a";
-                        device_type = "network";
-                        interrupt-parent = <&microblaze_0_axi_intc>;
-                        interrupts = <4 2>;
-                        phy-mode = "gmii";
-                        reg = <0x40c00000 0x40000>;
-                        xlnx = <0x0>;
-                        xlnx,axiliteclkrate = <0x0>;
-                        xlnx,axisclkrate = <0x0>;
-                        xlnx,clockselection = <0x0>;
-                        xlnx,enableasyncsgmii = <0x0>;
-                        xlnx,gt-type = <0x0>;
-                        xlnx,gtinex = <0x0>;
-                        xlnx,gtlocation = <0x0>;
-                        xlnx,gtrefclksrc = <0x0>;
-                        xlnx,include-dre ;
-                        xlnx,instantiatebitslice0 = <0x0>;
-                        xlnx,phy-type = <0x1>;
-                        xlnx,phyaddr = <0x1>;
-                        xlnx,rable = <0x0>;
-                        xlnx,rxcsum = <0x0>;
-                        xlnx,rxlane0-placement = <0x0>;
-                        xlnx,rxlane1-placement = <0x0>;
-                        xlnx,rxmem = <0x1000>;
-                        xlnx,rxnibblebitslice0used = <0x0>;
-                        xlnx,tx-in-upper-nibble = <0x1>;
-                        xlnx,txcsum = <0x0>;
-                        xlnx,txlane0-placement = <0x0>;
-                        xlnx,txlane1-placement = <0x0>;
-                        axi_ethernet_mdio: mdio {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                        };
-                };
-                axi_ethernet_dma: dma@41e00000 {
-                        #dma-cells = <1>;
-                        axistream-connected = <&axi_ethernet>;
-                        axistream-control-connected = <&axi_ethernet>;
-                        clock-frequency = <200000000>;
-                        clock-names = "s_axi_lite_aclk";
-                        clocks = <&clk_bus_0>;
-                        compatible = "xlnx,eth-dma";
-                        interrupt-parent = <&microblaze_0_axi_intc>;
-                        interrupts = <3 2 2 2>;
-                        reg = <0x41e00000 0x10000>;
-                        xlnx,include-dre ;
-                };
-                axi_timer_0: timer@41c00000 {
-                        clock-frequency = <200000000>;
-                        clocks = <&clk_bus_0>;
-                        compatible = "xlnx,xps-timer-1.00.a";
-                        interrupt-parent = <&microblaze_0_axi_intc>;
-                        interrupts = <5 2>;
-                        reg = <0x41c00000 0x10000>;
-                        xlnx,count-width = <0x20>;
-                        xlnx,gen0-assert = <0x1>;
-                        xlnx,gen1-assert = <0x1>;
-                        xlnx,one-timer-only = <0x0>;
-                        xlnx,trig0-assert = <0x1>;
-                        xlnx,trig1-assert = <0x1>;
-                };
-                calib_complete_gpio: gpio@40010000 {
-                        #gpio-cells = <2>;
-                        compatible = "xlnx,xps-gpio-1.00.a";
-                        gpio-controller ;
-                        reg = <0x40010000 0x10000>;
-                        xlnx,all-inputs = <0x1>;
-                        xlnx,all-inputs-2 = <0x0>;
-                        xlnx,all-outputs = <0x0>;
-                        xlnx,all-outputs-2 = <0x0>;
-                        xlnx,dout-default = <0x00000000>;
-                        xlnx,dout-default-2 = <0x00000000>;
-                        xlnx,gpio-width = <0x1>;
-                        xlnx,gpio2-width = <0x20>;
-                        xlnx,interrupt-present = <0x0>;
-                        xlnx,is-dual = <0x0>;
-                        xlnx,tri-default = <0xFFFFFFFF>;
-                        xlnx,tri-default-2 = <0xFFFFFFFF>;
-                };
-                dip_switches_4bits: gpio@40020000 {
-                        #gpio-cells = <2>;
-                        compatible = "xlnx,xps-gpio-1.00.a";
-                        gpio-controller ;
-                        reg = <0x40020000 0x10000>;
-                        xlnx,all-inputs = <0x1>;
-                        xlnx,all-inputs-2 = <0x0>;
-                        xlnx,all-outputs = <0x0>;
-                        xlnx,all-outputs-2 = <0x0>;
-                        xlnx,dout-default = <0x00000000>;
-                        xlnx,dout-default-2 = <0x00000000>;
-                        xlnx,gpio-width = <0x4>;
-                        xlnx,gpio2-width = <0x20>;
-                        xlnx,interrupt-present = <0x0>;
-                        xlnx,is-dual = <0x0>;
-                        xlnx,tri-default = <0xFFFFFFFF>;
-                        xlnx,tri-default-2 = <0xFFFFFFFF>;
-                };
-                iic_main: i2c@40800000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        clock-frequency = <200000000>;
-                        clocks = <&clk_bus_0>;
-                        compatible = "xlnx,xps-iic-2.00.a";
-                        interrupt-parent = <&microblaze_0_axi_intc>;
-                        interrupts = <1 2>;
-                        reg = <0x40800000 0x10000>;
-                };
-                led_8bits: gpio@40030000 {
-                        #gpio-cells = <2>;
-                        compatible = "xlnx,xps-gpio-1.00.a";
-                        gpio-controller ;
-                        reg = <0x40030000 0x10000>;
-                        xlnx,all-inputs = <0x0>;
-                        xlnx,all-inputs-2 = <0x0>;
-                        xlnx,all-outputs = <0x1>;
-                        xlnx,all-outputs-2 = <0x0>;
-                        xlnx,dout-default = <0x00000000>;
-                        xlnx,dout-default-2 = <0x00000000>;
-                        xlnx,gpio-width = <0x8>;
-                        xlnx,gpio2-width = <0x20>;
-                        xlnx,interrupt-present = <0x0>;
-                        xlnx,is-dual = <0x0>;
-                        xlnx,tri-default = <0xFFFFFFFF>;
-                        xlnx,tri-default-2 = <0xFFFFFFFF>;
-                };
-                linear_flash: flash@60000000 {
-                        bank-width = <2>;
-                        compatible = "cfi-flash";
-                        reg = <0x60000000 0x8000000>;
-                        xlnx,axi-clk-period-ps = <0x1388>;
-                        xlnx,include-datawidth-matching-0 = <0x1>;
-                        xlnx,include-datawidth-matching-1 = <0x1>;
-                        xlnx,include-datawidth-matching-2 = <0x1>;
-                        xlnx,include-datawidth-matching-3 = <0x1>;
-                        xlnx,include-negedge-ioregs = <0x0>;
-                        xlnx,lflash-period-ps = <0x1388>;
-                        xlnx,linear-flash-sync-burst = <0x0>;
-                        xlnx,max-mem-width = <0x10>;
-                        xlnx,mem-a-lsb = <0x0>;
-                        xlnx,mem-a-msb = <0x1f>;
-                        xlnx,mem0-type = <0x2>;
-                        xlnx,mem0-width = <0x10>;
-                        xlnx,mem1-type = <0x0>;
-                        xlnx,mem1-width = <0x10>;
-                        xlnx,mem2-type = <0x0>;
-                        xlnx,mem2-width = <0x10>;
-                        xlnx,mem3-type = <0x0>;
-                        xlnx,mem3-width = <0x10>;
-                        xlnx,num-banks-mem = <0x1>;
-                        xlnx,page-size = <0x10>;
-                        xlnx,parity-type-mem-0 = <0x0>;
-                        xlnx,parity-type-mem-1 = <0x0>;
-                        xlnx,parity-type-mem-2 = <0x0>;
-                        xlnx,parity-type-mem-3 = <0x0>;
-                        xlnx,port-diff = <0x0>;
-                        xlnx,s-axi-en-reg = <0x0>;
-                        xlnx,s-axi-mem-addr-width = <0x20>;
-                        xlnx,s-axi-mem-data-width = <0x20>;
-                        xlnx,s-axi-mem-id-width = <0x1>;
-                        xlnx,s-axi-reg-addr-width = <0x5>;
-                        xlnx,s-axi-reg-data-width = <0x20>;
-                        xlnx,synch-pipedelay-0 = <0x1>;
-                        xlnx,synch-pipedelay-1 = <0x1>;
-                        xlnx,synch-pipedelay-2 = <0x1>;
-                        xlnx,synch-pipedelay-3 = <0x1>;
-                        xlnx,tavdv-ps-mem-0 = <0x1fbd0>;
-                        xlnx,tavdv-ps-mem-1 = <0x3a98>;
-                        xlnx,tavdv-ps-mem-2 = <0x3a98>;
-                        xlnx,tavdv-ps-mem-3 = <0x3a98>;
-                        xlnx,tcedv-ps-mem-0 = <0x1fbd0>;
-                        xlnx,tcedv-ps-mem-1 = <0x3a98>;
-                        xlnx,tcedv-ps-mem-2 = <0x3a98>;
-                        xlnx,tcedv-ps-mem-3 = <0x3a98>;
-                        xlnx,thzce-ps-mem-0 = <0x88b8>;
-                        xlnx,thzce-ps-mem-1 = <0x1b58>;
-                        xlnx,thzce-ps-mem-2 = <0x1b58>;
-                        xlnx,thzce-ps-mem-3 = <0x1b58>;
-                        xlnx,thzoe-ps-mem-0 = <0x1b58>;
-                        xlnx,thzoe-ps-mem-1 = <0x1b58>;
-                        xlnx,thzoe-ps-mem-2 = <0x1b58>;
-                        xlnx,thzoe-ps-mem-3 = <0x1b58>;
-                        xlnx,tlzwe-ps-mem-0 = <0xc350>;
-                        xlnx,tlzwe-ps-mem-1 = <0x0>;
-                        xlnx,tlzwe-ps-mem-2 = <0x0>;
-                        xlnx,tlzwe-ps-mem-3 = <0x0>;
-                        xlnx,tpacc-ps-flash-0 = <0x61a8>;
-                        xlnx,tpacc-ps-flash-1 = <0x61a8>;
-                        xlnx,tpacc-ps-flash-2 = <0x61a8>;
-                        xlnx,tpacc-ps-flash-3 = <0x61a8>;
-                        xlnx,twc-ps-mem-0 = <0x11170>;
-                        xlnx,twc-ps-mem-1 = <0x3a98>;
-                        xlnx,twc-ps-mem-2 = <0x3a98>;
-                        xlnx,twc-ps-mem-3 = <0x3a98>;
-                        xlnx,twp-ps-mem-0 = <0x13880>;
-                        xlnx,twp-ps-mem-1 = <0x2ee0>;
-                        xlnx,twp-ps-mem-2 = <0x2ee0>;
-                        xlnx,twp-ps-mem-3 = <0x2ee0>;
-                        xlnx,twph-ps-mem-0 = <0x13880>;
-                        xlnx,twph-ps-mem-1 = <0x2ee0>;
-                        xlnx,twph-ps-mem-2 = <0x2ee0>;
-                        xlnx,twph-ps-mem-3 = <0x2ee0>;
-                        xlnx,use-startup = <0x0>;
-                        xlnx,use-startup-int = <0x0>;
-                        xlnx,wr-rec-time-mem-0 = <0x186a0>;
-                        xlnx,wr-rec-time-mem-1 = <0x6978>;
-                        xlnx,wr-rec-time-mem-2 = <0x6978>;
-                        xlnx,wr-rec-time-mem-3 = <0x6978>;
-                };
-                microblaze_0_axi_intc: interrupt-controller@41200000 {
-                        #interrupt-cells = <2>;
-                        compatible = "xlnx,xps-intc-1.00.a";
-                        interrupt-controller ;
-                        reg = <0x41200000 0x10000>;
-                        xlnx,kind-of-intr = <0x0>;
-                        xlnx,num-intr-inputs = <0x6>;
-                };
-                push_buttons_5bits: gpio@40040000 {
-                        #gpio-cells = <2>;
-                        compatible = "xlnx,xps-gpio-1.00.a";
-                        gpio-controller ;
-                        reg = <0x40040000 0x10000>;
-                        xlnx,all-inputs = <0x1>;
-                        xlnx,all-inputs-2 = <0x0>;
-                        xlnx,all-outputs = <0x0>;
-                        xlnx,all-outputs-2 = <0x0>;
-                        xlnx,dout-default = <0x00000000>;
-                        xlnx,dout-default-2 = <0x00000000>;
-                        xlnx,gpio-width = <0x5>;
-                        xlnx,gpio2-width = <0x20>;
-                        xlnx,interrupt-present = <0x0>;
-                        xlnx,is-dual = <0x0>;
-                        xlnx,tri-default = <0xFFFFFFFF>;
-                        xlnx,tri-default-2 = <0xFFFFFFFF>;
-                };
-                reset_gpio: gpio@40000000 {
-                        #gpio-cells = <2>;
-                        compatible = "xlnx,xps-gpio-1.00.a";
-                        gpio-controller ;
-                        reg = <0x40000000 0x10000>;
-                        xlnx,all-inputs = <0x0>;
-                        xlnx,all-inputs-2 = <0x0>;
-                        xlnx,all-outputs = <0x1>;
-                        xlnx,all-outputs-2 = <0x0>;
-                        xlnx,dout-default = <0x00000000>;
-                        xlnx,dout-default-2 = <0x00000000>;
-                        xlnx,gpio-width = <0x1>;
-                        xlnx,gpio2-width = <0x20>;
-                        xlnx,interrupt-present = <0x0>;
-                        xlnx,is-dual = <0x0>;
-                        xlnx,tri-default = <0xFFFFFFFF>;
-                        xlnx,tri-default-2 = <0xFFFFFFFF>;
-                };
-                rs232_uart: serial@44a00000 {
-                        clock-frequency = <200000000>;
-                        clocks = <&clk_bus_0>;
-                        compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a";
-                        current-speed = <115200>;
-                        device_type = "serial";
-                        interrupt-parent = <&microblaze_0_axi_intc>;
-                        interrupts = <0 2>;
-                        port-number = <0>;
-                        reg = <0x44a00000 0x10000>;
-                        reg-offset = <0x1000>;
-                        reg-shift = <2>;
-                        xlnx,external-xin-clk-hz = <0x17d7840>;
-                        xlnx,external-xin-clk-hz-d = <0x19>;
-                        xlnx,has-external-rclk = <0x0>;
-                        xlnx,has-external-xin = <0x0>;
-                        xlnx,is-a-16550 = <0x1>;
-                        xlnx,s-axi-aclk-freq-hz-d = "200.0";
-                        xlnx,use-modem-ports = <0x1>;
-                        xlnx,use-user-ports = <0x1>;
-                };
-        };
-};
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
deleted file mode 100644
index 09b26c6a..00000000
--- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * CAUTION: This file is automatically generated by PetaLinux SDK.
- * DO NOT modify this file
- */
-
-
-/ {
-        chosen {
-                bootargs = "console=ttyS0,115200 earlyprintk";
-                stdout-path = "serial0:115200n8";
-        };
-};
-
-&axi_ethernet {
-        local-mac-address = [00 0a 35 00 22 01];
-};
-
-&linear_flash {
-        reg = <0x60000000 0x08000000>;
-        #address-cells = <1>;
-        #size-cells = <1>;
-        partition@0x00000000 {
-                label = "fpga";
-                reg = <0x00000000 0x00b00000>;
-        };
-        partition@0x00b00000 {
-                label = "boot";
-                reg = <0x00b00000 0x00080000>;
-        };
-        partition@0x00b80000 {
-                label = "bootenv";
-                reg = <0x00b80000 0x00020000>;
-        };
-        partition@0x00ba0000 {
-                label = "kernel";
-                reg = <0x00ba0000 0x00c00000>;
-        };
-        partition@0x017a0000 {
-                label = "spare";
-                reg = <0x017a0000 0x00000000>;
-        };
-};
-
diff --git a/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2022.2.bb b/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2022.2.bb
new file mode 100644
index 00000000..e512777c
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2022.2.bb
@@ -0,0 +1,48 @@
+SUMMARY = "KC705 Pre-built Bitstream"
+DESCRIPTION = "A Pre-built bitstream for the KC705, which is capable of booting a Linux system."
+HOMEPAGE = "http://www.xilinx.com"
+SECTION = "bsp"
+
+# The BSP package does not include any license information.
+LICENSE = "Proprietary"
+LICENSE_FLAGS = "xilinx"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/Proprietary;md5=0557f9d92cf58f2ccdd50f62f8ac0b28"
+
+COMPATIBLE_MACHINE = "kc705-microblazeel"
+
+inherit deploy
+inherit xilinx-fetch-restricted
+
+BSP_NAME = "xilinx-kc705"
+BSP_FILE = "${BSP_NAME}-v${PV}-final.bsp"
+SRC_URI = "https://www.xilinx.com/member/forms/download/xef.html?filename=${BSP_FILE};downloadfilename=${BSP_FILE}"
+SRC_URI[md5sum] = "5c0365a8a26cc27b4419aa1d7dd82351"
+SRC_URI[sha256sum] = "a909a91a37a9925ee2f972ccb10f986a26ff9785c1a71a483545a192783bf773"
+
+PROVIDES = "virtual/bitstream"
+
+FILES:${PN} += "/boot/download.bit"
+
+INHIBIT_DEFAULT_DEPS = "1"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+# deps needed to extract content from the .bsp file
+DEPENDS += "tar-native gzip-native"
+
+do_compile() {
+        # Extract the bitstream into workdir
+        tar -xf ${WORKDIR}/${BSP_FILE} ${BSP_NAME}-axi-full-${PV}/pre-built/linux/images/download.bit -C ${S}
+        # move the bit file to ${S}/ as it is in a subdir in the tar file
+        for i in $(find -type f -name download.bit); do mv $i ${S}; done
+}
+
+do_install() {
+        install -D ${S}/download.bit ${D}/boot/download.bit
+}
+
+do_deploy () {
+        install -D ${S}/download.bit ${DEPLOYDIR}/download.bit
+}
+
+addtask deploy before do_build after do_install
+
diff --git a/meta-xilinx-contrib/conf/layer.conf b/meta-xilinx-contrib/conf/layer.conf
index c6e9ac4c..4855de45 100644
--- a/meta-xilinx-contrib/conf/layer.conf
+++ b/meta-xilinx-contrib/conf/layer.conf
@@ -13,5 +13,3 @@ LAYERDEPENDS_xilinx-contrib = "core"
 LAYERDEPENDS_xilinx-contrib = "xilinx"
 
 LAYERSERIES_COMPAT_xilinx-contrib = "kirkstone"
-
-XILINX_RELEASE_VERSION = "v2022.1"
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
new file mode 100644
index 00000000..660bc218
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
@@ -0,0 +1,305 @@
+From 21cc8144efdaa3cd8dbd7279f87b14fa3432fae4 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:14:13 +1000
+Subject: [PATCH 1/3] drm: xilinx: Add encoder for Digilent boards
+
+Add the dglnt_encoder driver that enables DRM support for the VGA and
+HDMI output ports found on many Digilent boards.
+
+Upstream-Status: Pending
+
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ .../bindings/drm/xilinx/dglnt_encoder.txt          |  23 +++
+ drivers/gpu/drm/xilinx/Kconfig                     |   6 +
+ drivers/gpu/drm/xilinx/Makefile                    |   1 +
+ drivers/gpu/drm/xilinx/dglnt_encoder.c             | 217 +++++++++++++++++++++
+ 4 files changed, 247 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+ create mode 100644 drivers/gpu/drm/xilinx/dglnt_encoder.c
+
+diff --git a/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+new file mode 100644
+index 0000000..242b24e
+--- /dev/null
++++ b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+@@ -0,0 +1,23 @@
++Device-Tree bindings for Digilent DRM Encoder Slave
++
++This driver provides support for VGA and HDMI outputs on Digilent FPGA boards.
++The VGA or HDMI port must be connected to a Xilinx display pipeline via an
++axi2vid IP core.
++
++Required properties:
++ - compatible: Should be "digilent,drm-encoder".
++
++Optional properties:
++ - dglnt,edid-i2c: The I2C device connected to the DDC bus on the video
++                   connector. This is used to obtain the supported resolutions
++                   of an attached monitor. If not defined, then a default
++                   set of resolutions is used and the display will initialize
++                   to 720p. Note most VGA connectors on Digilent boards do
++                   not have the DDC bus routed out.
++
++Example:
++
++       encoder_0: digilent_encoder {
++               compatible = "digilent,drm-encoder";
++               dglnt,edid-i2c = <&i2c1>;
++       };
+diff --git a/drivers/gpu/drm/xilinx/Kconfig b/drivers/gpu/drm/xilinx/Kconfig
+index 57e18a9..d9ecff2 100644
+--- a/drivers/gpu/drm/xilinx/Kconfig
++++ b/drivers/gpu/drm/xilinx/Kconfig
+@@ -33,6 +33,12 @@ config DRM_XILINX_DP_SUB
+        help
+          DRM driver for Xilinx Display Port Subsystem.
+ 
++config DRM_DIGILENT_ENCODER
++   tristate "Digilent VGA/HDMI DRM Encoder Driver"
++   depends on DRM_XILINX
++   help
++     DRM slave encoder for Video-out on Digilent boards.
++
+ config DRM_XILINX_DP_SUB_DEBUG_FS
+        bool "Xilinx DRM DPSUB debugfs"
+        depends on DEBUG_FS && DRM_XILINX_DP_SUB
+diff --git a/drivers/gpu/drm/xilinx/Makefile b/drivers/gpu/drm/xilinx/Makefile
+index 19bc154..c2717e40 100644
+--- a/drivers/gpu/drm/xilinx/Makefile
++++ b/drivers/gpu/drm/xilinx/Makefile
+@@ -7,6 +7,7 @@ xilinx_drm-y := xilinx_drm_crtc.o xilinx_drm_connector.o xilinx_drm_drv.o \
+                xilinx_drm_plane.o
+ xilinx_drm-y += xilinx_cresample.o xilinx_osd.o xilinx_rgb2yuv.o xilinx_vtc.o
+ 
++obj-$(CONFIG_DRM_DIGILENT_ENCODER) += dglnt_encoder.o
+ obj-$(CONFIG_DRM_XILINX) += xilinx_drm.o
+ obj-$(CONFIG_DRM_XILINX_DP) += xilinx_drm_dp.o
+ obj-$(CONFIG_DRM_XILINX_DP_SUB) += xilinx_drm_dp_sub.o
+diff --git a/drivers/gpu/drm/xilinx/dglnt_encoder.c b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+new file mode 100644
+index 0000000..cb9fc7d
+--- /dev/null
++++ b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+@@ -0,0 +1,217 @@
++/*
++ * dglnt_encoder.c - DRM slave encoder for Video-out on Digilent boards
++ *
++ * Copyright (C) 2015 Digilent
++ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
++ *
++ * Based on udl_encoder.c and udl_connector.c, Copyright (C) 2012 Red Hat.
++ * Also based on xilinx_drm_dp.c, Copyright (C) 2014 Xilinx, Inc.
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <drm/drmP.h>
++#include <drm/drm_edid.h>
++#include <drm/drm_encoder_slave.h>
++
++#include <linux/device.h>
++#include <linux/module.h>
++#include <linux/err.h>
++#include <linux/i2c.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/platform_device.h>
++
++#define DGLNT_ENC_MAX_FREQ 150000
++#define DGLNT_ENC_MAX_H 1920
++#define DGLNT_ENC_MAX_V 1080
++#define DGLNT_ENC_PREF_H 1280
++#define DGLNT_ENC_PREF_V 720
++
++struct dglnt_encoder {
++       struct drm_encoder *encoder;
++       struct i2c_adapter *i2c_bus;
++       bool i2c_present;
++};
++
++static inline struct dglnt_encoder *to_dglnt_encoder(
++                                       struct drm_encoder *encoder)
++{
++       return to_encoder_slave(encoder)->slave_priv;
++}
++
++static bool dglnt_mode_fixup(struct drm_encoder *encoder,
++                               const struct drm_display_mode *mode,
++                               struct drm_display_mode *adjusted_mode)
++{
++       return true;
++}
++
++static void dglnt_encoder_mode_set(struct drm_encoder *encoder,
++                               struct drm_display_mode *mode,
++                               struct drm_display_mode *adjusted_mode)
++{
++}
++
++static void
++dglnt_encoder_dpms(struct drm_encoder *encoder, int mode)
++{
++}
++
++static void dglnt_encoder_save(struct drm_encoder *encoder)
++{
++}
++
++static void dglnt_encoder_restore(struct drm_encoder *encoder)
++{
++}
++
++static int dglnt_encoder_mode_valid(struct drm_encoder *encoder,
++                               struct drm_display_mode *mode)
++{
++       if (mode &&
++               !(mode->flags & ((DRM_MODE_FLAG_INTERLACE |
++                       DRM_MODE_FLAG_DBLCLK) | DRM_MODE_FLAG_3D_MASK)) &&
++               (mode->clock <= DGLNT_ENC_MAX_FREQ) &&
++               (mode->hdisplay <= DGLNT_ENC_MAX_H) &&
++               (mode->vdisplay <= DGLNT_ENC_MAX_V))
++               return MODE_OK;
++       return MODE_BAD;
++}
++
++static int dglnt_encoder_get_modes(struct drm_encoder *encoder,
++                               struct drm_connector *connector)
++{
++       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
++       struct edid *edid;
++       int num_modes = 0;
++
++       if (dglnt->i2c_present) {
++               edid = drm_get_edid(connector, dglnt->i2c_bus);
++               drm_connector_update_edid_property(connector, edid);
++               if (edid) {
++                       num_modes = drm_add_edid_modes(connector, edid);
++                       kfree(edid);
++               }
++       } else {
++               num_modes = drm_add_modes_noedid(connector, DGLNT_ENC_MAX_H,
++                                               DGLNT_ENC_MAX_V);
++               drm_set_preferred_mode(connector, DGLNT_ENC_PREF_H,
++                                       DGLNT_ENC_PREF_V);
++       }
++       return num_modes;
++}
++
++static enum drm_connector_status dglnt_encoder_detect(
++                                       struct drm_encoder *encoder,
++                                       struct drm_connector *connector)
++{
++       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
++
++       if (dglnt->i2c_present) {
++               if (drm_probe_ddc(dglnt->i2c_bus))
++                       return connector_status_connected;
++               return connector_status_disconnected;
++       } else
++               return connector_status_unknown;
++}
++
++static struct drm_encoder_slave_funcs dglnt_encoder_slave_funcs = {
++       .dpms                   = dglnt_encoder_dpms,
++       .save                   = dglnt_encoder_save,
++       .restore                = dglnt_encoder_restore,
++       .mode_fixup             = dglnt_mode_fixup,
++       .mode_valid             = dglnt_encoder_mode_valid,
++       .mode_set               = dglnt_encoder_mode_set,
++       .detect                 = dglnt_encoder_detect,
++       .get_modes              = dglnt_encoder_get_modes,
++};
++
++static int dglnt_encoder_encoder_init(struct platform_device *pdev,
++                               struct drm_device *dev,
++                               struct drm_encoder_slave *encoder)
++{
++       struct dglnt_encoder *dglnt = platform_get_drvdata(pdev);
++       struct device_node *sub_node;
++
++       encoder->slave_priv = dglnt;
++       encoder->slave_funcs = &dglnt_encoder_slave_funcs;
++
++       dglnt->encoder = &encoder->base;
++
++       /* get i2c adapter for edid */
++       dglnt->i2c_present = false;
++       sub_node = of_parse_phandle(pdev->dev.of_node, "dglnt,edid-i2c", 0);
++       if (sub_node) {
++               dglnt->i2c_bus = of_find_i2c_adapter_by_node(sub_node);
++               if (!dglnt->i2c_bus)
++                       DRM_INFO("failed to get the edid i2c adapter, using default modes\n");
++               else
++                       dglnt->i2c_present = true;
++               of_node_put(sub_node);
++       }
++
++       return 0;
++}
++
++static int dglnt_encoder_probe(struct platform_device *pdev)
++{
++       struct dglnt_encoder *dglnt;
++
++       dglnt = devm_kzalloc(&pdev->dev, sizeof(*dglnt), GFP_KERNEL);
++       if (!dglnt)
++               return -ENOMEM;
++
++       platform_set_drvdata(pdev, dglnt);
++
++       return 0;
++}
++
++static int dglnt_encoder_remove(struct platform_device *pdev)
++{
++       return 0;
++}
++
++static const struct of_device_id dglnt_encoder_of_match[] = {
++       { .compatible = "digilent,drm-encoder", },
++       { /* end of table */ },
++};
++MODULE_DEVICE_TABLE(of, dglnt_encoder_of_match);
++
++static struct drm_platform_encoder_driver dglnt_encoder_driver = {
++       .platform_driver = {
++               .probe                  = dglnt_encoder_probe,
++               .remove                 = dglnt_encoder_remove,
++               .driver                 = {
++                       .owner          = THIS_MODULE,
++                       .name           = "dglnt-drm-enc",
++                       .of_match_table = dglnt_encoder_of_match,
++               },
++       },
++
++       .encoder_init = dglnt_encoder_encoder_init,
++};
++
++static int __init dglnt_encoder_init(void)
++{
++       return platform_driver_register(&dglnt_encoder_driver.platform_driver);
++}
++
++static void __exit dglnt_encoder_exit(void)
++{
++       platform_driver_unregister(&dglnt_encoder_driver.platform_driver);
++}
++
++module_init(dglnt_encoder_init);
++module_exit(dglnt_encoder_exit);
++
++MODULE_AUTHOR("Digilent, Inc.");
++MODULE_DESCRIPTION("DRM slave encoder for Video-out on Digilent boards");
++MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
+
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
new file mode 100644
index 00000000..9b6229db
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
@@ -0,0 +1,607 @@
+From 217e3b6f4393926b8dcad841381527ef3fc808c2 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:16:06 +1000
+Subject: [PATCH 2/3] clk: Add driver for axi_dynclk IP Core
+
+Add support for the axi_dynclk IP Core available from Digilent. This IP
+core dynamically configures the clock resources inside a Xilinx FPGA to
+generate a clock with a software programmable frequency.
+
+Upstream-Status: Pending
+
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ drivers/clk/Kconfig            |   8 +
+ drivers/clk/Makefile           |   1 +
+ drivers/clk/clk-dglnt-dynclk.c | 547 +++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 556 insertions(+)
+ create mode 100644 drivers/clk/clk-dglnt-dynclk.c
+
+diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
+index dccb111100..7fe65a702b 100644
+--- a/drivers/clk/Kconfig
++++ b/drivers/clk/Kconfig
+@@ -148,6 +148,14 @@ config CLK_QORIQ
+          This adds the clock driver support for Freescale QorIQ platforms
+          using common clock framework.
+ 
++config COMMON_CLK_DGLNT_DYNCLK
++       tristate "Digilent axi_dynclk Driver"
++       depends on ARCH_ZYNQ || MICROBLAZE
++       help
++       ---help---
++         Support for the Digilent AXI Dynamic Clock core for Xilinx
++         FPGAs.
++
+ config COMMON_CLK_XGENE
+        bool "Clock driver for APM XGene SoC"
+        default y
+diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
+index 0760449dde..45ce97d053 100644
+--- a/drivers/clk/Makefile
++++ b/drivers/clk/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706)      += clk-cdce706.o
+ obj-$(CONFIG_COMMON_CLK_CDCE925)       += clk-cdce925.o
+ obj-$(CONFIG_ARCH_CLPS711X)            += clk-clps711x.o
+ obj-$(CONFIG_COMMON_CLK_CS2000_CP)     += clk-cs2000-cp.o
++obj-$(CONFIG_COMMON_CLK_DGLNT_DYNCLK)  += clk-dglnt-dynclk.o
+ obj-$(CONFIG_ARCH_EFM32)               += clk-efm32gg.o
+ obj-$(CONFIG_ARCH_HIGHBANK)            += clk-highbank.o
+ obj-$(CONFIG_COMMON_CLK_MAX77686)      += clk-max77686.o
+diff --git a/drivers/clk/clk-dglnt-dynclk.c b/drivers/clk/clk-dglnt-dynclk.c
+new file mode 100644
+index 0000000000..496ad5fc90
+--- /dev/null
++++ b/drivers/clk/clk-dglnt-dynclk.c
+@@ -0,0 +1,547 @@
++/*
++ * clk-dglnt-dynclk.c - Digilent AXI Dynamic Clock (axi_dynclk) Driver
++ *
++ * Copyright (C) 2015 Digilent
++ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
++ *
++ * Reused code from clk-axi-clkgen.c, Copyright (C) 2012-2013 Analog Devices Inc.
++ *
++ * This software is licensed under the terms of the GNU General Public
++ * License version 2, as published by the Free Software Foundation, and
++ * may be copied, distributed, and modified under those terms.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/clk-provider.h>
++#include <linux/clk.h>
++#include <linux/slab.h>
++#include <linux/io.h>
++#include <linux/of.h>
++#include <linux/module.h>
++#include <linux/err.h>
++#include <linux/kernel.h>
++
++#define CLK_BIT_WEDGE 13
++#define CLK_BIT_NOCOUNT 12
++
++/* This value is used to signal an error */
++#define ERR_CLKCOUNTCALC 0xFFFFFFFF
++#define ERR_CLKDIVIDER (1 << CLK_BIT_WEDGE | 1 << CLK_BIT_NOCOUNT)
++
++#define DYNCLK_DIV_1_REGMASK 0x1041
++/* 25 MHz (125 KHz / 5) */
++#define DYNCLK_DEFAULT_FREQ 125000
++
++#define MMCM_FREQ_VCOMIN 600000
++#define MMCM_FREQ_VCOMAX 1200000
++#define MMCM_FREQ_PFDMIN 10000
++#define MMCM_FREQ_PFDMAX 450000
++#define MMCM_FREQ_OUTMIN 4000
++#define MMCM_FREQ_OUTMAX 800000
++#define MMCM_DIV_MAX 106
++#define MMCM_FB_MIN 2
++#define MMCM_FB_MAX 64
++#define MMCM_CLKDIV_MAX 128
++#define MMCM_CLKDIV_MIN 1
++
++#define OFST_DISPLAY_CTRL 0x0
++#define OFST_DISPLAY_STATUS 0x4
++#define OFST_DISPLAY_CLK_L 0x8
++#define OFST_DISPLAY_FB_L 0x0C
++#define OFST_DISPLAY_FB_H_CLK_H 0x10
++#define OFST_DISPLAY_DIV 0x14
++#define OFST_DISPLAY_LOCK_L 0x18
++#define OFST_DISPLAY_FLTR_LOCK_H 0x1C
++
++static const u64 lock_lookup[64] = {
++       0b0011000110111110100011111010010000000001,
++       0b0011000110111110100011111010010000000001,
++       0b0100001000111110100011111010010000000001,
++       0b0101101011111110100011111010010000000001,
++       0b0111001110111110100011111010010000000001,
++       0b1000110001111110100011111010010000000001,
++       0b1001110011111110100011111010010000000001,
++       0b1011010110111110100011111010010000000001,
++       0b1100111001111110100011111010010000000001,
++       0b1110011100111110100011111010010000000001,
++       0b1111111111111000010011111010010000000001,
++       0b1111111111110011100111111010010000000001,
++       0b1111111111101110111011111010010000000001,
++       0b1111111111101011110011111010010000000001,
++       0b1111111111101000101011111010010000000001,
++       0b1111111111100111000111111010010000000001,
++       0b1111111111100011111111111010010000000001,
++       0b1111111111100010011011111010010000000001,
++       0b1111111111100000110111111010010000000001,
++       0b1111111111011111010011111010010000000001,
++       0b1111111111011101101111111010010000000001,
++       0b1111111111011100001011111010010000000001,
++       0b1111111111011010100111111010010000000001,
++       0b1111111111011001000011111010010000000001,
++       0b1111111111011001000011111010010000000001,
++       0b1111111111010111011111111010010000000001,
++       0b1111111111010101111011111010010000000001,
++       0b1111111111010101111011111010010000000001,
++       0b1111111111010100010111111010010000000001,
++       0b1111111111010100010111111010010000000001,
++       0b1111111111010010110011111010010000000001,
++       0b1111111111010010110011111010010000000001,
++       0b1111111111010010110011111010010000000001,
++       0b1111111111010001001111111010010000000001,
++       0b1111111111010001001111111010010000000001,
++       0b1111111111010001001111111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001,
++       0b1111111111001111101011111010010000000001
++};
++
++static const u32 filter_lookup_low[64] = {
++       0b0001011111,
++       0b0001010111,
++       0b0001111011,
++       0b0001011011,
++       0b0001101011,
++       0b0001110011,
++       0b0001110011,
++       0b0001110011,
++       0b0001110011,
++       0b0001001011,
++       0b0001001011,
++       0b0001001011,
++       0b0010110011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001010011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0001100011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010010011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011,
++       0b0010100011
++};
++
++struct dglnt_dynclk_reg;
++struct dglnt_dynclk_mode;
++struct dglnt_dynclk;
++
++struct dglnt_dynclk_reg {
++       u32 clk0L;
++       u32 clkFBL;
++       u32 clkFBH_clk0H;
++       u32 divclk;
++       u32 lockL;
++       u32 fltr_lockH;
++};
++
++struct dglnt_dynclk_mode {
++       u32 freq;
++       u32 fbmult;
++       u32 clkdiv;
++       u32 maindiv;
++};
++
++struct dglnt_dynclk {
++       void __iomem *base;
++       struct clk_hw clk_hw;
++       unsigned long freq;
++};
++
++u32 dglnt_dynclk_divider(u32 divide)
++{
++       u32 output = 0;
++       u32 highTime = 0;
++       u32 lowTime = 0;
++
++       if ((divide < 1) || (divide > 128))
++               return ERR_CLKDIVIDER;
++
++       if (divide == 1)
++               return DYNCLK_DIV_1_REGMASK;
++
++       highTime = divide / 2;
++       /* if divide is odd */
++       if (divide & 0x1) {
++               lowTime = highTime + 1;
++               output = 1 << CLK_BIT_WEDGE;
++       } else {
++               lowTime = highTime;
++       }
++
++       output |= 0x03F & lowTime;
++       output |= 0xFC0 & (highTime << 6);
++       return output;
++}
++
++u32 dglnt_dynclk_count_calc(u32 divide)
++{
++       u32 output = 0;
++       u32 divCalc = 0;
++
++       divCalc = dglnt_dynclk_divider(divide);
++       if (divCalc == ERR_CLKDIVIDER)
++               output = ERR_CLKCOUNTCALC;
++       else
++               output = (0xFFF & divCalc) | ((divCalc << 10) & 0x00C00000);
++       return output;
++}
++
++
++int dglnt_dynclk_find_reg(struct dglnt_dynclk_reg *regValues,
++                         struct dglnt_dynclk_mode *clkParams)
++{
++       if ((clkParams->fbmult < 2) || clkParams->fbmult > 64)
++               return -EINVAL;
++
++       regValues->clk0L = dglnt_dynclk_count_calc(clkParams->clkdiv);
++       if (regValues->clk0L == ERR_CLKCOUNTCALC)
++               return -EINVAL;
++
++       regValues->clkFBL = dglnt_dynclk_count_calc(clkParams->fbmult);
++       if (regValues->clkFBL == ERR_CLKCOUNTCALC)
++               return -EINVAL;
++
++       regValues->clkFBH_clk0H = 0;
++
++       regValues->divclk = dglnt_dynclk_divider(clkParams->maindiv);
++       if (regValues->divclk == ERR_CLKDIVIDER)
++               return -EINVAL;
++
++       regValues->lockL = (u32)(lock_lookup[clkParams->fbmult - 1] &
++                                0xFFFFFFFF);
++
++       regValues->fltr_lockH = (u32)((lock_lookup[clkParams->fbmult - 1] >>
++                                      32) & 0x000000FF);
++       regValues->fltr_lockH |= ((filter_lookup_low[clkParams->fbmult - 1] <<
++                                  16) & 0x03FF0000);
++
++       return 0;
++}
++
++void dglnt_dynclk_write_reg(struct dglnt_dynclk_reg *regValues,
++                           void __iomem *baseaddr)
++{
++       writel(regValues->clk0L, baseaddr + OFST_DISPLAY_CLK_L);
++       writel(regValues->clkFBL, baseaddr + OFST_DISPLAY_FB_L);
++       writel(regValues->clkFBH_clk0H, baseaddr + OFST_DISPLAY_FB_H_CLK_H);
++       writel(regValues->divclk, baseaddr + OFST_DISPLAY_DIV);
++       writel(regValues->lockL, baseaddr + OFST_DISPLAY_LOCK_L);
++       writel(regValues->fltr_lockH, baseaddr + OFST_DISPLAY_FLTR_LOCK_H);
++}
++
++u32 dglnt_dynclk_find_mode(u32 freq, u32 parentFreq,
++                          struct dglnt_dynclk_mode *bestPick)
++{
++       u32 bestError = MMCM_FREQ_OUTMAX;
++       u32 curError;
++       u32 curClkMult;
++       u32 curFreq;
++       u32 divVal;
++       u32 curFb, curClkDiv;
++       u32 minFb = 0;
++       u32 maxFb = 0;
++       u32 curDiv = 1;
++       u32 maxDiv;
++       bool freq_found = false;
++
++       bestPick->freq = 0;
++       if (parentFreq == 0)
++               return 0;
++
++       /* minimum frequency is actually dictated by VCOmin */
++       if (freq < MMCM_FREQ_OUTMIN)
++               freq = MMCM_FREQ_OUTMIN;
++       if (freq > MMCM_FREQ_OUTMAX)
++               freq = MMCM_FREQ_OUTMAX;
++
++       if (parentFreq > MMCM_FREQ_PFDMAX)
++               curDiv = 2;
++       maxDiv = parentFreq / MMCM_FREQ_PFDMIN;
++       if (maxDiv > MMCM_DIV_MAX)
++               maxDiv = MMCM_DIV_MAX;
++
++       while (curDiv <= maxDiv && !freq_found) {
++               minFb = curDiv * DIV_ROUND_UP(MMCM_FREQ_VCOMIN, parentFreq);
++               maxFb = curDiv * (MMCM_FREQ_VCOMAX / parentFreq);
++               if (maxFb > MMCM_FB_MAX)
++                       maxFb = MMCM_FB_MAX;
++               if (minFb < MMCM_FB_MIN)
++                       minFb = MMCM_FB_MIN;
++
++               divVal = curDiv * freq;
++               /*
++                * This multiplier is used to find the best clkDiv value for
++                * each FB value
++                */
++               curClkMult = ((parentFreq * 1000) + (divVal / 2)) / divVal;
++
++               curFb = minFb;
++               while (curFb <= maxFb && !freq_found) {
++                       curClkDiv = ((curClkMult * curFb) + 500) / 1000;
++                       if (curClkDiv > MMCM_CLKDIV_MAX)
++                               curClkDiv = MMCM_CLKDIV_MAX;
++                       if (curClkDiv < MMCM_CLKDIV_MIN)
++                               curClkDiv = MMCM_CLKDIV_MIN;
++                       curFreq = (((parentFreq * curFb) / curDiv) / curClkDiv);
++                       if (curFreq >= freq)
++                               curError = curFreq - freq;
++                       else
++                               curError = freq - curFreq;
++                       if (curError < bestError) {
++                               bestError = curError;
++                               bestPick->clkdiv = curClkDiv;
++                               bestPick->fbmult = curFb;
++                               bestPick->maindiv = curDiv;
++                               bestPick->freq = curFreq;
++                       }
++                       if (!curError)
++                               freq_found = true;
++                       curFb++;
++               }
++               curDiv++;
++       }
++       return bestPick->freq;
++}
++
++static struct dglnt_dynclk *clk_hw_to_dglnt_dynclk(struct clk_hw *clk_hw)
++{
++       return container_of(clk_hw, struct dglnt_dynclk, clk_hw);
++}
++
++
++static int dglnt_dynclk_enable(struct clk_hw *clk_hw)
++{
++       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
++       unsigned int clock_state;
++
++       if (dglnt_dynclk->freq) {
++               writel(1, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
++               do {
++                       clock_state = readl(dglnt_dynclk->base +
++                                           OFST_DISPLAY_STATUS);
++               } while (!clock_state);
++       }
++       return 0;
++}
++
++static void dglnt_dynclk_disable(struct clk_hw *clk_hw)
++{
++       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
++
++       writel(0, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
++}
++
++static int dglnt_dynclk_set_rate(struct clk_hw *clk_hw,
++       unsigned long rate, unsigned long parent_rate)
++{
++       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
++       struct dglnt_dynclk_reg clkReg;
++       struct dglnt_dynclk_mode clkMode;
++
++       if (parent_rate == 0 || rate == 0)
++               return -EINVAL;
++       if (rate == dglnt_dynclk->freq)
++               return 0;
++
++       /*
++        * Convert from Hz to KHz, then multiply by five to account for
++        * BUFR division
++        */
++       rate = (rate + 100) / 200;
++       /* convert from Hz to KHz */
++       parent_rate = (parent_rate + 500) / 1000;
++       if (!dglnt_dynclk_find_mode(rate, parent_rate, &clkMode))
++               return -EINVAL;
++
++       /*
++        * Write to the PLL dynamic configuration registers to configure it
++        * with the calculated parameters.
++        */
++       dglnt_dynclk_find_reg(&clkReg, &clkMode);
++       dglnt_dynclk_write_reg(&clkReg, dglnt_dynclk->base);
++       dglnt_dynclk->freq = clkMode.freq * 200;
++       dglnt_dynclk_disable(clk_hw);
++       dglnt_dynclk_enable(clk_hw);
++
++       return 0;
++}
++
++static long dglnt_dynclk_round_rate(struct clk_hw *hw, unsigned long rate,
++       unsigned long *parent_rate)
++{
++       struct dglnt_dynclk_mode clkMode;
++
++       dglnt_dynclk_find_mode(((rate + 100) / 200),
++               ((*parent_rate) + 500) / 1000, &clkMode);
++
++       return (clkMode.freq * 200);
++}
++
++static unsigned long dglnt_dynclk_recalc_rate(struct clk_hw *clk_hw,
++       unsigned long parent_rate)
++{
++       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
++
++       return dglnt_dynclk->freq;
++}
++
++
++static const struct clk_ops dglnt_dynclk_ops = {
++       .recalc_rate = dglnt_dynclk_recalc_rate,
++       .round_rate = dglnt_dynclk_round_rate,
++       .set_rate = dglnt_dynclk_set_rate,
++       .enable = dglnt_dynclk_enable,
++       .disable = dglnt_dynclk_disable,
++};
++
++static const struct of_device_id dglnt_dynclk_ids[] = {
++       { .compatible = "digilent,axi-dynclk", },
++       { },
++};
++MODULE_DEVICE_TABLE(of, dglnt_dynclk_ids);
++
++static int dglnt_dynclk_probe(struct platform_device *pdev)
++{
++       const struct of_device_id *id;
++       struct dglnt_dynclk *dglnt_dynclk;
++       struct clk_init_data init;
++       const char *parent_name;
++       const char *clk_name;
++       struct resource *mem;
++       struct clk *clk;
++
++       if (!pdev->dev.of_node)
++               return -ENODEV;
++
++       id = of_match_node(dglnt_dynclk_ids, pdev->dev.of_node);
++       if (!id)
++               return -ENODEV;
++
++       dglnt_dynclk = devm_kzalloc(&pdev->dev, sizeof(*dglnt_dynclk),
++                                   GFP_KERNEL);
++       if (!dglnt_dynclk)
++               return -ENOMEM;
++
++       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++       dglnt_dynclk->base = devm_ioremap_resource(&pdev->dev, mem);
++       if (IS_ERR(dglnt_dynclk->base))
++               return PTR_ERR(dglnt_dynclk->base);
++
++       parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
++       if (!parent_name)
++               return -EINVAL;
++
++       clk_name = pdev->dev.of_node->name;
++       of_property_read_string(pdev->dev.of_node, "clock-output-names",
++               &clk_name);
++
++       init.name = clk_name;
++       init.ops = &dglnt_dynclk_ops;
++       init.flags = 0;
++       init.parent_names = &parent_name;
++       init.num_parents = 1;
++
++       dglnt_dynclk->freq = 0;
++       dglnt_dynclk_disable(&dglnt_dynclk->clk_hw);
++
++       dglnt_dynclk->clk_hw.init = &init;
++       clk = devm_clk_register(&pdev->dev, &dglnt_dynclk->clk_hw);
++       if (IS_ERR(clk))
++               return PTR_ERR(clk);
++
++       return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
++                                  clk);
++}
++
++static int dglnt_dynclk_remove(struct platform_device *pdev)
++{
++       of_clk_del_provider(pdev->dev.of_node);
++
++       return 0;
++}
++
++static struct platform_driver dglnt_dynclk_driver = {
++       .driver = {
++               .name = "dglnt-dynclk",
++               .owner = THIS_MODULE,
++               .of_match_table = dglnt_dynclk_ids,
++       },
++       .probe = dglnt_dynclk_probe,
++       .remove = dglnt_dynclk_remove,
++};
++module_platform_driver(dglnt_dynclk_driver);
++
++MODULE_LICENSE("GPL v2");
++MODULE_AUTHOR("Sam Bobrowicz <sbobrowicz@digilentinc.com>");
++MODULE_DESCRIPTION("CCF Driver for Digilent axi_dynclk IP Core");
+-- 
+2.14.2
+
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
new file mode 100644
index 00000000..a98d84c5
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
@@ -0,0 +1,54 @@
+From 1a18e2b514ae9e75145597ac509a87f656c976ba Mon Sep 17 00:00:00 2001
+From: Nathan Rossi <nathan@nathanrossi.com>
+Date: Mon, 2 May 2016 23:46:42 +1000
+Subject: [PATCH 3/3] drm: xilinx: Fix DPMS transition to on
+
+Fix the issues where the VTC is reset (losing its timing config).
+
+Also fix the issue where the plane destroys its DMA descriptors and
+marks the DMA channels as inactive but never recreates the descriptors
+and never updates the active state when turning DPMS back on.
+
+Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
+Upstream-Status: Pending [This is a workaround]
+---
+ drivers/gpu/drm/xilinx/xilinx_drm_crtc.c  | 1 -
+ drivers/gpu/drm/xilinx/xilinx_drm_plane.c | 3 ++-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+index 631d35b921..93dbd4b58a 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
++++ b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+@@ -88,7 +88,6 @@ static void xilinx_drm_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
+        default:
+                if (crtc->vtc) {
+                        xilinx_vtc_disable(crtc->vtc);
+-                       xilinx_vtc_reset(crtc->vtc);
+                }
+                if (crtc->cresample) {
+                        xilinx_cresample_disable(crtc->cresample);
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+index 6a248b72d4..d2518a4bdf 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
++++ b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+@@ -140,7 +140,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+        for (i = 0; i < MAX_NUM_SUB_PLANES; i++) {
+                struct xilinx_drm_plane_dma *dma = &plane->dma[i];
+ 
+-               if (dma->chan && dma->is_active) {
++               if (dma->chan) {
+                        flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
+                        desc = dmaengine_prep_interleaved_dma(dma->chan,
+                                                              &dma->xt,
+@@ -153,6 +153,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+                        dmaengine_submit(desc);
+ 
+                        dma_async_issue_pending(dma->chan);
++                       dma->is_active = true;
+                }
+        }
+ }
+-- 
+2.14.2
+
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0004-minized-wifi-bluetooth.cfg b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0004-minized-wifi-bluetooth.cfg
new file mode 100644
index 00000000..f71e53ab
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2022.2/0004-minized-wifi-bluetooth.cfg
@@ -0,0 +1,33 @@
+#
+# Bluetooth config
+#
+CONFIG_BT=y
+CONFIG_BT_BREDR=y
+CONFIG_BT_HS=y
+CONFIG_BT_LE=y
+CONFIG_BT_BCM=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_BT_HIDP=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_CRDA_SUPPORT=y
+CONFIG_BRCMUTIL=y
+CONFIG_BRCMFMAC=y
+CONFIG_BRCMFMAC_PROTO_BCDC=y
+CONFIG_BRCMFMAC_SDIO=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_SHA256=y
+
+#
+# Regulator config
+#
+CONFIG_REGMAP_IRQ=y
+CONFIG_I2C_XILINX=y
+CONFIG_MFD_DA9062=y
+CONFIG_REGULATOR_DA9062=y
+
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.2.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.2.bbappend
new file mode 100644
index 00000000..8ba7a490
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.2.bbappend
@@ -0,0 +1,12 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/linux-xlnx:"
+
+# Note: These patches are very old and doesn't apply on top of 5.x
+#       kernel. For more details refer README.md file.
+
+#SRC_URI:append:zybo-linux-bd-zynq7 = " \
+#       file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \
+#       file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \
+#       file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \
+#       "
+
+SRC_URI:append:minized-zynq7 = " file://0004-minized-wifi-bluetooth.cfg"
diff --git a/meta-xilinx-core/README.qemu.md b/meta-xilinx-core/README.qemu.md
index d0040b09..d3a02a90 100644
--- a/meta-xilinx-core/README.qemu.md
+++ b/meta-xilinx-core/README.qemu.md
@@ -12,7 +12,7 @@ to make this available: pmu-rom-native.
 The license on the software is Xilinx proprietary, so you may be required to
 enable the approprate LICENSE_FLAGS_WHITELIST to trigger the download.
 The license itself is available within the download at the URL referred to in
-meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native_2022.1.bb.
+meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native_2022.2.bb.
 
 Add the following to your local.conf to acknowledge you accept the proprietary
 xilinx license.
diff --git a/meta-xilinx-core/classes/fpgamanager_custom.bbclass b/meta-xilinx-core/classes/fpgamanager_custom.bbclass
index 848727fb..555e2a66 100644
--- a/meta-xilinx-core/classes/fpgamanager_custom.bbclass
+++ b/meta-xilinx-core/classes/fpgamanager_custom.bbclass
@@ -1,6 +1,3 @@
-LICENSE = "MIT"
-LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
-
 inherit devicetree
 
 DEPENDS = "dtc-native bootgen-native"
diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf
index f5320ee9..112f287a 100644
--- a/meta-xilinx-core/conf/layer.conf
+++ b/meta-xilinx-core/conf/layer.conf
@@ -18,6 +18,8 @@ meta-python:${LAYERDIR}/dynamic-layers/meta-python/recipes-*/*/*.bb \
 meta-python:${LAYERDIR}/dynamic-layers/meta-python/recipes-*/*/*.bbappend \
 virtualization-layer:${LAYERDIR}/dynamic-layers/virtualization-layer/recipes-*/*/*.bb \
 virtualization-layer:${LAYERDIR}/dynamic-layers/virtualization-layer/recipes-*/*/*.bbappend \
+xilinx-tools:${LAYERDIR}/dynamic-layers/meta-xilinx-tools/recipes-*/*/*.bb \
+xilinx-tools:${LAYERDIR}/dynamic-layers/meta-xilinx-tools/recipes-*/*/*.bbappend \
 "
 
 LAYERDEPENDS_xilinx = "core"
@@ -42,6 +44,17 @@ SIGGEN_EXCLUDE_SAFE_RECIPE_DEPS += " \
   *->xserver-xorg \
 "
 
-XILINX_RELEASE_VERSION = "v2022.1"
+XILINX_RELEASE_VERSION ??= "v2022.2"
 
 XILINX_DEPRECATED[meta-xilinx] = "Kirkstone is not officially supported.  See the meta-xilinx/README.kirkstone file for more information."
+
+BUILDCFG_VARS:append = " XILINX_RELEASE_VERSION"
+
+PREFERRED_VERSION_qemu-xilinx ?= "v6.1.0-xilinx-${XILINX_RELEASE_VERSION}%"
+PREFERRED_VERSION_qemu-xilinx-native ?= "v6.1.0-xilinx-${XILINX_RELEASE_VERSION}%"
+PREFERRED_VERSION_qemu-xilinx-system-native ?= "v6.1.0-xilinx-${XILINX_RELEASE_VERSION}%"
+PREFERRED_VERSION_qemu-devicetrees ?= "xilinx-${XILINX_RELEASE_VERSION}%"
+PREFERRED_VERSION_arm-trusted-firmware ?= "2.6-xilinx-${XILINX_RELEASE_VERSION}%"
+PREFERRED_VERSION_u-boot-xlnx ?= "v2021.01-xilinx-${XILINX_RELEASE_VERSION}%"
+PREFERRED_VERSION_pmu-rom-native ?= "${@d.getVar("XILINX_RELEASE_VERSION").replace('v','')}"
+PREFERRED_VERSION_linux-xlnx ?= "${@'5.15.19' if d.getVar("XILINX_RELEASE_VERSION") == 'v2022.1' else '5.15.36'}%"
diff --git a/meta-xilinx-core/conf/local.conf.sample b/meta-xilinx-core/conf/local.conf.sample
index a7173fb8..10134d53 100644
--- a/meta-xilinx-core/conf/local.conf.sample
+++ b/meta-xilinx-core/conf/local.conf.sample
@@ -206,11 +206,11 @@ BB_DISKMON_DIRS ??= "\
 #file://.* http://someserver.tld/share/sstate/PATH;downloadfilename=PATH \n \
 #file://.* file:///some/local/dir/sstate/PATH"
 
-XILINX_VER_MAIN = "2022.1"
+XILINX_RELEASE_VERSION = "v2022.2"
 
 # Uncomment below lines to provide path for custom xsct trim
 #
-#EXTERNAL_XSCT_TARBALL = "/proj/yocto/xsct-trim/2022.1_xsct_daily_latest"
+#EXTERNAL_XSCT_TARBALL = "/proj/yocto/xsct-trim/2022.2_xsct_daily_latest"
 #VALIDATE_XSCT_CHECKSUM = '0'
 
 #
diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc
index a4b0c59a..aa91f771 100644
--- a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc
+++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc
@@ -38,6 +38,13 @@ XSERVER ?= " \
         ${XSERVER_EXT} \
         "
 
+# Automatically add WKS_FILE_DEPENDS based on the configuration
+WKS_FILE_DEPENDS:append = "${@bb.utils.contains('IMAGE_BOOT_FILES', 'boot.bin', ' xilinx-bootbin', '', d)}"
+WKS_FILE_DEPENDS:append = "${@bb.utils.contains('IMAGE_BOOT_FILES', 'system.dtb', ' virtual/dtb', '', d)}"
+WKS_FILE_DEPENDS:append = "${@bb.utils.contains('IMAGE_BOOT_FILES', 'boot.scr', ' u-boot-zynq-scr', '', d)}"
+WKS_FILE_DEPENDS:append = "${@bb.utils.contains('IMAGE_BOOT_FILES', 'uEnv.txt', ' u-boot-zynq-uenv', '', d)}"
+WKS_FILE_DEPENDS:append = "${@bb.utils.contains('IMAGE_BOOT_FILES', 'atf-uboot.ub', ' arm-trusted-firmware', '', d)}"
+
 IMAGE_BOOT_FILES ?= "${@get_default_image_boot_files(d)}"
 
 def get_default_image_boot_files(d):
diff --git a/meta-xilinx-core/conf/machine/include/soc-versal.inc b/meta-xilinx-core/conf/machine/include/soc-versal.inc
index 40145963..dcf3796e 100644
--- a/meta-xilinx-core/conf/machine/include/soc-versal.inc
+++ b/meta-xilinx-core/conf/machine/include/soc-versal.inc
@@ -7,6 +7,7 @@ SOC_FAMILY ?= "versal"
 # "hbm"      - Versal HMB Devices
 # "ai-core"  - Versal AI-core Devices
 # "ai-edge"  - Versal AI-Edge Devices
+# "net"      - Versal Net Devices
 
 SOC_VARIANT ?= "prime"
 
diff --git a/meta-xilinx-core/conf/machine/microblaze-generic.conf b/meta-xilinx-core/conf/machine/microblaze-generic.conf
index c0e41948..92412681 100644
--- a/meta-xilinx-core/conf/machine/microblaze-generic.conf
+++ b/meta-xilinx-core/conf/machine/microblaze-generic.conf
@@ -32,7 +32,7 @@ MACHINE_FEATURES = ""
 KERNEL_IMAGETYPE ?= "linux.bin.ub"
 KERNEL_IMAGETYPES = ""
 
-SERIAL_CONSOLES ?= "115200;ttyS0"
+SERIAL_CONSOLES ?= "115200;ttyUL0"
 
 MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
 
@@ -44,6 +44,7 @@ EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-nativ
 
 UBOOT_MACHINE ?= "microblaze-generic_defconfig"
 UBOOT_INITIAL_ENV = ""
+BOOTMODE ?= "generic.root"
 
 HDF_MACHINE = "kc705-microblazeel"
 IMAGE_FSTYPES += "cpio.gz"
diff --git a/meta-xilinx-core/conf/machine/versal-generic.conf b/meta-xilinx-core/conf/machine/versal-generic.conf
index b737f1d1..9b9ebf31 100644
--- a/meta-xilinx-core/conf/machine/versal-generic.conf
+++ b/meta-xilinx-core/conf/machine/versal-generic.conf
@@ -20,6 +20,7 @@ MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost"
 EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native"
 
 UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig"
+BOOTMODE ?= "generic.root"
 
 SERIAL_CONSOLES ?= "115200;ttyAMA0"
 
diff --git a/meta-xilinx-core/conf/machine/versal-net-generic.conf b/meta-xilinx-core/conf/machine/versal-net-generic.conf
new file mode 100644
index 00000000..1941235a
--- /dev/null
+++ b/meta-xilinx-core/conf/machine/versal-net-generic.conf
@@ -0,0 +1,30 @@
+#@TYPE: Machine
+#@NAME: Versal Net Generic
+##@DESCRIPTION: Versal Net
+
+#### Preamble
+MACHINEOVERRIDES =. "${@['', 'versal-net-generic:']['versal-net-generic' != '${MACHINE}']}"
+#### Regular settings follow
+
+SOC_VARIANT = "net"
+
+# Must be set first, or versal-generic will set it
+UBOOT_MACHINE ?= "xilinx_versal_net_virt_defconfig"
+
+require conf/machine/versal-generic.conf
+
+#### REMOVE THE FOLLOWING WHEN BOOTGEN IS SYNCED
+# required for bootgen native/nativesdk
+MACHINEOVERRIDES:class-native = "versal-net"
+MACHINEOVERRIDES:class-nativesdk = "versal-net"
+#### REMOVE THE ABOVE
+
+HDF_MACHINE = "versal-net-generic"
+
+QEMU_HW_DTB_PS =  "${QEMU_HW_DTB_PATH}/board-versal-net-psx-spp-1.4.dtb"
+QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmx-virt.dtb"
+
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' versal_net_generic']['versal-net-generic' != "${MACHINE}"]}"
+
diff --git a/meta-xilinx-core/conf/machine/zynq-generic.conf b/meta-xilinx-core/conf/machine/zynq-generic.conf
index 3c30c362..6ad00d72 100644
--- a/meta-xilinx-core/conf/machine/zynq-generic.conf
+++ b/meta-xilinx-core/conf/machine/zynq-generic.conf
@@ -20,6 +20,7 @@ MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost usbgadget"
 EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native"
 
 UBOOT_MACHINE ?= "xilinx_zynq_virt_defconfig"
+BOOTMODE ?= "generic.root"
 
 SERIAL_CONSOLES ?= "115200;ttyPS0"
 
diff --git a/meta-xilinx-core/conf/machine/zynqmp-generic.conf b/meta-xilinx-core/conf/machine/zynqmp-generic.conf
index 15fe9d11..32de4d50 100644
--- a/meta-xilinx-core/conf/machine/zynqmp-generic.conf
+++ b/meta-xilinx-core/conf/machine/zynqmp-generic.conf
@@ -31,6 +31,7 @@ EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-nativ
 
 UBOOT_MACHINE ?= "xilinx_zynqmp_virt_defconfig"
 SPL_BINARY ?= "spl/boot.bin"
+BOOTMODE ?= "generic.root"
 
 # Default SD image build onfiguration, use qemu-sd to pad
 IMAGE_CLASSES += "image-types-xilinx-qemu"
diff --git a/meta-xilinx-core/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-core/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend
new file mode 100644
index 00000000..151bd0e0
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend
@@ -0,0 +1,18 @@
+# Set Board DTSI files for generic manchine configuration files based on HDF_MACHINE.
+
+# microblaze-generic.conf uses HDF_MACHINE = "kc705-microblazeel", Hence set kc705-full dtsi file.
+YAML_MAIN_MEMORY_CONFIG:microblaze-generic ?= "mig_7series_0"
+YAML_CONSOLE_DEVICE_CONFIG:microblaze-generic ?= "axi_uartlite_0"
+YAML_DT_BOARD_FLAGS:microblaze-generic ?= "{BOARD kc705-full}"
+
+# zynq-generic.conf uses HDF_MACHINE = "zc702-zynq7", Hence set zc702 dtsi file.
+YAML_DT_BOARD_FLAGS:zynq-generic ?= "{BOARD zc702}"
+
+# zynqmp-generic.conf uses HDF_MACHINE = "zcu102-zynqmp", Hence set zcu102-rev1.0 dtsi file.
+YAML_DT_BOARD_FLAGS:zynqmp-generic ?= "{BOARD zcu102-rev1.0}"
+
+# versal-generic.conf file uses HDF_MACHINE = "vck190-versal", Hence set versal-vck190-reva-x-ebm-01-reva dtsi file.
+YAML_DT_BOARD_FLAGS:versal-generic ?= "{BOARD versal-vck190-reva-x-ebm-01-reva}"
+
+# versal-net-generic.conf uses HDF_MACHINE = "versal-net-generic", Hence set versal-net-ipp-rev1.9 dtsi file.
+YAML_DT_BOARD_FLAGS:versal-net-generic ?= "{BOARD versal-net-ipp-rev1.9}"
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc
index ed391160..5efd99ea 100644
--- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc
@@ -14,9 +14,8 @@ B = "${WORKDIR}/build"
 
 SYSROOT_DIRS += "/boot"
 
-XILINX_RELEASE_VERSION ?= ""
 ATF_VERSION ?= "2.2"
-ATF_VERSION_EXTENSION ?= "-xilinx-${XILINX_RELEASE_VERSION}"
+ATF_VERSION_EXTENSION ?= "-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}"
 PV = "${ATF_VERSION}${ATF_VERSION_EXTENSION}+git${SRCPV}"
 
 BRANCH ?= ""
@@ -36,6 +35,7 @@ PACKAGE_ARCH = "${MACHINE_ARCH}"
 
 PLATFORM:zynqmp = "zynqmp"
 PLATFORM:versal = "versal"
+PLATFORM:versal-net = "versal_net"
 
 # requires CROSS_COMPILE set by hand as there is no configure script
 export CROSS_COMPILE="${TARGET_PREFIX}"
@@ -55,6 +55,7 @@ DEBUG_ATF:versal ?= "1"
 
 EXTRA_OEMAKE:append:zynqmp = "${@' ZYNQMP_CONSOLE=${ATF_CONSOLE}' if d.getVar('ATF_CONSOLE', True) != '' else ''}"
 EXTRA_OEMAKE:append:versal = "${@' VERSAL_CONSOLE=${ATF_CONSOLE}' if d.getVar('ATF_CONSOLE', True) != '' else ''}"
+EXTRA_OEMAKE:append:versal-net = "${@' VERSAL_NET_CONSOLE=${ATF_CONSOLE}' if d.getVar('ATF_CONSOLE', True) != '' else ''}"
 EXTRA_OEMAKE:append = " ${@bb.utils.contains('DEBUG_ATF', '1', ' DEBUG=${DEBUG_ATF}', '', d)}"
 
 OUTPUT_DIR = "${@bb.utils.contains('DEBUG_ATF', '1', '${B}/${PLATFORM}/debug', '${B}/${PLATFORM}/release', d)}"
@@ -68,6 +69,9 @@ EXTRA_OEMAKE:append:zynqmp = "${@' ZYNQMP_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.get
 EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}"
 EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}"
 
+EXTRA_OEMAKE:append:versal-net = "${@' VERSAL_NET_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}"
+EXTRA_OEMAKE:append:versal-net = "${@' VERSAL_NET_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}"
+
 ATF_PROVENCORE = "SPD=pncd SPD_PNCD_NS_IRQ=51 ZYNQMP_BL32_MEM_BASE=0x70000000 ZYNQMP_BL32_MEM_SIZE=0x0FF00000"
 EXTRA_OEMAKE:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' ${ATF_PROVENCORE}', '', d)}"
 
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.2.bb
new file mode 100644
index 00000000..7e423b9c
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2022.2.bb
@@ -0,0 +1,8 @@
+ATF_VERSION = "2.6"
+SRCREV = "85544c0159e216935e40174dadfed1296b6042bd"
+BRANCH = "xlnx_rebase_v2.6"
+LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
+
+
+include arm-trusted-firmware.inc
+
diff --git a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb
index 101d4ca2..f80e1feb 100644
--- a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb
+++ b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_1.0.bb
@@ -10,8 +10,8 @@ DEPENDS += "openssl"
 RDEPENDS:${PN} += "openssl"
 
 REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https"
-BRANCH ?= "xlnx_rel_v2022.1"
-SRCREV = "4eac958eb6c831ffa5768a0e2cd4be23c5efe2e0"
+BRANCH ?= "master"
+SRCREV = "d890ba298685b73307a01a9dbcc8702f9afcdbcc"
 
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
 SRC_URI = "${REPO};${BRANCHARG}"
diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr/dfx-mgr.service b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr/dfx-mgr.service
deleted file mode 100644
index 12239266..00000000
--- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr/dfx-mgr.service
+++ /dev/null
@@ -1,15 +0,0 @@
-# SPDX-License-Identifier: MIT
-#
-# DFX manager daemon is used to demonstrate Dynamic Function eXchange (DFX)
-# or partial reconfiguration feature on Xilinx Zynq UltraScale+ and newer.
-# See: UG909 "Vivado Design Suite User Guide Dynamic Function eXchange"
-
-[Unit]
-Description=dfx-mgrd Dynamic Function eXchange
-Documentation=https://github.com/Xilinx/dfx-mgr
-
-[Service]
-ExecStart=/usr/bin/dfx-mgrd
-
-[Install]
-WantedBy=multi-user.target
diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb
index 4bd234ba..6bd24fdf 100644
--- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb
+++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb
@@ -8,8 +8,8 @@ REPO ?= "git://github.com/Xilinx/dfx-mgr.git;protocol=https"
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
 SRC_URI = "${REPO};${BRANCHARG}"
 
-BRANCH = "xlnx_rel_v2022.1"
-SRCREV = "b1a4a2bd4fa72b3fb8e9e8f9c97ef5444bd9fb2a"
+BRANCH = "master"
+SRCREV = "b7fe333513edda99cd84f3a2d26e01aaf4bd5e02"
 SOMAJOR = "1"
 SOMINOR = "0"
 SOVERSION = "${SOMAJOR}.${SOMINOR}"
@@ -23,13 +23,13 @@ S = "${WORKDIR}/git"
 inherit cmake update-rc.d systemd
 
 DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm"
+RDEPENDS:${PN} += " fru-print"
 EXTRA_OECMAKE += " \
                -DCMAKE_SYSROOT:PATH=${RECIPE_SYSROOT} \
                 "
 INITSCRIPT_NAME = "dfx-mgr.sh"
 INITSCRIPT_PARAMS = "start 99 S ."
 
-SRC_URI:append = " file://dfx-mgr.service"
 SYSTEMD_PACKAGES="${PN}"
 SYSTEMD_SERVICE:${PN}="dfx-mgr.service"
 SYSTEMD_AUTO_ENABLE:${PN}="enable"
@@ -47,7 +47,7 @@ do_install(){
         chrpath -d ${D}${bindir}/dfx-mgrd
         chrpath -d ${D}${bindir}/dfx-mgr-client
         install -m 0644 ${S}/src/dfxmgr_client.h ${D}${includedir}
-        
+
         oe_soinstall ${B}/src/libdfx-mgr.so.${SOVERSION} ${D}${libdir}
 
         install -m 0755 ${S}/src/daemon.conf ${D}${sysconfdir}/dfx-mgrd/
@@ -57,9 +57,11 @@ do_install(){
                 install -m 0755 ${S}/src/dfx-mgr.sh ${D}${sysconfdir}/init.d/
         fi
 
-        install -m 0755 ${S}/src/dfx-mgr.sh ${D}${bindir}/
-        install -d ${D}${systemd_system_unitdir} 
-        install -m 0644 ${WORKDIR}/dfx-mgr.service ${D}${systemd_system_unitdir}
+        install -m 0755 ${S}/src/dfx-mgr.sh ${D}${bindir}
+        install -m 0755 ${S}/src/scripts/xlnx-firmware-detect ${D}${bindir}
+
+        install -d ${D}${systemd_system_unitdir}
+        install -m 0644 ${S}/src/dfx-mgr.service ${D}${systemd_system_unitdir}
 }
 
 PACKAGES =+ "libdfx-mgr"
diff --git a/meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c b/meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c
index e4fb1d2f..04777a91 100644
--- a/meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c
+++ b/meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c
@@ -1,6 +1,7 @@
 /******************************************************************************
  *
- * Copyright (C) 2019-2020 Xilinx, Inc.  All rights reserved.
+ * Copyright (C) 2019-2022 Xilinx, Inc.  All rights reserved.
+ * Copyright (C) 2022 Advanced Micro Devices, Inc.  All rights reserved.
  *
  *  Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -91,7 +92,7 @@ void print_usage(char *prg)
         fprintf(stderr, "                                Device Tree\n");
         if (iszynqmp)
         {
-                fprintf(stderr, "                               Default: <Full>\n");
+                fprintf(stderr, "                               Default: <full>\n");
                 fprintf(stderr, "         -s <secure flags>     Optional: <Secure flags>\n");
                 fprintf(stderr, "                                  s := <AuthDDR | AuthOCM | EnUsrKey | EnDevKey | AuthEnUsrKeyDDR | AuthEnUsrKeyOCM | AuthEnDevKeyDDR | AuthEnDevKeyOCM>\n");
                 fprintf(stderr, "         -k <AesKey>           Optional: <AES User Key>\n");
@@ -107,7 +108,7 @@ void print_usage(char *prg)
         fprintf(stderr, " \n");
         fprintf(stderr, "Examples:\n");
         fprintf(stderr, "(Load Full bitstream using Overlay)\n");
-        fprintf(stderr, "%s -b top.bit.bin -o can.dtbo -f Full -n Full \n", prg);
+        fprintf(stderr, "%s -b top.bit.bin -o can.dtbo -f Full -n full \n", prg);
         fprintf(stderr, "(Load Partial bitstream using Overlay)\n");
         fprintf(stderr, "%s -b rm0.bit.bin -o rm0.dtbo -f Partial -n PR0\n", prg);
         fprintf(stderr, "(Load Full bitstream using sysfs interface)\n");
@@ -127,7 +128,7 @@ void print_usage(char *prg)
         fprintf(stderr, "(Remove Partial Overlay)\n");
         fprintf(stderr, "%s -R -n PR0\n", prg);
         fprintf(stderr, "(Remove Full Overlay)\n");
-        fprintf(stderr, "%s -R -n Full\n", prg);
+        fprintf(stderr, "%s -R -n full\n", prg);
         fprintf(stderr, "Note: %s -R is responsible for only removing the dtbo file from the livetree. it will not remove the PL logic from the FPGA region.\n", prg);
         fprintf(stderr, " \n");
 }
diff --git a/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb b/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb
index 416edf17..d22c995c 100644
--- a/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb
+++ b/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb
@@ -1,7 +1,7 @@
 SUMMARY = "Install user script to support fpga-manager"
 DESCRIPTION = "Install user script that loads and unloads overlays using kernel fpga-manager"
 LICENSE = "Proprietary"
-LIC_FILES_CHKSUM = "file://${WORKDIR}/fpgautil.c;beginline=1;endline=24;md5=8010e59a286b1e3a73a9fdd93bd18778"
+LIC_FILES_CHKSUM = "file://${WORKDIR}/fpgautil.c;beginline=1;endline=24;md5=0c02eabf57dba52842c5df9b96bccfae"
 
 SRC_URI = "\
         file://fpgautil.c \
diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb
index 36cfcd28..54f04d82 100644
--- a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb
+++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb
@@ -4,11 +4,11 @@ DESCRIPTION = "Xilinx libdfx Library and headers"
 LICENSE = "MIT & GPL-2.0-or-later"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=94aba86aec117f003b958a52f019f1a7"
 
-BRANCH ?= "xlnx_rel_v2022.1"
+BRANCH ?= "master"
 REPO ?= "git://github.com/Xilinx/libdfx.git;protocol=https"
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
 SRC_URI = "${REPO};${BRANCHARG}"
-SRCREV = "96d8462a72b9b64e1057f8864795b5f60a2fc884"
+SRCREV = "cb36032844b3845ad28007404d0566184504c03f"
 
 COMPATIBLE_MACHINE = "^$"
 COMPATIBLE_MACHINE:zynqmp = "zynqmp"
diff --git a/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native_2022.2.bb b/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native_2022.2.bb
new file mode 100644
index 00000000..44ad9368
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native_2022.2.bb
@@ -0,0 +1,27 @@
+SUMMARY = "PMU ROM for QEMU"
+DESCRIPTION = "The ZynqMP PMU ROM for QEMU emulation"
+HOMEPAGE = "http://www.xilinx.com"
+SECTION = "bsp"
+
+LICENSE = "Proprietary"
+LICENSE_FLAGS = "xilinx"
+LIC_FILES_CHKSUM = "file://PMU_ROM-LICENSE.txt;md5=d43d49bc1eb1c907fc6f4ea75abafdfc"
+
+SRC_URI = "https://www.xilinx.com/bin/public/openDownload?filename=PMU_ROM.tar.gz"
+SRC_URI[sha256sum] = "f9a450ef960979463ea0a87a35fafb4a5b62d3a741de30cbcef04c8edc22a7cf"
+
+S = "${WORKDIR}/PMU_ROM"
+
+inherit deploy native
+
+INHIBIT_DEFAULT_DEPS = "1"
+
+do_configure[noexec] = "1"
+do_compile[noexec] = "1"
+do_install[noexec] = "1"
+
+do_deploy () {
+        install -D ${S}/pmu-rom.elf ${DEPLOYDIR}/pmu-rom.elf
+}
+
+addtask deploy before do_build after do_install
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc
index 5a9a0868..8971d58f 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc
@@ -2,8 +2,8 @@ require recipes-bsp/u-boot/u-boot.inc
 
 DEPENDS += "bc-native dtc-native bison-native xxd-native"
 
-XILINX_RELEASE_VERSION ?= ""
-UBOOT_VERSION_EXTENSION ?= "-xilinx-${XILINX_RELEASE_VERSION}"
+# Use the name of the .bb for the extension
+UBOOT_VERSION_EXTENSION ?= "-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}"
 PV = "${UBOOT_VERSION}${UBOOT_VERSION_EXTENSION}+git${SRCPV}"
 
 UBOOTURI ?= "git://github.com/Xilinx/u-boot-xlnx.git;protocol=https"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.2.bb
new file mode 100644
index 00000000..46bfd5b9
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2022.2.bb
@@ -0,0 +1,19 @@
+UBOOT_VERSION = "v2021.01"
+
+UBRANCH ?= "master"
+
+SRCREV = "f2402773e2d82aafc08ac39c03f3bc430c014703"
+
+include u-boot-xlnx.inc
+include u-boot-spl-zynq-init.inc
+
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
+
+# u-boot-xlnx has support for these
+HAS_PLATFORM_INIT ?= " \
+                xilinx_zynqmp_virt_config \
+                xilinx_zynq_virt_defconfig \
+                xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \
+                "
+
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr.bb
index cf1ba209..8a3a5db6 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr.bb
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr.bb
@@ -27,7 +27,7 @@ KERNEL_BOOTCMD:zynq ?= "bootm"
 KERNEL_BOOTCMD:versal ?= "booti"
 KERNEL_BOOTCMD:microblaze ?= "bootm"
 
-BOOTMODE ?= "generic"
+BOOTMODE ??= "generic"
 BOOTFILE_EXT ?= ""
 
 #Make this value to "1" to skip appending base address to ddr offsets.
@@ -43,6 +43,7 @@ SRC_URI = " \
             file://boot.cmd.sd.versal \
             file://boot.cmd.qspi.versal \
             file://boot.cmd.generic \
+            file://boot.cmd.generic.root \
             file://boot.cmd.ubifs \
             file://pxeboot.pxe \
             "
@@ -159,7 +160,15 @@ NAND_FIT_IMAGE_OFFSET ?= "0x4180000"
 NAND_FIT_IMAGE_OFFSET:zynq ?= "0x1080000"
 NAND_FIT_IMAGE_SIZE ?= "0x6400000"
 
-SDBOOTDEV ?= "0"
+# Default to booting with the rootfs device being partition 2 for SD/eMMC
+PARTNUM ?= "2"
+
+# Set Kernel root filesystem parameter for SD/eMMC boot
+# Bootdev will automatically be set to 'sda' or 'mmcblkXp'
+KERNEL_ROOT_SD ?= "root=/dev/\${bootdev}${PARTNUM} ro rootwait"
+
+# Set Kernel root filesystem parameter for JTAG/QSPI/OSPI/NAND(using RAMDISK) boot
+KERNEL_ROOT_RAMDISK ?= "root=/dev/ram0 rw"
 
 BITSTREAM_LOAD_ADDRESS ?= "0x100000"
 
@@ -217,6 +226,9 @@ do_compile() {
         -e 's/@@UENV_MMC_LOAD_ADDRESS@@/${UENV_MMC_LOAD_ADDRESS}/' \
         -e 's/@@UENV_TEXTFILE@@/${UENV_TEXTFILE}/' \
         -e 's/@@RAMDISK_IMAGE1@@/${RAMDISK_IMAGE1}/' \
+        -e 's/@@PARTNUM@@/${PARTNUM}/' \
+        -e 's:@@KERNEL_ROOT_SD@@:${KERNEL_ROOT_SD}:' \
+        -e 's:@@KERNEL_ROOT_RAMDISK@@:${KERNEL_ROOT_RAMDISK}:' \
         "${WORKDIR}/boot.cmd.${BOOTMODE}${BOOTFILE_EXT}" > "${WORKDIR}/boot.cmd"
     mkimage -A arm -T script -C none -n "Boot script" -d "${WORKDIR}/boot.cmd" boot.scr
     sed -e 's/@@KERNEL_IMAGETYPE@@/${KERNEL_IMAGETYPE}/' \
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.generic.root b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.generic.root
new file mode 100644
index 00000000..ca90cbe1
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.generic.root
@@ -0,0 +1,98 @@
+# This is a boot script for U-Boot with generic root parameters used by yocto machine configuration file.
+# Generate boot.scr:
+# mkimage -c none -A arm -T script -d boot.cmd.default boot.scr
+#
+################
+fitimage_name=@@FIT_IMAGE@@
+kernel_name=@@KERNEL_IMAGE@@
+ramdisk_name=@@RAMDISK_IMAGE1@@
+rootfs_name=@@RAMDISK_IMAGE@@
+@@PRE_BOOTENV@@
+
+for boot_target in ${boot_targets};
+do
+        echo "Trying to load boot images from ${boot_target}"
+        if test "${boot_target}" = "jtag" ; then
+                fdt addr @@DEVICETREE_ADDRESS@@
+                fdt get value bootargs /chosen bootargs
+                setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
+        fi
+        if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" || test "${boot_target}" = "usb0" || test "${boot_target}" = "usb1"; then
+                if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1"; then
+                        setenv bootdev mmcblk${devnum}p
+                fi
+                if test "${boot_target}" = "usb0" || test "${boot_target}" = "usb1"; then
+                        setenv bootdev sda
+                fi
+
+                if test -e ${devtype} ${devnum}:${distro_bootpart} /@@UENV_TEXTFILE@@; then
+                        fatload ${devtype} ${devnum}:${distro_bootpart} @@UENV_MMC_LOAD_ADDRESS@@ @@UENV_TEXTFILE@@;
+                        echo "Importing environment(@@UENV_TEXTFILE@@) from ${boot_target}..."
+                        env import -t @@UENV_MMC_LOAD_ADDRESS@@ $filesize
+                        if test -n $uenvcmd; then
+                                echo "Running uenvcmd ...";
+                                run uenvcmd;
+                        fi
+                fi
+                if test -e ${devtype} ${devnum}:${distro_bootpart} /${fitimage_name}; then
+                        fatload ${devtype} ${devnum}:${distro_bootpart} @@FIT_IMAGE_LOAD_ADDRESS@@ ${fitimage_name};
+                        echo "Kernel root filesystem parameter needs to be set for FITIMAGE boot if not defined in DTB"
+                        bootm @@FIT_IMAGE_LOAD_ADDRESS@@;
+                fi
+                if test -e ${devtype} ${devnum}:${distro_bootpart} /${kernel_name}; then
+                        fatload ${devtype} ${devnum}:${distro_bootpart} @@KERNEL_LOAD_ADDRESS@@ ${kernel_name};
+                fi
+                if test -e ${devtype} ${devnum}:${distro_bootpart} /system.dtb; then
+                        fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_ADDRESS@@ system.dtb;
+                fi
+                if test -e ${devtype} ${devnum}:${distro_bootpart} /${ramdisk_name} && test "${skip_tinyramdisk}" != "yes"; then
+                        fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${ramdisk_name};
+                        fdt addr @@DEVICETREE_ADDRESS@@
+                        fdt get value bootargs /chosen bootargs
+                        setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                        @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
+                fi
+                if test -e ${devtype} ${devnum}:${distro_bootpart} /${rootfs_name} && test "${skip_ramdisk}" != "yes"; then
+                        fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${rootfs_name};
+                        fdt addr @@DEVICETREE_ADDRESS@@
+                        fdt get value bootargs /chosen bootargs
+                        setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                        @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
+                fi
+                fdt addr @@DEVICETREE_ADDRESS@@
+                fdt get value bootargs /chosen bootargs
+                setenv bootargs $bootargs @@KERNEL_ROOT_SD@@
+                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@
+        fi
+        if test "${boot_target}" = "xspi0" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then
+                sf probe 0 0 0;
+                sf read @@FIT_IMAGE_LOAD_ADDRESS@@ @@QSPI_FIT_IMAGE_OFFSET@@ @@QSPI_FIT_IMAGE_SIZE@@
+                echo "Kernel root filesystem parameter needs to be set for FITIMAGE boot if not defined in DTB"
+                bootm @@FIT_IMAGE_LOAD_ADDRESS@@;
+                echo "Booting using Fit image failed"
+
+                sf read @@KERNEL_LOAD_ADDRESS@@ @@QSPI_KERNEL_OFFSET@@ @@QSPI_KERNEL_SIZE@@
+                sf read @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_OFFSET@@ @@QSPI_RAMDISK_SIZE@@
+                fdt addr @@DEVICETREE_ADDRESS@@
+                fdt get value bootargs /chosen bootargs
+                setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@;
+                echo "Booting using Separate images failed"
+        fi
+        if test "${boot_target}" = "nand" || test "${boot_target}" = "nand0"; then
+                nand info;
+                nand read @@FIT_IMAGE_LOAD_ADDRESS@@ @@NAND_FIT_IMAGE_OFFSET@@ @@NAND_FIT_IMAGE_SIZE@@
+                echo "Kernel root filesystem parameter needs to be set for FITIMAGE boot if not defined in DTB"
+                bootm @@FIT_IMAGE_LOAD_ADDRESS@@;
+                echo "Booting using Fit image failed"
+
+                nand read @@KERNEL_LOAD_ADDRESS@@ @@NAND_KERNEL_OFFSET@@ @@NAND_KERNEL_SIZE@@
+                nand read @@RAMDISK_IMAGE_ADDRESS@@ @@NAND_RAMDISK_OFFSET@@ @@NAND_RAMDISK_SIZE@@
+                fdt addr @@DEVICETREE_ADDRESS@@
+                fdt get value bootargs /chosen bootargs
+                setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@;
+                echo "Booting using Separate images failed"
+        fi
+done
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc
index 87d90a50..b08b414f 100644
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc
@@ -7,10 +7,7 @@ inherit deploy
 
 LIC_FILES_CHKSUM = "file://Makefile;beginline=1;endline=27;md5=7348b6cbcae69912cb1dee68d6c68d99"
 
-PV = "xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
-
-FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
-SRC_URI:append = " file://0001-Makefile-Use-python3-instead-of-python.patch"
+PV = "xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
 
 REPO ?= "git://github.com/Xilinx/qemu-devicetrees.git;protocol=https"
 
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb
index e2f134fe..7c734cd6 100644
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.1.bb
@@ -3,3 +3,6 @@ require qemu-devicetrees.inc
 
 BRANCH ?= "xlnx_rel_v2022.1"
 SRCREV ?= "0499324af1178057c3730b0989c8fb5c5bbc4cf8"
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
+SRC_URI:append = " file://0001-Makefile-Use-python3-instead-of-python.patch"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.2.bb
new file mode 100644
index 00000000..c7719866
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2022.2.bb
@@ -0,0 +1,6 @@
+
+require qemu-devicetrees.inc
+
+BRANCH ?= "master"
+SRCREV ?= "42d0b7e24fbd1adc72fb2d0e70e06ff332278468"
+
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.2.bb
new file mode 100644
index 00000000..5e6c2d28
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2022.2.bb
@@ -0,0 +1,7 @@
+require qemu-xilinx-native.inc
+BPN = "qemu-xilinx"
+
+EXTRA_OECONF:append = " --target-list=${@get_qemu_usermode_target_list(d)} --disable-tools --disable-blobs --disable-guest-agent"
+
+PROVIDES = "qemu-native"
+PACKAGECONFIG ??= "pie"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.2.bb
new file mode 100644
index 00000000..f177872a
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2022.2.bb
@@ -0,0 +1,20 @@
+require qemu-xilinx-native.inc
+
+PROVIDES = "qemu-system-native"
+
+EXTRA_OECONF:append = " --target-list=${@get_qemu_system_target_list(d)}"
+
+PACKAGECONFIG ??= "fdt alsa kvm pie"
+
+PACKAGECONFIG:remove = "${@'kvm' if not os.path.exists('/usr/include/linux/kvm.h') else ''}"
+
+DEPENDS += "pixman-native qemu-xilinx-native bison-native ninja-native meson-native"
+
+do_install:append() {
+    # The following is also installed by qemu-native
+    rm -f ${D}${datadir}/qemu/trace-events-all
+    rm -rf ${D}${datadir}/qemu/keymaps
+    rm -rf ${D}${datadir}/icons
+    rm -rf ${D}${includedir}/qemu-plugin.h
+}
+
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc
index d42aa484..0dde8023 100644
--- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc
@@ -11,12 +11,12 @@ LIC_FILES_CHKSUM = " \
 DEPENDS = "glib-2.0 zlib pixman bison-native ninja-native meson-native"
 
 XILINX_QEMU_VERSION ?= "v6.1.0"
-BRANCH ?= "xlnx_rel_v2022.1"
-SRCREV = "52a9b22faeb149a6b17646b1f912f06ea6c269ca"
+BRANCH ?= "master"
+SRCREV = "fbcb55665e9f5f91110ba2a44f62be9bc72752ee"
 
 FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
 
-PV = "${XILINX_QEMU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV = "${XILINX_QEMU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
 REPO ?= "gitsm://github.com/Xilinx/qemu.git;protocol=https"
 
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.2.bb
new file mode 100644
index 00000000..4983b4df
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2022.2.bb
@@ -0,0 +1,17 @@
+require recipes-devtools/qemu/qemu.inc
+require qemu-xilinx.inc
+
+BBCLASSEXTEND = "nativesdk"
+
+RDEPENDS:${PN}:class-target += "bash"
+
+PROVIDES:class-nativesdk = "nativesdk-qemu"
+RPROVIDES:${PN}:class-nativesdk = "nativesdk-qemu"
+
+EXTRA_OECONF:append:class-target = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-nativesdk = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-target:mipsarcho32 = "${@bb.utils.contains('BBEXTENDCURR', 'multilib', ' --disable-capstone', '', d)}"
+
+do_install:append:class-nativesdk() {
+    ${@bb.utils.contains('PACKAGECONFIG', 'gtk+', 'make_qemu_wrapper', '', d)}
+}
diff --git a/meta-xilinx-core/recipes-graphics/wayland/files/weston.service b/meta-xilinx-core/recipes-graphics/wayland/files/weston.service
index c58e0668..c7583e92 100644
--- a/meta-xilinx-core/recipes-graphics/wayland/files/weston.service
+++ b/meta-xilinx-core/recipes-graphics/wayland/files/weston.service
@@ -41,8 +41,8 @@ TimeoutStartSec=60
 WatchdogSec=20
 
 # The user to run Weston as.
-User=root
-Group=root
+User=weston
+Group=weston
 
 # Make sure the working directory is the users home directory
 WorkingDirectory=/home/weston
diff --git a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_git.bb b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_git.bb
index ae5f98d9..ce898075 100755
--- a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_git.bb
+++ b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_git.bb
@@ -4,14 +4,14 @@ SECTION = "kernel/modules"
 LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
 
-XLNX_DP_VERSION = "5.15.19"
+XLNX_DP_VERSION = "5.10.0"
 PV = "${XLNX_DP_VERSION}"
 
 S = "${WORKDIR}/git"
 
-BRANCH ?= "xlnx_rel_v2022.1"
+BRANCH ?= "master"
 REPO   ?= "git://github.com/xilinx/dp-modules.git;protocol=https"
-SRCREV ?= "9a025fdb7134a8af12de8d69f5a428c8284ae9b3"
+SRCREV ?= "c57b2ce95ee6c86f35caecbc7007644ff8f6d337"
 
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
 SRC_URI = "${REPO};${BRANCHARG}"
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-microblaze.inc b/meta-xilinx-core/recipes-kernel/linux/linux-microblaze.inc
index 4555bc28..efd21a18 100644
--- a/meta-xilinx-core/recipes-kernel/linux/linux-microblaze.inc
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-microblaze.inc
@@ -1,4 +1,7 @@
-SRC_URI += "file://mb-no-tree-loop-distribute-patterns.patch"
+SRC_URI += " \
+    file://mb-no-tree-loop-distribute-patterns.patch \
+    file://microblaze_generic.cfg \
+    "
 
 # MicroBlaze is a uImage target, but its not called 'uImage' instead it is called 'linux.bin.ub'
 python () {
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc
index adefabea..2edebe8e 100644
--- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc
@@ -1,13 +1,12 @@
 # This version extension should match CONFIG_LOCALVERSION in defconfig
-XILINX_RELEASE_VERSION ?= ""
-LINUX_VERSION_EXTENSION ?= "-xilinx-${XILINX_RELEASE_VERSION}"
+LINUX_VERSION_EXTENSION ?= "-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}"
 PV = "${LINUX_VERSION}+git${SRCPV}"
 
 # Sources, by default allow for the use of SRCREV pointing to orphaned tags/commits
 KBRANCH ?= "xlnx_rebase_v5.15_LTS"
 SRCBRANCHARG = "${@['nobranch=1', 'branch=${KBRANCH}'][d.getVar('KBRANCH', True) != '']}"
 
-FILESOVERRIDES:append = ":${XILINX_RELEASE_VERSION}"
+FILESOVERRIDES:append := ":${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}"
 KERNELURI ?= "git://github.com/Xilinx/linux-xlnx.git;protocol=https;name=machine"
 YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-5.15;destsuffix=yocto-kmeta"
 SRC_URI = "${KERNELURI};${SRCBRANCHARG} ${YOCTO_META}"
@@ -53,6 +52,7 @@ KBUILD_DEFCONFIG:zynqmp ?= "xilinx_defconfig"
 KBUILD_DEFCONFIG:zynq ?= "xilinx_zynq_defconfig"
 KBUILD_DEFCONFIG:microblaze ?= "mmu_defconfig"
 KBUILD_DEFCONFIG:versal ?= "xilinx_defconfig"
+KBUILD_DEFCONFIG:versal-net ?= "xilinx_versal_net_defconfig"
 
 KERNEL_FEATURES:append:zynqmp = "${@bb.utils.contains('DISTRO_FEATURES', 'xen', ' features/xen/xen.scc', '', d)}"
 
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/microblaze_generic.cfg b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/microblaze_generic.cfg
new file mode 100644
index 00000000..6ec6a997
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/microblaze_generic.cfg
@@ -0,0 +1,18 @@
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_DP83867_PHY=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_NET_CORE=y
+CONFIG_XILINX_PHY=y
+CONFIG_XILINX_MICROBLAZE0_FAMILY="kintex7"
+CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
+CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
+CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
+CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
+CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2
+CONFIG_XILINX_MICROBLAZE0_USE_FPU=1
+CONFIG_XILINX_MICROBLAZE0_HW_VER="11.0"
+CONFIG_KERNEL_BASE_ADDR=0x80000000
+CONFIG_CMDLINE="console=ttyUL0,115200 earlycon root=/dev/ram0 rw"
+CONFIG_BLK_DEV_INITRD=y
\ No newline at end of file
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.2.bb
new file mode 100644
index 00000000..3551fb8b
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2022.2.bb
@@ -0,0 +1,9 @@
+LINUX_VERSION = "5.15.36"
+KBRANCH="xlnx_rebase_v5.15_LTS"
+SRCREV = "2ddbacde6539be25b5717af5705a0d0009d6b2d3"
+
+KCONF_AUDIT_LEVEL="0"
+
+include linux-xlnx.inc
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.1.bb
index 3b683eda..0cb0c0ef 100644
--- a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu.bb
+++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.1.bb
@@ -5,7 +5,7 @@ LICENSE = "GPL-2.0-only"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
 
 XILINX_VCU_VERSION = "1.0.0"
-PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
 
 S = "${WORKDIR}/git"
 
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.2.bb
new file mode 100644
index 00000000..77f00534
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2022.2.bb
@@ -0,0 +1,40 @@
+SUMMARY = "Linux kernel module for Video Code Unit"
+DESCRIPTION = "Out-of-tree VCU decoder, encoder and common kernel modules provider for MPSoC EV devices"
+SECTION = "kernel/modules"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+
+S = "${WORKDIR}/git"
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+
+BRANCH = "xlnx_rel_v2022.1"
+REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https"
+SRCREV = "9d2657550eccebccce08cacfcdd369367b9f6be4"
+
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = " \
+    ${REPO};${BRANCHARG} \
+    file://99-vcu-enc-dec.rules \
+    "
+
+inherit module
+
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+
+RDEPENDS:${PN} = "vcu-firmware"
+
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+
+KERNEL_MODULE_AUTOLOAD += "dmaproxy"
+
+do_install:append() {
+    install -d ${D}${sysconfdir}/udev/rules.d
+    install -m 0644 ${WORKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/
+}
+
+FILES:${PN} = "${sysconfdir}/udev/rules.d/*"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx.bb b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.1.bb
index 958183a0..b4460a38 100644
--- a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx.bb
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.1.bb
@@ -4,7 +4,7 @@ LICENSE = "Proprietary"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
 
 XILINX_VCU_VERSION = "1.0.0"
-PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
 
 BRANCH ?= "xlnx_rel_v2022.1"
 REPO   ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.2.bb
new file mode 100644
index 00000000..b4460a38
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2022.2.bb
@@ -0,0 +1,50 @@
+SUMMARY = "OpenMAX Integration layer for VCU"
+DESCRIPTION = "OMX IL Libraries,test applications and headers for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
+
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+
+BRANCH ?= "xlnx_rel_v2022.1"
+REPO   ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https"
+SRCREV = "b3308c608be7ed9250b9c6732f6e0a02b1a2e985"
+
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+
+S  = "${WORKDIR}/git"
+
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+
+DEPENDS = "libvcu-xlnx"
+RDEPENDS:${PN} = "kernel-module-vcu libvcu-xlnx"
+
+EXTERNAL_INCLUDE="${STAGING_INCDIR}/vcu-ctrl-sw/include"
+
+EXTRA_OEMAKE = " \
+    CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \
+    EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \
+    "
+
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-omx-il
+
+    install -m 0644 ${S}/omx_header/*.h ${D}${includedir}/vcu-omx-il
+
+    install -Dm 0755 ${S}/bin/omx_decoder ${D}/${bindir}/omx_decoder
+    install -Dm 0755 ${S}/bin/omx_encoder ${D}/${bindir}/omx_encoder
+
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_encoder ${D}/${libdir}/
+}
+
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.1.bb
index 5608e5a8..91f15cc2 100644
--- a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx.bb
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.1.bb
@@ -4,7 +4,7 @@ LICENSE = "Proprietary"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
 
 XILINX_VCU_VERSION = "1.0.0"
-PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
 
 BRANCH ?= "xlnx_rel_v2022.1"
 REPO   ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.2.bb
new file mode 100644
index 00000000..91f15cc2
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2022.2.bb
@@ -0,0 +1,42 @@
+SUMMARY = "Control Software for VCU"
+DESCRIPTION = "Control software libraries, test applications and headers provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493"
+
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+
+BRANCH ?= "xlnx_rel_v2022.1"
+REPO   ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https"
+SRCREV = "5bf158af204b181f00ac009c8745557642ecfe5f"
+
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+
+S  = "${WORKDIR}/git"
+
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+
+RDEPENDS:${PN} = "kernel-module-vcu"
+
+EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'"
+
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-ctrl-sw/include
+
+    install -Dm 0755 ${S}/bin/ctrlsw_encoder ${D}/${bindir}/ctrlsw_encoder
+    install -Dm 0755 ${S}/bin/ctrlsw_decoder ${D}/${bindir}/ctrlsw_decoder
+
+    oe_runmake install_headers INSTALL_HDR_PATH=${D}${includedir}/vcu-ctrl-sw/include
+    oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so liballegro_encode ${D}/${libdir}/
+}
+
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware.bb b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.1.bb
index 0013134d..fc9f34ca 100644
--- a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware.bb
+++ b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.1.bb
@@ -4,7 +4,7 @@ LICENSE = "Proprietary"
 LIC_FILES_CHKSUM = "file://LICENSE;md5=63b45903a9a50120df488435f03cf498"
 
 XILINX_VCU_VERSION = "1.0.0"
-PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
 
 S  = "${WORKDIR}/git"
 
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.2.bb
new file mode 100644
index 00000000..fc9f34ca
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2022.2.bb
@@ -0,0 +1,39 @@
+SUMMARY = "Firmware for VCU"
+DESCRIPTION = "Firmware binaries provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=63b45903a9a50120df488435f03cf498"
+
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+
+S  = "${WORKDIR}/git"
+
+BRANCH ?= "xlnx_rel_v2022.1"
+REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https"
+SRCREV = "569f980527fd58f43baf16bd0b294bf8c7cdf963"
+
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI   = "${REPO};${BRANCHARG}"
+
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+
+do_install() {
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d_b.fw ${D}/lib/firmware/al5d_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d.fw ${D}/lib/firmware/al5d.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e_b.fw ${D}/lib/firmware/al5e_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e.fw ${D}/lib/firmware/al5e.fw
+}
+
+# Inhibit warnings about files being stripped
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+FILES:${PN} = "/lib/firmware/*"
+
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+
+INSANE_SKIP:${PN} = "ldflags"
diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc
index da09ec0f..ba42fd5f 100644
--- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc
+++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc
@@ -2,6 +2,7 @@ REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https"
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
 SRC_URI = "${REPO};${BRANCHARG}"
 
-BRANCH= "2022.1"
-SRCREV= "2a6dc026480914ea1c9f02977a6ab4b57e8a3c8d"
-PV = "202210.2.13.0"
+BRANCH= "master"
+SRCREV= "910828b3abdbf66b10cb6efc952e75df64962340"
+PV = "202220.2.14.0"
+
diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb
index f55b83ae..b8071a65 100644
--- a/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb
+++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb
@@ -8,12 +8,11 @@ LIC_FILES_CHKSUM = "file://../LICENSE;md5=da5408f748bce8a9851dac18e66f4bcf \
                     file://runtime_src/core/edge/drm/zocl/LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8 \
                     file://runtime_src/core/pcie/driver/linux/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
                     file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \
-                    file://runtime_src/core/pcie/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 \
-                    file://runtime_src/core/edge/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 "
+                    file://runtime_src/core/tools/xbutil2/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 "
 
 S = "${WORKDIR}/git/src"
 
-inherit cmake pkgconfig
+inherit cmake
 
 BBCLASSEXTEND = "native nativesdk"
 
@@ -41,7 +40,8 @@ FILES:${PN} += "\
     ${libdir}/lib*.so \
     ${libdir}/lib*.so.* \
     ${libdir}/ps_kernels_lib \
-    /lib/*.so* "
+    /lib/*.so* \
+    ${datadir}"
 INSANE_SKIP:${PN} += "dev-so"
 
 pkg_postinst_ontarget:${PN}() {
diff --git a/meta-xilinx-standalone-experimental/classes/esw.bbclass b/meta-xilinx-standalone-experimental/classes/esw.bbclass
index 78cb289c..0b179a61 100644
--- a/meta-xilinx-standalone-experimental/classes/esw.bbclass
+++ b/meta-xilinx-standalone-experimental/classes/esw.bbclass
@@ -64,6 +64,7 @@ def get_xlnx_cmake_processor(tune, machine, d):
 XLNX_CMAKE_MACHINE = "${@get_xlnx_cmake_machine(d.getVar('SOC_FAMILY'), d)}"
 XLNX_CMAKE_PROCESSOR = "${@get_xlnx_cmake_processor(d.getVar('DEFAULTTUNE'), d.getVar('ESW_MACHINE'), d)}"
 XLNX_CMAKE_SYSTEM_NAME ?= "Generic"
+XLNX_CMAKE_BSP_VARS ?= ""
 
 cmake_do_generate_toolchain_file:append() {
     cat >> ${WORKDIR}/toolchain.cmake <<EOF
@@ -75,6 +76,7 @@ cmake_do_generate_toolchain_file:append() {
     # Will need this in the future to make cmake understand esw variables
     # set( CMAKE_SYSTEM_NAME `echo elf | sed -e 's/^./\u&/' -e 's/^\(Linux\).*/\1/'` )
     set( CMAKE_SYSTEM_NAME "${XLNX_CMAKE_SYSTEM_NAME}" )
+    add_definitions( "${XLNX_CMAKE_BSP_VARS}" )
 EOF
 }
 
diff --git a/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf-example_git.bb b/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf-example_git.bb
index 9f1e8baa..ad2d5c47 100644
--- a/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf-example_git.bb
+++ b/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf-example_git.bb
@@ -2,7 +2,7 @@ inherit esw deploy
 
 ESW_COMPONENT_SRC = "/lib/sw_services/xilpuf/examples/"
 
-DEPENDS += "xilpuf"
+DEPENDS += "xilpuf xilsecure"
 
 do_configure:prepend() {
     (
diff --git a/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf_git.bb b/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf_git.bb
index 4f9332c7..266503d1 100644
--- a/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf_git.bb
+++ b/meta-xilinx-standalone-experimental/recipes-libraries/xilpuf_git.bb
@@ -3,4 +3,4 @@ inherit esw
 ESW_COMPONENT_SRC = "/lib/sw_services/xilpuf/src/"
 ESW_COMPONENT_NAME = "libxilpuf.a"
 
-DEPENDS += "libxil xiltimer xilplmi"
+DEPENDS += "libxil xiltimer ${@'xilplmi' if d.getVar('ESW_MACHINE') == 'microblaze-plm' else 'xilmailbox'}"
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index b3fde2d4..403369b1 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -3,40 +3,21 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master'
 
 REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https"
 
-ESW_BRANCH[2019.1] = "release-2019.1"
-ESW_BRANCH[2019.2] = "release-2019.2"
-ESW_BRANCH[2020.1] = "release-2020.1"
-ESW_BRANCH[2020.2] = "master-rel-2020.2"
-ESW_BRANCH[2021.1] = "xlnx_rel_v2021.1"
-ESW_BRANCH[2021.2] = "xlnx_rel_v2021.2"
 ESW_BRANCH[2022.1] = "xlnx_rel_v2022.1_update"
-ESW_BRANCH[git]    = "master-next"
+ESW_BRANCH[2022.2] = "xlnx_rel_v2022.2-next"
 BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}"
 
-ESW_REV[2019.1] = "26c14d9861010a0e3a55c73fb79efdb816eb42ca"
-ESW_REV[2019.2] = "e8db5fb118229fdc621e0ec7848641a23bf60998"
-ESW_REV[2020.1] = "338150ab3628a1ea6b06e964b16e712b131882dd"
-ESW_REV[2020.2] = "2516d5ed8161e16c2813b0e8e4ceac693f23de5c"
-ESW_REV[2021.1] = "d37a0e8824182597abf31ac3f1087a5321b33ad7"
-ESW_REV[2021.2] = "49c6694fc3cab6b87dd564da58a83bb8656a7c03"
 ESW_REV[2022.1] = "0cfb554e841f0837cabbb40a2481f5f7e5f2ddc0"
-ESW_REV[git]    = "7ec60e1c0e25bfa9c5e8c77d6d063876f6670770"
+ESW_REV[2022.2] = "72f6e3d45fb4dd9d6cd4a7581b935b39cf8ce96d"
 SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}"
 
 EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}"
 EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}"
 
 LICENSE = "MIT"
-LIC_FILES_CHKSUM[release-2019.1]    = 'e9b6d01d45faccfbf05d8caea53f0a35'
-LIC_FILES_CHKSUM[release-2019.2]    = '39ab6ab638f4d1836ba994ec6852de94'
-LIC_FILES_CHKSUM[release-2020.1]    = '8b565227e1264d677db8f841c2948cba'
-LIC_FILES_CHKSUM[master-rel-2020.2] = '3a6e22aebf6516f0f74a82e1183f74f8'
-LIC_FILES_CHKSUM[xlnx_rel_v2021.1]  = "73e8997d53c2137fdeea4331a73f40fa"
-LIC_FILES_CHKSUM[xlnx_rel_v2021.2]  = 'ba23909a4bcaf754a2e1ba996f1ca1b0'
 LIC_FILES_CHKSUM[xlnx_rel_v2022.1]  = 'e62cb7a722c4430999e0a55a7234035d'
 LIC_FILES_CHKSUM[xlnx_rel_v2022.1_update] = 'e62cb7a722c4430999e0a55a7234035d'
-LIC_FILES_CHKSUM[master-next]       = '87cee16dbcd2c2f7ceef30163838056e'
-LIC_FILES_CHKSUM[master]            = '593ba3fb8be51271097ddaa4b9c65cde'
+LIC_FILES_CHKSUM[xlnx_rel_v2022.2-next] = '7b5fc0b2a22e2882e1506436b3293e5d'
 LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}"
 
 SRC_URI = "${EMBEDDEDSW_SRCURI}"
diff --git a/meta-xilinx-standalone/conf/layer.conf b/meta-xilinx-standalone/conf/layer.conf
index e35bd268..8732eb15 100644
--- a/meta-xilinx-standalone/conf/layer.conf
+++ b/meta-xilinx-standalone/conf/layer.conf
@@ -16,4 +16,8 @@ LAYERDEPENDS_xilinx-standalone = "core xilinx"
 LAYERRECOMMENDS_xilinx-standalone = "xilinx-microblaze"
 
 LAYERSERIES_COMPAT_xilinx-standalone = "kirkstone"
-XILINX_RELEASE_VERSION = "v2022.1"
+
+PREFERRED_VERSION_plm-firmware ?= "${@d.getVar("XILINX_RELEASE_VERSION").replace('v','')}%"
+PREFERRED_VERSION_psm-firmware ?= "${@d.getVar("XILINX_RELEASE_VERSION").replace('v','')}%"
+PREFERRED_VERSION_pmu-firmware ?= "${@d.getVar("XILINX_RELEASE_VERSION").replace('v','')}%"
+PREFERRED_VERSION_fsbl-firmware ?= "${@d.getVar("XILINX_RELEASE_VERSION").replace('v','')}%"
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2021.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.2.bb
index 3f9740a0..3f9740a0 100644
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2021.2.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2022.2.bb
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2020.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2020.1.bb
deleted file mode 100644
index 782c9dc4..00000000
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2020.1.bb
+++ /dev/null
@@ -1 +0,0 @@
-require plm-firmware.inc
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2021.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.2.bb
index cc810241..cc810241 100644
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2021.2.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2022.2.bb
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2020.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2020.1.bb
deleted file mode 100644
index 6b90f496..00000000
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2020.1.bb
+++ /dev/null
@@ -1,9 +0,0 @@
-require pmu-firmware.inc
-
-FILESPATH .= ":${FILE_DIRNAME}/embeddedsw"
-
-SRC_URI += " \
-            file://0001-zynqmp_pmufw-Fix-reset-ops-for-assert.patch \
-            file://0001-zynqmp_pmufw-Correct-structure-header-of-PmResetOps.patch \
-           "
-
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2021.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.2.bb
index 2c554d6d..2c554d6d 100644
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2021.2.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2022.2.bb
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2021.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.2.bb
index d861fb1c..d861fb1c 100644
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2021.2.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2022.2.bb