qemu: Updated version

* There are no longer any patches on QEMU for MicroBlaze or Zynq,
  mainline QEMU in 2.1.0+ provides functional models of MicroBlaze and
  Zynq machines
* Switch recipe to wildcard version as no version dependence exists in
  the bbappend

Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>

4 files changed, 2 insertions, 92 deletions

diff --git a/recipes-devtools/qemu/files/HACK_zynq_slcr_Bring_SLCR_out_of_reset_in_kernel_state.patch b/recipes-devtools/qemu/files/HACK_zynq_slcr_Bring_SLCR_out_of_reset_in_kernel_state.patch
deleted file mode 100644
index 527422b5..00000000
--- a/recipes-devtools/qemu/files/HACK_zynq_slcr_Bring_SLCR_out_of_reset_in_kernel_state.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
-Date: Wed, 27 Mar 2013 02:00:09 +0000
-Subject: HACK: zynq_slcr: Bring SLCR out of reset in kernel state
-
-Reset the zynq_slcr into something more closely resembling the post
-FSBL handoff state. Needed to keep the Linux clock framework happy.
-
-I can only apply this patch (in its current form), to the workarounds
-branch but I am RFCing it, as if there are any other things I should
-be changing, let me know! I'll factor them into a real solution.
-
-Cc: sorenb@xilinx.com
-Cc: michal.simek@xilinx.com
-Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
----
-diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
-index 872ba3f..8f3e614 100644
---- a/hw/misc/zynq_slcr.c
-+++ b/hw/misc/zynq_slcr.c
-@@ -243,19 +243,19 @@ static void zynq_slcr_reset(DeviceState *d)
- 
-     s->lockval = 1;
-     /* 0x100 - 0x11C */
--    s->pll[ARM_PLL_CTRL] = 0x0001A008;
--    s->pll[DDR_PLL_CTRL] = 0x0001A008;
--    s->pll[IO_PLL_CTRL] = 0x0001A008;
-+    s->pll[ARM_PLL_CTRL] = 0x00028008;
-+    s->pll[DDR_PLL_CTRL] = 0x00020008;
-+    s->pll[IO_PLL_CTRL] = 0x0001e008;
-     s->pll[PLL_STATUS] = 0x0000003F;
--    s->pll[ARM_PPL_CFG] = 0x00014000;
--    s->pll[DDR_PLL_CFG] = 0x00014000;
--    s->pll[IO_PLL_CFG] = 0x00014000;
-+    s->pll[ARM_PPL_CFG] = 0x000fa220;
-+    s->pll[DDR_PLL_CFG] = 0x0012c220;
-+    s->pll[IO_PLL_CFG] = 0x001452c0;
- 
-     /* 0x120 - 0x16C */
--    s->clk[ARM_CLK_CTRL] = 0x1F000400;
-+    s->clk[ARM_CLK_CTRL] = 0x1F000200;
-     s->clk[DDR_CLK_CTRL] = 0x18400003;
-     s->clk[DCI_CLK_CTRL] = 0x01E03201;
--    s->clk[APER_CLK_CTRL] = 0x01FFCCCD;
-+    s->clk[APER_CLK_CTRL] = 0x01ed044d;
-     s->clk[USB0_CLK_CTRL] = s->clk[USB1_CLK_CTRL] = 0x00101941;
-     s->clk[GEM0_RCLK_CTRL] = s->clk[GEM1_RCLK_CTRL] = 0x00000001;
-     s->clk[GEM0_CLK_CTRL] = s->clk[GEM1_CLK_CTRL] = 0x00003C01;
---
diff --git a/recipes-devtools/qemu/files/net-xilinx_axienet.c-Add-phy-soft-reset-bit-clearing.patch b/recipes-devtools/qemu/files/net-xilinx_axienet.c-Add-phy-soft-reset-bit-clearing.patch
deleted file mode 100644
index 8e8032e9..00000000
--- a/recipes-devtools/qemu/files/net-xilinx_axienet.c-Add-phy-soft-reset-bit-clearing.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From f663faac3e2e9d9134415f75d429ae30432e6038 Mon Sep 17 00:00:00 2001
-From: Nathan Rossi <nathan.rossi@xilinx.com>
-Date: Tue, 8 Apr 2014 18:52:39 -0700
-Subject: [PATCH] net: xilinx_axienet.c: Add phy soft reset bit clearing
-
-Clear the BMCR Reset when writing to registers.
-
-Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
-[ PC:
- * Trivial style fixes to commit message
-]
-Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
-Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
-Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
-Upstream-Status: Backport
----
- hw/net/xilinx_axienet.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
-index 839d97c..0f485a0 100644
---- a/hw/net/xilinx_axienet.c
-+++ b/hw/net/xilinx_axienet.c
-@@ -142,6 +142,9 @@ tdk_write(struct PHY *phy, unsigned int req, unsigned int data)
-             phy->regs[regnum] = data;
-             break;
-     }
-+
-+    /* Unconditionally clear regs[BMCR][BMCR_RESET] */
-+    phy->regs[0] &= ~0x8000;
- }
- 
- static void
--- 
-1.9.0
-
diff --git a/recipes-devtools/qemu/qemu_%.bbappend b/recipes-devtools/qemu/qemu_%.bbappend
new file mode 100644
index 00000000..4c37b1e0
--- /dev/null
+++ b/recipes-devtools/qemu/qemu_%.bbappend
@@ -0,0 +1,2 @@
+QEMU_TARGETS += "microblazeel"
+
diff --git a/recipes-devtools/qemu/qemu_2.0.0.bbappend b/recipes-devtools/qemu/qemu_2.0.0.bbappend
deleted file mode 100644
index 01f76bb4..00000000
--- a/recipes-devtools/qemu/qemu_2.0.0.bbappend
+++ /dev/null
@@ -1,7 +0,0 @@
-QEMU_TARGETS += "microblazeel"
-
-FILESEXTRAPATHS_append := "${THISDIR}/files:"
-SRC_URI_append += " \
-                file://HACK_zynq_slcr_Bring_SLCR_out_of_reset_in_kernel_state.patch \
-                file://net-xilinx_axienet.c-Add-phy-soft-reset-bit-clearing.patch \
-                "