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author | Nathan Rossi <nathan.rossi@xilinx.com> | 2014-05-20 17:25:39 +1000 |
---|---|---|
committer | Nathan Rossi <nathan.rossi@xilinx.com> | 2014-05-20 17:25:39 +1000 |
commit | 40cc38eecdbc10e364d6ed33dd55923ebc09e834 (patch) | |
tree | 128bd6fee30905da70179b1fc252dd48cf011e31 /recipes-devtools | |
parent | f70d53e96dc380b8a4b1d7b3d89b1a761eb38b64 (diff) | |
download | meta-xilinx-40cc38eecdbc10e364d6ed33dd55923ebc09e834.tar.gz |
binutils: Updated patches against binutils for microblaze
* Updated patches against binutils for microblaze
* Fixing the issue with building binutils on a 32-bit host platform
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Diffstat (limited to 'recipes-devtools')
-rw-r--r-- | recipes-devtools/binutils/files/Fixup-debug_loc-sections-after-linker-relaxati.patch | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/recipes-devtools/binutils/files/Fixup-debug_loc-sections-after-linker-relaxati.patch b/recipes-devtools/binutils/files/Fixup-debug_loc-sections-after-linker-relaxati.patch index 51ba11c4..0623e945 100644 --- a/recipes-devtools/binutils/files/Fixup-debug_loc-sections-after-linker-relaxati.patch +++ b/recipes-devtools/binutils/files/Fixup-debug_loc-sections-after-linker-relaxati.patch | |||
@@ -23,10 +23,10 @@ Upstream-Status: Pending | |||
23 | 7 files changed, 57 insertions(+), 8 deletions(-) | 23 | 7 files changed, 57 insertions(+), 8 deletions(-) |
24 | 24 | ||
25 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h | 25 | diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h |
26 | index 41f7a68..b8c73b0 100644 | 26 | index 8b7f2ee..de38907 100644 |
27 | --- a/bfd/bfd-in2.h | 27 | --- a/bfd/bfd-in2.h |
28 | +++ b/bfd/bfd-in2.h | 28 | +++ b/bfd/bfd-in2.h |
29 | @@ -5190,6 +5190,11 @@ value relative to the read-write small data area anchor */ | 29 | @@ -5449,6 +5449,11 @@ value relative to the read-write small data area anchor */ |
30 | expressions of the form "Symbol Op Symbol" */ | 30 | expressions of the form "Symbol Op Symbol" */ |
31 | BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, | 31 | BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, |
32 | 32 | ||
@@ -39,7 +39,7 @@ index 41f7a68..b8c73b0 100644 | |||
39 | value in two words (with an imm instruction). No relocation is | 39 | value in two words (with an imm instruction). No relocation is |
40 | done here - only used for relaxing */ | 40 | done here - only used for relaxing */ |
41 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c | 41 | diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c |
42 | index d94ac32..7cd0195 100644 | 42 | index f90df47..d440084 100644 |
43 | --- a/bfd/elf32-microblaze.c | 43 | --- a/bfd/elf32-microblaze.c |
44 | +++ b/bfd/elf32-microblaze.c | 44 | +++ b/bfd/elf32-microblaze.c |
45 | @@ -177,6 +177,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = | 45 | @@ -177,6 +177,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = |
@@ -75,7 +75,7 @@ index d94ac32..7cd0195 100644 | |||
75 | microblaze_reloc = R_MICROBLAZE_64_NONE; | 75 | microblaze_reloc = R_MICROBLAZE_64_NONE; |
76 | break; | 76 | break; |
77 | case BFD_RELOC_32: | 77 | case BFD_RELOC_32: |
78 | @@ -1851,14 +1868,22 @@ microblaze_elf_relax_section (bfd *abfd, | 78 | @@ -1913,14 +1930,22 @@ microblaze_elf_relax_section (bfd *abfd, |
79 | } | 79 | } |
80 | break; | 80 | break; |
81 | case R_MICROBLAZE_NONE: | 81 | case R_MICROBLAZE_NONE: |
@@ -93,12 +93,12 @@ index d94ac32..7cd0195 100644 | |||
93 | + /* Validate the in-band val. */ | 93 | + /* Validate the in-band val. */ |
94 | + val = bfd_get_32 (abfd, contents + irel->r_offset); | 94 | + val = bfd_get_32 (abfd, contents + irel->r_offset); |
95 | + if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { | 95 | + if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { |
96 | + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); | 96 | + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, (unsigned long)irel->r_addend); |
97 | + } | 97 | + } |
98 | irel->r_addend -= (efix - sfix); | 98 | irel->r_addend -= (efix - sfix); |
99 | /* Should use HOWTO. */ | 99 | /* Should use HOWTO. */ |
100 | microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, | 100 | microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, |
101 | @@ -1906,12 +1931,16 @@ microblaze_elf_relax_section (bfd *abfd, | 101 | @@ -1968,12 +1993,16 @@ microblaze_elf_relax_section (bfd *abfd, |
102 | irelscanend = irelocs + o->reloc_count; | 102 | irelscanend = irelocs + o->reloc_count; |
103 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) | 103 | for (irelscan = irelocs; irelscan < irelscanend; irelscan++) |
104 | { | 104 | { |
@@ -116,7 +116,7 @@ index d94ac32..7cd0195 100644 | |||
116 | /* This was a PC-relative instruction that was completely resolved. */ | 116 | /* This was a PC-relative instruction that was completely resolved. */ |
117 | if (ocontents == NULL) | 117 | if (ocontents == NULL) |
118 | { | 118 | { |
119 | @@ -1936,15 +1965,15 @@ microblaze_elf_relax_section (bfd *abfd, | 119 | @@ -1998,15 +2027,15 @@ microblaze_elf_relax_section (bfd *abfd, |
120 | } | 120 | } |
121 | } | 121 | } |
122 | 122 | ||
@@ -124,7 +124,7 @@ index d94ac32..7cd0195 100644 | |||
124 | - + isym->st_value, sec); | 124 | - + isym->st_value, sec); |
125 | val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); | 125 | val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); |
126 | + if (val != irelscan->r_addend) { | 126 | + if (val != irelscan->r_addend) { |
127 | + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); | 127 | + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, (unsigned long)irelscan->r_addend); |
128 | + } | 128 | + } |
129 | + | 129 | + |
130 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); | 130 | + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); |
@@ -137,7 +137,7 @@ index d94ac32..7cd0195 100644 | |||
137 | if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) | 137 | if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) |
138 | { | 138 | { |
139 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); | 139 | isym = isymbuf + ELF32_R_SYM (irelscan->r_info); |
140 | @@ -2004,7 +2033,7 @@ microblaze_elf_relax_section (bfd *abfd, | 140 | @@ -2066,7 +2095,7 @@ microblaze_elf_relax_section (bfd *abfd, |
141 | elf_section_data (o)->this_hdr.contents = ocontents; | 141 | elf_section_data (o)->this_hdr.contents = ocontents; |
142 | } | 142 | } |
143 | } | 143 | } |
@@ -147,10 +147,10 @@ index d94ac32..7cd0195 100644 | |||
147 | 0, | 147 | 0, |
148 | sec); | 148 | sec); |
149 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h | 149 | diff --git a/bfd/libbfd.h b/bfd/libbfd.h |
150 | index 1381803..034efb8 100644 | 150 | index 09f307f..840c662 100644 |
151 | --- a/bfd/libbfd.h | 151 | --- a/bfd/libbfd.h |
152 | +++ b/bfd/libbfd.h | 152 | +++ b/bfd/libbfd.h |
153 | @@ -2513,6 +2513,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", | 153 | @@ -2644,6 +2644,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", |
154 | "BFD_RELOC_MICROBLAZE_32_ROSDA", | 154 | "BFD_RELOC_MICROBLAZE_32_ROSDA", |
155 | "BFD_RELOC_MICROBLAZE_32_RWSDA", | 155 | "BFD_RELOC_MICROBLAZE_32_RWSDA", |
156 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", | 156 | "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", |
@@ -159,10 +159,10 @@ index 1381803..034efb8 100644 | |||
159 | "BFD_RELOC_MICROBLAZE_64_GOTPC", | 159 | "BFD_RELOC_MICROBLAZE_64_GOTPC", |
160 | "BFD_RELOC_MICROBLAZE_64_GOT", | 160 | "BFD_RELOC_MICROBLAZE_64_GOT", |
161 | diff --git a/bfd/reloc.c b/bfd/reloc.c | 161 | diff --git a/bfd/reloc.c b/bfd/reloc.c |
162 | index 25c089c..3d2a8a8 100644 | 162 | index 7f46c58..5bcd52d 100644 |
163 | --- a/bfd/reloc.c | 163 | --- a/bfd/reloc.c |
164 | +++ b/bfd/reloc.c | 164 | +++ b/bfd/reloc.c |
165 | @@ -6048,6 +6048,12 @@ ENUMDOC | 165 | @@ -6396,6 +6396,12 @@ ENUMDOC |
166 | This is a 32 bit reloc for the microblaze to handle | 166 | This is a 32 bit reloc for the microblaze to handle |
167 | expressions of the form "Symbol Op Symbol" | 167 | expressions of the form "Symbol Op Symbol" |
168 | ENUM | 168 | ENUM |
@@ -176,25 +176,25 @@ index 25c089c..3d2a8a8 100644 | |||
176 | ENUMDOC | 176 | ENUMDOC |
177 | This is a 64 bit reloc that stores the 32 bit pc relative | 177 | This is a 64 bit reloc that stores the 32 bit pc relative |
178 | diff --git a/binutils/readelf.c b/binutils/readelf.c | 178 | diff --git a/binutils/readelf.c b/binutils/readelf.c |
179 | index 19b46c9..81a027c 100644 | 179 | index af6463e..343eb61 100644 |
180 | --- a/binutils/readelf.c | 180 | --- a/binutils/readelf.c |
181 | +++ b/binutils/readelf.c | 181 | +++ b/binutils/readelf.c |
182 | @@ -10547,6 +10547,10 @@ is_none_reloc (unsigned int reloc_type) | 182 | @@ -10821,6 +10821,10 @@ is_none_reloc (unsigned int reloc_type) |
183 | return reloc_type == 0; | 183 | || reloc_type == 19 /* R_XTENSA_DIFF32. */); |
184 | case EM_AARCH64: | 184 | case EM_METAG: |
185 | return reloc_type == 0 || reloc_type == 256; | 185 | return reloc_type == 3; /* R_METAG_NONE. */ |
186 | + case EM_MICROBLAZE: | 186 | + case EM_MICROBLAZE: |
187 | + return reloc_type == 30 /* R_MICROBLAZE_32_NONE. */ | 187 | + return reloc_type == 30 /* R_MICROBLAZE_32_NONE. */ |
188 | + || reloc_type == 0 /* R_MICROBLAZE_NONE. */ | 188 | + || reloc_type == 0 /* R_MICROBLAZE_NONE. */ |
189 | + || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */ | 189 | + || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */ |
190 | case EM_XTENSA_OLD: | 190 | } |
191 | case EM_XTENSA: | 191 | return FALSE; |
192 | return (reloc_type == 0 /* R_XTENSA_NONE. */ | 192 | } |
193 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c | 193 | diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c |
194 | index 7dd5895..884819f 100644 | 194 | index 12ad616..46d61db 100644 |
195 | --- a/gas/config/tc-microblaze.c | 195 | --- a/gas/config/tc-microblaze.c |
196 | +++ b/gas/config/tc-microblaze.c | 196 | +++ b/gas/config/tc-microblaze.c |
197 | @@ -2166,6 +2166,8 @@ md_apply_fix (fixS * fixP, | 197 | @@ -2167,6 +2167,8 @@ md_apply_fix (fixS * fixP, |
198 | moves code around due to relaxing. */ | 198 | moves code around due to relaxing. */ |
199 | if (fixP->fx_r_type == BFD_RELOC_64_PCREL) | 199 | if (fixP->fx_r_type == BFD_RELOC_64_PCREL) |
200 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; | 200 | fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; |
@@ -203,7 +203,7 @@ index 7dd5895..884819f 100644 | |||
203 | else | 203 | else |
204 | fixP->fx_r_type = BFD_RELOC_NONE; | 204 | fixP->fx_r_type = BFD_RELOC_NONE; |
205 | fixP->fx_addsy = section_symbol (absolute_section); | 205 | fixP->fx_addsy = section_symbol (absolute_section); |
206 | @@ -2387,6 +2389,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) | 206 | @@ -2388,6 +2390,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) |
207 | switch (fixp->fx_r_type) | 207 | switch (fixp->fx_r_type) |
208 | { | 208 | { |
209 | case BFD_RELOC_NONE: | 209 | case BFD_RELOC_NONE: |
@@ -212,7 +212,7 @@ index 7dd5895..884819f 100644 | |||
212 | case BFD_RELOC_32: | 212 | case BFD_RELOC_32: |
213 | case BFD_RELOC_MICROBLAZE_32_LO: | 213 | case BFD_RELOC_MICROBLAZE_32_LO: |
214 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h | 214 | diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h |
215 | index c4d9821..72771e8 100644 | 215 | index effca20..f8420dc 100644 |
216 | --- a/include/elf/microblaze.h | 216 | --- a/include/elf/microblaze.h |
217 | +++ b/include/elf/microblaze.h | 217 | +++ b/include/elf/microblaze.h |
218 | @@ -58,6 +58,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) | 218 | @@ -58,6 +58,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) |
@@ -224,5 +224,5 @@ index c4d9821..72771e8 100644 | |||
224 | END_RELOC_NUMBERS (R_MICROBLAZE_max) | 224 | END_RELOC_NUMBERS (R_MICROBLAZE_max) |
225 | 225 | ||
226 | -- | 226 | -- |
227 | 1.8.5.1 | 227 | 1.9.0 |
228 | 228 | ||