summaryrefslogtreecommitdiffstats
path: root/meta-xilinx-core
diff options
context:
space:
mode:
authorAkshay Belsare <Akshay.Belsare@xilinx.com>2022-05-20 10:21:18 +0530
committerMark Hatle <mhatle@xilinx.com>2022-05-31 10:48:19 -0700
commit42e7a896428428efffd35b294477408d203ce339 (patch)
treed40831038f2e532ed8cbd28a843e0dbd344cde13 /meta-xilinx-core
parent6fdccd557b55ee47dac57f42854d52179547c3eb (diff)
downloadmeta-xilinx-42e7a896428428efffd35b294477408d203ce339.tar.gz
meta-xilinx-core:recipes-bsp:arm-trusted-firmware: Update PNCD NS IRQ
The SDP_PNCD_NS_IRQ flag is meant to set the NS interrupt number that will be used between ProvenCore OS and linux ProvenCore driver ATF is the one triggering this interrupt so it must be aware of its value. This value is hardcoded in ProvenCore binary as 51 As per input from ProvenRun the flag SPD_PNCD_NS_IRQ=51 is to be added, for right NS interruption to be used in PNCD Signed-off-by: Akshay Belsare <Akshay.Belsare@xilinx.com> Signed-off-by: Mark Hatle <mhatle@xilinx.com> (cherry picked from commit cbb8af2b3475620313fedb4fc677498b6461fb45) Signed-off-by: Mark Hatle <mhatle@xilinx.com>
Diffstat (limited to 'meta-xilinx-core')
-rw-r--r--meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc
index 5591fa63..eaf750a6 100644
--- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc
@@ -68,7 +68,7 @@ EXTRA_OEMAKE:append:zynqmp = "${@' ZYNQMP_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.get
68EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}" 68EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}"
69EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}" 69EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}"
70 70
71ATF_PROVENCORE = "SPD=pncd ZYNQMP_BL32_MEM_BASE=0x70000000 ZYNQMP_BL32_MEM_SIZE=0x10000000 PRELOADED_BL33_BASE=0x80000000" 71ATF_PROVENCORE = "SPD=pncd SPD_PNCD_NS_IRQ=51 ZYNQMP_BL32_MEM_BASE=0x70000000 ZYNQMP_BL32_MEM_SIZE=0x10000000 PRELOADED_BL33_BASE=0x80000000"
72EXTRA_OEMAKE:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' ${ATF_PROVENCORE}', '', d)}" 72EXTRA_OEMAKE:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' ${ATF_PROVENCORE}', '', d)}"
73 73
74do_configure() { 74do_configure() {