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authorClement Laigle <clement.laigle8@gmail.com>2018-06-13 22:39:34 +0200
committerManjukumar Matha <manjukumar.harthikote-matha@xilinx.com>2018-06-21 10:55:43 -0700
commit8a521726862450e160b1f79265d1c50474f82a00 (patch)
treebe670f7bc8754c31ea6cc9cfe591867b4c8227af /meta-xilinx-contrib/recipes-bsp
parentad6103d8cee332907167f2f8e91091ac580d2df5 (diff)
downloadmeta-xilinx-8a521726862450e160b1f79265d1c50474f82a00.tar.gz
minized-zynq7: Add u-boot support
Backport the u-boot MiniZed support from v2018.7 release. Signed-off-by: Clement Laigle <clement.laigle8@gmail.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Diffstat (limited to 'meta-xilinx-contrib/recipes-bsp')
-rw-r--r--meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch217
-rw-r--r--meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend8
2 files changed, 225 insertions, 0 deletions
diff --git a/meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch b/meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch
new file mode 100644
index 00000000..4b9d72be
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch
@@ -0,0 +1,217 @@
1From dfe572bcea9b74086d5bd9b963af26e64a043336 Mon Sep 17 00:00:00 2001
2From: Clement Laigle <clement.laigle8@gmail.com>
3Date: Sun, 10 Jun 2018 23:21:28 +0200
4Subject: [PATCH] zynq: Add initial support for Avnet MiniZed
5
6Initial support for Avnet MiniZed board.
7
8Signed-off-by: Clement Laigle <clement.laigle8@gmail.com>
9---
10 arch/arm/dts/Makefile | 1 +
11 arch/arm/dts/zynq-minized.dts | 106 +++++++++++++++++++++++++++++++++++++++++
12 configs/zynq_minized_defconfig | 68 ++++++++++++++++++++++++++
13 3 files changed, 175 insertions(+)
14 create mode 100644 arch/arm/dts/zynq-minized.dts
15 create mode 100644 configs/zynq_minized_defconfig
16
17diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
18index a895c70..32f9ae1 100644
19--- a/arch/arm/dts/Makefile
20+++ b/arch/arm/dts/Makefile
21@@ -132,6 +132,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
22 zynq-cse-qspi-single.dtb \
23 zynq-microzed.dtb \
24 zynq-picozed.dtb \
25+ zynq-minized.dtb \
26 zynq-syzygy-hub.dtb \
27 zynq-topic-miami.dtb \
28 zynq-topic-miamilite.dtb \
29diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts
30new file mode 100644
31index 0000000..3a05518
32--- /dev/null
33+++ b/arch/arm/dts/zynq-minized.dts
34@@ -0,0 +1,106 @@
35+// SPDX-License-Identifier: GPL-2.0+
36+/*
37+ * dts file for Avnet MiniZed board
38+ *
39+ * (C) Copyright 2017 - 2018, Xilinx, Inc.
40+ *
41+ * Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
42+ */
43+
44+/dts-v1/;
45+#include "zynq-7000.dtsi"
46+
47+/ {
48+ model = "Avnet Zynq MiniZed Development Board";
49+ compatible = "avnet,minized", "xlnx,zynq-7000";
50+
51+ aliases {
52+ serial0 = &uart1;
53+ serial1 = &uart0;
54+ spi0 = &qspi;
55+ mmc0 = &sdhci0;
56+ };
57+
58+ memory@0 {
59+ device_type = "memory";
60+ reg = <0x0 0x20000000>;
61+ };
62+
63+ chosen {
64+ bootargs = "";
65+ stdout-path = "serial0:115200n8";
66+ };
67+
68+ usb_phy0: phy0 {
69+ compatible = "usb-nop-xceiv";
70+ #phy-cells = <0>;
71+ };
72+};
73+
74+&qspi {
75+ status = "okay";
76+ is-dual = <0>;
77+ num-cs = <1>;
78+ flash@0 {
79+ compatible = "micron,m25p128";
80+ reg = <0x0>;
81+ spi-tx-bus-width = <4>;
82+ spi-rx-bus-width = <4>;
83+ spi-max-frequency = <50000000>;
84+ partitions {
85+ compatible = "fixed-partitions";
86+ #address-cells = <1>;
87+ #size-cells = <1>;
88+ partition@0 {
89+ label = "boot";
90+ reg = <0x0 0xff0000>;
91+ };
92+
93+ partition@270000 {
94+ label = "kernel";
95+ reg = <0x270000 0xd80000>;
96+ };
97+
98+ partition@ff0000 {
99+ label = "bootenv";
100+ reg = <0xff0000 0x10000>;
101+ };
102+
103+ partition@1000000 {
104+ label = "spare";
105+ reg = <0x1000000 0x0>;
106+ };
107+ };
108+ };
109+};
110+
111+&uart0 {
112+ status = "okay";
113+};
114+
115+&uart1 {
116+ u-boot,dm-pre-reloc;
117+ status = "okay";
118+};
119+
120+&usb0 {
121+ status = "okay";
122+ dr_mode = "host";
123+ usb-phy = <&usb_phy0>;
124+ usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */
125+};
126+
127+&sdhci1 {
128+ status = "okay";
129+ non-removable;
130+ bus-width = <4>;
131+ max-frequency = <12000000>;
132+
133+ #address-cells = <1>;
134+ #size-cells = <0>;
135+ mmccard: mmccard@0 {
136+ compatible = "mmc-card";
137+ reg = <0>;
138+ broken-hpi;
139+ };
140+};
141diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig
142new file mode 100644
143index 0000000..44d65fc
144--- /dev/null
145+++ b/configs/zynq_minized_defconfig
146@@ -0,0 +1,68 @@
147+CONFIG_ARM=y
148+CONFIG_ARCH_ZYNQ=y
149+CONFIG_SYS_TEXT_BASE=0x4000000
150+CONFIG_SPL=y
151+CONFIG_SPL_STACK_R_ADDR=0x200000
152+CONFIG_DEFAULT_DEVICE_TREE="zynq-minized"
153+CONFIG_DEBUG_UART=y
154+CONFIG_DISTRO_DEFAULTS=y
155+# CONFIG_DISPLAY_CPUINFO is not set
156+CONFIG_FIT=y
157+CONFIG_FIT_SIGNATURE=y
158+CONFIG_FIT_VERBOSE=y
159+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
160+CONFIG_SPL_STACK_R=y
161+CONFIG_SPL_OS_BOOT=y
162+CONFIG_SYS_PROMPT="Zynq> "
163+CONFIG_CMD_THOR_DOWNLOAD=y
164+CONFIG_CMD_DFU=y
165+# CONFIG_CMD_FLASH is not set
166+CONFIG_CMD_FPGA_LOADBP=y
167+CONFIG_CMD_FPGA_LOADFS=y
168+CONFIG_CMD_FPGA_LOADMK=y
169+CONFIG_CMD_FPGA_LOADP=y
170+CONFIG_CMD_GPIO=y
171+CONFIG_CMD_MMC=y
172+CONFIG_CMD_SF=y
173+CONFIG_CMD_USB=y
174+# CONFIG_CMD_SETEXPR is not set
175+CONFIG_CMD_TFTPPUT=y
176+CONFIG_CMD_CACHE=y
177+CONFIG_CMD_EXT4_WRITE=y
178+CONFIG_ENV_IS_IN_SPI_FLASH=y
179+CONFIG_NET_RANDOM_ETHADDR=y
180+CONFIG_SPL_DM_SEQ_ALIAS=y
181+CONFIG_DFU_MMC=y
182+CONFIG_DFU_RAM=y
183+CONFIG_FPGA_XILINX=y
184+CONFIG_FPGA_ZYNQPL=y
185+CONFIG_DM_GPIO=y
186+CONFIG_MMC_SDHCI=y
187+CONFIG_MMC_SDHCI_ZYNQ=y
188+CONFIG_SPI_FLASH=y
189+CONFIG_SPI_FLASH_BAR=y
190+CONFIG_SPI_FLASH_SPANSION=y
191+CONFIG_SPI_FLASH_STMICRO=y
192+CONFIG_SPI_FLASH_WINBOND=y
193+CONFIG_PHY_MARVELL=y
194+CONFIG_PHY_REALTEK=y
195+CONFIG_PHY_XILINX=y
196+CONFIG_ZYNQ_GEM=y
197+CONFIG_DEBUG_UART_ZYNQ=y
198+CONFIG_DEBUG_UART_BASE=0xe0001000
199+CONFIG_DEBUG_UART_CLOCK=50000000
200+CONFIG_ZYNQ_SERIAL=y
201+CONFIG_ZYNQ_QSPI=y
202+CONFIG_USB=y
203+CONFIG_USB_EHCI_HCD=y
204+CONFIG_USB_ULPI_VIEWPORT=y
205+CONFIG_USB_ULPI=y
206+CONFIG_USB_STORAGE=y
207+CONFIG_USB_GADGET=y
208+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
209+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
210+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
211+CONFIG_CI_UDC=y
212+CONFIG_USB_GADGET_DOWNLOAD=y
213+CONFIG_USB_FUNCTION_THOR=y
214+CONFIG_OF_EMBED=y
215--
2162.7.4
217
diff --git a/meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend
new file mode 100644
index 00000000..665a78b0
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -0,0 +1,8 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
2
3SRC_URI_append = " file://minized-u-boot.patch"
4
5HAS_PLATFORM_INIT ??= " \
6 zynq_minized_config \
7 "
8
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-14 19:01:28 +0000