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author | Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> | 2021-01-14 13:17:49 +0530 |
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committer | Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> | 2021-07-14 14:19:37 -0700 |
commit | c98e285a132343b25e0e69f2bfa81f9aa6e4dfe1 (patch) | |
tree | 085fa68c652838f31e16905e558716aa8fd1662f /meta-xilinx-bsp | |
parent | ac151d926404eca70810dbd1ff8508ad23895f13 (diff) | |
download | meta-xilinx-c98e285a132343b25e0e69f2bfa81f9aa6e4dfe1.tar.gz |
u-boot-zynq-scr.bb: Add PRE_BOOTENV variable
Add PRE_BOOTENV in uboot-zynq-scr to add boot commands into boot.scr.
Defining FIT_IMAGE_OFFSET variables for QSPI and NAND.
Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com>
Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp')
-rw-r--r-- | meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb b/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb index aecc36df..ed6ff60f 100644 --- a/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb +++ b/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb | |||
@@ -33,6 +33,7 @@ SKIP_APPEND_BASEADDR ?= "0" | |||
33 | 33 | ||
34 | DDR_BASEADDR ?= "0x0" | 34 | DDR_BASEADDR ?= "0x0" |
35 | DDR_BASEADDR_microblaze ?= "0x80000000" | 35 | DDR_BASEADDR_microblaze ?= "0x80000000" |
36 | PRE_BOOTENV ?= "" | ||
36 | 37 | ||
37 | SRC_URI = " \ | 38 | SRC_URI = " \ |
38 | file://boot.cmd.sd.zynq \ | 39 | file://boot.cmd.sd.zynq \ |
@@ -130,13 +131,15 @@ QSPI_KERNEL_IMAGE_versal ?= "image.ub" | |||
130 | 131 | ||
131 | NAND_KERNEL_IMAGE ?= "image.ub" | 132 | NAND_KERNEL_IMAGE ?= "image.ub" |
132 | 133 | ||
133 | QSPI_FIT_IMAGE_LOAD_ADDRESS ?= "${@append_baseaddr(d,"0x10000000")}" | 134 | QSPI_FIT_IMAGE_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('QSPI_FIT_IMAGE_OFFSET'))}" |
135 | QSPI_FIT_IMAGE_OFFSET ?= "0x10000000" | ||
134 | QSPI_FIT_IMAGE_SIZE ?= "0x6400000" | 136 | QSPI_FIT_IMAGE_SIZE ?= "0x6400000" |
135 | QSPI_FIT_IMAGE_SIZE_zynqmpdr ?= "0x3F00000" | 137 | QSPI_FIT_IMAGE_SIZE_zynqmpdr ?= "0x3F00000" |
136 | QSPI_FIT_IMAGE_SIZE_zynq ?= "0xF00000" | 138 | QSPI_FIT_IMAGE_SIZE_zynq ?= "0xF00000" |
137 | QSPI_FIT_IMAGE_SIZE_microblaze ?= "0xF00000" | 139 | QSPI_FIT_IMAGE_SIZE_microblaze ?= "0xF00000" |
138 | 140 | ||
139 | NAND_FIT_IMAGE_LOAD_ADDRESS ?= "${@append_baseaddr(d,"0x10000000")}" | 141 | NAND_FIT_IMAGE_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('NAND_FIT_IMAGE_OFFSET'))}" |
142 | NAND_FIT_IMAGE_OFFSET ?= "0x10000000" | ||
140 | NAND_FIT_IMAGE_SIZE ?= "0x6400000" | 143 | NAND_FIT_IMAGE_SIZE ?= "0x6400000" |
141 | 144 | ||
142 | SDBOOTDEV ?= "0" | 145 | SDBOOTDEV ?= "0" |
@@ -149,7 +152,7 @@ do_install[noexec] = "1" | |||
149 | python () { | 152 | python () { |
150 | baseaddr = d.getVar('DDR_BASEADDR') or "0x0" | 153 | baseaddr = d.getVar('DDR_BASEADDR') or "0x0" |
151 | if baseaddr == "0x0": | 154 | if baseaddr == "0x0": |
152 | d.setVar('PRE_BOOTENV','') | 155 | d.appendVar('PRE_BOOTENV','') |
153 | else: | 156 | else: |
154 | soc_family = d.getVar('SOC_FAMILY') or "" | 157 | soc_family = d.getVar('SOC_FAMILY') or "" |
155 | if soc_family == "zynqmp": | 158 | if soc_family == "zynqmp": |