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author | Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com> | 2020-10-27 21:46:28 -0600 |
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committer | Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> | 2020-10-29 08:56:55 -0700 |
commit | b3963be5447ea1b71ca11798ab9269b75b42178b (patch) | |
tree | aa8e8d28549f3713ee2369f46f29c9239d84ad23 /meta-xilinx-bsp/recipes-kernel | |
parent | b5a9cf499170d0a82b971f73795bfbafb1ce2dfd (diff) | |
download | meta-xilinx-b3963be5447ea1b71ca11798ab9269b75b42178b.tar.gz |
kernel-module-dp: Add support for Xilinx DP drivers
This recipe will pull in the Xilinx DP drivers and associated
components, for soft IP, to be built as an out-of-tree modules.
Following out-of-tree modules will be built
dp-rx (v4l2):
The DisplayPortPlay 1.4 Rx Subsystem is a feature-rich soft IP
incorporating all the necessary logic to properly interface with PHY
layers and provide DP decoding functionality. The subsystem is a
hierarchical IP that bundles a collection of DP RX-related IP
sub-cores and outputs them as a single IP. The subsystem outputs
multi-pixel video to AXI4-Stream Protocol interface.
dp-tx (drm):
The DisplayPortPlay 1.4 Tx subsystem is a feature-rich soft IP
incorporating all the necessary logic to properly interface with
xilinx PHY layers and provide DP encoding functionality. The subsystem
is a hierarchical IP that bundles a collection of DP TX-related IP
sub-cores and outputs them as a single IP. The subsystem takes incoming
video and transfers them to an DP stream. The stream is then forwarded
to the video PHY layer.
video-phy (phy):
Xilinx Video Phy implements the physical layer for enabling the
plug-and-play connectivity with dp MAC transmit and receive
subsystems. This driver is also used as the repository for common files
used by dp rx and tx drivers including hdcp1.4 and hdcp2.x software
stack.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com>
Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp/recipes-kernel')
-rwxr-xr-x | meta-xilinx-bsp/recipes-kernel/dp/kernel-module-dp_git.bb | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/meta-xilinx-bsp/recipes-kernel/dp/kernel-module-dp_git.bb b/meta-xilinx-bsp/recipes-kernel/dp/kernel-module-dp_git.bb new file mode 100755 index 00000000..e5356d86 --- /dev/null +++ b/meta-xilinx-bsp/recipes-kernel/dp/kernel-module-dp_git.bb | |||
@@ -0,0 +1,26 @@ | |||
1 | SUMMARY = "Xilinx DisplayPort Linux Kernel module" | ||
2 | DESCRIPTION = "Out-of-tree DisplayPort(DP) kernel modules provider for aarch64 devices" | ||
3 | SECTION = "kernel/modules" | ||
4 | LICENSE = "GPLv2" | ||
5 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" | ||
6 | |||
7 | XLNX_DP_VERSION = "5.4.0" | ||
8 | PV = "${XLNX_DP_VERSION}" | ||
9 | |||
10 | S = "${WORKDIR}/git" | ||
11 | |||
12 | BRANCH ?= "master" | ||
13 | REPO ?= "git://github.com/xilinx/dp-modules.git;protocol=https" | ||
14 | SRCREV ?= "a3a7dfe17cf610fd4186b11638e1ce6b78dc958a" | ||
15 | |||
16 | BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" | ||
17 | SRC_URI = "${REPO};${BRANCHARG}" | ||
18 | |||
19 | inherit module | ||
20 | |||
21 | EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" | ||
22 | COMPATIBLE_MACHINE = "^$" | ||
23 | COMPATIBLE_MACHINE_zynqmp = "zynqmp" | ||
24 | COMPATIBLE_MACHINE_versal = "versal" | ||
25 | |||
26 | PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" | ||