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authorMark Hatle <mark.hatle@xilinx.com>2021-12-15 14:13:18 -0800
committerMark Hatle <mark.hatle@xilinx.com>2022-01-14 15:37:05 -0800
commit2ee7ac363ce6537a51c7330dc66efd3629927952 (patch)
tree7b06acae3fdb78e2c0641c8de15cbb47ea5e87e4 /meta-xilinx-bsp/recipes-bsp
parentdf7dfe1605f03c236217bdf49e99837d6c150f6b (diff)
downloadmeta-xilinx-2ee7ac363ce6537a51c7330dc66efd3629927952.tar.gz
device-tree: Break into base bb and board specific bbappend
Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp/recipes-bsp')
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend23
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts56
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi445
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi43
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts98
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts85
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi63
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi215
-rw-r--r--meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts184
9 files changed, 1212 insertions, 0 deletions
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
new file mode 100644
index 00000000..df31778c
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
@@ -0,0 +1,23 @@
1FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
2
3# device tree sources for the various machines
4COMPATIBLE_MACHINE:picozed-zynq7 = ".*"
5SRC_URI:append:picozed-zynq7 = " file://picozed-zynq7.dts"
6
7COMPATIBLE_MACHINE:qemu-zynq7 = ".*"
8SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts"
9
10COMPATIBLE_MACHINE:zybo-linux-bd-zynq7 = ".*"
11SRC_URI:append:zybo-linux-bd-zynq7 = " \
12 file://zybo-linux-bd-zynq7.dts \
13 file://pcw.dtsi \
14 file://pl.dtsi \
15 "
16
17COMPATIBLE_MACHINE:kc705-microblazeel = ".*"
18SRC_URI:append:kc705-microblazeel = " \
19 file://kc705-microblazeel.dts \
20 file://pl.dtsi \
21 file://system-conf.dtsi \
22 "
23
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
new file mode 100644
index 00000000..45e488c1
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/kc705-microblazeel.dts
@@ -0,0 +1,56 @@
1/dts-v1/;
2/include/ "pl.dtsi"
3/include/ "system-conf.dtsi"
4/ {
5 hard-reset-gpios = <&reset_gpio 0 1>;
6 aliases {
7 ethernet0 = &axi_ethernet;
8 i2c0 = &iic_main;
9 serial0 = &rs232_uart;
10 };
11 memory {
12 device_type = "memory";
13 reg = <0x80000000 0x40000000>;
14 };
15};
16
17&iic_main {
18 i2cswitch@74 {
19 compatible = "nxp,pca9548";
20 #address-cells = <1>;
21 #size-cells = <0>;
22 reg = <0x74>;
23 i2c@0 {
24 #address-cells = <1>;
25 #size-cells = <0>;
26 reg = <0>;
27 si570: clock-generator@5d {
28 #clock-cells = <0>;
29 compatible = "silabs,si570";
30 temperature-stability = <50>;
31 reg = <0x5d>;
32 factory-fout = <156250000>;
33 clock-frequency = <148500000>;
34 };
35 };
36 i2c@3 {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 reg = <3>;
40 eeprom@54 {
41 compatible = "at,24c08";
42 reg = <0x54>;
43 };
44 };
45 };
46};
47
48&axi_ethernet {
49 phy-handle = <&phy0>;
50 axi_ethernet_mdio: mdio {
51 phy0: phy@7 {
52 device_type = "ethernet-phy";
53 reg = <7>;
54 };
55 };
56};
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
new file mode 100644
index 00000000..43bc2ab7
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/pl.dtsi
@@ -0,0 +1,445 @@
1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "xlnx,microblaze";
5 model = "Xilinx MicroBlaze";
6 cpus {
7 #address-cells = <1>;
8 #cpus = <1>;
9 #size-cells = <0>;
10 microblaze_0: cpu@0 {
11 bus-handle = <&amba_pl>;
12 clock-frequency = <200000000>;
13 clocks = <&clk_cpu>;
14 compatible = "xlnx,microblaze-10.0";
15 d-cache-baseaddr = <0x0000000080000000>;
16 d-cache-highaddr = <0x00000000bfffffff>;
17 d-cache-line-size = <0x20>;
18 d-cache-size = <0x4000>;
19 device_type = "cpu";
20 i-cache-baseaddr = <0x0000000080000000>;
21 i-cache-highaddr = <0x00000000bfffffff>;
22 i-cache-line-size = <0x10>;
23 i-cache-size = <0x4000>;
24 interrupt-handle = <&microblaze_0_axi_intc>;
25 model = "microblaze,10.0";
26 timebase-frequency = <200000000>;
27 xlnx,addr-size = <0x20>;
28 xlnx,addr-tag-bits = <0x10>;
29 xlnx,allow-dcache-wr = <0x1>;
30 xlnx,allow-icache-wr = <0x1>;
31 xlnx,area-optimized = <0x0>;
32 xlnx,async-interrupt = <0x1>;
33 xlnx,async-wakeup = <0x3>;
34 xlnx,avoid-primitives = <0x0>;
35 xlnx,base-vectors = <0x0000000000000000>;
36 xlnx,branch-target-cache-size = <0x0>;
37 xlnx,cache-byte-size = <0x4000>;
38 xlnx,d-axi = <0x1>;
39 xlnx,d-lmb = <0x1>;
40 xlnx,d-lmb-mon = <0x0>;
41 xlnx,daddr-size = <0x20>;
42 xlnx,data-size = <0x20>;
43 xlnx,dc-axi-mon = <0x0>;
44 xlnx,dcache-addr-tag = <0x10>;
45 xlnx,dcache-always-used = <0x1>;
46 xlnx,dcache-byte-size = <0x4000>;
47 xlnx,dcache-data-width = <0x0>;
48 xlnx,dcache-force-tag-lutram = <0x0>;
49 xlnx,dcache-line-len = <0x8>;
50 xlnx,dcache-use-writeback = <0x0>;
51 xlnx,dcache-victims = <0x0>;
52 xlnx,debug-counter-width = <0x20>;
53 xlnx,debug-enabled = <0x1>;
54 xlnx,debug-event-counters = <0x5>;
55 xlnx,debug-external-trace = <0x0>;
56 xlnx,debug-interface = <0x0>;
57 xlnx,debug-latency-counters = <0x1>;
58 xlnx,debug-profile-size = <0x0>;
59 xlnx,debug-trace-async-reset = <0x0>;
60 xlnx,debug-trace-size = <0x2000>;
61 xlnx,div-zero-exception = <0x1>;
62 xlnx,dp-axi-mon = <0x0>;
63 xlnx,dynamic-bus-sizing = <0x0>;
64 xlnx,ecc-use-ce-exception = <0x0>;
65 xlnx,edge-is-positive = <0x1>;
66 xlnx,enable-discrete-ports = <0x0>;
67 xlnx,endianness = <0x1>;
68 xlnx,fault-tolerant = <0x0>;
69 xlnx,fpu-exception = <0x0>;
70 xlnx,freq = <0xbebc200>;
71 xlnx,fsl-exception = <0x0>;
72 xlnx,fsl-links = <0x0>;
73 xlnx,i-axi = <0x0>;
74 xlnx,i-lmb = <0x1>;
75 xlnx,i-lmb-mon = <0x0>;
76 xlnx,iaddr-size = <0x20>;
77 xlnx,ic-axi-mon = <0x0>;
78 xlnx,icache-always-used = <0x1>;
79 xlnx,icache-data-width = <0x0>;
80 xlnx,icache-force-tag-lutram = <0x0>;
81 xlnx,icache-line-len = <0x4>;
82 xlnx,icache-streams = <0x1>;
83 xlnx,icache-victims = <0x8>;
84 xlnx,ill-opcode-exception = <0x1>;
85 xlnx,imprecise-exceptions = <0x0>;
86 xlnx,instr-size = <0x20>;
87 xlnx,interconnect = <0x2>;
88 xlnx,interrupt-is-edge = <0x0>;
89 xlnx,interrupt-mon = <0x0>;
90 xlnx,ip-axi-mon = <0x0>;
91 xlnx,lockstep-master = <0x0>;
92 xlnx,lockstep-select = <0x0>;
93 xlnx,lockstep-slave = <0x0>;
94 xlnx,mmu-dtlb-size = <0x4>;
95 xlnx,mmu-itlb-size = <0x2>;
96 xlnx,mmu-privileged-instr = <0x0>;
97 xlnx,mmu-tlb-access = <0x3>;
98 xlnx,mmu-zones = <0x2>;
99 xlnx,num-sync-ff-clk = <0x2>;
100 xlnx,num-sync-ff-clk-debug = <0x2>;
101 xlnx,num-sync-ff-clk-irq = <0x1>;
102 xlnx,num-sync-ff-dbg-clk = <0x1>;
103 xlnx,num-sync-ff-dbg-trace-clk = <0x2>;
104 xlnx,number-of-pc-brk = <0x1>;
105 xlnx,number-of-rd-addr-brk = <0x0>;
106 xlnx,number-of-wr-addr-brk = <0x0>;
107 xlnx,opcode-0x0-illegal = <0x1>;
108 xlnx,optimization = <0x0>;
109 xlnx,pc-width = <0x20>;
110 xlnx,piaddr-size = <0x20>;
111 xlnx,pvr = <0x2>;
112 xlnx,pvr-user1 = <0x00>;
113 xlnx,pvr-user2 = <0x00000000>;
114 xlnx,reset-msr = <0x00000000>;
115 xlnx,reset-msr-bip = <0x0>;
116 xlnx,reset-msr-dce = <0x0>;
117 xlnx,reset-msr-ee = <0x0>;
118 xlnx,reset-msr-eip = <0x0>;
119 xlnx,reset-msr-ice = <0x0>;
120 xlnx,reset-msr-ie = <0x0>;
121 xlnx,sco = <0x0>;
122 xlnx,trace = <0x0>;
123 xlnx,unaligned-exceptions = <0x1>;
124 xlnx,use-barrel = <0x1>;
125 xlnx,use-branch-target-cache = <0x0>;
126 xlnx,use-config-reset = <0x0>;
127 xlnx,use-dcache = <0x1>;
128 xlnx,use-div = <0x1>;
129 xlnx,use-ext-brk = <0x0>;
130 xlnx,use-ext-nm-brk = <0x0>;
131 xlnx,use-extended-fsl-instr = <0x0>;
132 xlnx,use-fpu = <0x0>;
133 xlnx,use-hw-mul = <0x2>;
134 xlnx,use-icache = <0x1>;
135 xlnx,use-interrupt = <0x2>;
136 xlnx,use-mmu = <0x3>;
137 xlnx,use-msr-instr = <0x1>;
138 xlnx,use-non-secure = <0x0>;
139 xlnx,use-pcmp-instr = <0x1>;
140 xlnx,use-reorder-instr = <0x1>;
141 xlnx,use-stack-protection = <0x0>;
142 };
143 };
144 clocks {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 clk_cpu: clk_cpu@0 {
148 #clock-cells = <0>;
149 clock-frequency = <200000000>;
150 clock-output-names = "clk_cpu";
151 compatible = "fixed-clock";
152 reg = <0>;
153 };
154 clk_bus_0: clk_bus_0@1 {
155 #clock-cells = <0>;
156 clock-frequency = <200000000>;
157 clock-output-names = "clk_bus_0";
158 compatible = "fixed-clock";
159 reg = <1>;
160 };
161 };
162 amba_pl: amba_pl {
163 #address-cells = <1>;
164 #size-cells = <1>;
165 compatible = "simple-bus";
166 ranges ;
167 axi_ethernet: ethernet@40c00000 {
168 axistream-connected = <&axi_ethernet_dma>;
169 axistream-control-connected = <&axi_ethernet_dma>;
170 clock-frequency = <100000000>;
171 compatible = "xlnx,axi-ethernet-1.00.a";
172 device_type = "network";
173 interrupt-parent = <&microblaze_0_axi_intc>;
174 interrupts = <4 2>;
175 phy-mode = "gmii";
176 reg = <0x40c00000 0x40000>;
177 xlnx = <0x0>;
178 xlnx,axiliteclkrate = <0x0>;
179 xlnx,axisclkrate = <0x0>;
180 xlnx,clockselection = <0x0>;
181 xlnx,enableasyncsgmii = <0x0>;
182 xlnx,gt-type = <0x0>;
183 xlnx,gtinex = <0x0>;
184 xlnx,gtlocation = <0x0>;
185 xlnx,gtrefclksrc = <0x0>;
186 xlnx,include-dre ;
187 xlnx,instantiatebitslice0 = <0x0>;
188 xlnx,phy-type = <0x1>;
189 xlnx,phyaddr = <0x1>;
190 xlnx,rable = <0x0>;
191 xlnx,rxcsum = <0x0>;
192 xlnx,rxlane0-placement = <0x0>;
193 xlnx,rxlane1-placement = <0x0>;
194 xlnx,rxmem = <0x1000>;
195 xlnx,rxnibblebitslice0used = <0x0>;
196 xlnx,tx-in-upper-nibble = <0x1>;
197 xlnx,txcsum = <0x0>;
198 xlnx,txlane0-placement = <0x0>;
199 xlnx,txlane1-placement = <0x0>;
200 axi_ethernet_mdio: mdio {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 };
204 };
205 axi_ethernet_dma: dma@41e00000 {
206 #dma-cells = <1>;
207 axistream-connected = <&axi_ethernet>;
208 axistream-control-connected = <&axi_ethernet>;
209 clock-frequency = <200000000>;
210 clock-names = "s_axi_lite_aclk";
211 clocks = <&clk_bus_0>;
212 compatible = "xlnx,eth-dma";
213 interrupt-parent = <&microblaze_0_axi_intc>;
214 interrupts = <3 2 2 2>;
215 reg = <0x41e00000 0x10000>;
216 xlnx,include-dre ;
217 };
218 axi_timer_0: timer@41c00000 {
219 clock-frequency = <200000000>;
220 clocks = <&clk_bus_0>;
221 compatible = "xlnx,xps-timer-1.00.a";
222 interrupt-parent = <&microblaze_0_axi_intc>;
223 interrupts = <5 2>;
224 reg = <0x41c00000 0x10000>;
225 xlnx,count-width = <0x20>;
226 xlnx,gen0-assert = <0x1>;
227 xlnx,gen1-assert = <0x1>;
228 xlnx,one-timer-only = <0x0>;
229 xlnx,trig0-assert = <0x1>;
230 xlnx,trig1-assert = <0x1>;
231 };
232 calib_complete_gpio: gpio@40010000 {
233 #gpio-cells = <2>;
234 compatible = "xlnx,xps-gpio-1.00.a";
235 gpio-controller ;
236 reg = <0x40010000 0x10000>;
237 xlnx,all-inputs = <0x1>;
238 xlnx,all-inputs-2 = <0x0>;
239 xlnx,all-outputs = <0x0>;
240 xlnx,all-outputs-2 = <0x0>;
241 xlnx,dout-default = <0x00000000>;
242 xlnx,dout-default-2 = <0x00000000>;
243 xlnx,gpio-width = <0x1>;
244 xlnx,gpio2-width = <0x20>;
245 xlnx,interrupt-present = <0x0>;
246 xlnx,is-dual = <0x0>;
247 xlnx,tri-default = <0xFFFFFFFF>;
248 xlnx,tri-default-2 = <0xFFFFFFFF>;
249 };
250 dip_switches_4bits: gpio@40020000 {
251 #gpio-cells = <2>;
252 compatible = "xlnx,xps-gpio-1.00.a";
253 gpio-controller ;
254 reg = <0x40020000 0x10000>;
255 xlnx,all-inputs = <0x1>;
256 xlnx,all-inputs-2 = <0x0>;
257 xlnx,all-outputs = <0x0>;
258 xlnx,all-outputs-2 = <0x0>;
259 xlnx,dout-default = <0x00000000>;
260 xlnx,dout-default-2 = <0x00000000>;
261 xlnx,gpio-width = <0x4>;
262 xlnx,gpio2-width = <0x20>;
263 xlnx,interrupt-present = <0x0>;
264 xlnx,is-dual = <0x0>;
265 xlnx,tri-default = <0xFFFFFFFF>;
266 xlnx,tri-default-2 = <0xFFFFFFFF>;
267 };
268 iic_main: i2c@40800000 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 clock-frequency = <200000000>;
272 clocks = <&clk_bus_0>;
273 compatible = "xlnx,xps-iic-2.00.a";
274 interrupt-parent = <&microblaze_0_axi_intc>;
275 interrupts = <1 2>;
276 reg = <0x40800000 0x10000>;
277 };
278 led_8bits: gpio@40030000 {
279 #gpio-cells = <2>;
280 compatible = "xlnx,xps-gpio-1.00.a";
281 gpio-controller ;
282 reg = <0x40030000 0x10000>;
283 xlnx,all-inputs = <0x0>;
284 xlnx,all-inputs-2 = <0x0>;
285 xlnx,all-outputs = <0x1>;
286 xlnx,all-outputs-2 = <0x0>;
287 xlnx,dout-default = <0x00000000>;
288 xlnx,dout-default-2 = <0x00000000>;
289 xlnx,gpio-width = <0x8>;
290 xlnx,gpio2-width = <0x20>;
291 xlnx,interrupt-present = <0x0>;
292 xlnx,is-dual = <0x0>;
293 xlnx,tri-default = <0xFFFFFFFF>;
294 xlnx,tri-default-2 = <0xFFFFFFFF>;
295 };
296 linear_flash: flash@60000000 {
297 bank-width = <2>;
298 compatible = "cfi-flash";
299 reg = <0x60000000 0x8000000>;
300 xlnx,axi-clk-period-ps = <0x1388>;
301 xlnx,include-datawidth-matching-0 = <0x1>;
302 xlnx,include-datawidth-matching-1 = <0x1>;
303 xlnx,include-datawidth-matching-2 = <0x1>;
304 xlnx,include-datawidth-matching-3 = <0x1>;
305 xlnx,include-negedge-ioregs = <0x0>;
306 xlnx,lflash-period-ps = <0x1388>;
307 xlnx,linear-flash-sync-burst = <0x0>;
308 xlnx,max-mem-width = <0x10>;
309 xlnx,mem-a-lsb = <0x0>;
310 xlnx,mem-a-msb = <0x1f>;
311 xlnx,mem0-type = <0x2>;
312 xlnx,mem0-width = <0x10>;
313 xlnx,mem1-type = <0x0>;
314 xlnx,mem1-width = <0x10>;
315 xlnx,mem2-type = <0x0>;
316 xlnx,mem2-width = <0x10>;
317 xlnx,mem3-type = <0x0>;
318 xlnx,mem3-width = <0x10>;
319 xlnx,num-banks-mem = <0x1>;
320 xlnx,page-size = <0x10>;
321 xlnx,parity-type-mem-0 = <0x0>;
322 xlnx,parity-type-mem-1 = <0x0>;
323 xlnx,parity-type-mem-2 = <0x0>;
324 xlnx,parity-type-mem-3 = <0x0>;
325 xlnx,port-diff = <0x0>;
326 xlnx,s-axi-en-reg = <0x0>;
327 xlnx,s-axi-mem-addr-width = <0x20>;
328 xlnx,s-axi-mem-data-width = <0x20>;
329 xlnx,s-axi-mem-id-width = <0x1>;
330 xlnx,s-axi-reg-addr-width = <0x5>;
331 xlnx,s-axi-reg-data-width = <0x20>;
332 xlnx,synch-pipedelay-0 = <0x1>;
333 xlnx,synch-pipedelay-1 = <0x1>;
334 xlnx,synch-pipedelay-2 = <0x1>;
335 xlnx,synch-pipedelay-3 = <0x1>;
336 xlnx,tavdv-ps-mem-0 = <0x1fbd0>;
337 xlnx,tavdv-ps-mem-1 = <0x3a98>;
338 xlnx,tavdv-ps-mem-2 = <0x3a98>;
339 xlnx,tavdv-ps-mem-3 = <0x3a98>;
340 xlnx,tcedv-ps-mem-0 = <0x1fbd0>;
341 xlnx,tcedv-ps-mem-1 = <0x3a98>;
342 xlnx,tcedv-ps-mem-2 = <0x3a98>;
343 xlnx,tcedv-ps-mem-3 = <0x3a98>;
344 xlnx,thzce-ps-mem-0 = <0x88b8>;
345 xlnx,thzce-ps-mem-1 = <0x1b58>;
346 xlnx,thzce-ps-mem-2 = <0x1b58>;
347 xlnx,thzce-ps-mem-3 = <0x1b58>;
348 xlnx,thzoe-ps-mem-0 = <0x1b58>;
349 xlnx,thzoe-ps-mem-1 = <0x1b58>;
350 xlnx,thzoe-ps-mem-2 = <0x1b58>;
351 xlnx,thzoe-ps-mem-3 = <0x1b58>;
352 xlnx,tlzwe-ps-mem-0 = <0xc350>;
353 xlnx,tlzwe-ps-mem-1 = <0x0>;
354 xlnx,tlzwe-ps-mem-2 = <0x0>;
355 xlnx,tlzwe-ps-mem-3 = <0x0>;
356 xlnx,tpacc-ps-flash-0 = <0x61a8>;
357 xlnx,tpacc-ps-flash-1 = <0x61a8>;
358 xlnx,tpacc-ps-flash-2 = <0x61a8>;
359 xlnx,tpacc-ps-flash-3 = <0x61a8>;
360 xlnx,twc-ps-mem-0 = <0x11170>;
361 xlnx,twc-ps-mem-1 = <0x3a98>;
362 xlnx,twc-ps-mem-2 = <0x3a98>;
363 xlnx,twc-ps-mem-3 = <0x3a98>;
364 xlnx,twp-ps-mem-0 = <0x13880>;
365 xlnx,twp-ps-mem-1 = <0x2ee0>;
366 xlnx,twp-ps-mem-2 = <0x2ee0>;
367 xlnx,twp-ps-mem-3 = <0x2ee0>;
368 xlnx,twph-ps-mem-0 = <0x13880>;
369 xlnx,twph-ps-mem-1 = <0x2ee0>;
370 xlnx,twph-ps-mem-2 = <0x2ee0>;
371 xlnx,twph-ps-mem-3 = <0x2ee0>;
372 xlnx,use-startup = <0x0>;
373 xlnx,use-startup-int = <0x0>;
374 xlnx,wr-rec-time-mem-0 = <0x186a0>;
375 xlnx,wr-rec-time-mem-1 = <0x6978>;
376 xlnx,wr-rec-time-mem-2 = <0x6978>;
377 xlnx,wr-rec-time-mem-3 = <0x6978>;
378 };
379 microblaze_0_axi_intc: interrupt-controller@41200000 {
380 #interrupt-cells = <2>;
381 compatible = "xlnx,xps-intc-1.00.a";
382 interrupt-controller ;
383 reg = <0x41200000 0x10000>;
384 xlnx,kind-of-intr = <0x0>;
385 xlnx,num-intr-inputs = <0x6>;
386 };
387 push_buttons_5bits: gpio@40040000 {
388 #gpio-cells = <2>;
389 compatible = "xlnx,xps-gpio-1.00.a";
390 gpio-controller ;
391 reg = <0x40040000 0x10000>;
392 xlnx,all-inputs = <0x1>;
393 xlnx,all-inputs-2 = <0x0>;
394 xlnx,all-outputs = <0x0>;
395 xlnx,all-outputs-2 = <0x0>;
396 xlnx,dout-default = <0x00000000>;
397 xlnx,dout-default-2 = <0x00000000>;
398 xlnx,gpio-width = <0x5>;
399 xlnx,gpio2-width = <0x20>;
400 xlnx,interrupt-present = <0x0>;
401 xlnx,is-dual = <0x0>;
402 xlnx,tri-default = <0xFFFFFFFF>;
403 xlnx,tri-default-2 = <0xFFFFFFFF>;
404 };
405 reset_gpio: gpio@40000000 {
406 #gpio-cells = <2>;
407 compatible = "xlnx,xps-gpio-1.00.a";
408 gpio-controller ;
409 reg = <0x40000000 0x10000>;
410 xlnx,all-inputs = <0x0>;
411 xlnx,all-inputs-2 = <0x0>;
412 xlnx,all-outputs = <0x1>;
413 xlnx,all-outputs-2 = <0x0>;
414 xlnx,dout-default = <0x00000000>;
415 xlnx,dout-default-2 = <0x00000000>;
416 xlnx,gpio-width = <0x1>;
417 xlnx,gpio2-width = <0x20>;
418 xlnx,interrupt-present = <0x0>;
419 xlnx,is-dual = <0x0>;
420 xlnx,tri-default = <0xFFFFFFFF>;
421 xlnx,tri-default-2 = <0xFFFFFFFF>;
422 };
423 rs232_uart: serial@44a00000 {
424 clock-frequency = <200000000>;
425 clocks = <&clk_bus_0>;
426 compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a";
427 current-speed = <115200>;
428 device_type = "serial";
429 interrupt-parent = <&microblaze_0_axi_intc>;
430 interrupts = <0 2>;
431 port-number = <0>;
432 reg = <0x44a00000 0x10000>;
433 reg-offset = <0x1000>;
434 reg-shift = <2>;
435 xlnx,external-xin-clk-hz = <0x17d7840>;
436 xlnx,external-xin-clk-hz-d = <0x19>;
437 xlnx,has-external-rclk = <0x0>;
438 xlnx,has-external-xin = <0x0>;
439 xlnx,is-a-16550 = <0x1>;
440 xlnx,s-axi-aclk-freq-hz-d = "200.0";
441 xlnx,use-modem-ports = <0x1>;
442 xlnx,use-user-ports = <0x1>;
443 };
444 };
445};
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
new file mode 100644
index 00000000..09b26c6a
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/kc705-microblazeel/system-conf.dtsi
@@ -0,0 +1,43 @@
1/*
2 * CAUTION: This file is automatically generated by PetaLinux SDK.
3 * DO NOT modify this file
4 */
5
6
7/ {
8 chosen {
9 bootargs = "console=ttyS0,115200 earlyprintk";
10 stdout-path = "serial0:115200n8";
11 };
12};
13
14&axi_ethernet {
15 local-mac-address = [00 0a 35 00 22 01];
16};
17
18&linear_flash {
19 reg = <0x60000000 0x08000000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
22 partition@0x00000000 {
23 label = "fpga";
24 reg = <0x00000000 0x00b00000>;
25 };
26 partition@0x00b00000 {
27 label = "boot";
28 reg = <0x00b00000 0x00080000>;
29 };
30 partition@0x00b80000 {
31 label = "bootenv";
32 reg = <0x00b80000 0x00020000>;
33 };
34 partition@0x00ba0000 {
35 label = "kernel";
36 reg = <0x00ba0000 0x00c00000>;
37 };
38 partition@0x017a0000 {
39 label = "spare";
40 reg = <0x017a0000 0x00000000>;
41 };
42};
43
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts
new file mode 100644
index 00000000..6f9b653a
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts
@@ -0,0 +1,98 @@
1/dts-v1/;
2/include/ "zynq-7000.dtsi"
3/include/ "zynq-7000-qspi-dummy.dtsi"
4
5/ {
6 model = "Avnet picoZed";
7 compatible = "avnet,picozed", "xlnx,zynq-7000";
8
9 aliases {
10 ethernet0 = &gem0;
11 serial0 = &uart1;
12 };
13
14 memory {
15 device_type = "memory";
16 reg = <0x0 0x40000000>;
17 };
18
19 chosen {
20 bootargs = "earlyprintk";
21 stdout-path = "serial0:115200n8";
22 };
23
24 usb_phy0: phy0 {
25 compatible = "usb-nop-xceiv";
26 #phy-cells = <0>;
27 reset-gpios = <&gpio0 7 1>; /* MIO 7, GPIO_ACTIVE_LOW */
28 };
29};
30
31&gem0 {
32 status = "okay";
33 phy-mode = "rgmii-id";
34 phy-handle = <&ethernet_phy>;
35
36 ethernet_phy: ethernet-phy@0 {
37 compatible = "marvell,88e1512", "marvell,88e1510";
38 device_type = "ethernet-phy";
39 reg = <0>;
40 };
41};
42
43&sdhci1 {
44 status = "okay";
45 /* SD1 is onnected to a non-removable eMMC flash device */
46 non-removable;
47};
48
49&uart1 {
50 status = "okay";
51};
52
53&usb0 {
54 status = "okay";
55 dr_mode = "host";
56 usb-phy = <&usb_phy0>;
57};
58
59&qspi {
60 status = "okay";
61 primary_flash: ps7-qspi@0 {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "micron,m25p80", "spansion,s25fl128s", "jedec,spi-nor";
65 reg = <0x0>;
66 spi-max-frequency = <50000000>;
67 /* Example 16M partition table using U-Boot + U-Boot SPL */
68 partition@0x0 {
69 label = "boot";
70 reg = <0x0 0xe0000>;
71 };
72 partition@0xe0000 {
73 label = "ubootenv";
74 reg = <0xe0000 0x20000>;
75 };
76 partition@0x100000 {
77 label = "uboot";
78 reg = <0x100000 0x100000>;
79 };
80 partition@0x200000 {
81 label = "kernel";
82 reg = <0x200000 0x4f0000>;
83 };
84 partition@0x6f0000 {
85 label = "devicetree";
86 reg = <0x6f0000 0x10000>;
87 };
88 partition@0x700000 {
89 label = "rootfs";
90 reg = <0x700000 0x400000>;
91 };
92 partition@0xb00000 {
93 label = "spare";
94 reg = <0xb00000 0x500000>;
95 };
96 };
97};
98
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts
new file mode 100644
index 00000000..cd0694d6
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts
@@ -0,0 +1,85 @@
1/dts-v1/;
2/include/ "zynq-7000.dtsi"
3/include/ "zynq-7000-qspi-dummy.dtsi"
4
5/ {
6 model = "Zynq A9 QEMU";
7 compatible = "qemu,xilinx-zynq-a9", "xlnx,zynq-7000";
8
9 aliases {
10 ethernet0 = &gem0;
11 serial0 = &uart1;
12 };
13
14 memory {
15 device_type = "memory";
16 reg = <0x0 0x40000000>;
17 };
18
19 chosen {
20 bootargs = "earlyprintk";
21 stdout-path = "serial0:115200n8";
22 };
23};
24
25&amba {
26 /* Setup a fixed 25 MHz clock (100Mbps) to trick the ethernet driver */
27 fixednetclk: clock {
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
30 clock-frequency = <25000000>;
31 };
32};
33
34&gem0 {
35 status = "okay";
36 clocks = <&clkc 30>, <&clkc 30>, <&fixednetclk>, <&fixednetclk>, <&clkc 30>;
37 phy-mode = "rgmii-id";
38 phy-handle = <&ethernet_phy>;
39
40 ethernet_phy: ethernet-phy@23 {
41 device_type = "ethernet-phy";
42 reg = <23>;
43 };
44};
45
46&sdhci0 {
47 status = "okay";
48};
49
50&uart1 {
51 status = "okay";
52};
53
54&qspi {
55 status = "okay";
56 is-dual = <1>;
57 primary_flash: ps7-qspi@0 {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "st,m25p80";
61 reg = <0x0>;
62 spi-max-frequency = <50000000>;
63 partition@0x00000000 {
64 label = "boot";
65 reg = <0x00000000 0x00500000>;
66 };
67 partition@0x00500000 {
68 label = "bootenv";
69 reg = <0x00500000 0x00020000>;
70 };
71 partition@0x00520000 {
72 label = "config";
73 reg = <0x00520000 0x00020000>;
74 };
75 partition@0x00540000 {
76 label = "image";
77 reg = <0x00540000 0x00a80000>;
78 };
79 partition@0x00fc0000 {
80 label = "spare";
81 reg = <0x00fc0000 0x00000000>;
82 };
83 };
84};
85
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi
new file mode 100644
index 00000000..0f678d39
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi
@@ -0,0 +1,63 @@
1/*
2 * CAUTION: This file is automatically generated by Xilinx.
3 * Version: HSI 2015.4
4 * Today is: Fri Mar 4 15:40:49 2016
5*/
6
7
8/ {
9 cpus {
10 cpu@0 {
11 operating-points = <650000 1000000 325000 1000000>;
12 };
13 };
14};
15&gem0 {
16 phy-mode = "rgmii-id";
17 status = "okay";
18 xlnx,ptp-enet-clock = <0x6750918>;
19};
20&gpio0 {
21 emio-gpio-width = <64>;
22 gpio-mask-high = <0x0>;
23 gpio-mask-low = <0x5600>;
24};
25&i2c0 {
26 clock-frequency = <400000>;
27 status = "okay";
28};
29&i2c1 {
30 clock-frequency = <400000>;
31 status = "okay";
32};
33&intc {
34 num_cpus = <2>;
35 num_interrupts = <96>;
36};
37&qspi {
38 is-dual = <0>;
39 num-cs = <1>;
40 status = "okay";
41};
42&sdhci0 {
43 status = "okay";
44 xlnx,has-cd = <0x1>;
45 xlnx,has-power = <0x0>;
46 xlnx,has-wp = <0x1>;
47};
48&uart1 {
49 current-speed = <115200>;
50 device_type = "serial";
51 port-number = <0>;
52 status = "okay";
53};
54&usb0 {
55 dr_mode = "host";
56 phy_type = "ulpi";
57 status = "okay";
58 usb-reset = <&gpio0 46 0>;
59};
60&clkc {
61 fclk-enable = <0x3>;
62 ps-clk-frequency = <50000000>;
63};
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi
new file mode 100644
index 00000000..32bc7688
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi
@@ -0,0 +1,215 @@
1/*
2 * CAUTION: This file is automatically generated by Xilinx.
3 * Version: HSI 2015.4
4 * Today is: Fri Mar 4 15:40:49 2016
5*/
6
7
8/ {
9 amba_pl: amba_pl {
10 #address-cells = <1>;
11 #size-cells = <1>;
12 compatible = "simple-bus";
13 ranges ;
14 axi_dynclk_0: axi_dynclk@43c10000 {
15 compatible = "xlnx,axi-dynclk-1.0";
16 reg = <0x43c10000 0x10000>;
17 xlnx,s00-axi-addr-width = <0x5>;
18 xlnx,s00-axi-data-width = <0x20>;
19 };
20 axi_gpio_btn: gpio@41210000 {
21 #gpio-cells = <2>;
22 compatible = "xlnx,xps-gpio-1.00.a";
23 gpio-controller ;
24 reg = <0x41210000 0x10000>;
25 xlnx,all-inputs = <0x1>;
26 xlnx,all-inputs-2 = <0x0>;
27 xlnx,all-outputs = <0x0>;
28 xlnx,all-outputs-2 = <0x0>;
29 xlnx,dout-default = <0x00000000>;
30 xlnx,dout-default-2 = <0x00000000>;
31 xlnx,gpio-width = <0x4>;
32 xlnx,gpio2-width = <0x20>;
33 xlnx,interrupt-present = <0x0>;
34 xlnx,is-dual = <0x0>;
35 xlnx,tri-default = <0xFFFFFFFF>;
36 xlnx,tri-default-2 = <0xFFFFFFFF>;
37 };
38 axi_gpio_hdmi: gpio@41230000 {
39 #gpio-cells = <2>;
40 compatible = "xlnx,xps-gpio-1.00.a";
41 gpio-controller ;
42 interrupt-parent = <&intc>;
43 interrupts = <0 29 4>;
44 reg = <0x41230000 0x10000>;
45 xlnx,all-inputs = <0x1>;
46 xlnx,all-inputs-2 = <0x0>;
47 xlnx,all-outputs = <0x0>;
48 xlnx,all-outputs-2 = <0x0>;
49 xlnx,dout-default = <0x00000000>;
50 xlnx,dout-default-2 = <0x00000000>;
51 xlnx,gpio-width = <0x1>;
52 xlnx,gpio2-width = <0x20>;
53 xlnx,interrupt-present = <0x1>;
54 xlnx,is-dual = <0x0>;
55 xlnx,tri-default = <0xFFFFFFFF>;
56 xlnx,tri-default-2 = <0xFFFFFFFF>;
57 };
58 axi_gpio_led: gpio@41200000 {
59 #gpio-cells = <2>;
60 compatible = "xlnx,xps-gpio-1.00.a";
61 gpio-controller ;
62 reg = <0x41200000 0x10000>;
63 xlnx,all-inputs = <0x0>;
64 xlnx,all-inputs-2 = <0x0>;
65 xlnx,all-outputs = <0x1>;
66 xlnx,all-outputs-2 = <0x0>;
67 xlnx,dout-default = <0x00000000>;
68 xlnx,dout-default-2 = <0x00000000>;
69 xlnx,gpio-width = <0x4>;
70 xlnx,gpio2-width = <0x20>;
71 xlnx,interrupt-present = <0x0>;
72 xlnx,is-dual = <0x0>;
73 xlnx,tri-default = <0xFFFFFFFF>;
74 xlnx,tri-default-2 = <0xFFFFFFFF>;
75 };
76 axi_gpio_sw: gpio@41220000 {
77 #gpio-cells = <2>;
78 compatible = "xlnx,xps-gpio-1.00.a";
79 gpio-controller ;
80 reg = <0x41220000 0x10000>;
81 xlnx,all-inputs = <0x1>;
82 xlnx,all-inputs-2 = <0x0>;
83 xlnx,all-outputs = <0x0>;
84 xlnx,all-outputs-2 = <0x0>;
85 xlnx,dout-default = <0x00000000>;
86 xlnx,dout-default-2 = <0x00000000>;
87 xlnx,gpio-width = <0x4>;
88 xlnx,gpio2-width = <0x20>;
89 xlnx,interrupt-present = <0x0>;
90 xlnx,is-dual = <0x0>;
91 xlnx,tri-default = <0xFFFFFFFF>;
92 xlnx,tri-default-2 = <0xFFFFFFFF>;
93 };
94 axi_i2s_adi_0: axi_i2s_adi@43c20000 {
95 compatible = "xlnx,axi-i2s-adi-1.0";
96 reg = <0x43c20000 0x10000>;
97 xlnx,bclk-pol = <0x0>;
98 xlnx,dma-type = <0x1>;
99 xlnx,has-rx = <0x1>;
100 xlnx,has-tx = <0x1>;
101 xlnx,lrclk-pol = <0x0>;
102 xlnx,num-ch = <0x1>;
103 xlnx,s-axi-min-size = <0x000001FF>;
104 xlnx,slot-width = <0x18>;
105 };
106 axi_vdma_0: dma@43000000 {
107 #dma-cells = <1>;
108 compatible = "xlnx,axi-vdma-1.00.a";
109 clocks = <&clkc 15>;
110 clock-names = "s_axi_lite_aclk";
111 interrupt-parent = <&intc>;
112 interrupts = <0 30 4>;
113 reg = <0x43000000 0x10000>;
114 xlnx,flush-fsync = <0x1>;
115 xlnx,num-fstores = <0x1>;
116 dma-channel@43000000 {
117 compatible = "xlnx,axi-vdma-mm2s-channel";
118 interrupts = <0 30 4>;
119 xlnx,datawidth = <0x20>;
120 xlnx,device-id = <0x0>;
121 };
122 };
123 v_tc_0: v_tc@43c00000 {
124 compatible = "xlnx,v-tc-6.1";
125 interrupt-parent = <&intc>;
126 interrupts = <0 31 4>;
127 reg = <0x43c00000 0x10000>;
128 xlnx,det-achroma-en = <0x0>;
129 xlnx,det-avideo-en = <0x1>;
130 xlnx,det-fieldid-en = <0x0>;
131 xlnx,det-hblank-en = <0x1>;
132 xlnx,det-hsync-en = <0x1>;
133 xlnx,det-vblank-en = <0x1>;
134 xlnx,det-vsync-en = <0x1>;
135 xlnx,detect-en = <0x0>;
136 xlnx,fsync-hstart0 = <0x0>;
137 xlnx,fsync-hstart1 = <0x0>;
138 xlnx,fsync-hstart10 = <0x0>;
139 xlnx,fsync-hstart11 = <0x0>;
140 xlnx,fsync-hstart12 = <0x0>;
141 xlnx,fsync-hstart13 = <0x0>;
142 xlnx,fsync-hstart14 = <0x0>;
143 xlnx,fsync-hstart15 = <0x0>;
144 xlnx,fsync-hstart2 = <0x0>;
145 xlnx,fsync-hstart3 = <0x0>;
146 xlnx,fsync-hstart4 = <0x0>;
147 xlnx,fsync-hstart5 = <0x0>;
148 xlnx,fsync-hstart6 = <0x0>;
149 xlnx,fsync-hstart7 = <0x0>;
150 xlnx,fsync-hstart8 = <0x0>;
151 xlnx,fsync-hstart9 = <0x0>;
152 xlnx,fsync-vstart0 = <0x0>;
153 xlnx,fsync-vstart1 = <0x0>;
154 xlnx,fsync-vstart10 = <0x0>;
155 xlnx,fsync-vstart11 = <0x0>;
156 xlnx,fsync-vstart12 = <0x0>;
157 xlnx,fsync-vstart13 = <0x0>;
158 xlnx,fsync-vstart14 = <0x0>;
159 xlnx,fsync-vstart15 = <0x0>;
160 xlnx,fsync-vstart2 = <0x0>;
161 xlnx,fsync-vstart3 = <0x0>;
162 xlnx,fsync-vstart4 = <0x0>;
163 xlnx,fsync-vstart5 = <0x0>;
164 xlnx,fsync-vstart6 = <0x0>;
165 xlnx,fsync-vstart7 = <0x0>;
166 xlnx,fsync-vstart8 = <0x0>;
167 xlnx,fsync-vstart9 = <0x0>;
168 xlnx,gen-achroma-en = <0x0>;
169 xlnx,gen-achroma-polarity = <0x1>;
170 xlnx,gen-auto-switch = <0x0>;
171 xlnx,gen-avideo-en = <0x1>;
172 xlnx,gen-avideo-polarity = <0x1>;
173 xlnx,gen-cparity = <0x0>;
174 xlnx,gen-f0-vblank-hend = <0x500>;
175 xlnx,gen-f0-vblank-hstart = <0x500>;
176 xlnx,gen-f0-vframe-size = <0x2ee>;
177 xlnx,gen-f0-vsync-hend = <0x500>;
178 xlnx,gen-f0-vsync-hstart = <0x500>;
179 xlnx,gen-f0-vsync-vend = <0x2d9>;
180 xlnx,gen-f0-vsync-vstart = <0x2d4>;
181 xlnx,gen-f1-vblank-hend = <0x500>;
182 xlnx,gen-f1-vblank-hstart = <0x500>;
183 xlnx,gen-f1-vframe-size = <0x2ee>;
184 xlnx,gen-f1-vsync-hend = <0x500>;
185 xlnx,gen-f1-vsync-hstart = <0x500>;
186 xlnx,gen-f1-vsync-vend = <0x2d9>;
187 xlnx,gen-f1-vsync-vstart = <0x2d4>;
188 xlnx,gen-fieldid-en = <0x0>;
189 xlnx,gen-fieldid-polarity = <0x1>;
190 xlnx,gen-hactive-size = <0x500>;
191 xlnx,gen-hblank-en = <0x1>;
192 xlnx,gen-hblank-polarity = <0x1>;
193 xlnx,gen-hframe-size = <0x672>;
194 xlnx,gen-hsync-en = <0x1>;
195 xlnx,gen-hsync-end = <0x596>;
196 xlnx,gen-hsync-polarity = <0x1>;
197 xlnx,gen-hsync-start = <0x56e>;
198 xlnx,gen-interlaced = <0x0>;
199 xlnx,gen-vactive-size = <0x2d0>;
200 xlnx,gen-vblank-en = <0x1>;
201 xlnx,gen-vblank-polarity = <0x1>;
202 xlnx,gen-video-format = <0x2>;
203 xlnx,gen-vsync-en = <0x1>;
204 xlnx,gen-vsync-polarity = <0x1>;
205 xlnx,generate-en = <0x1>;
206 xlnx,has-axi4-lite = <0x1>;
207 xlnx,has-intc-if = <0x0>;
208 xlnx,interlace-en = <0x0>;
209 xlnx,max-lines = <0x1000>;
210 xlnx,max-pixels = <0x1000>;
211 xlnx,num-fsyncs = <0x1>;
212 xlnx,sync-en = <0x0>;
213 };
214 };
215};
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts
new file mode 100644
index 00000000..19654392
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts
@@ -0,0 +1,184 @@
1/dts-v1/;
2/include/ "skeleton.dtsi"
3/include/ "zynq-7000.dtsi"
4/include/ "zynq-7000-qspi-dummy.dtsi"
5/include/ "pcw.dtsi"
6/include/ "pl.dtsi"
7
8/ {
9 model = "Digilent-Zybo-Linux-BD-v2015.4";
10 aliases {
11 serial0 = &uart1;
12 ethernet0 = &gem0;
13 spi0 = &qspi;
14 };
15 chosen {
16 bootargs = "";
17 stdout-path = "serial0:115200n8";
18 };
19 memory {
20 device_type = "memory";
21 reg = <0x0 0x20000000>;
22 };
23
24 gpio-keys {
25 compatible = "gpio-keys";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 autorepeat;
29 btn4 {
30 label = "btn4";
31 gpios = <&gpio0 50 0>;
32 linux,code = <108>; /* down */
33 gpio-key,wakeup;
34 autorepeat;
35 };
36 btn5 {
37 label = "btn5";
38 gpios = <&gpio0 51 0>;
39 linux,code = <103>; /* up */
40 gpio-key,wakeup;
41 autorepeat;
42 };
43 };
44
45 usb_phy0: usb_phy@0 {
46 compatible = "usb-nop-xceiv";
47 #phy-cells = <0>;
48 reset-gpios = <&gpio0 46 1>;
49 };
50};
51
52&amba {
53 u-boot,dm-pre-reloc;
54};
55
56&amba_pl {
57 encoder_0: digilent_encoder {
58 compatible = "digilent,drm-encoder";
59 dglnt,edid-i2c = <&i2c1>;
60 };
61
62 xilinx_drm {
63 compatible = "xlnx,drm";
64 xlnx,vtc = <&v_tc_0>;
65 xlnx,connector-type = "HDMIA";
66 xlnx,encoder-slave = <&encoder_0>;
67 clocks = <&axi_dynclk_0>;
68 planes {
69 xlnx,pixel-format = "xrgb8888";
70 plane0 {
71 dmas = <&axi_vdma_0 0>;
72 dma-names = "dma0";
73 };
74 };
75 };
76
77 i2s_clk: i2s_clk {
78 #clock-cells = <0>;
79 compatible = "fixed-clock";
80 clock-frequency = <12288000>;
81 clock-output-names = "i2s_clk";
82 };
83
84 sound {
85 compatible = "simple-audio-card";
86 simple-audio-card,name = "ZYBO-Sound-Card";
87 simple-audio-card,format = "i2s";
88 simple-audio-card,bitclock-master = <&dailink0_master>;
89 simple-audio-card,frame-master = <&dailink0_master>;
90 simple-audio-card,widgets =
91 "Microphone", "Microphone Jack",
92 "Headphone", "Headphone Jack",
93 "Line", "Line In Jack";
94 simple-audio-card,routing =
95 "MICIN", "Microphone Jack",
96 "Headphone Jack", "LHPOUT",
97 "Headphone Jack", "RHPOUT",
98 "LLINEIN", "Line In Jack",
99 "RLINEIN", "Line In Jack";
100 dailink0_master: simple-audio-card,cpu {
101 clocks = <&i2s_clk>;
102 sound-dai = <&axi_i2s_adi_0>;
103 };
104 simple-audio-card,codec {
105 clocks = <&i2s_clk>;
106 sound-dai = <&ssm2603>;
107 };
108 };
109};
110
111&axi_dynclk_0 {
112 compatible = "digilent,axi-dynclk";
113 #clock-cells = <0>;
114 clocks = <&clkc 15>;
115};
116
117&axi_i2s_adi_0 {
118 #sound-dai-cells = <0>;
119 compatible = "adi,axi-i2s-1.00.a";
120 clocks = <&clkc 15>, <&i2s_clk>;
121 clock-names = "axi", "ref";
122 dmas = <&dmac_s 0 &dmac_s 1>;
123 dma-names = "tx", "rx";
124};
125
126&gem0 {
127 phy-handle = <&phy0>;
128 phy-mode = "rgmii-id";
129 local-mac-address = [];
130 phy0: phy@0 {
131 device_type = "ethernet-phy";
132 reg = <0>;
133 };
134};
135
136&i2c0 {
137 eeprom@50 {
138 /* Microchip 24AA02E48 */
139 compatible = "microchip,24c02";
140 reg = <0x50>;
141 };
142
143 ssm2603: ssm2603@1a{
144 #sound-dai-cells = <0>;
145 compatible = "adi,ssm2603";
146 reg = <0x1a>;
147 };
148};
149
150&qspi {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 flash0: flash@0 {
154 compatible = "micron,m25p80", "s25fl128s";
155 reg = <0x0>;
156 #address-cells = <1>;
157 #size-cells = <1>;
158 spi-max-frequency = <50000000>;
159 partition@0x00000000 {
160 label = "boot";
161 reg = <0x00000000 0x00300000>;
162 };
163 partition@0x00300000 {
164 label = "bootenv";
165 reg = <0x00300000 0x00020000>;
166 };
167 partition@0x00320000 {
168 label = "kernel";
169 reg = <0x00320000 0x00a80000>;
170 };
171 partition@0x00da0000 {
172 label = "spare";
173 reg = <0x00da0000 0x00000000>;
174 };
175 };
176};
177
178&usb0 {
179 usb-phy = <&usb_phy0>;
180};
181
182&v_tc_0 {
183 compatible = "xlnx,v-tc-5.01.a";
184};
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-06-16 21:38:05 +0000