binutils: update to early gatesgarth version

Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>

59 files changed, 2805 insertions, 1876 deletions

diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
index e10c34ff..27ed147d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
+++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
@@ -1,44 +1,63 @@
 FILESEXTRAPATHS_append := ":${THISDIR}/binutils"
 
 SRC_URI_append = " \
-     file://0001-sim-Allow-microblaze-architecture.patch \
-     file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
-     file://0003-Add-mlittle-endian-and-mbig-endian-flags.patch \
-     file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \
-     file://0005-Fix-relaxation-of-assembler-resolved-references.patch \
-     file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \
-     file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \
-     file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \
-     file://0009-Added-Address-extension-instructions.patch \
-     file://0010-Add-new-bit-field-instructions.patch \
-     file://0011-fixing-the-imm-bug.patch \
-     file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
-     file://0013-fixing-the-constant-range-check-issue.patch \
-     file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
-     file://0015-intial-commit-of-MB-64-bit.patch \
-     file://0016-MB-X-initial-commit.patch \
-     file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
-     file://0018-Added-relocations-for-MB-X.patch \
-     file://0019-Update-MB-x.patch \
-     file://0020-Various-fixes.patch \
+     file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
+     file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \
+     file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \
+     file://0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch \
+     file://0005-upstream-change-to-garbage-collection-sweep-causes-m.patch \
+     file://0006-Fix-bug-in-TLSTPREL-Relocation.patch \
+     file://0007-Added-Address-extension-instructions.patch \
+     file://0008-fixing-the-MAX_OPCODES-to-correct-value.patch \
+     file://0009-Add-new-bit-field-instructions.patch \
+     file://0010-fixing-the-imm-bug.patch \
+     file://0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
+     file://0012-fixing-the-constant-range-check-issue.patch \
+     file://0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
+     file://0014-intial-commit-of-MB-64-bit.patch \
+     file://0015-MB-X-initial-commit.patch \
+     file://0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
+     file://0017-Added-relocations-for-MB-X.patch \
+     file://0018-Fixed-MB-x-relocation-issues.patch \
+     file://0019-Fixing-the-branch-related-issues.patch \
+     file://0020-Fixed-address-computation-issues-with-64bit-address.patch \
      file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \
      file://0022-fixing-the-.bss-relocation-issue.patch \
      file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
      file://0024-Revert-ld-Remove-unused-expression-state.patch \
-     file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
-     file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \
-     file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \
-     file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
-     file://0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
-     file://0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch \
-     file://0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch \
-     file://0032-gas-revert-moving-of-md_pseudo_table-from-const.patch \
-     file://0033-Fix-various-compile-warnings.patch \
-     file://0034-Add-initial-port-of-linux-gdbserver.patch \
-     file://0035-Initial-port-of-core-reading-support.patch \
-     file://0036-Fix-debug-message-when-register-is-unavailable.patch \
-     file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
-     file://0038-Initial-support-for-native-gdb.patch \
-     file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
-     file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
+     file://0025-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+     file://0026-Added-support-to-new-arithmetic-single-register-inst.patch \
+     file://0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
+     file://0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
+     file://0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch \
+     file://0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch \
+     file://0031-gas-revert-moving-of-md_pseudo_table-from-const.patch \
+     file://0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \
+     file://0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \
+     file://0034-Initial-port-of-core-reading-support-Added-support-f.patch \
+     file://0035-Fix-debug-message-when-register-is-unavailable.patch \
+     file://0036-revert-master-rebase-changes-to-gdbserver.patch \
+     file://0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch \
+     file://0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
+     file://0039-Initial-support-for-native-gdb.patch \
+     file://0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch \
+     file://0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch \
+     file://0042-porting-GDB-for-linux.patch \
+     file://0043-Binutils-security-check-is-causing-build-error-for-w.patch \
+     file://0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \
+     file://0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \
+     file://0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch \
+     file://0047-bfd-elf64-microblaze.c-Fix-build-failures.patch \
+     file://0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch \
+     file://0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch \
+     file://0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch \
+     file://0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch \
+     file://0052-sim-Allow-microblaze-architecture.patch \
      "
+
+#
+##     file://0048-bfd-gas-Use-standard-method-to-set-the-machine-arch.patch \
+##     file://0052-opcodes-microblaze-opc.h-Expand-the-size-to-int-to-d.patch \
+##     file://0053-opcodes-microblaze-opc.h-MIN_IMML-is-too-large.patch \
+##     file://0054-gas-config-tc-microblaze.c-Resolve-numerous-compiler.patch \
+#
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
index 039bfc96..fe3f2bff 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
@@ -1,7 +1,7 @@
-From b8e39d2a6b83d0f0a14d4bfeafd47a37d746f159 Mon Sep 17 00:00:00 2001
+From 212bd1115f13cc0904fb5556751585c775bc51a6 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
+Subject: [PATCH 01/52] Add wdc.ext.clear and wdc.ext.flush insns
 
 Added two new instructions, wdc.ext.clear and wdc.ext.flush,
 to enable MicroBlaze to flush an external cache, which is
@@ -15,7 +15,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 27d8684df04..b6c5016e4d2 100644
+index 27d8684df0..b6c5016e4d 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -91,6 +91,7 @@
@@ -46,7 +46,7 @@ index 27d8684df04..b6c5016e4d2 100644
    {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
    {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index aa53dfe6bb5..795c57b5ff6 100644
+index aa53dfe6bb..795c57b5ff 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,8 +33,8 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
index 2d4d65e4..78f4be14 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
@@ -1,7 +1,7 @@
-From d2a03159f8643b1c6a2db5d95c478540cc6ca6c4 Mon Sep 17 00:00:00 2001
+From 23ed5e7ab73a2b5dc1ca09362d4815a643a2d187 Mon Sep 17 00:00:00 2001
 From: nagaraju <nmekala@xilix.com>
 Date: Tue, 19 Mar 2013 17:18:23 +0530
-Subject: [PATCH 03/40] Add mlittle-endian and mbig-endian flags
+Subject: [PATCH 02/52] Add mlittle-endian and mbig-endian flags
 
 Added support in gas for mlittle-endian and mbig-endian flags
 as options.
@@ -16,7 +16,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 9 insertions(+)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index ae5d36dc9c3..34eeb972357 100644
+index ae5d36dc9c..34eeb97235 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -37,6 +37,8 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
index f7b9c7b0..96ddefa0 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
@@ -1,7 +1,7 @@
-From a8d621e5ab335e6e61de0f081036b4705071fb74 Mon Sep 17 00:00:00 2001
+From f74d7754befd636c6139261e6c6b23ed49aa0fa9 Mon Sep 17 00:00:00 2001
 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
 Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr
+Subject: [PATCH 03/52] Disable the warning message for eh_frame_hdr
 
 Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
  1 file changed, 3 insertions(+)
 
 diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index 7a129b00f8d..d5e4a5c062d 100644
+index 7a129b00f8..d5e4a5c062 100644
 --- a/bfd/elf-eh-frame.c
 +++ b/bfd/elf-eh-frame.c
 @@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
new file mode 100644
index 00000000..a63ad020
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
@@ -0,0 +1,304 @@
+From 6aadc146948741df27125cc2253ba9a50efa5cfc Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 8 Nov 2016 11:54:08 +0530
+Subject: [PATCH 04/52] [LOCAL]: Fix relaxation of assembler resolved
+ references,Fixup debug_loc sections after linker relaxation Adds a new
+ reloctype R_MICROBLAZE_32_NONE, used for passing reloc info from the
+ assembler to the linker when the linker manages to fully resolve a local
+ symbol reference.
+
+This is a workaround for design flaws in the assembler to
+linker interface with regards to linker relaxation.
+
+Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+
+Conflicts:
+        bfd/elf32-microblaze.c
+        binutils/readelf.c
+        include/elf/microblaze.h
+---
+ bfd/bfd-in2.h              |   5 ++
+ bfd/elf32-microblaze.c     | 126 ++++++++++++++++++++++++++++---------
+ bfd/libbfd.h               |   1 +
+ bfd/reloc.c                |   6 ++
+ binutils/readelf.c         |   4 ++
+ gas/config/tc-microblaze.c |   4 ++
+ include/elf/microblaze.h   |   2 +
+ 7 files changed, 119 insertions(+), 29 deletions(-)
+
+diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
+index 35ef4d755b..1bd19a2b63 100644
+--- a/bfd/bfd-in2.h
++++ b/bfd/bfd-in2.h
+@@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor  */
+ expressions of the form "Symbol Op Symbol"  */
+   BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
+ 
++/* This is a 32 bit reloc that stores the 32 bit pc relative
++value in two words (with an imm instruction).No relocation is 
++done here - only used for relaxing  */
++  BFD_RELOC_MICROBLAZE_32_NONE,
++
+ /* This is a 64 bit reloc that stores the 32 bit pc relative
+ value in two words (with an imm instruction).  No relocation is
+ done here - only used for relaxing  */
+diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
+index 693fc71f73..e9715eae6a 100644
+--- a/bfd/elf32-microblaze.c
++++ b/bfd/elf32-microblaze.c
+@@ -177,6 +177,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+          FALSE),               /* PC relative offset?  */
+ 
+    /* This reloc does nothing. Used for relaxation.  */
++   HOWTO (R_MICROBLAZE_32_NONE,        /* Type.  */
++          0,                   /* Rightshift.  */
++          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
++          32,                  /* Bitsize.  */
++          TRUE,                        /* PC_relative.  */
++          0,                   /* Bitpos.  */
++          complain_overflow_bitfield,  /* Complain on overflow.  */
++          NULL,                  /* Special Function.  */
++          "R_MICROBLAZE_32_NONE",/* Name.  */
++          FALSE,               /* Partial Inplace.  */
++          0,                   /* Source Mask.  */
++          0,                   /* Dest Mask.  */
++          FALSE),              /* PC relative offset?  */
++
+    HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
+          0,                    /* Rightshift.  */
+          3,                    /* Size (0 = byte, 1 = short, 2 = long).  */
+@@ -562,7 +576,10 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
+     case BFD_RELOC_NONE:
+       microblaze_reloc = R_MICROBLAZE_NONE;
+       break;
+-    case BFD_RELOC_MICROBLAZE_64_NONE:
++    case BFD_RELOC_MICROBLAZE_32_NONE:
++      microblaze_reloc = R_MICROBLAZE_32_NONE;
++      break;
++     case BFD_RELOC_MICROBLAZE_64_NONE:
+       microblaze_reloc = R_MICROBLAZE_64_NONE;
+       break;
+     case BFD_RELOC_32:
+@@ -1914,18 +1931,26 @@ microblaze_elf_relax_section (bfd *abfd,
+                }
+              break;
+            case R_MICROBLAZE_NONE:
++           case R_MICROBLAZE_32_NONE:
+              {
+                /* This was a PC-relative instruction that was
+                   completely resolved.  */
+                int sfix, efix;
++                unsigned int val;
+                bfd_vma target_address;
+                target_address = irel->r_addend + irel->r_offset;
+                sfix = calc_fixup (irel->r_offset, 0, sec);
+                efix = calc_fixup (target_address, 0, sec);
+-               irel->r_addend -= (efix - sfix);
+-               /* Should use HOWTO.  */
+-               microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
+-                                                  irel->r_addend);
++
++                /* Validate the in-band val.  */
++                val = bfd_get_32 (abfd, contents + irel->r_offset);
++                if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
++                    fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
++                }
++               irel->r_addend -= (efix - sfix);
++               /* Should use HOWTO.  */
++               microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
++                                                  irel->r_addend);
+              }
+              break;
+            case R_MICROBLAZE_64_NONE:
+@@ -1969,30 +1994,73 @@ microblaze_elf_relax_section (bfd *abfd,
+          irelscanend = irelocs + o->reloc_count;
+          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
+            {
+-             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
+-               {
+-                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++              if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++                {
++                  unsigned int val;
++
++                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++
++                  /* hax: We only do the following fixup for debug location lists.  */
++                  if (strcmp(".debug_loc", o->name))
++                    continue;
++
++                  /* This was a PC-relative instruction that was completely resolved.  */
++                  if (ocontents == NULL)
++                    {
++                     if (elf_section_data (o)->this_hdr.contents != NULL)
++                         ocontents = elf_section_data (o)->this_hdr.contents;
++                     else
++                       {
++                         /* We always cache the section contents.
++                            Perhaps, if info->keep_memory is FALSE, we
++                            should free them, if we are permitted to.  */
++
++                         if (o->rawsize == 0)
++                             o->rawsize = o->size;
++                         ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
++                         if (ocontents == NULL)
++                             goto error_return;
++                         if (!bfd_get_section_contents (abfd, o, ocontents,
++                                                         (file_ptr) 0,
++                                                         o->rawsize))
++                              goto error_return;
++                         elf_section_data (o)->this_hdr.contents = ocontents;
++                       }
++                   }
+ 
+-                 /* Look at the reloc only if the value has been resolved.  */
+-                 if (isym->st_shndx == shndx
+-                     && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
+-                   {
+-                     if (ocontents == NULL)
+-                       {
+-                         if (elf_section_data (o)->this_hdr.contents != NULL)
+-                           ocontents = elf_section_data (o)->this_hdr.contents;
+-                         else
+-                           {
+-                             /* We always cache the section contents.
+-                                Perhaps, if info->keep_memory is FALSE, we
+-                                should free them, if we are permitted to.  */
+-                             if (o->rawsize == 0)
+-                               o->rawsize = o->size;
+-                             ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
+-                             if (ocontents == NULL)
+-                               goto error_return;
+-                             if (!bfd_get_section_contents (abfd, o, ocontents,
+-                                                            (file_ptr) 0,
++                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
++                  if (val != irelscan->r_addend) {
++                       fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
++                  }
++
++                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
++                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
++                                                     irelscan->r_addend);
++              }
++              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
++                {
++                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++
++                  /* Look at the reloc only if the value has been resolved.  */
++                  if (isym->st_shndx == shndx
++                      && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
++                    {
++                      if (ocontents == NULL)
++                        {
++                          if (elf_section_data (o)->this_hdr.contents != NULL)
++                            ocontents = elf_section_data (o)->this_hdr.contents;
++                          else
++                            {
++                              /* We always cache the section contents.
++                                 Perhaps, if info->keep_memory is FALSE, we
++                                 should free them, if we are permitted to.  */
++                             if (o->rawsize == 0)
++                               o->rawsize = o->size;
++                              ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
++                              if (ocontents == NULL)
++                                goto error_return;
++                              if (!bfd_get_section_contents (abfd, o, ocontents,
++                                                             (file_ptr) 0,
+                                                             o->rawsize))
+                                goto error_return;
+                              elf_section_data (o)->this_hdr.contents = ocontents;
+@@ -2028,7 +2096,7 @@ microblaze_elf_relax_section (bfd *abfd,
+                              elf_section_data (o)->this_hdr.contents = ocontents;
+                            }
+                        }
+-                     irelscan->r_addend -= calc_fixup (irel->r_addend
++                     irelscan->r_addend -= calc_fixup (irelscan->r_addend
+                                                        + isym->st_value,
+                                                        0,
+                                                        sec);
+diff --git a/bfd/libbfd.h b/bfd/libbfd.h
+index b97534fc9f..c1551b9240 100644
+--- a/bfd/libbfd.h
++++ b/bfd/libbfd.h
+@@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+   "BFD_RELOC_MICROBLAZE_32_ROSDA",
+   "BFD_RELOC_MICROBLAZE_32_RWSDA",
+   "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
++  "BFD_RELOC_MICROBLAZE_32_NONE",
+   "BFD_RELOC_MICROBLAZE_64_NONE",
+   "BFD_RELOC_MICROBLAZE_64_GOTPC",
+   "BFD_RELOC_MICROBLAZE_64_GOT",
+diff --git a/bfd/reloc.c b/bfd/reloc.c
+index 9aba84ca81..9b39b41941 100644
+--- a/bfd/reloc.c
++++ b/bfd/reloc.c
+@@ -6858,6 +6858,12 @@ ENUM
+ ENUMDOC
+   This is a 32 bit reloc for the microblaze to handle
+   expressions of the form "Symbol Op Symbol"
++ENUM
++  BFD_RELOC_MICROBLAZE_32_NONE
++ENUMDOC
++  This is a 32 bit reloc that stores the 32 bit pc relative
++  value in two words (with an imm instruction).  No relocation is
++  done here - only used for relaxing
+ ENUM
+   BFD_RELOC_MICROBLAZE_64_NONE
+ ENUMDOC
+diff --git a/binutils/readelf.c b/binutils/readelf.c
+index 6057515a89..2b797ef2db 100644
+--- a/binutils/readelf.c
++++ b/binutils/readelf.c
+@@ -13187,6 +13187,10 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
+       return reloc_type == 1;  /* R_Z80_8.  */
+     default:
+       return FALSE;
++    case EM_MICROBLAZE:
++      return reloc_type == 33 /* R_MICROBLAZE_32_NONE.  */
++             || reloc_type == 0 /* R_MICROBLAZE_NONE.  */
++             || reloc_type == 9; /* R_MICROBLAZE_64_NONE.  */
+     }
+ }
+ 
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index 34eeb97235..74a63abeb0 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -2198,9 +2198,12 @@ md_apply_fix (fixS *   fixP,
+         moves code around due to relaxing.  */
+       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
++      else if (fixP->fx_r_type == BFD_RELOC_32)
++       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+       else
+        fixP->fx_r_type = BFD_RELOC_NONE;
+       fixP->fx_addsy = section_symbol (absolute_section);
++      fixP->fx_done = 0;
+     }
+   return;
+ }
+@@ -2421,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+   switch (fixp->fx_r_type)
+     {
+     case BFD_RELOC_NONE:
++    case BFD_RELOC_MICROBLAZE_32_NONE:
+     case BFD_RELOC_MICROBLAZE_64_NONE:
+     case BFD_RELOC_32:
+     case BFD_RELOC_MICROBLAZE_32_LO:
+diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
+index 2fec296967..3978a3dc01 100644
+--- a/include/elf/microblaze.h
++++ b/include/elf/microblaze.h
+@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
+   RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30)  /* PC-relative TEXT offset.  */
+   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
+   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
++  RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
++   
+ END_RELOC_NUMBERS (R_MICROBLAZE_max)
+ 
+ /* Global base address names.  */
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
deleted file mode 100644
index 14a4f329..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From c4ce6cb47613293e02837fc00c2c2ebfcdd596f6 Mon Sep 17 00:00:00 2001
-From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
-Date: Tue, 14 Feb 2012 01:00:22 +0100
-Subject: [PATCH 05/40] Fix relaxation of assembler resolved references
-
----
- bfd/elf32-microblaze.c     | 41 ++++++++++++++++++++++++++++++++++++++
- gas/config/tc-microblaze.c |  1 +
- 2 files changed, 42 insertions(+)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 693fc71f730..09dedc46106 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1969,6 +1969,47 @@ microblaze_elf_relax_section (bfd *abfd,
-          irelscanend = irelocs + o->reloc_count;
-          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
-            {
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+                {
-+                  unsigned int val;
-+
-+                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+
-+                  /* This was a PC-relative instruction that was completely resolved.  */
-+                  if (ocontents == NULL)
-+                    {
-+                      if (elf_section_data (o)->this_hdr.contents != NULL)
-+                          ocontents = elf_section_data (o)->this_hdr.contents;
-+                      else
-+                        {
-+                          /* We always cache the section contents.
-+                             Perhaps, if info->keep_memory is FALSE, we
-+                             should free them, if we are permitted to.  */
-+
-+                          if (o->rawsize == 0)
-+                              o->rawsize = o->size;
-+                          ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                          if (ocontents == NULL)
-+                              goto error_return;
-+                          if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                         (file_ptr) 0,
-+                                                         o->rawsize))
-+                              goto error_return;
-+                          elf_section_data (o)->this_hdr.contents = ocontents;
-+                        }
-+                    }
-+                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                  if (val != irelscan->r_addend) {
-+                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+                  }
-+                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+                                                    + isym->st_value, 0, sec);
-+                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-+                                                     irelscan->r_addend);
-+              }
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) {
-+                  fprintf(stderr, "Unhandled NONE 64\n");
-+              }
-              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-                {
-                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 34eeb972357..d01653aeef9 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2201,6 +2201,7 @@ md_apply_fix (fixS *   fixP,
-       else
-        fixP->fx_r_type = BFD_RELOC_NONE;
-       fixP->fx_addsy = section_symbol (absolute_section);
-+      fixP->fx_done = 0;
-     }
-   return;
- }
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
index 4319f1d7..95e4a363 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
@@ -1,7 +1,7 @@
-From 3f743710f53d86ed5e53d97b3b1b06d7a8cbcdc1 Mon Sep 17 00:00:00 2001
+From 4fc5075cebc9c76053b5ff683ab75c9e8b46ca1a Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb
+Subject: [PATCH 05/52] upstream change to garbage collection sweep causes mb
  regression
 
 Upstream change for PR13177 now clears the def_regular during gc_sweep of a
@@ -23,7 +23,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 deletion(-)
 
 diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 998b72f2281..2daf8fdf6a8 100644
+index 998b72f228..2daf8fdf6a 100644
 --- a/bfd/elflink.c
 +++ b/bfd/elflink.c
 @@ -6372,7 +6372,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
index 4ab7681e..fcbd662e 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
@@ -1,7 +1,7 @@
-From 481dd44f36e7df691037201d9865482debbb397d Mon Sep 17 00:00:00 2001
+From 4e8bd012d3025a6f6b2b2794930f1bfbad7932e8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation
+Subject: [PATCH 06/52] Fix bug in TLSTPREL Relocation
 
 Fixed the problem related to the fixup/relocations TLSTPREL.
 When the fixup is applied the addend is not added at the correct offset
@@ -13,7 +13,7 @@ big & little-endian compilers
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 1be1ead2f41..ec1944c6faf 100644
+index e9715eae6a..9c4f809eaa 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -1447,9 +1447,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
deleted file mode 100644
index 308a453e..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 77c9dd2085e5a9e116cd8d8b4fbc1387c93d26d8 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 6 Feb 2017 15:53:08 +0530
-Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker
- relaxation
-
-Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing
-reloc info from the assembler to the linker when the linker
-manages to fully resolve a local symbol reference.
-
-This is a workaround for design flaws in the assembler to
-linker interface with regards to linker relaxation.
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
----
- bfd/bfd-in2.h              |  5 +++++
- bfd/elf32-microblaze.c     | 39 +++++++++++++++++++++++++++++++-------
- bfd/libbfd.h               |  1 +
- bfd/reloc.c                |  6 ++++++
- binutils/readelf.c         |  4 ++++
- gas/config/tc-microblaze.c |  3 +++
- include/elf/microblaze.h   |  1 +
- 7 files changed, 52 insertions(+), 7 deletions(-)
-
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 35ef4d755bb..3fdbf8ed755 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor  */
- expressions of the form "Symbol Op Symbol"  */
-   BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
- 
-+/* This is a 32 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction).  No relocation is
-+done here - only used for relaxing  */
-+  BFD_RELOC_MICROBLAZE_32_NONE,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 09dedc46106..1be1ead2f41 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
-          0x0000ffff,           /* Dest Mask.  */
-          FALSE),               /* PC relative offset?  */
- 
-+   HOWTO (R_MICROBLAZE_32_NONE,   /* Type.  */
-+          0,         /* Rightshift.  */
-+          2,            /* Size (0 = byte, 1 = short, 2 = long).  */
-+          32,           /* Bitsize.  */
-+          TRUE,         /* PC_relative.  */
-+          0,           /* Bitpos.  */
-+          complain_overflow_bitfield,  /* Complain on overflow.  */
-+          NULL,                  /* Special Function.  */
-+          "R_MICROBLAZE_32_NONE",/* Name.  */
-+          FALSE,       /* Partial Inplace.  */
-+          0,          /* Source Mask.  */
-+          0,         /* Dest Mask.  */
-+          FALSE),       /* PC relative offset?  */
-+
-    /* This reloc does nothing. Used for relaxation.  */
-    HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
-          0,                    /* Rightshift.  */
-@@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
-     case BFD_RELOC_NONE:
-       microblaze_reloc = R_MICROBLAZE_NONE;
-       break;
-+    case BFD_RELOC_MICROBLAZE_32_NONE:
-+      microblaze_reloc = R_MICROBLAZE_32_NONE;
-+      break;
-     case BFD_RELOC_MICROBLAZE_64_NONE:
-       microblaze_reloc = R_MICROBLAZE_64_NONE;
-       break;
-@@ -1914,14 +1931,22 @@ microblaze_elf_relax_section (bfd *abfd,
-                }
-              break;
-            case R_MICROBLAZE_NONE:
-+           case R_MICROBLAZE_32_NONE:
-              {
-                /* This was a PC-relative instruction that was
-                   completely resolved.  */
-                int sfix, efix;
-+               unsigned int val;
-                bfd_vma target_address;
-                target_address = irel->r_addend + irel->r_offset;
-                sfix = calc_fixup (irel->r_offset, 0, sec);
-                efix = calc_fixup (target_address, 0, sec);
-+
-+               /* Validate the in-band val.  */
-+               val = bfd_get_32 (abfd, contents + irel->r_offset);
-+               if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+                      fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+               }
-                irel->r_addend -= (efix - sfix);
-                /* Should use HOWTO.  */
-                microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-@@ -1969,12 +1994,16 @@ microblaze_elf_relax_section (bfd *abfd,
-          irelscanend = irelocs + o->reloc_count;
-          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
-            {
--              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
-                 {
-                   unsigned int val;
- 
-                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-+                  /* hax: We only do the following fixup for debug location lists.  */
-+                  if (strcmp(".debug_loc", o->name))
-+                    continue;
-+
-                   /* This was a PC-relative instruction that was completely resolved.  */
-                   if (ocontents == NULL)
-                     {
-@@ -2002,14 +2031,10 @@ microblaze_elf_relax_section (bfd *abfd,
-                   if (val != irelscan->r_addend) {
-                     fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-                   }
--                  irelscan->r_addend -= calc_fixup (irelscan->r_addend
--                                                    + isym->st_value, 0, sec);
-+                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
-                   microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-                                                      irelscan->r_addend);
-               }
--              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) {
--                  fprintf(stderr, "Unhandled NONE 64\n");
--              }
-              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-                {
-                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-@@ -2069,7 +2094,7 @@ microblaze_elf_relax_section (bfd *abfd,
-                              elf_section_data (o)->this_hdr.contents = ocontents;
-                            }
-                        }
--                     irelscan->r_addend -= calc_fixup (irel->r_addend
-+                     irelscan->r_addend -= calc_fixup (irelscan->r_addend
-                                                        + isym->st_value,
-                                                        0,
-                                                        sec);
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index b97534fc9fe..c1551b92405 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
-   "BFD_RELOC_MICROBLAZE_32_ROSDA",
-   "BFD_RELOC_MICROBLAZE_32_RWSDA",
-   "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
-+  "BFD_RELOC_MICROBLAZE_32_NONE",
-   "BFD_RELOC_MICROBLAZE_64_NONE",
-   "BFD_RELOC_MICROBLAZE_64_GOTPC",
-   "BFD_RELOC_MICROBLAZE_64_GOT",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 9aba84ca81e..9b39b419415 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6858,6 +6858,12 @@ ENUM
- ENUMDOC
-   This is a 32 bit reloc for the microblaze to handle
-   expressions of the form "Symbol Op Symbol"
-+ENUM
-+  BFD_RELOC_MICROBLAZE_32_NONE
-+ENUMDOC
-+  This is a 32 bit reloc that stores the 32 bit pc relative
-+  value in two words (with an imm instruction).  No relocation is
-+  done here - only used for relaxing
- ENUM
-   BFD_RELOC_MICROBLAZE_64_NONE
- ENUMDOC
-diff --git a/binutils/readelf.c b/binutils/readelf.c
-index 6057515a89b..04704d22fef 100644
---- a/binutils/readelf.c
-+++ b/binutils/readelf.c
-@@ -13406,6 +13406,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
-              || reloc_type == 32 /* R_AVR_DIFF32.  */);
-     case EM_METAG:
-       return reloc_type == 3; /* R_METAG_NONE.  */
-+    case EM_MICROBLAZE:
-+      return reloc_type == 30 /* R_MICROBLAZE_32_NONE.  */
-+             || reloc_type == 0 /* R_MICROBLAZE_NONE.  */
-+             || reloc_type == 9; /* R_MICROBLAZE_64_NONE.  */
-     case EM_NDS32:
-       return (reloc_type == 0       /* R_XTENSA_NONE.  */
-              || reloc_type == 204  /* R_NDS32_DIFF8.  */
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index d01653aeef9..74a63abeb0c 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2198,6 +2198,8 @@ md_apply_fix (fixS *   fixP,
-         moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-+      else if (fixP->fx_r_type == BFD_RELOC_32)
-+       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-        fixP->fx_r_type = BFD_RELOC_NONE;
-       fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2422,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
-   switch (fixp->fx_r_type)
-     {
-     case BFD_RELOC_NONE:
-+    case BFD_RELOC_MICROBLAZE_32_NONE:
-     case BFD_RELOC_MICROBLAZE_64_NONE:
-     case BFD_RELOC_32:
-     case BFD_RELOC_MICROBLAZE_32_LO:
-diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 2fec296967b..55f34f72b0d 100644
---- a/include/elf/microblaze.h
-+++ b/include/elf/microblaze.h
-@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
-   RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30)  /* PC-relative TEXT offset.  */
-   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
-   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
-+  RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
- END_RELOC_NUMBERS (R_MICROBLAZE_max)
- 
- /* Global base address names.  */
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
index c5bd3b2d..fd15e23c 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
@@ -1,7 +1,7 @@
-From fa85df88dc229f7f8f0bc09cd0995d05f49c03b7 Mon Sep 17 00:00:00 2001
+From 1d1344e5786d435f4f492739d0c477befa4c6906 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 09/40] Added Address extension instructions
+Subject: [PATCH 07/52] Added Address extension instructions
 
 This patch adds the support of new instructions which are required
 for supporting Address extension feature.
@@ -13,27 +13,20 @@ ChangeLog:
 
   *microblaze-opc.h (op_code_struct): Update
      Added new instructions
-     Set MAX_OPCODES to matching value
   *microblaze-opcm.h (microblaze_instr): Update
      Added new instructions
+
+Conflicts:
+        opcodes/microblaze-opcm.h
 ---
- opcodes/microblaze-opc.h  | 13 ++++++++++++-
+ opcodes/microblaze-opc.h  | 11 +++++++++++
  opcodes/microblaze-opcm.h | 10 +++++-----
- 2 files changed, 17 insertions(+), 6 deletions(-)
+ 2 files changed, 16 insertions(+), 5 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index b6c5016e4d2..c7a506b845a 100644
+index b6c5016e4d..1f1ade40b2 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
- 
- struct op_code_struct
- {
 @@ -178,8 +178,11 @@ struct op_code_struct
    {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
    {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
@@ -81,7 +74,7 @@ index b6c5016e4d2..c7a506b845a 100644
    {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
    {"", 0, 0, 0, 0, 0, 0, 0, 0},
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 795c57b5ff6..b05e319862e 100644
+index 795c57b5ff..b05e319862 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -33,13 +33,13 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch
new file mode 100644
index 00000000..8564003c
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch
@@ -0,0 +1,25 @@
+From b2e494ee992ef0509bd2a4512f62841098631219 Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Thu, 28 Jan 2016 14:07:34 +0530
+Subject: [PATCH 08/52] fixing the MAX_OPCODES to correct value
+
+---
+ opcodes/microblaze-opc.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
+index 1f1ade40b2..c7a506b845 100644
+--- a/opcodes/microblaze-opc.h
++++ b/opcodes/microblaze-opc.h
+@@ -102,7 +102,7 @@
+ #define DELAY_SLOT 1
+ #define NO_DELAY_SLOT 0
+ 
+-#define MAX_OPCODES 291
++#define MAX_OPCODES 299
+ 
+ struct op_code_struct
+ {
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch
index 1612c11c..0188629d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 0034d6b5231a0a72c5f9fc47ba4c8eba0c35ff39 Mon Sep 17 00:00:00 2001
+From cea8d524fca305c2878374433d9745b938e4c78f Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 10/40] Add new bit-field instructions
+Subject: [PATCH 09/52] Add new bit-field instructions
 
 This patches adds new bsefi and bsifi instructions.
 BSEFI- The instruction shall extract a bit field from a
@@ -12,15 +12,18 @@ from a register at another position in the destination register.
 The rest of the bits in the destination register shall be unchanged
 
 Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+
+Conflicts:
+        opcodes/microblaze-dis.c
 ---
  gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   | 17 +++++++++
+ opcodes/microblaze-dis.c   | 20 +++++++++--
  opcodes/microblaze-opc.h   | 12 ++++++-
  opcodes/microblaze-opcm.h  |  6 +++-
- 4 files changed, 103 insertions(+), 3 deletions(-)
+ 4 files changed, 104 insertions(+), 5 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 74a63abeb0c..765abfb3885 100644
+index 74a63abeb0..765abfb388 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -917,7 +917,7 @@ md_assemble (char * str)
@@ -110,14 +113,14 @@ index 74a63abeb0c..765abfb3885 100644
        if (strcmp (op_end, ""))
          op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index be1534c257c..52c9068805f 100644
+index be1534c257..315c6e9350 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
-   return p;
+@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
  }
  
-+static char *
+ static char *
+-get_field_rfsl (struct string_buf *buf, long instr)
 +get_field_imm5width (struct string_buf *buf, long instr)
 +{
 +  char *p = strbuf (buf);
@@ -129,23 +132,26 @@ index be1534c257c..52c9068805f 100644
 +  return p;
 +}
 +
- static char *
- get_field_rfsl (struct string_buf *buf, long instr)
++static char *
++get_field_rfsl (struct string_buf *buf,long instr)
  {
-@@ -428,6 +440,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+   char *p = strbuf (buf);
+ 
+@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          /* For mbar 16 or sleep insn.  */
         case INST_TYPE_NONE:
           break;
-          /* For tuqula instruction */
+-         /* For tuqula instruction */
 +        /* For bit field insns.  */
 +       case INST_TYPE_RD_R1_IMM5_IMM5:
-+         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
-+         break;
++          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
++            break;
 +       /* For tuqula instruction */
         case INST_TYPE_RD:
           print_func (stream, "\t%s", get_field_rd (&buf, inst));
           break;
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index c7a506b845a..f61f4ef66d9 100644
+index c7a506b845..f61f4ef66d 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -59,6 +59,9 @@
@@ -196,7 +202,7 @@ index c7a506b845a..f61f4ef66d9 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index b05e319862e..fa921c90c98 100644
+index b05e319862..fa921c90c9 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -29,7 +29,7 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch
index fcb9c8ae..892205cd 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch
@@ -1,15 +1,15 @@
-From 75e55d8ebf3cd780fe69c066163ab2da7ac204f2 Mon Sep 17 00:00:00 2001
+From d6ccef90be40de63ee6da4943a601edaf7b1a136 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 10 Jul 2017 16:07:28 +0530
-Subject: [PATCH 11/40] fixing the imm bug.
+Subject: [PATCH 10/52] fixing the imm bug. with relax option imm -1 is also
+ getting removed this is corrected now.
 
-with relax option imm -1 is also getting removed this is corrected now.
 ---
  bfd/elf32-microblaze.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index ec1944c6faf..cf4a7fdba33 100644
+index 9c4f809eaa..c22130fd8c 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -1865,8 +1865,7 @@ microblaze_elf_relax_section (bfd *abfd,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
index 02cc1259..db23fe14 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
@@ -1,7 +1,7 @@
-From 5432f81ba9d7c17b20ff576c7c09ae78f4fe6e9c Mon Sep 17 00:00:00 2001
+From 3bb637b058c5f2622950e6984695e36f9cac067a Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Fri, 29 Sep 2017 18:00:23 +0530
-Subject: [PATCH 12/40] [Patch,Microblaze]: fixed bug in GCC so that It will
+Subject: [PATCH 11/52] [Patch,Microblaze]: fixed bug in GCC so that It will
  support .long 0U and .long 0u
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 12/40] [Patch,Microblaze]: fixed bug in GCC so that It will
  1 file changed, 9 insertions(+)
 
 diff --git a/gas/expr.c b/gas/expr.c
-index 6f8ccb82303..0e34ca53d9b 100644
+index 6f8ccb8230..0e34ca53d9 100644
 --- a/gas/expr.c
 +++ b/gas/expr.c
 @@ -803,6 +803,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch
index accff214..4145b0da 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch
@@ -1,15 +1,15 @@
-From 6337e24a220dca86b71efcc10c5ffed6bf11bc22 Mon Sep 17 00:00:00 2001
+From e1cb5c37efd76b44a878574ee3baad4c7a882e3b Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Mon, 16 Oct 2017 15:44:23 +0530
-Subject: [PATCH 13/40] fixing the constant range check issue
+Subject: [PATCH 12/52] fixing the constant range check issue sample error: not
+ in range ffffffff80000000..7fffffff, not ffffffff70000000
 
-sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000
 ---
  gas/config/tc-microblaze.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 765abfb3885..5810a74a5fc 100644
+index 765abfb388..5810a74a5f 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
index cdbe65a6..a74f2b9e 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
@@ -1,7 +1,7 @@
-From e7e06edfb6c24a993603c9100f8ab8c29999ef90 Mon Sep 17 00:00:00 2001
+From 1a3f130008b4ebcd9a6e45cdac7188bde88f2f28 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 21 Feb 2018 12:32:02 +0530
-Subject: [PATCH 14/40] [Patch,Microblaze]: Compiler will give error messages
+Subject: [PATCH 13/52] [Patch,Microblaze]: Compiler will give error messages
  in more detail for mxl-gp-opt flag..
 
 ---
@@ -9,7 +9,7 @@ Subject: [PATCH 14/40] [Patch,Microblaze]: Compiler will give error messages
  1 file changed, 12 insertions(+)
 
 diff --git a/ld/ldmain.c b/ld/ldmain.c
-index 08be9030cb5..613d748fefd 100644
+index 08be9030cb..613d748fef 100644
 --- a/ld/ldmain.c
 +++ b/ld/ldmain.c
 @@ -1515,6 +1515,18 @@ reloc_overflow (struct bfd_link_info *info,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-intial-commit-of-MB-64-bit.patch
index 9f228015..f0037e1f 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-intial-commit-of-MB-64-bit.patch
@@ -1,84 +1,90 @@
-From a7626e576d867c6c9c8321f00cf5e17dc31c52b8 Mon Sep 17 00:00:00 2001
+From d25d934f076297615cb0287488449fb32b9c46e8 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:28:28 +0530
-Subject: [PATCH 15/40] intial commit of MB 64-bit
+Subject: [PATCH 14/52] intial commit of MB 64-bit
 
+Conflicts:
+        bfd/configure
+        bfd/configure.ac
+        bfd/cpu-microblaze.c
+        ld/Makefile.am
+        ld/Makefile.in
+        opcodes/microblaze-dis.c
 ---
  bfd/Makefile.am                    |    2 +
  bfd/Makefile.in                    |    3 +
  bfd/config.bfd                     |    4 +
  bfd/configure                      |    2 +
  bfd/configure.ac                   |    2 +
- bfd/cpu-microblaze.c               |   55 +-
- bfd/doc/Makefile.in                |    1 +
- bfd/elf64-microblaze.c             | 3560 ++++++++++++++++++++++++++++
+ bfd/cpu-microblaze.c               |   53 +-
+ bfd/elf64-microblaze.c             | 3610 ++++++++++++++++++++++++++++
  bfd/targets.c                      |    6 +
  gas/config/tc-microblaze.c         |  274 ++-
  gas/config/tc-microblaze.h         |    4 +-
  include/elf/common.h               |    1 +
  ld/Makefile.am                     |    4 +
- ld/Makefile.in                     |    7 +
+ ld/Makefile.in                     |    6 +
  ld/configure.tgt                   |    3 +
  ld/emulparams/elf64microblaze.sh   |   23 +
  ld/emulparams/elf64microblazeel.sh |   23 +
- opcodes/microblaze-dis.c           |   43 +-
+ opcodes/microblaze-dis.c           |   35 +-
  opcodes/microblaze-opc.h           |  162 +-
  opcodes/microblaze-opcm.h          |   20 +-
- 20 files changed, 4156 insertions(+), 43 deletions(-)
+ 19 files changed, 4197 insertions(+), 40 deletions(-)
  create mode 100644 bfd/elf64-microblaze.c
  create mode 100644 ld/emulparams/elf64microblaze.sh
  create mode 100644 ld/emulparams/elf64microblazeel.sh
 
 diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index c88c4480001..9e12b34038c 100644
+index c88c448000..d86f1c5697 100644
 --- a/bfd/Makefile.am
 +++ b/bfd/Makefile.am
-@@ -552,6 +552,7 @@ BFD64_BACKENDS = \
-        elf64-ia64.lo \
-        elf64-ia64-vms.lo \
-        elfxx-ia64.lo \
+@@ -562,6 +562,7 @@ BFD64_BACKENDS = \
+        elf64-riscv.lo \
+        elfxx-riscv.lo \
+        elf64-s390.lo \
 +       elf64-microblaze.lo \
-        elfn32-mips.lo \
-        elf64-mips.lo \
-        elfxx-mips.lo \
-@@ -591,6 +592,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-gen.c \
-        elf64-hppa.c \
-        elf64-ia64-vms.c \
-+       elf64-microblaze.c \
-        elf64-mips.c \
-        elf64-mmix.c \
+        elf64-sparc.lo \
+        elf64-tilegx.lo \
+        elf64-x86-64.lo \
+@@ -596,6 +597,7 @@ BFD64_BACKENDS_CFILES = \
         elf64-nfp.c \
+        elf64-ppc.c \
+        elf64-s390.c \
++       elf64-microblaze.c \
+        elf64-sparc.c \
+        elf64-tilegx.c \
+        elf64-x86-64.c \
 diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index d0d14c6ab32..5c12b706616 100644
+index d0d14c6ab3..a54abeca48 100644
 --- a/bfd/Makefile.in
 +++ b/bfd/Makefile.in
-@@ -978,6 +978,7 @@ BFD64_BACKENDS = \
-        elf64-ia64.lo \
-        elf64-ia64-vms.lo \
-        elfxx-ia64.lo \
+@@ -988,6 +988,7 @@ BFD64_BACKENDS = \
+        elf64-riscv.lo \
+        elfxx-riscv.lo \
+        elf64-s390.lo \
 +       elf64-microblaze.lo \
-        elfn32-mips.lo \
-        elf64-mips.lo \
-        elfxx-mips.lo \
-@@ -1017,6 +1018,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-gen.c \
-        elf64-hppa.c \
-        elf64-ia64-vms.c \
-+       elf64-microblaze.c \
-        elf64-mips.c \
-        elf64-mmix.c \
+        elf64-sparc.lo \
+        elf64-tilegx.lo \
+        elf64-x86-64.lo \
+@@ -1022,6 +1023,7 @@ BFD64_BACKENDS_CFILES = \
         elf64-nfp.c \
-@@ -1495,6 +1497,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
+        elf64-ppc.c \
+        elf64-s390.c \
++       elf64-microblaze.c \
+        elf64-sparc.c \
+        elf64-tilegx.c \
+        elf64-x86-64.c \
+@@ -1501,6 +1503,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
 diff --git a/bfd/config.bfd b/bfd/config.bfd
-index 14523caf0c5..437c03bb9d9 100644
+index 14523caf0c..437c03bb9d 100644
 --- a/bfd/config.bfd
 +++ b/bfd/config.bfd
 @@ -825,11 +825,15 @@ case "${targ}" in
@@ -98,36 +104,36 @@ index 14523caf0c5..437c03bb9d9 100644
  
  #ifdef BFD64
 diff --git a/bfd/configure b/bfd/configure
-index 5ab3e856bc2..982ecd254a8 100755
+index 0340ed541b..ff5ae4706c 100755
 --- a/bfd/configure
 +++ b/bfd/configure
-@@ -14828,6 +14828,8 @@ do
-     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
-     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
-     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+@@ -14903,6 +14903,8 @@ do
+     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
+     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
-     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
-     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     sh_coff_le_vec)             tb="$tb coff-sh.lo $coff" ;;
+     sh_coff_small_vec)          tb="$tb coff-sh.lo $coff" ;;
 diff --git a/bfd/configure.ac b/bfd/configure.ac
-index 8e86f8399ce..38e80148171 100644
+index 8e86f8399c..408092d3be 100644
 --- a/bfd/configure.ac
 +++ b/bfd/configure.ac
-@@ -564,6 +564,8 @@ do
-     metag_elf32_vec)            tb="$tb elf32-metag.lo elf32.lo $elf" ;;
-     microblaze_elf32_vec)       tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
-     microblaze_elf32_le_vec)    tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+@@ -639,6 +639,8 @@ do
+     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
+     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
 +    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
 +    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     mips_ecoff_be_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
-     mips_ecoff_le_vec)          tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
-     mips_ecoff_bele_vec)        tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
+     sh_coff_le_vec)             tb="$tb coff-sh.lo $coff" ;;
+     sh_coff_small_vec)          tb="$tb coff-sh.lo $coff" ;;
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 05a3f767e22..f94dc2c177b 100644
+index 05a3f767e2..194920b20b 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,25 @@
+@@ -23,7 +23,24 @@
  #include "bfd.h"
  #include "libbfd.h"
  
@@ -148,13 +154,12 @@ index 05a3f767e22..f94dc2c177b 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1],     /* Next in list.  */
-+  0 /* Maximum offset of a reloc from the start of an insn.  */
++  &bfd_microblaze_arch[1]      /* Next in list.  */
 +},
  {
    32,                          /* Bits in a word.  */
    32,                          /* Bits in an address.  */
-@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch =
+@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch =
    bfd_arch_default_fill,       /* Default fill.  */
    NULL,                                /* Next in list.  */
    0 /* Maximum offset of a reloc from the start of an insn.  */
@@ -173,8 +178,7 @@ index 05a3f767e22..f94dc2c177b 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1],     /* Next in list.  */
-+  0 /* Maximum offset of a reloc from the start of an insn.  */
++  &bfd_microblaze_arch[1]      /* Next in list.  */
 +},
 +{
 +  64,                          /* 32 bits in a word.  */
@@ -189,29 +193,17 @@ index 05a3f767e22..f94dc2c177b 100644
 +  bfd_default_compatible,      /* Architecture comparison function.  */
 +  bfd_default_scan,            /* String to architecture conversion.  */
 +  bfd_arch_default_fill,       /* Default fill.  */
-+  NULL,                                /* Next in list.  */
-+  0 /* Maximum offset of a reloc from the start of an insn.  */
++  NULL,                                /* Next in list.  */
++  0  /* Maximum offset of a reloc from the start of an insn.  */
 +}
 +#endif
  };
-diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
-index 2c1ddd45b8d..a976b24d0bf 100644
---- a/bfd/doc/Makefile.in
-+++ b/bfd/doc/Makefile.in
-@@ -375,6 +375,7 @@ pdfdir = @pdfdir@
- prefix = @prefix@
- program_transform_name = @program_transform_name@
- psdir = @psdir@
-+runstatedir = @runstatedir@
- sbindir = @sbindir@
- sharedstatedir = @sharedstatedir@
- srcdir = @srcdir@
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
 new file mode 100644
-index 00000000000..fa4b95e47e0
+index 0000000000..a357388115
 --- /dev/null
 +++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3560 @@
+@@ -0,0 +1,3610 @@
 +/* Xilinx MicroBlaze-specific support for 32-bit ELF
 +
 +   Copyright (C) 2009-2016 Free Software Foundation, Inc.
@@ -870,7 +862,7 @@ index 00000000000..fa4b95e47e0
 +/* Set the howto pointer for a RCE ELF reloc.  */
 +
 +static bfd_boolean
-+microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
++microblaze_elf_info_to_howto (bfd * abfd,
 +                             arelent * cache_ptr,
 +                             Elf_Internal_Rela * dst)
 +{
@@ -883,14 +875,15 @@ index 00000000000..fa4b95e47e0
 +  r_type = ELF64_R_TYPE (dst->r_info);
 +  if (r_type >= R_MICROBLAZE_max)
 +    {
-+      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
-+                            abfd, r_type);
++      /* xgettext:c-format */
++      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
++                         abfd, r_type);
 +      bfd_set_error (bfd_error_bad_value);
 +      return FALSE;
 +    }
 +
 +  cache_ptr->howto = microblaze_elf_howto_table [r_type];
-+ return TRUE;
++  return TRUE;
 +}
 +
 +/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
@@ -1013,7 +1006,6 @@ index 00000000000..fa4b95e47e0
 +      struct elf64_mb_link_hash_entry *eh;
 +
 +      eh = (struct elf64_mb_link_hash_entry *) entry;
-+      eh->dyn_relocs = NULL;
 +      eh->tls_mask = 0;
 +    }
 +
@@ -1026,7 +1018,7 @@ index 00000000000..fa4b95e47e0
 +microblaze_elf_link_hash_table_create (bfd *abfd)
 +{
 +  struct elf64_mb_link_hash_table *ret;
-+  bfd_size_type amt = sizeof (struct elf64_mb_link_hash_table);
++  size_t amt = sizeof (struct elf64_mb_link_hash_table);
 +
 +  ret = (struct elf64_mb_link_hash_table *) bfd_zmalloc (amt);
 +  if (ret == NULL)
@@ -1241,6 +1233,7 @@ index 00000000000..fa4b95e47e0
 +      else
 +       {
 +         bfd_vma relocation;
++         bfd_boolean resolved_to_zero;
 +
 +         /* This is a final link.  */
 +         sym = NULL;
@@ -1280,6 +1273,9 @@ index 00000000000..fa4b95e47e0
 +             goto check_reloc;
 +           }
 +
++         resolved_to_zero = (h != NULL
++                             && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
++
 +         switch ((int) r_type)
 +           {
 +           case (int) R_MICROBLAZE_SRO32 :
@@ -1314,11 +1310,14 @@ index 00000000000..fa4b95e47e0
 +                     }
 +                   else
 +                     {
-+                       (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
-+                                              bfd_get_filename (input_bfd),
-+                                              sym_name,
-+                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_section_name (sec));
++                       _bfd_error_handler
++                         /* xgettext:c-format */
++                         (_("%pB: the target (%s) of an %s relocation"
++                            " is in the wrong section (%pA)"),
++                          input_bfd,
++                          sym_name,
++                          microblaze_elf_howto_table[(int) r_type]->name,
++                          sec);
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1359,11 +1358,14 @@ index 00000000000..fa4b95e47e0
 +                     }
 +                   else
 +                     {
-+                       (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
-+                                              bfd_get_filename (input_bfd),
-+                                              sym_name,
-+                                              microblaze_elf_howto_table[(int) r_type]->name,
-+                                              bfd_section_name (sec));
++                       _bfd_error_handler
++                         /* xgettext:c-format */
++                         (_("%pB: the target (%s) of an %s relocation"
++                            " is in the wrong section (%pA)"),
++                          input_bfd,
++                          sym_name,
++                          microblaze_elf_howto_table[(int) r_type]->name,
++                          sec);
 +                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
 +                       ret = FALSE;
 +                       continue;
@@ -1425,7 +1427,6 @@ index 00000000000..fa4b95e47e0
 +             goto dogot;
 +           case (int) R_MICROBLAZE_TLSLD:
 +             tls_type = (TLS_TLS | TLS_LD);
-+              /* Fall through. */
 +           dogot:
 +           case (int) R_MICROBLAZE_GOT_64:
 +             {
@@ -1489,7 +1490,8 @@ index 00000000000..fa4b95e47e0
 +               /* Need to generate relocs ? */
 +               if ((bfd_link_pic (info) || indx != 0)
 +                   && (h == NULL
-+                   || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++                   || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++                       && !resolved_to_zero)
 +                   || h->root.type != bfd_link_hash_undefweak))
 +                 need_relocs = TRUE;
 +
@@ -1551,47 +1553,47 @@ index 00000000000..fa4b95e47e0
 +                     }
 +                   else if (IS_TLS_GD(tls_type))
 +                     {
-+                       *offp |= 1;
-+                       static_value -= dtprel_base(info);
-+                       if (need_relocs)
-+                         {
-+                           microblaze_elf_output_dynamic_relocation (output_bfd,
-+                             htab->srelgot, htab->srelgot->reloc_count++,
-+                             /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
-+                             got_offset, indx ? 0 : static_value);
-+                         }
-+                       else
-+                         {
-+                           bfd_put_32 (output_bfd, static_value,
-+                                       htab->sgot->contents + off2);
-+                         }
++                       *offp |= 1;
++                       static_value -= dtprel_base(info);
++                       if (need_relocs)
++                         microblaze_elf_output_dynamic_relocation
++                           (output_bfd,
++                            htab->elf.srelgot,
++                            htab->elf.srelgot->reloc_count++,
++                            /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
++                            got_offset, indx ? 0 : static_value);
++                       else
++                         bfd_put_32 (output_bfd, static_value,
++                                     htab->elf.sgot->contents + off2);
 +                     }
 +                   else
 +                     {
-+                         bfd_put_32 (output_bfd, static_value,
-+                                     htab->sgot->contents + off2);
++                       bfd_put_32 (output_bfd, static_value,
++                                   htab->elf.sgot->contents + off2);
 +
-+                         /* Relocs for dyn symbols generated by
-+                            finish_dynamic_symbols */
-+                         if (bfd_link_pic (info) && h == NULL)
-+                           {
-+                             *offp |= 1;
-+                             microblaze_elf_output_dynamic_relocation (output_bfd,
-+                               htab->srelgot, htab->srelgot->reloc_count++,
-+                               /* symindex= */ indx, R_MICROBLAZE_REL,
-+                               got_offset, static_value);
-+                           }
++                       /* Relocs for dyn symbols generated by
++                          finish_dynamic_symbols */
++                       if (bfd_link_pic (info) && h == NULL)
++                         {
++                           *offp |= 1;
++                           microblaze_elf_output_dynamic_relocation
++                             (output_bfd,
++                              htab->elf.srelgot,
++                              htab->elf.srelgot->reloc_count++,
++                              /* symindex= */ indx, R_MICROBLAZE_REL,
++                              got_offset, static_value);
++                         }
 +                     }
 +                 }
 +
 +               /* 4. Fixup Relocation with GOT offset value
 +                     Compute relative address of GOT entry for applying
 +                     the current relocation */
-+               relocation = htab->sgot->output_section->vma
-+                            + htab->sgot->output_offset
++               relocation = htab->elf.sgot->output_section->vma
++                            + htab->elf.sgot->output_offset
 +                            + off
-+                            - htab->sgotplt->output_section->vma
-+                            - htab->sgotplt->output_offset;
++                            - htab->elf.sgotplt->output_section->vma
++                            - htab->elf.sgotplt->output_offset;
 +
 +               /* Apply Current Relocation */
 +               bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
@@ -1608,8 +1610,8 @@ index 00000000000..fa4b95e47e0
 +               bfd_vma immediate;
 +               unsigned short lo, high;
 +               relocation += addend;
-+               relocation -= htab->sgotplt->output_section->vma
-+                 + htab->sgotplt->output_offset;
++               relocation -= (htab->elf.sgotplt->output_section->vma
++                              + htab->elf.sgotplt->output_offset);
 +               /* Write this value into correct location.  */
 +               immediate = relocation;
 +               lo = immediate & 0x0000ffff;
@@ -1622,8 +1624,8 @@ index 00000000000..fa4b95e47e0
 +           case (int) R_MICROBLAZE_GOTOFF_32:
 +             {
 +               relocation += addend;
-+               relocation -= htab->sgotplt->output_section->vma
-+                 + htab->sgotplt->output_offset;
++               relocation -= (htab->elf.sgotplt->output_section->vma
++                              + htab->elf.sgotplt->output_offset);
 +               /* Write this value into correct location.  */
 +               bfd_put_32 (input_bfd, relocation, contents + offset);
 +               break;
@@ -1665,7 +1667,8 @@ index 00000000000..fa4b95e47e0
 +
 +               if ((bfd_link_pic (info)
 +                    && (h == NULL
-+                        || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++                        || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++                            && !resolved_to_zero)
 +                        || h->root.type != bfd_link_hash_undefweak)
 +                    && (!howto->pc_relative
 +                        || (h != NULL
@@ -1726,7 +1729,7 @@ index 00000000000..fa4b95e47e0
 +                         {
 +                           BFD_FAIL ();
 +                           (*_bfd_error_handler)
-+                             (_("%pB: probably compiled without -fPIC?"),
++                             (_("%B: probably compiled without -fPIC?"),
 +                              input_bfd);
 +                           bfd_set_error (bfd_error_bad_value);
 +                           return FALSE;
@@ -1825,6 +1828,21 @@ index 00000000000..fa4b95e47e0
 +  return ret;
 +}
 +
++/* Merge backend specific data from an object file to the output
++   object file when linking.
++
++   Note: We only use this hook to catch endian mismatches.  */
++static bfd_boolean
++microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
++{
++  /* Check if we have the same endianess.  */
++  if (! _bfd_generic_verify_endian_match (ibfd, obfd))
++    return FALSE;
++
++  return TRUE;
++}
++
++
 +/* Calculate fixup value for reference.  */
 +
 +static int
@@ -2141,7 +2159,7 @@ index 00000000000..fa4b95e47e0
 +          irelscanend = irelocs + o->reloc_count;
 +          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
 +            {
-+              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++              if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
 +                {
 +                  unsigned int val;
 +
@@ -2500,6 +2518,17 @@ index 00000000000..fa4b95e47e0
 +  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
 +}
 +
++/* Update the got entry reference counts for the section being removed.  */
++
++static bfd_boolean
++microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
++                             struct bfd_link_info * info ATTRIBUTE_UNUSED,
++                             asection * sec ATTRIBUTE_UNUSED,
++                             const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
++{
++  return TRUE;
++}
++
 +/* PIC support.  */
 +
 +#define PLT_ENTRY_SIZE 16
@@ -2616,10 +2645,9 @@ index 00000000000..fa4b95e47e0
 +      else
 +       {
 +         h = sym_hashes [r_symndx - symtab_hdr->sh_info];
-+
-+         /* PR15323, ref flags aren't set for references in the same
-+            object.  */
-+         h->root.non_ir_ref_regular = 1;
++         while (h->root.type == bfd_link_hash_indirect
++                || h->root.type == bfd_link_hash_warning)
++           h = (struct elf_link_hash_entry *) h->root.u.i.link;
 +       }
 +
 +      switch (r_type)
@@ -2655,7 +2683,6 @@ index 00000000000..fa4b95e47e0
 +          tls_type |= (TLS_TLS | TLS_LD);
 +        dogottls:
 +          sec->has_tls_reloc = 1;
-+          /* Fall through. */
 +        case R_MICROBLAZE_GOT_64:
 +          if (htab->sgot == NULL)
 +            {
@@ -2751,7 +2778,7 @@ index 00000000000..fa4b95e47e0
 +               /* If this is a global symbol, we count the number of
 +                  relocations we need for this symbol.  */
 +               if (h != NULL)
-+                 head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs;
++                 head = &h->dyn_relocs;
 +               else
 +                 {
 +                   /* Track dynamic relocs needed for local syms too.
@@ -2778,7 +2805,7 @@ index 00000000000..fa4b95e47e0
 +               p = *head;
 +               if (p == NULL || p->sec != sec)
 +                 {
-+                   bfd_size_type amt = sizeof *p;
++                   size_t amt = sizeof *p;
 +                   p = ((struct elf64_mb_dyn_relocs *)
 +                        bfd_alloc (htab->elf.dynobj, amt));
 +                   if (p == NULL)
@@ -2888,7 +2915,8 @@ index 00000000000..fa4b95e47e0
 +  struct elf64_mb_link_hash_table *htab;
 +  struct elf64_mb_link_hash_entry * eh;
 +  struct elf64_mb_dyn_relocs *p;
-+  asection *sdynbss, *s;
++  asection *sdynbss;
++  asection *s, *srel;
 +  unsigned int power_of_two;
 +  bfd *dynobj;
 +
@@ -2970,7 +2998,7 @@ index 00000000000..fa4b95e47e0
 +
 +  /* If we didn't find any dynamic relocs in read-only sections, then
 +     we'll be keeping the dynamic relocs and avoiding the copy reloc.  */
-+  if (p == NULL)
++  if (!_bfd_elf_readonly_dynrelocs (h))
 +    {
 +      h->non_got_ref = 0;
 +      return TRUE;
@@ -2989,11 +3017,19 @@ index 00000000000..fa4b95e47e0
 +  /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker
 +     to copy the initial value out of the dynamic object and into the
 +     runtime process image.  */
-+  dynobj = elf_hash_table (info)->dynobj;
-+  BFD_ASSERT (dynobj != NULL);
++  if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
++    {
++      s = htab->elf.sdynrelro;
++      srel = htab->elf.sreldynrelro;
++    }
++  else
++    {
++      s = htab->elf.sdynbss;
++      srel = htab->elf.srelbss;
++    }
 +  if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
 +    {
-+      htab->srelbss->size += sizeof (Elf64_External_Rela);
++      srel->size += sizeof (Elf64_External_Rela);
 +      h->needs_copy = 1;
 +    }
 +
@@ -3003,21 +3039,20 @@ index 00000000000..fa4b95e47e0
 +  if (power_of_two > 3)
 +    power_of_two = 3;
 +
-+  sdynbss = htab->sdynbss;
 +  /* Apply the required alignment.  */
-+  sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+  if (power_of_two > bfd_section_alignment (sdynbss))
++  s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
++  if (power_of_two > s->alignment_power)
 +    {
-+      if (! bfd_set_section_alignment (sdynbss, power_of_two))
++      if (!bfd_set_section_alignment (s, power_of_two))
 +       return FALSE;
 +    }
 +
 +  /* Define the symbol as being at this point in the section.  */
-+  h->root.u.def.section = sdynbss;
-+  h->root.u.def.value = sdynbss->size;
++  h->root.u.def.section = s;
++  h->root.u.def.value = s->size;
 +
 +  /* Increment the section size to make room for the symbol.  */
-+  sdynbss->size += h->size;
++  s->size += h->size;
 +  return TRUE;
 +}
 +
@@ -3077,13 +3112,13 @@ index 00000000000..fa4b95e47e0
 +          /* Make room for this entry.  */
 +          s->size += PLT_ENTRY_SIZE;
 +
-+          /* We also need to make an entry in the .got.plt section, which
-+             will be placed in the .got section by the linker script.  */
-+         htab->sgotplt->size += 4;
++         /* We also need to make an entry in the .got.plt section, which
++            will be placed in the .got section by the linker script.  */
++         htab->elf.sgotplt->size += 4;
 +
-+          /* We also need to make an entry in the .rel.plt section.  */
-+          htab->srelplt->size += sizeof (Elf64_External_Rela);
-+        }
++         /* We also need to make an entry in the .rel.plt section.  */
++         htab->elf.srelplt->size += sizeof (Elf32_External_Rela);
++       }
 +      else
 +        {
 +          h->plt.offset = (bfd_vma) -1;
@@ -3138,17 +3173,17 @@ index 00000000000..fa4b95e47e0
 +          h->got.offset = (bfd_vma) -1;
 +        }
 +      else
-+        {
-+          s = htab->sgot;
-+          h->got.offset = s->size;
-+          s->size += need;
-+          htab->srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
-+        }
++       {
++         s = htab->elf.sgot;
++         h->got.offset = s->size;
++         s->size += need;
++         htab->elf.srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
++       }
 +    }
 +  else
 +    h->got.offset = (bfd_vma) -1;
 +
-+  if (eh->dyn_relocs == NULL)
++  if (h->dyn_relocs == NULL)
 +    return TRUE;
 +
 +  /* In the shared -Bsymbolic case, discard space allocated for
@@ -3165,7 +3200,7 @@ index 00000000000..fa4b95e47e0
 +       {
 +         struct elf64_mb_dyn_relocs **pp;
 +
-+         for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
++         for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
 +           {
 +             p->count -= p->pc_count;
 +             p->pc_count = 0;
@@ -3175,6 +3210,8 @@ index 00000000000..fa4b95e47e0
 +               pp = &p->next;
 +           }
 +       }
++      else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
++       h->dyn_relocs = NULL;
 +    }
 +  else
 +    {
@@ -3204,13 +3241,13 @@ index 00000000000..fa4b95e47e0
 +           goto keep;
 +       }
 +
-+      eh->dyn_relocs = NULL;
++      h->dyn_relocs = NULL;
 +
 +    keep: ;
 +    }
 +
 +  /* Finally, allocate space.  */
-+  for (p = eh->dyn_relocs; p != NULL; p = p->next)
++  for (p = h->dyn_relocs; p != NULL; p = p->next)
 +    {
 +      asection *sreloc = elf_section_data (p->sec)->sreloc;
 +      sreloc->size += p->count * sizeof (Elf64_External_Rela);
@@ -3286,8 +3323,8 @@ index 00000000000..fa4b95e47e0
 +      locsymcount = symtab_hdr->sh_info;
 +      end_local_got = local_got + locsymcount;
 +      lgot_masks = (unsigned char *) end_local_got;
-+      s = htab->sgot;
-+      srel = htab->srelgot;
++      s = htab->elf.sgot;
++      srel = htab->elf.srelgot;
 +
 +      for (; local_got < end_local_got; ++local_got, ++lgot_masks)
 +       {
@@ -3327,10 +3364,10 @@ index 00000000000..fa4b95e47e0
 +
 +  if (htab->tlsld_got.refcount > 0)
 +    {
-+      htab->tlsld_got.offset = htab->sgot->size;
-+      htab->sgot->size += 8;
++      htab->tlsld_got.offset = htab->elf.sgot->size;
++      htab->elf.sgot->size += 8;
 +      if (bfd_link_pic (info))
-+        htab->srelgot->size += sizeof (Elf64_External_Rela);
++       htab->elf.srelgot->size += sizeof (Elf64_External_Rela);
 +    }
 +  else
 +    htab->tlsld_got.offset = (bfd_vma) -1;
@@ -3338,8 +3375,8 @@ index 00000000000..fa4b95e47e0
 +  if (elf_hash_table (info)->dynamic_sections_created)
 +    {
 +      /* Make space for the trailing nop in .plt.  */
-+      if (htab->splt->size > 0)
-+        htab->splt->size += 4;
++      if (htab->elf.splt->size > 0)
++       htab->elf.splt->size += 4;
 +    }
 +
 +  /* The check_relocs and adjust_dynamic_symbol entry points have
@@ -3354,36 +3391,40 @@ index 00000000000..fa4b95e47e0
 +        continue;
 +
 +      /* It's OK to base decisions on the section name, because none
-+         of the dynobj section names depend upon the input files.  */
++        of the dynobj section names depend upon the input files.  */
 +      name = bfd_section_name (s);
 +
 +      if (strncmp (name, ".rela", 5) == 0)
-+        {
-+          if (s->size == 0)
-+            {
-+              /* If we don't need this section, strip it from the
-+                output file.  This is to handle .rela.bss and
-+                .rela.plt.  We must create it in
-+                create_dynamic_sections, because it must be created
-+                before the linker maps input sections to output
-+                sections.  The linker does that before
-+                adjust_dynamic_symbol is called, and it is that
-+                function which decides whether anything needs to go
-+                into these sections.  */
-+              strip = TRUE;
-+            }
-+          else
-+            {
-+              /* We use the reloc_count field as a counter if we need
-+                to copy relocs into the output file.  */
-+              s->reloc_count = 0;
-+            }
-+        }
-+      else if (s != htab->splt && s != htab->sgot && s != htab->sgotplt)
-+        {
-+          /* It's not one of our sections, so don't allocate space.  */
-+          continue;
-+        }
++       {
++         if (s->size == 0)
++           {
++             /* If we don't need this section, strip it from the
++                output file.  This is to handle .rela.bss and
++                .rela.plt.  We must create it in
++                create_dynamic_sections, because it must be created
++                before the linker maps input sections to output
++                sections.  The linker does that before
++                adjust_dynamic_symbol is called, and it is that
++                function which decides whether anything needs to go
++                into these sections.  */
++             strip = TRUE;
++           }
++         else
++           {
++             /* We use the reloc_count field as a counter if we need
++                to copy relocs into the output file.  */
++             s->reloc_count = 0;
++           }
++       }
++      else if (s != htab->elf.splt
++              && s != htab->elf.sgot
++              && s != htab->elf.sgotplt
++              && s != htab->elf.sdynbss
++              && s != htab->elf.sdynrelro)
++       {
++         /* It's not one of our sections, so don't allocate space.  */
++         continue;
++       }
 +
 +      if (strip)
 +        {
@@ -3485,7 +3526,7 @@ index 00000000000..fa4b95e47e0
 +
 +      /* For non-PIC objects we need absolute address of the GOT entry.  */
 +      if (!bfd_link_pic (info))
-+        got_addr += htab->sgotplt->output_section->vma + sgotplt->output_offset;
++       got_addr += sgotplt->output_section->vma + sgotplt->output_offset;
 +
 +      /* Fill in the entry in the procedure linkage table.  */
 +      bfd_put_32 (output_bfd, PLT_ENTRY_WORD_0 + ((got_addr >> 16) & 0xffff),
@@ -3537,8 +3578,8 @@ index 00000000000..fa4b95e47e0
 +      /* This symbol has an entry in the global offset table.  Set it
 +         up.  */
 +
-+      sgot = htab->sgot;
-+      srela = htab->srelgot;
++      sgot = htab->elf.sgot;
++      srela = htab->elf.srelgot;
 +      BFD_ASSERT (sgot != NULL && srela != NULL);
 +
 +      offset = (sgot->output_section->vma + sgot->output_offset
@@ -3685,7 +3726,7 @@ index 00000000000..fa4b95e47e0
 +
 +  /* Set the first entry in the global offset table to the address of
 +     the dynamic section.  */
-+  sgot = bfd_get_linker_section (dynobj, ".got.plt");
++  sgot = htab->elf.sgotplt;
 +  if (sgot && sgot->size > 0)
 +    {
 +      if (sdyn == NULL)
@@ -3697,8 +3738,8 @@ index 00000000000..fa4b95e47e0
 +      elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
 +    }
 +
-+  if (htab->sgot && htab->sgot->size > 0)
-+    elf_section_data (htab->sgot->output_section)->this_hdr.sh_entsize = 4;
++  if (htab->elf.sgot && htab->elf.sgot->size > 0)
++    elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 4;
 +
 +  return TRUE;
 +}
@@ -3723,8 +3764,8 @@ index 00000000000..fa4b95e47e0
 +        put into .sbss.  */
 +      *secp = bfd_make_section_old_way (abfd, ".sbss");
 +      if (*secp == NULL
-+          || ! bfd_set_section_flags (*secp, SEC_IS_COMMON))
-+        return FALSE;
++         || !bfd_set_section_flags (*secp, SEC_IS_COMMON))
++       return FALSE;
 +
 +      *valp = sym->st_size;
 +    }
@@ -3750,10 +3791,11 @@ index 00000000000..fa4b95e47e0
 +#define bfd_elf64_bfd_is_local_label_name       microblaze_elf_is_local_label_name
 +#define elf_backend_relocate_section           microblaze_elf_relocate_section
 +#define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
++#define bfd_elf64_bfd_merge_private_bfd_data    microblaze_elf_merge_private_bfd_data
 +#define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
 +
 +#define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
++#define elf_backend_gc_sweep_hook              microblaze_elf_gc_sweep_hook
 +#define elf_backend_check_relocs                microblaze_elf_check_relocs
 +#define elf_backend_copy_indirect_symbol        microblaze_elf_copy_indirect_symbol
 +#define bfd_elf64_bfd_link_hash_table_create    microblaze_elf_link_hash_table_create
@@ -3773,7 +3815,7 @@ index 00000000000..fa4b95e47e0
 +
 +#include "elf64-target.h"
 diff --git a/bfd/targets.c b/bfd/targets.c
-index 0732c5e4292..1ec226b2f47 100644
+index 0732c5e429..1ec226b2f4 100644
 --- a/bfd/targets.c
 +++ b/bfd/targets.c
 @@ -782,6 +782,8 @@ extern const bfd_target mep_elf32_le_vec;
@@ -3797,7 +3839,7 @@ index 0732c5e4292..1ec226b2f47 100644
  
         &mips_ecoff_be_vec,
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 5810a74a5fc..ffbb843d33e 100644
+index 5810a74a5f..ffbb843d33 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -35,10 +35,13 @@
@@ -4192,7 +4234,7 @@ index 5810a74a5fc..ffbb843d33e 100644
  
  
 diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 01cb3e894f7..7435a70ef5e 100644
+index 01cb3e894f..7435a70ef5 100644
 --- a/gas/config/tc-microblaze.h
 +++ b/gas/config/tc-microblaze.h
 @@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[];
@@ -4207,7 +4249,7 @@ index 01cb3e894f7..7435a70ef5e 100644
  #define ELF_TC_SPECIAL_SECTIONS \
    { ".sdata",          SHT_PROGBITS,   SHF_ALLOC + SHF_WRITE }, \
 diff --git a/include/elf/common.h b/include/elf/common.h
-index 4d94c4fd5b3..f709a01816c 100644
+index 4d94c4fd5b..f709a01816 100644
 --- a/include/elf/common.h
 +++ b/include/elf/common.h
 @@ -340,6 +340,7 @@
@@ -4219,7 +4261,7 @@ index 4d94c4fd5b3..f709a01816c 100644
  #define EM_CSKY                252     /* C-SKY processor family.  */
  
 diff --git a/ld/Makefile.am b/ld/Makefile.am
-index 02c4fc16395..d063e2d32c5 100644
+index 02c4fc1639..d063e2d32c 100644
 --- a/ld/Makefile.am
 +++ b/ld/Makefile.am
 @@ -416,6 +416,8 @@ ALL_64_EMULATION_SOURCES = \
@@ -4241,18 +4283,10 @@ index 02c4fc16395..d063e2d32c5 100644
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
 diff --git a/ld/Makefile.in b/ld/Makefile.in
-index 2fe12e14f63..01ebb051faa 100644
+index 2fe12e14f6..797212859f 100644
 --- a/ld/Makefile.in
 +++ b/ld/Makefile.in
-@@ -515,6 +515,7 @@ pdfdir = @pdfdir@
- prefix = @prefix@
- program_transform_name = @program_transform_name@
- psdir = @psdir@
-+runstatedir = @runstatedir@
- sbindir = @sbindir@
- sharedstatedir = @sharedstatedir@
- srcdir = @srcdir@
-@@ -898,6 +899,8 @@ ALL_64_EMULATION_SOURCES = \
+@@ -898,6 +898,8 @@ ALL_64_EMULATION_SOURCES = \
         eelf32ltsmipn32.c \
         eelf32ltsmipn32_fbsd.c \
         eelf32mipswindiss.c \
@@ -4261,16 +4295,16 @@ index 2fe12e14f63..01ebb051faa 100644
         eelf64_aix.c \
         eelf64bpf.c \
         eelf64_ia64.c \
-@@ -1360,6 +1363,8 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
+@@ -1338,6 +1340,8 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32z80.Po@am__quote@
 +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc_fbsd.Po@am__quote@
-@@ -2493,6 +2498,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@
+@@ -2493,6 +2497,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
@@ -4280,7 +4314,7 @@ index 2fe12e14f63..01ebb051faa 100644
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
  @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
 diff --git a/ld/configure.tgt b/ld/configure.tgt
-index 87c7d9a4cad..801d27c9e3f 100644
+index 87c7d9a4ca..801d27c9e3 100644
 --- a/ld/configure.tgt
 +++ b/ld/configure.tgt
 @@ -469,6 +469,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
@@ -4295,7 +4329,7 @@ index 87c7d9a4cad..801d27c9e3f 100644
                         ;;
 diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
 new file mode 100644
-index 00000000000..7b4c7c411bd
+index 0000000000..9c7b0eb708
 --- /dev/null
 +++ b/ld/emulparams/elf64microblaze.sh
 @@ -0,0 +1,23 @@
@@ -4320,11 +4354,11 @@ index 00000000000..7b4c7c411bd
 +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
 +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
 +
-+TEMPLATE_NAME=elf
++TEMPLATE_NAME=elf32
 +#GENERATE_SHLIB_SCRIPT=yes
 diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
 new file mode 100644
-index 00000000000..7b4c7c411bd
+index 0000000000..9c7b0eb708
 --- /dev/null
 +++ b/ld/emulparams/elf64microblazeel.sh
 @@ -0,0 +1,23 @@
@@ -4349,10 +4383,10 @@ index 00000000000..7b4c7c411bd
 +#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
 +#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
 +
-+TEMPLATE_NAME=elf
++TEMPLATE_NAME=elf32
 +#GENERATE_SHLIB_SCRIPT=yes
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 52c9068805f..a03f5b7a55b 100644
+index 315c6e9350..f643f2600d 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
 @@ -33,6 +33,7 @@
@@ -4363,7 +4397,7 @@ index 52c9068805f..a03f5b7a55b 100644
  #define get_int_field_r1(instr)    ((instr & RA_MASK) >> RA_LOW)
  
  #define NUM_STRBUFS 3
-@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr)
+@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, long instr)
  }
  
  static char *
@@ -4371,12 +4405,11 @@ index 52c9068805f..a03f5b7a55b 100644
 +get_field_imml (struct string_buf *buf, long instr)
  {
    char *p = strbuf (buf);
- 
--  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
 +  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
 +  return p;
 +}
-+
+ 
+-  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
 +static char *
 +get_field_imms (struct string_buf *buf, long instr)
 +{
@@ -4386,7 +4419,7 @@ index 52c9068805f..a03f5b7a55b 100644
    return p;
  }
  
-@@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
+@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
  }
  
  static char *
@@ -4404,53 +4437,46 @@ index 52c9068805f..a03f5b7a55b 100644
    return p;
  }
  
-@@ -308,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+@@ -308,9 +317,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
                 }
             }
           break;
 -       case INST_TYPE_RD_R1_IMM5:
 +       case INST_TYPE_RD_R1_IMML:
-          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
--                     get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
-+                  get_field_r1(&buf, inst), get_field_imm (&buf, inst));
++         print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
++                     get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
 +          /* TODO: Also print symbol */
-+          break;
 +       case INST_TYPE_RD_R1_IMMS:
-+         print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+-                     get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
 +                  get_field_r1(&buf, inst), get_field_imms (&buf, inst));
           break;
         case INST_TYPE_RD_RFSL:
           print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-@@ -414,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
-            }
-          break;
--       case INST_TYPE_RD_R2:
--         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
--                     get_field_r2 (&buf, inst));
+@@ -417,6 +430,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+        case INST_TYPE_RD_R2:
+          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+                      get_field_r2 (&buf, inst));
++          break;
 +        case INST_TYPE_IMML:
 +         print_func (stream, "\t%s", get_field_imml (&buf, inst));
 +          /* TODO: Also print symbol */
-+         break;
-+        case INST_TYPE_RD_R2:
-+         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst));
           break;
         case INST_TYPE_R2:
           print_func (stream, "\t%s", get_field_r2 (&buf, inst));
-@@ -441,8 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+@@ -440,8 +457,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+        case INST_TYPE_NONE:
           break;
-          /* For tuqula instruction */
          /* For bit field insns.  */
 -       case INST_TYPE_RD_R1_IMM5_IMM5:
--         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
+-          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
 +       case INST_TYPE_RD_R1_IMMW_IMMS:
-+         print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
-+                  get_field_immw (&buf, inst), get_field_imms (&buf, inst));
-          break;
++          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+             break;
         /* For tuqula instruction */
         case INST_TYPE_RD:
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f61f4ef66d9..61eaa39b3eb 100644
+index f61f4ef66d..61eaa39b3e 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -40,7 +40,7 @@
@@ -4678,7 +4704,7 @@ index f61f4ef66d9..61eaa39b3eb 100644
  #endif /* MICROBLAZE_OPC */
  
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index fa921c90c98..1dcd3dca3d1 100644
+index fa921c90c9..1dcd3dca3d 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -25,6 +25,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-MB-X-initial-commit.patch
index 06a8f70a..7b87f40f 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0015-MB-X-initial-commit.patch
@@ -1,22 +1,26 @@
-From 49a85544705ec3057f0a1f32807b7b986127cec1 Mon Sep 17 00:00:00 2001
+From 550150a8f97738902539ad774fbd0c977ab3a427 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sun, 30 Sep 2018 16:31:26 +0530
-Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
+Subject: [PATCH 15/52] MB-X initial commit code cleanup is needed.
 
+Conflicts:
+        bfd/elf32-microblaze.c
+        gas/config/tc-microblaze.c
+        opcodes/microblaze-opcm.h
 ---
  bfd/bfd-in2.h              |  10 +++
- bfd/elf32-microblaze.c     |  63 +++++++++++++++++-
- bfd/elf64-microblaze.c     |  59 +++++++++++++++++
+ bfd/elf32-microblaze.c     |  59 +++++++++++++-
+ bfd/elf64-microblaze.c     |  61 ++++++++++++++-
  bfd/libbfd.h               |   2 +
- bfd/reloc.c                |  12 ++++
- gas/config/tc-microblaze.c | 127 +++++++++++++++++++++++++++----------
+ bfd/reloc.c                |  12 +++
+ gas/config/tc-microblaze.c | 154 ++++++++++++++++++++++++++++++-------
  include/elf/microblaze.h   |   2 +
  opcodes/microblaze-opc.h   |   4 +-
  opcodes/microblaze-opcm.h  |   4 +-
- 9 files changed, 243 insertions(+), 40 deletions(-)
+ 9 files changed, 275 insertions(+), 33 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 3fdbf8ed755..c55092c9ec7 100644
+index 1bd19a2b63..a335182ba1 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
 @@ -5438,11 +5438,21 @@ value in two words (with an imm instruction).  No relocation is
@@ -24,9 +28,9 @@ index 3fdbf8ed755..c55092c9ec7 100644
    BFD_RELOC_MICROBLAZE_64_NONE,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imml instruction).  No relocation is
-+done here - only used for relaxing  */
-+  BFD_RELOC_MICROBLAZE_64,
++ *  +value in two words (with an imml instruction).  No relocation is
++ *   +done here - only used for relaxing  */
++    BFD_RELOC_MICROBLAZE_64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
@@ -42,7 +46,7 @@ index 3fdbf8ed755..c55092c9ec7 100644
  value in two words (with an imm instruction).  The relocation is
  GOT offset  */
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index cf4a7fdba33..e1a66f57e79 100644
+index c22130fd8c..14bb6de052 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -104,6 +108,15 @@ index cf4a7fdba33..e1a66f57e79 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
+@@ -1463,7 +1498,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
+                  {
+                    relocation += addend;
+-                   if (r_type == R_MICROBLAZE_32)
++                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+                      bfd_put_32 (input_bfd, relocation, contents + offset);
+                    else
+                      {
 @@ -1929,6 +1964,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
@@ -111,7 +124,7 @@ index cf4a7fdba33..e1a66f57e79 100644
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -133,21 +146,8 @@ index cf4a7fdba33..e1a66f57e79 100644
             case R_MICROBLAZE_NONE:
             case R_MICROBLAZE_32_NONE:
               {
-@@ -2034,9 +2091,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                   microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-                                                      irelscan->r_addend);
-               }
--             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
--               {
--                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-+               {
-+                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
-                  if (isym->st_shndx == shndx
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index fa4b95e47e0..d55700fc513 100644
+index a357388115..6b1f47d00d 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -210,7 +210,7 @@ index fa4b95e47e0..d55700fc513 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
        microblaze_reloc = R_MICROBLAZE_GOT_64;
        break;
-@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1172,6 +1208,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
               break; /* Do nothing.  */
  
             case (int) R_MICROBLAZE_GOTPC_64:
@@ -218,14 +218,23 @@ index fa4b95e47e0..d55700fc513 100644
               relocation = htab->sgotplt->output_section->vma
                 + htab->sgotplt->output_offset;
               relocation -= (input_section->output_section->vma
-@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1443,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
+                  {
+                    relocation += addend;
+-                   if (r_type == R_MICROBLAZE_32)
++                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+                      bfd_put_32 (input_bfd, relocation, contents + offset);
+                    else
+                      {
+@@ -1889,6 +1926,28 @@ microblaze_elf_relax_section (bfd *abfd,
                     irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
                 }
               break;
 +           case R_MICROBLAZE_IMML_64:
 +             {
 +               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
++                  completely resolved.  */
 +               int sfix, efix;
 +            unsigned int val;
 +               bfd_vma target_address;
@@ -248,7 +257,7 @@ index fa4b95e47e0..d55700fc513 100644
             case R_MICROBLAZE_32_NONE:
               {
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index c1551b92405..b4aace6a70d 100644
+index c1551b9240..b4aace6a70 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
 @@ -2969,7 +2969,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
@@ -262,7 +271,7 @@ index c1551b92405..b4aace6a70d 100644
    "BFD_RELOC_MICROBLAZE_64_PLT",
    "BFD_RELOC_MICROBLAZE_64_GOTOFF",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 9b39b419415..0e8a24e9cb0 100644
+index 9b39b41941..0e8a24e9cb 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
 @@ -6866,12 +6866,24 @@ ENUMDOC
@@ -291,7 +300,7 @@ index 9b39b419415..0e8a24e9cb0 100644
    This is a 64 bit reloc that stores the 32 bit pc relative
    value in two words (with an imm instruction).  The relocation is
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index ffbb843d33e..b8250e4cded 100644
+index ffbb843d33..33eda2a4da 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -302,17 +311,18 @@ index ffbb843d33e..b8250e4cded 100644
  
  /* Initialize the relax table.  */
  const relax_typeS md_relax_table[] =
-@@ -116,7 +117,8 @@ const relax_typeS md_relax_table[] =
+@@ -116,7 +117,9 @@ const relax_typeS md_relax_table[] =
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 15: TLSGOTTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
 -  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
-+  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
++  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },   /* 18: TEXT_PC_OFFSET.  */
++//  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
  };
  
  static struct hash_control * opcode_hash_control;      /* Opcode mnemonics.  */
-@@ -396,7 +398,8 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -322,7 +332,7 @@ index ffbb843d33e..b8250e4cded 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -405,6 +408,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] =
    {"sbss", microblaze_s_bss, 1},
    {"text", microblaze_s_text, 0},
    {"word", cons, 4},
@@ -330,7 +340,7 @@ index ffbb843d33e..b8250e4cded 100644
    {"frame", s_ignore, 0},
    {"mask", s_ignore, 0}, /* Emitted by gcc.  */
    {NULL, NULL, 0}
-@@ -898,7 +902,7 @@ check_got (int * got_type, int * got_len)
+@@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len)
  extern bfd_reloc_code_real_type
  parse_cons_expression_microblaze (expressionS *exp, int size)
  {
@@ -339,7 +349,7 @@ index ffbb843d33e..b8250e4cded 100644
      {
        /* Handle @GOTOFF et.al.  */
        char *save, *gotfree_copy;
-@@ -930,6 +934,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
+@@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
  
  static const char * str_microblaze_ro_anchor = "RO";
  static const char * str_microblaze_rw_anchor = "RW";
@@ -347,7 +357,41 @@ index ffbb843d33e..b8250e4cded 100644
  
  static bfd_boolean
  check_spl_reg (unsigned * reg)
-@@ -1926,6 +1931,7 @@ md_assemble (char * str)
+@@ -1174,6 +1180,33 @@ md_assemble (char * str)
+               inst |= (immed << IMM_LOW) & IMM_MASK;
+             }
+        }
++#if 0 //revisit
++      else if (streq (name, "lli") || streq (name, "sli"))
++       {
++          temp = immed & 0xFFFFFFFFFFFF8000;
++          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
++           {
++              /* Needs an immediate inst.  */
++              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
++              if (opcode1 == NULL)
++                {
++                  as_bad (_("unknown opcode \"%s\""), "imml");
++                  return;
++                }
++
++              inst1 = opcode1->bit_sequence;
++             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
++              output[0] = INST_BYTE0 (inst1);
++              output[1] = INST_BYTE1 (inst1);
++              output[2] = INST_BYTE2 (inst1);
++              output[3] = INST_BYTE3 (inst1);
++              output = frag_more (isize);
++           }
++         inst |= (reg1 << RD_LOW) & RD_MASK;
++         inst |= (reg2 << RA_LOW) & RA_MASK;
++         inst |= (immed << IMM_LOW) & IMM_MASK;
++        }
++#endif
+       else
+        {
+           temp = immed & 0xFFFF8000;
+@@ -1926,6 +1959,7 @@ md_assemble (char * str)
        if (exp.X_op != O_constant)
         {
           char *opc = NULL;
@@ -355,7 +399,7 @@ index ffbb843d33e..b8250e4cded 100644
           relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -1939,7 +1945,7 @@ md_assemble (char * str)
+@@ -1939,7 +1973,7 @@ md_assemble (char * str)
                              subtype,   /* PC-relative or not.  */
                              exp.X_add_symbol,
                              exp.X_add_number,
@@ -364,7 +408,7 @@ index ffbb843d33e..b8250e4cded 100644
           immedl = 0L;
          }
        else
-@@ -1977,7 +1983,7 @@ md_assemble (char * str)
+@@ -1977,7 +2011,7 @@ md_assemble (char * str)
            reg1 = 0;
          }
        if (strcmp (op_end, ""))
@@ -373,17 +417,17 @@ index ffbb843d33e..b8250e4cded 100644
        else
          as_fatal (_("Error in statement syntax"));
  
-@@ -1987,7 +1993,8 @@ md_assemble (char * str)
+@@ -1987,7 +2021,8 @@ md_assemble (char * str)
  
        if (exp.X_op != O_constant)
         {
 -          char *opc = NULL;
 +         //char *opc = NULL;
-+          char *opc = strdup(str_microblaze_64);
++          char *opc = str_microblaze_64;
            relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -2001,14 +2008,13 @@ md_assemble (char * str)
+@@ -2001,14 +2036,13 @@ md_assemble (char * str)
                              subtype,   /* PC-relative or not.  */
                              exp.X_add_symbol,
                              exp.X_add_number,
@@ -399,7 +443,7 @@ index ffbb843d33e..b8250e4cded 100644
           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
           if (opcode1 == NULL)
             {
-@@ -2184,13 +2190,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2184,13 +2218,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
@@ -424,7 +468,7 @@ index ffbb843d33e..b8250e4cded 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2412,22 +2428,38 @@ md_apply_fix (fixS *   fixP,
+@@ -2412,22 +2456,38 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_64_PCREL:
      case BFD_RELOC_64:
      case BFD_RELOC_MICROBLAZE_64_TEXTREL:
@@ -475,7 +519,7 @@ index ffbb843d33e..b8250e4cded 100644
        buf[0] = INST_BYTE0 (inst1);
        buf[1] = INST_BYTE1 (inst1);
        buf[2] = INST_BYTE2 (inst1);
-@@ -2456,6 +2488,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2456,6 +2516,7 @@ md_apply_fix (fixS *   fixP,
        /* Fall through.  */
  
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -483,7 +527,7 @@ index ffbb843d33e..b8250e4cded 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
      case BFD_RELOC_MICROBLAZE_64_PLT:
      case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2463,12 +2496,16 @@ md_apply_fix (fixS *   fixP,
+@@ -2463,12 +2524,16 @@ md_apply_fix (fixS *   fixP,
        /* Add an imm instruction.  First save the current instruction.  */
        for (i = 0; i < INST_WORD_SIZE; i++)
         buf[i + INST_WORD_SIZE] = buf[i];
@@ -504,27 +548,22 @@ index ffbb843d33e..b8250e4cded 100644
           return;
         }
  
-@@ -2490,7 +2527,7 @@ md_apply_fix (fixS *   fixP,
-     {
-       /* This fixup has been resolved.  Create a reloc in case the linker
+@@ -2492,6 +2557,8 @@ md_apply_fix (fixS *   fixP,
          moves code around due to relaxing.  */
--      if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-+      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
+       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
++      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-@@ -2535,12 +2572,30 @@ md_estimate_size_before_relax (fragS * fragP,
+       else
+@@ -2535,6 +2602,32 @@ md_estimate_size_before_relax (fragS * fragP,
            as_bad (_("Absolute PC-relative value in relaxation code.  Assembler error....."));
            abort ();
          }
--      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
--               !S_IS_WEAK (fragP->fr_symbol))
 +      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type
 +               && !S_IS_WEAK (fragP->fr_symbol))
-         {
--          fragP->fr_subtype = DEFINED_PC_OFFSET;
--          /* Don't know now whether we need an imm instruction.  */
--          fragP->fr_var = INST_WORD_SIZE;
++        {
 +           if (fragP->fr_opcode != NULL) {
 +            if(streq (fragP->fr_opcode, str_microblaze_64)) 
 +             {
@@ -546,10 +585,20 @@ index ffbb843d33e..b8250e4cded 100644
 +              /* Don't know now whether we need an imm instruction.  */
 +               fragP->fr_var = INST_WORD_SIZE;
 +            }
++        }
++    #if 0
+       else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
+                !S_IS_WEAK (fragP->fr_symbol))
+         {
+@@ -2542,6 +2635,7 @@ md_estimate_size_before_relax (fragS * fragP,
+           /* Don't know now whether we need an imm instruction.  */
+           fragP->fr_var = INST_WORD_SIZE;
          }
++#endif
        else if (S_IS_DEFINED (fragP->fr_symbol)
                && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-@@ -2644,6 +2699,7 @@ md_estimate_size_before_relax (fragS * fragP,
+         {
+@@ -2644,6 +2738,7 @@ md_estimate_size_before_relax (fragS * fragP,
      case TLSLD_OFFSET:
      case TLSTPREL_OFFSET:
      case TLSDTPREL_OFFSET:
@@ -557,16 +606,16 @@ index ffbb843d33e..b8250e4cded 100644
        fragP->fr_var = INST_WORD_SIZE*2;
        break;
      case DEFINED_RO_SEGMENT:
-@@ -2697,7 +2753,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2697,7 +2792,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
    else
      {
        /* The case where we are going to resolve things... */
 -      if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
          return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
        else
          return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2730,6 +2786,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2730,6 +2825,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_32_RWSDA:
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -575,7 +624,7 @@ index ffbb843d33e..b8250e4cded 100644
      case BFD_RELOC_MICROBLAZE_64_GOT:
      case BFD_RELOC_MICROBLAZE_64_PLT:
      case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2872,7 +2930,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -2872,7 +2969,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
@@ -588,7 +637,7 @@ index ffbb843d33e..b8250e4cded 100644
          default:
            as_bad (_("unsupported BFD relocation size %u"), size);
 diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 55f34f72b0d..8576e55cb8a 100644
+index 3978a3dc01..938841b240 100644
 --- a/include/elf/microblaze.h
 +++ b/include/elf/microblaze.h
 @@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
@@ -597,11 +646,11 @@ index 55f34f72b0d..8576e55cb8a 100644
    RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
 +  RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
 +  RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35)    /* GOT entry offset.  */
+    
  END_RELOC_NUMBERS (R_MICROBLAZE_max)
  
- /* Global base address names.  */
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 61eaa39b3eb..f2139a6839b 100644
+index 61eaa39b3e..f2139a6839 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -538,8 +538,8 @@ struct op_code_struct
@@ -616,7 +665,7 @@ index 61eaa39b3eb..f2139a6839b 100644
    {"dadd",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
    {"drsub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 1dcd3dca3d1..ad8b8ce345b 100644
+index 1dcd3dca3d..fcf259a362 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -40,8 +40,8 @@ enum microblaze_instr
@@ -626,7 +675,7 @@ index 1dcd3dca3d1..ad8b8ce345b 100644
 -  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
 -  sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
 +  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+  sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
++  sbi, shi, swi, sli, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
    fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
    fint, fsqrt,
    tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
index 067d9266..6a3e34c4 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
@@ -1,16 +1,15 @@
-From 48f658aba97d74c702b2fc5f1577d63c800b91f5 Mon Sep 17 00:00:00 2001
+From 5b9a1079eefbfbe23992f231ad69af488040e302 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
- rsubl
+Subject: [PATCH 16/52] [Patch,Microblaze] : negl instruction is overriding
+ rsubl,fixed it by changing the instruction order...
 
-fixed it by changing the instruction order...
 ---
  opcodes/microblaze-opc.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f2139a6839b..f9709412097 100644
+index f2139a6839..f970941209 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -275,9 +275,7 @@ struct op_code_struct
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Added-relocations-for-MB-X.patch
index 0ed01b79..3e0773b0 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Added-relocations-for-MB-X.patch
@@ -1,45 +1,45 @@
-From 90d732c25cb6b55b33837e1d23d6850e4cbe10f7 Mon Sep 17 00:00:00 2001
+From 442430f1010a9e16821e68ca2842579538ff564b Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 18/40] Added relocations for MB-X
+Subject: [PATCH 17/52] Added relocations for MB-X
 
+Conflicts:
+        bfd/bfd-in2.h
+        gas/config/tc-microblaze.c
 ---
- bfd/bfd-in2.h              | 11 +++++---
- bfd/libbfd.h               |  4 +--
- bfd/reloc.c                | 26 +++++++++---------
- gas/config/tc-microblaze.c | 54 +++++++++++++++++++++++++++-----------
- 4 files changed, 63 insertions(+), 32 deletions(-)
+ bfd/bfd-in2.h              |  9 +++-
+ bfd/libbfd.h               |  4 +-
+ bfd/reloc.c                | 26 ++++++-----
+ gas/config/tc-microblaze.c | 90 ++++++++++++++++----------------------
+ 4 files changed, 61 insertions(+), 68 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index c55092c9ec7..88f89bcdbcd 100644
+index a335182ba1..57ea4f6132 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5434,15 +5434,20 @@ done here - only used for relaxing  */
-   BFD_RELOC_MICROBLAZE_32_NONE,
- 
+@@ -5436,13 +5436,18 @@ done here - only used for relaxing  */
  /* This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction).  No relocation is
-+value in two words (with an imml instruction).  No relocation is
+ value in two words (with an imm instruction).  No relocation is
  done here - only used for relaxing  */
 -  BFD_RELOC_MICROBLAZE_64_NONE,
 +  BFD_RELOC_MICROBLAZE_64_PCREL,
  
 -/* This is a 64 bit reloc that stores the 32 bit pc relative
 +/* This is a 64 bit reloc that stores the 32 bit relative
- value in two words (with an imml instruction).  No relocation is
- done here - only used for relaxing  */
-   BFD_RELOC_MICROBLAZE_64,
+  *  +value in two words (with an imml instruction).  No relocation is
+  *   +done here - only used for relaxing  */
+     BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction).  No relocation is
-+done here - only used for relaxing  */
-+  BFD_RELOC_MICROBLAZE_64_NONE,
++ *  +value in two words (with an imm instruction).  No relocation is
++ *   +done here - only used for relaxing  */
++    BFD_RELOC_MICROBLAZE_64_NONE,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
  value in two words (with an imm instruction).  The relocation is
  PC-relative GOT offset  */
 diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index b4aace6a70d..b4b7ee29a30 100644
+index b4aace6a70..b4b7ee29a3 100644
 --- a/bfd/libbfd.h
 +++ b/bfd/libbfd.h
 @@ -2969,14 +2969,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
@@ -60,7 +60,7 @@ index b4aace6a70d..b4b7ee29a30 100644
    "BFD_RELOC_MICROBLAZE_64_TLSGD",
    "BFD_RELOC_MICROBLAZE_64_TLSLD",
 diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 0e8a24e9cb0..b5c97da3ffd 100644
+index 0e8a24e9cb..b5c97da3ff 100644
 --- a/bfd/reloc.c
 +++ b/bfd/reloc.c
 @@ -6866,24 +6866,12 @@ ENUMDOC
@@ -110,7 +110,7 @@ index 0e8a24e9cb0..b5c97da3ffd 100644
    BFD_RELOC_AARCH64_RELOC_START
  ENUMDOC
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index b8250e4cded..9c8b6284fb1 100644
+index 33eda2a4da..5e11a77e70 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
 @@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -121,28 +121,62 @@ index b8250e4cded..9c8b6284fb1 100644
  
  /* Initialize the relax table.  */
  const relax_typeS md_relax_table[] =
-@@ -118,7 +119,8 @@ const relax_typeS md_relax_table[] =
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
+@@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] =
    { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 18: TEXT_PC_OFFSET.  */
--  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 19: DEFINED_64_OFFSET.  */
+   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },   /* 18: TEXT_PC_OFFSET.  */
+ //  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
+-  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
 +  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 },   /* 19: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }  /* 20: DEFINED_64_PC_OFFSET.  */
++  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }   /* 20: DEFINED_64_PC_OFFSET.  */
  };
  
  static struct hash_control * opcode_hash_control;      /* Opcode mnemonics.  */
-@@ -1930,8 +1932,8 @@ md_assemble (char * str)
+@@ -1180,33 +1182,6 @@ md_assemble (char * str)
+               inst |= (immed << IMM_LOW) & IMM_MASK;
+             }
+        }
+-#if 0 //revisit
+-      else if (streq (name, "lli") || streq (name, "sli"))
+-       {
+-          temp = immed & 0xFFFFFFFFFFFF8000;
+-          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
+-           {
+-              /* Needs an immediate inst.  */
+-              opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
+-              if (opcode1 == NULL)
+-                {
+-                  as_bad (_("unknown opcode \"%s\""), "imml");
+-                  return;
+-                }
+-
+-              inst1 = opcode1->bit_sequence;
+-             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
+-              output[0] = INST_BYTE0 (inst1);
+-              output[1] = INST_BYTE1 (inst1);
+-              output[2] = INST_BYTE2 (inst1);
+-              output[3] = INST_BYTE3 (inst1);
+-              output = frag_more (isize);
+-           }
+-         inst |= (reg1 << RD_LOW) & RD_MASK;
+-         inst |= (reg2 << RA_LOW) & RA_MASK;
+-         inst |= (immed << IMM_LOW) & IMM_MASK;
+-        }
+-#endif
+       else
+        {
+           temp = immed & 0xFFFF8000;
+@@ -1958,8 +1933,8 @@ md_assemble (char * str)
  
        if (exp.X_op != O_constant)
         {
 -         char *opc = NULL;
 -         //char *opc = str_microblaze_64;
 +         //char *opc = NULL;
-+         char *opc = strdup(str_microblaze_64);
++         char *opc = str_microblaze_64;
           relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -2190,13 +2192,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2218,13 +2193,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
@@ -164,7 +198,7 @@ index b8250e4cded..9c8b6284fb1 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2206,7 +2214,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2234,7 +2215,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
                  fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC);
        else
          fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
@@ -173,7 +207,7 @@ index b8250e4cded..9c8b6284fb1 100644
        fragP->fr_fix += INST_WORD_SIZE * 2;
        fragP->fr_var = 0;
        break;
-@@ -2425,14 +2433,17 @@ md_apply_fix (fixS *   fixP,
+@@ -2453,14 +2434,17 @@ md_apply_fix (fixS *   fixP,
             }
         }
        break;
@@ -192,7 +226,7 @@ index b8250e4cded..9c8b6284fb1 100644
          {
            /* Generate the imm instruction.  */
            opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-@@ -2445,6 +2456,10 @@ md_apply_fix (fixS *   fixP,
+@@ -2473,6 +2457,10 @@ md_apply_fix (fixS *   fixP,
             inst1 = opcode1->bit_sequence;
             if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
              inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
@@ -203,7 +237,7 @@ index b8250e4cded..9c8b6284fb1 100644
           }
        else
          {
-@@ -2455,7 +2470,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2483,7 +2471,7 @@ md_apply_fix (fixS *   fixP,
               as_bad (_("unknown opcode \"%s\""), "imm");
               return;
             }
@@ -212,7 +246,7 @@ index b8250e4cded..9c8b6284fb1 100644
            inst1 = opcode1->bit_sequence;
            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
             inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
-@@ -2502,7 +2517,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2530,7 +2518,7 @@ md_apply_fix (fixS *   fixP,
          opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
        if (opcode1 == NULL)
         {
@@ -221,16 +255,16 @@ index b8250e4cded..9c8b6284fb1 100644
             as_bad (_("unknown opcode \"%s\""), "imml");
            else
             as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -2527,7 +2542,7 @@ md_apply_fix (fixS *   fixP,
-     {
-       /* This fixup has been resolved.  Create a reloc in case the linker
+@@ -2557,8 +2545,6 @@ md_apply_fix (fixS *   fixP,
          moves code around due to relaxing.  */
--      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+      if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
+       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+-      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
+-           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-@@ -2579,21 +2594,21 @@ md_estimate_size_before_relax (fragS * fragP,
+       else
+@@ -2609,33 +2595,24 @@ md_estimate_size_before_relax (fragS * fragP,
              if(streq (fragP->fr_opcode, str_microblaze_64)) 
               {
                 /* Used as an absolute value.  */
@@ -256,7 +290,19 @@ index b8250e4cded..9c8b6284fb1 100644
                 fragP->fr_var = INST_WORD_SIZE;
              }
          }
-@@ -2626,6 +2641,13 @@ md_estimate_size_before_relax (fragS * fragP,
+-    #if 0
+-      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
+-               !S_IS_WEAK (fragP->fr_symbol))
+-        {
+-          fragP->fr_subtype = DEFINED_PC_OFFSET;
+-          /* Don't know now whether we need an imm instruction.  */
+-          fragP->fr_var = INST_WORD_SIZE;
+-        }
+-#endif
+       else if (S_IS_DEFINED (fragP->fr_symbol)
+               && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
+         {
+@@ -2665,6 +2642,13 @@ md_estimate_size_before_relax (fragS * fragP,
               /* Variable part does not change.  */
               fragP->fr_var = INST_WORD_SIZE*2;
             }
@@ -270,7 +316,7 @@ index b8250e4cded..9c8b6284fb1 100644
           else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
             {
                /* It is accessed using the small data read only anchor.  */
-@@ -2700,6 +2722,7 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2739,6 +2723,7 @@ md_estimate_size_before_relax (fragS * fragP,
      case TLSTPREL_OFFSET:
      case TLSDTPREL_OFFSET:
      case DEFINED_64_OFFSET:
@@ -278,16 +324,16 @@ index b8250e4cded..9c8b6284fb1 100644
        fragP->fr_var = INST_WORD_SIZE*2;
        break;
      case DEFINED_RO_SEGMENT:
-@@ -2753,7 +2776,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2792,7 +2777,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
    else
      {
        /* The case where we are going to resolve things... */
--      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
+-      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
          return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
        else
          return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2788,6 +2811,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2827,6 +2812,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
      case BFD_RELOC_MICROBLAZE_64_GPC:
      case BFD_RELOC_MICROBLAZE_64:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixed-MB-x-relocation-issues.patch
index a621fb05..315d0445 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixed-MB-x-relocation-issues.patch
@@ -1,29 +1,28 @@
-From c3e194e231529c1b642f7f1a19a2a7b1ea644bd9 Mon Sep 17 00:00:00 2001
+From 5b1793fe6dfb16755f584821023145bdfc4b55d7 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 19/40] Update MB-x
+Subject: [PATCH 18/52] -Fixed MB-x relocation issues -Added imml for required
+ MB-x instructions
 
--Fixed MB-x relocation issues
--Added imml for required MB-x instructions
 ---
- bfd/elf64-microblaze.c     |  68 ++++++++++--
- gas/config/tc-microblaze.c | 221 +++++++++++++++++++++++++------------
+ bfd/elf64-microblaze.c     |  68 ++++++++++++++---
+ gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++----------
  gas/tc.h                   |   2 +-
- 3 files changed, 209 insertions(+), 82 deletions(-)
+ 3 files changed, 167 insertions(+), 55 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index d55700fc513..f8f52870639 100644
+index 6b1f47d00d..6676d9f93d 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1488,8 +1488,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                           relocation -= (input_section->output_section->vma
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -34,7 +33,7 @@ index d55700fc513..f8f52870639 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1580,11 +1589,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
@@ -44,7 +43,7 @@ index d55700fc513..f8f52870639 100644
 -                       bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
 +                         {
 +                           if (!input_section->output_section->vma &&
-+                                !input_section->output_offset && !offset)
++                                !input_section->output_offset && !offset)      
 +                             relocation -= (input_section->output_section->vma
 +                                            + input_section->output_offset
 +                                            + offset);
@@ -54,9 +53,9 @@ index d55700fc513..f8f52870639 100644
 +                                            + offset + INST_WORD_SIZE);
 +                         }
 +                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
++                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                         {
-+                           insn &= ~0x00ffffff;
++                           insn &= ~0x00ffffff;
 +                           insn |= (relocation >> 16) & 0xffffff;
 +                           bfd_put_32 (input_bfd, insn,
                                     contents + offset + endian);
@@ -67,7 +66,7 @@ index d55700fc513..f8f52870639 100644
                         bfd_put_16 (input_bfd, relocation & 0xffff,
                                     contents + offset + endian + INST_WORD_SIZE);
                       }
-@@ -1677,9 +1703,19 @@ static void
+@@ -1703,9 +1729,19 @@ static void
  microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -90,7 +89,7 @@ index d55700fc513..f8f52870639 100644
  }
  
  /* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1717,10 +1753,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -114,10 +113,10 @@ index d55700fc513..f8f52870639 100644
      instr_lo &= ~0x0000ffff;
      instr_lo |= (val & 0x0000ffff);
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 9c8b6284fb1..f61fdf3b90a 100644
+index 5e11a77e70..48f306ef41 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -391,7 +391,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
     Integer arg to pass to the function.  */
  /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
     and then in the read.c table.  */
@@ -126,7 +125,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
  {
    {"lcomm", microblaze_s_lcomm, 1},
    {"data", microblaze_s_data, 0},
-@@ -400,7 +400,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -135,84 +134,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
    {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
-@@ -538,30 +538,6 @@ parse_reg (char * s, unsigned * reg)
-       *reg = REG_SP;
-       return s + 3;
-     }
--  else if (strncasecmp (s, "rfsl", 4) == 0)
--    {
--      if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
--        {
--          tmpreg = (s[4] - '0') * 10 + s[5] - '0';
--          s += 6;
--        }
--      else if (ISDIGIT (s[4]))
--        {
--          tmpreg = s[4] - '0';
--          s += 5;
--        }
--      else
--       as_bad (_("register expected, but saw '%.6s'"), s);
--
--      if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
--        *reg = tmpreg;
--      else
--       {
--          as_bad (_("Invalid register number at '%.6s'"), s);
--          *reg = 0;
--       }
--      return s;
--    }
-   /* Stack protection registers.  */
-   else if (strncasecmp (s, "rshr", 4) == 0)
-     {
-@@ -605,6 +581,45 @@ parse_reg (char * s, unsigned * reg)
-   return s;
- }
- 
-+/* Same as above, but with long(er) register */
-+static char *
-+parse_regl (char * s, unsigned long * reg)
-+{
-+  unsigned long tmpreg = 0;
-+
-+  /* Strip leading whitespace.  */
-+  while (ISSPACE (* s))
-+    ++ s;
-+
-+  if (strncasecmp (s, "rfsl", 4) == 0)
-+    {
-+      if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
-+       {
-+         tmpreg = (s[4] - '0') * 10 + s[5] - '0';
-+         s += 6;
-+       }
-+      else if (ISDIGIT (s[4]))
-+       {
-+         tmpreg = s[4] - '0';
-+         s += 5;
-+       }
-+      else
-+       as_bad (_("register expected, but saw '%.6s'"), s);
-+
-+      if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
-+       *reg = tmpreg;
-+      else
-+       {
-+         as_bad (_("Invalid register number at '%.6s'"), s);
-+         *reg = 0;
-+       }
-+      return s;
-+    }
-+  as_bad (_("register expected, but saw '%.6s'"), s);
-+  *reg = 0;
-+  return s;
-+}
-+
- static char *
- parse_exp (char *s, expressionS *e)
- {
-@@ -995,7 +1010,7 @@ md_assemble (char * str)
+@@ -996,7 +996,7 @@ md_assemble (char * str)
    unsigned reg2;
    unsigned reg3;
    unsigned isize;
@@ -221,7 +143,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
    expressionS exp;
    char name[20];
    long immedl;
-@@ -1117,8 +1132,9 @@ md_assemble (char * str)
+@@ -1118,8 +1118,9 @@ md_assemble (char * str)
             as_fatal (_("lmi pseudo instruction should not use a label in imm field"));
           else if (streq (name, "smi"))
             as_fatal (_("smi pseudo instruction should not use a label in imm field"));
@@ -233,7 +155,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
             opc = str_microblaze_ro_anchor;
           else if (reg2 == REG_RWSDP)
             opc = str_microblaze_rw_anchor;
-@@ -1181,31 +1197,55 @@ md_assemble (char * str)
+@@ -1182,31 +1183,55 @@ md_assemble (char * str)
                inst |= (immed << IMM_LOW) & IMM_MASK;
              }
         }
@@ -275,7 +197,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
 +          inst |= (reg2 << RA_LOW) & RA_MASK;
 +          inst |= (immed << IMM_LOW) & IMM_MASK;
 +         }
-+       else
++       else 
 +        {
 +           temp = immed & 0xFFFF8000;
 +           if ((temp != 0) && (temp != 0xFFFF8000))
@@ -303,34 +225,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
        break;
  
      case INST_TYPE_RD_R1_IMMS:
-@@ -1400,7 +1440,7 @@ md_assemble (char * str)
-           reg1 = 0;
-         }
-       if (strcmp (op_end, ""))
--        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
-+        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
-       else
-        {
-           as_fatal (_("Error in statement syntax"));
-@@ -1454,7 +1494,7 @@ md_assemble (char * str)
-           reg1 = 0;
-         }
-       if (strcmp (op_end, ""))
--        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
-+        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
-       else
-        {
-           as_fatal (_("Error in statement syntax"));
-@@ -1472,7 +1512,7 @@ md_assemble (char * str)
- 
-     case INST_TYPE_RFSL:
-       if (strcmp (op_end, ""))
--        op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
-+        op_end = parse_regl (op_end + 1, &immed);  /* Get rfslN.  */
-       else
-        {
-           as_fatal (_("Error in statement syntax"));
-@@ -1831,12 +1871,20 @@ md_assemble (char * str)
+@@ -1832,12 +1857,20 @@ md_assemble (char * str)
      case INST_TYPE_IMM:
        if (streq (name, "imm"))
          as_fatal (_("An IMM instruction should not be present in the .s file"));
@@ -345,21 +240,21 @@ index 9c8b6284fb1..f61fdf3b90a 100644
         {
 -          char *opc = NULL;
 +         char *opc;
-+          if (microblaze_arch_size == 64 && (streq (name, "breai") ||
-+                streq (name, "breaid") ||
++          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
++                streq (name, "breaid") || 
 +                streq (name, "brai") || streq (name, "braid")))
-+            opc = strdup(str_microblaze_64);
++            opc = str_microblaze_64;
 +         else
 +            opc = NULL;
            relax_substateT subtype;
  
           if (exp.X_md != 0)
-@@ -1859,27 +1907,54 @@ md_assemble (char * str)
+@@ -1860,27 +1893,54 @@ md_assemble (char * str)
            immed = exp.X_add_number;
          }
  
-+      if (microblaze_arch_size == 64 && (streq (name, "breai") ||
-+            streq (name, "breaid") ||
++      if (microblaze_arch_size == 64 && (streq (name, "breai") || 
++            streq (name, "breaid") || 
 +           streq (name, "brai") || streq (name, "braid")))
 +        {
 +          temp = immed & 0xFFFFFF8000;
@@ -427,7 +322,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
        break;
  
      case INST_TYPE_NONE:
-@@ -2455,7 +2530,7 @@ md_apply_fix (fixS *   fixP,
+@@ -2456,7 +2516,7 @@ md_apply_fix (fixS *   fixP,
  
             inst1 = opcode1->bit_sequence;
             if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -436,13 +331,13 @@ index 9c8b6284fb1..f61fdf3b90a 100644
             if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
               fixP->fx_r_type = BFD_RELOC_64; 
             if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-@@ -2623,7 +2698,14 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2624,7 +2684,14 @@ md_estimate_size_before_relax (fragS * fragP,
          }
        else
         {
 -         fragP->fr_subtype = UNDEFINED_PC_OFFSET;
 +         if (fragP->fr_opcode != NULL) {
-+           if (streq (fragP->fr_opcode, str_microblaze_64))
++           if (streq (fragP->fr_opcode, str_microblaze_64)) 
 +              fragP->fr_subtype = DEFINED_64_PC_OFFSET;
 +           else
 +             fragP->fr_subtype = UNDEFINED_PC_OFFSET;
@@ -452,7 +347,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
           fragP->fr_var = INST_WORD_SIZE*2;
         }
        break;
-@@ -2900,6 +2982,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2901,6 +2968,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
      case OPTION_M64:
        //if (arg != NULL && strcmp (arg, "64") == 0)
        microblaze_arch_size = 64;
@@ -461,7 +356,7 @@ index 9c8b6284fb1..f61fdf3b90a 100644
      default:
        return 0;
 diff --git a/gas/tc.h b/gas/tc.h
-index da1738d67a8..5bdfe5c3475 100644
+index da1738d67a..5bdfe5c347 100644
 --- a/gas/tc.h
 +++ b/gas/tc.h
 @@ -22,7 +22,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixing-the-branch-related-issues.patch
new file mode 100644
index 00000000..027b8e83
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixing-the-branch-related-issues.patch
@@ -0,0 +1,28 @@
+From 33081da0bb8820f3c695d8f865582436b16002bf Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Sun, 30 Sep 2018 17:06:58 +0530
+Subject: [PATCH 19/52] Fixing the branch related issues
+
+Conflicts:
+        bfd/elf64-microblaze.c
+---
+ bfd/elf64-microblaze.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index 6676d9f93d..d7b7d9f5e7 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -2545,6 +2545,9 @@ microblaze_elf_check_relocs (bfd * abfd,
+          while (h->root.type == bfd_link_hash_indirect
+                 || h->root.type == bfd_link_hash_warning)
+            h = (struct elf_link_hash_entry *) h->root.u.i.link;
++         /* PR15323, ref flags aren't set for references in the same
++            object.  */
++         h->root.non_ir_ref_regular = 1;
+        }
+ 
+       switch (r_type)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-address-computation-issues-with-64bit-address.patch
index ad2fd5fe..d9de811d 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-address-computation-issues-with-64bit-address.patch
@@ -1,10 +1,12 @@
-From 1594b2f497822ebdb923b4ae55e81a10bfd4817d Mon Sep 17 00:00:00 2001
+From 22b1b41a7873fa117642cad6b150f465eb9b60cb Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 20/40] Various fixes
+Subject: [PATCH 20/52] - Fixed address computation issues with 64bit address -
+ Fixed imml dissassamble issue
 
-- Fixed address computation issues with 64bit address
-- Fixed imml dissassamble issue
+Conflicts:
+        gas/config/tc-microblaze.c
+        opcodes/microblaze-dis.c
 ---
  bfd/bfd-in2.h              |  5 +++
  bfd/elf64-microblaze.c     | 14 ++++----
@@ -13,23 +15,23 @@ Subject: [PATCH 20/40] Various fixes
  4 files changed, 79 insertions(+), 16 deletions(-)
 
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 88f89bcdbcd..8902d9c7939 100644
+index 57ea4f6132..05fbeb9b3a 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -5443,6 +5443,11 @@ value in two words (with an imml instruction).  No relocation is
- done here - only used for relaxing  */
-   BFD_RELOC_MICROBLAZE_64,
+@@ -5443,6 +5443,11 @@ done here - only used for relaxing  */
+  *   +done here - only used for relaxing  */
+     BFD_RELOC_MICROBLAZE_64,
  
 +/* This is a 64 bit reloc that stores the 32 bit relative
-+value in two words (with an imml instruction).  No relocation is
-+done here - only used for relaxing  */
++ *  +value in two words (with an imml instruction).  No relocation is
++ *   +done here - only used for relaxing  */
 +    BFD_RELOC_MICROBLAZE_EA64,
 +
  /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
+  *  +value in two words (with an imm instruction).  No relocation is
+  *   +done here - only used for relaxing  */
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index f8f52870639..17e58748a0b 100644
+index d7b7d9f5e7..f42d7f429b 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
 @@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -72,7 +74,7 @@ index f8f52870639..17e58748a0b 100644
        microblaze_reloc = R_MICROBLAZE_IMML_64;
        break;
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1982,7 +1982,7 @@ microblaze_elf_relax_section (bfd *abfd,
                 efix = calc_fixup (target_address, 0, sec);
  
              /* Validate the in-band val.  */
@@ -82,10 +84,10 @@ index f8f52870639..17e58748a0b 100644
                 fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
              }
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index f61fdf3b90a..0dfb59ffe8b 100644
+index 48f306ef41..bfb3104720 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -401,7 +401,6 @@ pseudo_typeS md_pseudo_table[] =
+@@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] =
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
    {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
@@ -93,7 +95,7 @@ index f61fdf3b90a..0dfb59ffe8b 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -2489,18 +2488,74 @@ md_apply_fix (fixS *   fixP,
+@@ -2475,18 +2474,74 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_RVA:
      case BFD_RELOC_32_PCREL:
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
@@ -143,7 +145,7 @@ index f61fdf3b90a..0dfb59ffe8b 100644
 +         }
 +       }
 +      break;
-+
++    
 +    case BFD_RELOC_MICROBLAZE_EA64:
        /* Don't do anything if the symbol is not defined.  */
        if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -172,16 +174,16 @@ index f61fdf3b90a..0dfb59ffe8b 100644
               buf[3] |= ((val >> 24) & 0xff);
               buf[2] |= ((val >> 16) & 0xff);
               buf[1] |= ((val >> 8) & 0xff);
-@@ -2621,6 +2676,8 @@ md_apply_fix (fixS *   fixP,
+@@ -2607,6 +2662,8 @@ md_apply_fix (fixS *   fixP,
         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
        else if (fixP->fx_r_type == BFD_RELOC_32)
         fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
 +      else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64)
-+       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
++        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
        else
         fixP->fx_r_type = BFD_RELOC_NONE;
        fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2892,6 +2949,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2878,6 +2935,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
      case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
      case BFD_RELOC_MICROBLAZE_64_GOTPC:
      case BFD_RELOC_MICROBLAZE_64_GPC:
@@ -189,7 +191,7 @@ index f61fdf3b90a..0dfb59ffe8b 100644
      case BFD_RELOC_MICROBLAZE_64:
      case BFD_RELOC_MICROBLAZE_64_PCREL:
      case BFD_RELOC_MICROBLAZE_64_GOT:
-@@ -3037,10 +3095,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3023,10 +3081,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
@@ -204,13 +206,13 @@ index f61fdf3b90a..0dfb59ffe8b 100644
          default:
            as_bad (_("unsupported BFD relocation size %u"), size);
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index a03f5b7a55b..fc8e79b19cf 100644
+index f643f2600d..1dc11a2653 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr)
+@@ -77,7 +77,7 @@ static char *
+ get_field_imml (struct string_buf *buf, long instr)
  {
    char *p = strbuf (buf);
- 
 -  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
 +  sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
    return p;
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
index 99f285f2..908f7572 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
@@ -1,7 +1,7 @@
-From b33fdfda4af069859ebe6588a5b9774cb5a2f14d Mon Sep 17 00:00:00 2001
+From 9880b06269a176c0b5c4f0ecb9e3784f630a76be Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Sat, 13 Oct 2018 21:17:01 +0530
-Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
+Subject: [PATCH 21/52] Adding new relocation to support 64bit rodata
 
 ---
  bfd/elf64-microblaze.c     | 11 +++++++--
@@ -9,10 +9,10 @@ Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
  2 files changed, 54 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 17e58748a0b..b62c47e8514 100644
+index f42d7f429b..ddcb5baf74 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1473,6 +1473,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
             case (int) R_MICROBLAZE_64_PCREL :
             case (int) R_MICROBLAZE_64:
             case (int) R_MICROBLAZE_32:
@@ -20,16 +20,16 @@ index 17e58748a0b..b62c47e8514 100644
               {
                 /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
                    from removed linkonce sections, or sections discarded by
-@@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1482,6 +1483,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
-                    if (r_type == R_MICROBLAZE_32)
+                    if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
 +                   else if (r_type == R_MICROBLAZE_IMML_64)
 +                     bfd_put_64 (input_bfd, relocation, contents + offset);
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1560,7 +1563,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                       }
                     else
                       {
@@ -38,7 +38,7 @@ index 17e58748a0b..b62c47e8514 100644
                           {
                             outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
                             outrel.r_addend = relocation + addend;
-@@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1586,6 +1589,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                     relocation += addend;
                     if (r_type == R_MICROBLAZE_32)
                       bfd_put_32 (input_bfd, relocation, contents + offset);
@@ -47,7 +47,7 @@ index 17e58748a0b..b62c47e8514 100644
                     else
                       {
                         if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2098,7 +2103,8 @@ microblaze_elf_relax_section (bfd *abfd,
                    microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
                                                       irelscan->r_addend);
                }
@@ -57,7 +57,7 @@ index 17e58748a0b..b62c47e8514 100644
                  {
                   isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
  
-@@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+@@ -2606,6 +2612,7 @@ microblaze_elf_check_relocs (bfd * abfd,
          case R_MICROBLAZE_64:
          case R_MICROBLAZE_64_PCREL:
          case R_MICROBLAZE_32:
@@ -66,10 +66,10 @@ index 17e58748a0b..b62c47e8514 100644
              if (h != NULL && !bfd_link_pic (info))
               {
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 0dfb59ffe8b..4bd71557ca2 100644
+index bfb3104720..532a26eaa5 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1133,6 +1133,13 @@ md_assemble (char * str)
+@@ -1119,6 +1119,13 @@ md_assemble (char * str)
             as_fatal (_("smi pseudo instruction should not use a label in imm field"));
            if(streq (name, "lli") || streq (name, "sli"))
              opc = str_microblaze_64;
@@ -83,7 +83,7 @@ index 0dfb59ffe8b..4bd71557ca2 100644
           else if (reg2 == REG_ROSDP)
             opc = str_microblaze_ro_anchor;
           else if (reg2 == REG_RWSDP)
-@@ -1196,7 +1203,10 @@ md_assemble (char * str)
+@@ -1182,7 +1189,10 @@ md_assemble (char * str)
                inst |= (immed << IMM_LOW) & IMM_MASK;
              }
         }
@@ -95,19 +95,19 @@ index 0dfb59ffe8b..4bd71557ca2 100644
          {
            temp = immed & 0xFFFFFF8000;
            if (temp != 0 && temp != 0xFFFFFF8000)
-@@ -1808,6 +1818,11 @@ md_assemble (char * str)
+@@ -1794,6 +1804,11 @@ md_assemble (char * str)
  
           if (exp.X_md != 0)
             subtype = get_imm_otype(exp.X_md);
 +          else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
 +            {
-+              opc = strdup(str_microblaze_64);
++              opc = str_microblaze_64;
 +             subtype = opcode->inst_offset_type;
 +           }
           else
             subtype = opcode->inst_offset_type;
  
-@@ -1825,6 +1840,31 @@ md_assemble (char * str)
+@@ -1811,6 +1826,31 @@ md_assemble (char * str)
            output = frag_more (isize);
            immed = exp.X_add_number;
          }
@@ -139,7 +139,7 @@ index 0dfb59ffe8b..4bd71557ca2 100644
  
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
-@@ -1848,6 +1888,7 @@ md_assemble (char * str)
+@@ -1834,6 +1874,7 @@ md_assemble (char * str)
  
        inst |= (reg1 << RD_LOW) & RD_MASK;
        inst |= (immed << IMM_LOW) & IMM_MASK;
@@ -147,7 +147,7 @@ index 0dfb59ffe8b..4bd71557ca2 100644
        break;
  
      case INST_TYPE_R2:
-@@ -3095,10 +3136,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3081,10 +3122,10 @@ cons_fix_new_microblaze (fragS * frag,
            r = BFD_RELOC_32;
            break;
          case 8:
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
index 48b89d64..6c144b8a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
@@ -1,35 +1,35 @@
-From 118e1717ef8421bc86bcf56c9186f065bd607efd Mon Sep 17 00:00:00 2001
+From e7b6ab1b28fc3ca13ed25687d5e851795ed6e1a3 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 22/40] fixing the .bss relocation issue
+Subject: [PATCH 22/52] fixing the .bss relocation issue
 
 ---
  bfd/elf64-microblaze.c | 18 ++++++++++++------
  1 file changed, 12 insertions(+), 6 deletions(-)
 
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index b62c47e8514..cb3b40b574c 100644
+index ddcb5baf74..861420789b 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1492,7 +1492,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                          + input_section->output_offset
                                          + offset + INST_WORD_SIZE);
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1606,7 +1606,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
                                              + offset + INST_WORD_SIZE);
                           }
                         unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
+-                       if (insn == 0xb2000000 || insn == 0xb2ffffff)
 +                       if ((insn & 0xff000000) == 0xb2000000)
                           {
-                            insn &= ~0x00ffffff;
+                            insn &= ~0x00ffffff;
                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1735,7 +1735,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
  {
      unsigned long instr = bfd_get_32 (abfd, bfd_addr);
  
@@ -38,7 +38,7 @@ index b62c47e8514..cb3b40b574c 100644
        {
          instr &= ~0x00ffffff;
          instr |= (val & 0xffffff);
-@@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1758,7 +1758,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
      unsigned long instr_lo;
  
      instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -47,7 +47,7 @@ index b62c47e8514..cb3b40b574c 100644
        {
          instr_hi &= ~0x00ffffff;
          instr_hi |= (val >> 16) & 0xffffff;
-@@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2251,7 +2251,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
@@ -59,7 +59,7 @@ index b62c47e8514..cb3b40b574c 100644
            immediate |= (instr_lo & 0x0000ffff);
                       offset = calc_fixup (irelscan->r_addend, 0, sec);
                       immediate -= offset;
-@@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2295,7 +2298,10 @@ microblaze_elf_relax_section (bfd *abfd,
            unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
                                                  + irelscan->r_offset
                                                  + INST_WORD_SIZE);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
index c84767fa..98f05ac8 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
@@ -1,7 +1,7 @@
-From 04d4e164cec91078b1b1155bae6ae4b508758969 Mon Sep 17 00:00:00 2001
+From 9b9f53c95e5b1fbccd4de2dd579c6cfae34c191d Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
+Subject: [PATCH 23/52] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  It was adjusting only lower 16bits.
 
 ---
@@ -10,7 +10,7 @@ Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index e1a66f57e79..bf09c68afd9 100644
+index 14bb6de052..d77710b1f3 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -2019,8 +2019,8 @@ microblaze_elf_relax_section (bfd *abfd,
@@ -25,10 +25,10 @@ index e1a66f57e79..bf09c68afd9 100644
               break;
             }
 diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index cb3b40b574c..b002b414d64 100644
+index 861420789b..338f16eeee 100644
 --- a/bfd/elf64-microblaze.c
 +++ b/bfd/elf64-microblaze.c
-@@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2030,8 +2030,8 @@ microblaze_elf_relax_section (bfd *abfd,
                 sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
                 efix = calc_fixup (target_address, 0, sec);
                 irel->r_addend -= (efix - sfix);
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
index 9a8e799c..25d0d7eb 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
@@ -1,7 +1,7 @@
-From 7d26e7f32769e1a324a8dfd3bc3eaa2a5fbfe62a Mon Sep 17 00:00:00 2001
+From 70fcc4fe0635bdc871bc2ec1087173e3f93cab86 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Wed, 27 Feb 2019 15:12:32 +0530
-Subject: [PATCH 24/40] Revert "ld: Remove unused expression state"
+Subject: [PATCH 24/52] Revert "ld: Remove unused expression state"
 
 This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb.
 
@@ -13,7 +13,7 @@ Conflicts:
  2 files changed, 6 insertions(+), 3 deletions(-)
 
 diff --git a/ld/ldexp.c b/ld/ldexp.c
-index b4e7c41209d..dd3b058110a 100644
+index b4e7c41209..dd3b058110 100644
 --- a/ld/ldexp.c
 +++ b/ld/ldexp.c
 @@ -1360,6 +1360,7 @@ static etree_type *
@@ -60,7 +60,7 @@ index b4e7c41209d..dd3b058110a 100644
  
  /* Handle ASSERT.  */
 diff --git a/ld/ldexp.h b/ld/ldexp.h
-index 717e839bd41..852ac6c5889 100644
+index 717e839bd4..852ac6c588 100644
 --- a/ld/ldexp.h
 +++ b/ld/ldexp.h
 @@ -66,6 +66,7 @@ typedef union etree_union {
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
deleted file mode 100644
index 97d75650..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 8293b0cf15d4411402a2b0b50e4c532093c5d952 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 11 Mar 2019 14:23:58 +0530
-Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing
- build error for windows builds.commenting for now.
-
----
- bfd/elf-attrs.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
-index 070104c2734..8331c8759d5 100644
---- a/bfd/elf-attrs.c
-+++ b/bfd/elf-attrs.c
-@@ -442,6 +442,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
-   if (hdr->sh_size == 0)
-     return;
- 
-+  #if 0
-   filesize = bfd_get_file_size (abfd);
-   if (filesize != 0 && hdr->sh_size > filesize)
-     {
-@@ -451,6 +452,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
-       bfd_set_error (bfd_error_invalid_operation);
-       return;
-     }
-+  #endif
- 
-   contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1);
-   if (!contents)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
index ebd1fa4c..9d1b1794 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From 987bd08638fab099dcfdce412448734182be51e6 Mon Sep 17 00:00:00 2001
+From 49fdaa5a4f0ed7e20b82ccb8d0db53075777abe9 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 25/52] fixing the long & long long mingw toolchain issue
 
 ---
  gas/config/tc-microblaze.c | 10 +++++-----
@@ -9,10 +9,10 @@ Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
  2 files changed, 7 insertions(+), 7 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 4bd71557ca2..83e17c60fa0 100644
+index 532a26eaa5..b00b759893 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -797,7 +797,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
+@@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
  }
  
   static char *
@@ -21,7 +21,7 @@ index 4bd71557ca2..83e17c60fa0 100644
  {
    char *new_pointer;
    char *atp;
-@@ -848,11 +848,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
+@@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
      ; /* An error message has already been emitted.  */
    else if ((e->X_op != O_constant && e->X_op != O_symbol) )
      as_fatal (_("operand must be a constant or a label"));
@@ -38,7 +38,7 @@ index 4bd71557ca2..83e17c60fa0 100644
  
    if (atp)
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f9709412097..77d74c17f3a 100644
+index f970941209..77d74c17f3 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Added-support-to-new-arithmetic-single-register-inst.patch
index 12f44a6d..6379a5c4 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Added-support-to-new-arithmetic-single-register-inst.patch
@@ -1,21 +1,23 @@
-From dde3395588ca91a7c484cc4a003f72f80848c534 Mon Sep 17 00:00:00 2001
+From b29e6a15c9f65837dbb560aa6c41c49e591915e9 Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 27/40] Added support to new arithmetic single register
+Subject: [PATCH 26/52] Added support to new arithmetic single register
  instructions
 
+Conflicts:
+        opcodes/microblaze-dis.c
 ---
- gas/config/tc-microblaze.c | 145 ++++++++++++++++++++++++++++++++++++-
+ gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++-
  opcodes/microblaze-dis.c   |  13 +++-
- opcodes/microblaze-opc.h   |  45 +++++++++++-
+ opcodes/microblaze-opc.h   |  43 ++++++++++-
  opcodes/microblaze-opcm.h  |   5 +-
  4 files changed, 201 insertions(+), 7 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 83e17c60fa0..b4330652758 100644
+index b00b759893..eca060b262 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -422,12 +422,33 @@ void
+@@ -423,12 +423,33 @@ void
  md_begin (void)
  {
    struct op_code_struct * opcode;
@@ -26,7 +28,7 @@ index 83e17c60fa0..b4330652758 100644
    /* Insert unique names into hash table.  */
 -  for (opcode = opcodes; opcode->name; opcode ++)
 -    hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
-+  for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
++  for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
 +    {
 +      if (strcmp (prev_name, opcode->name))
 +       {
@@ -51,7 +53,7 @@ index 83e17c60fa0..b4330652758 100644
  }
  
  /* Try to parse a reg name.  */
-@@ -1000,6 +1021,7 @@ md_assemble (char * str)
+@@ -986,6 +1007,7 @@ md_assemble (char * str)
  {
    char * op_start;
    char * op_end;
@@ -59,15 +61,19 @@ index 83e17c60fa0..b4330652758 100644
    struct op_code_struct * opcode, *opcode1;
    char * output = NULL;
    int nlen = 0;
-@@ -1013,6 +1035,7 @@ md_assemble (char * str)
-   expressionS exp;
+@@ -996,9 +1018,10 @@ md_assemble (char * str)
+   unsigned reg3;
+   unsigned isize;
+   unsigned long immed, immed2, temp;
+-  expressionS exp;
++  expressionS exp,exp1;
    char name[20];
    long immedl;
 +  int reg=0;
  
    /* Drop leading whitespace.  */
    while (ISSPACE (* str))
-@@ -1043,7 +1066,78 @@ md_assemble (char * str)
+@@ -1029,7 +1052,78 @@ md_assemble (char * str)
        as_bad (_("unknown opcode \"%s\""), name);
        return;
      }
@@ -147,7 +153,7 @@ index 83e17c60fa0..b4330652758 100644
    inst = opcode->bit_sequence;
    isize = 4;
  
-@@ -1494,6 +1588,51 @@ md_assemble (char * str)
+@@ -1480,6 +1574,51 @@ md_assemble (char * str)
        inst |= (immed << IMM_LOW) & IMM15_MASK;
        break;
  
@@ -200,14 +206,13 @@ index 83e17c60fa0..b4330652758 100644
        if (strcmp (op_end, ""))
          op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
 diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index fc8e79b19cf..f5db1189240 100644
+index 1dc11a2653..90d2328659 100644
 --- a/opcodes/microblaze-dis.c
 +++ b/opcodes/microblaze-dis.c
-@@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr)
+@@ -130,9 +130,17 @@ get_field_imm15 (struct string_buf *buf, long instr)
    return p;
  }
  
-+static char *
 +get_field_imm16 (struct string_buf *buf, long instr)
 +{
 +  char *p = strbuf (buf);
@@ -218,27 +223,23 @@ index fc8e79b19cf..f5db1189240 100644
 +
  static char *
  get_field_special (struct string_buf *buf, long instr,
-                   struct op_code_struct *op)
-@@ -450,6 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-                      get_field_imm15 (&buf, inst));
-          break;
-+       case INST_TYPE_RD_IMML:
-+         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
-+         break;
-          /* For mbar insn.  */
-        case INST_TYPE_IMM5:
-          print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
-@@ -457,7 +469,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+-                  struct op_code_struct *op)
++                   struct op_code_struct *op)
+ {
+   char *p = strbuf (buf);
+   char *spr;
+@@ -456,6 +464,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
           /* For mbar 16 or sleep insn.  */
         case INST_TYPE_NONE:
           break;
--         /* For tuqula instruction */
++       case INST_TYPE_RD_IMML:
++         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
++          break;
          /* For bit field insns.  */
         case INST_TYPE_RD_R1_IMMW_IMMS:
-          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
+           print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 77d74c17f3a..bd1cc90bff6 100644
+index 77d74c17f3..c1b453c95e 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -69,6 +69,7 @@
@@ -291,7 +292,7 @@ index 77d74c17f3a..bd1cc90bff6 100644
  /* New Mask for msrset, msrclr insns.  */
  #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
  /* Mask for mbar insn.  */
-@@ -114,13 +143,13 @@
+@@ -114,7 +143,7 @@
  #define DELAY_SLOT 1
  #define NO_DELAY_SLOT 0
  
@@ -300,13 +301,6 @@ index 77d74c17f3a..bd1cc90bff6 100644
  
  struct op_code_struct
  {
-   const char * name;
-   short inst_type;            /* Registers and immediate values involved.  */
--  short inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
-+  int inst_offset_type;     /* Immediate vals offset from PC? (= 1 for branches).  */
-   short delay_slots;          /* Info about delay slots needed after this instr. */
-   short immval_mask;
-   unsigned long bit_sequence; /* All the fixed bits for the op are set and
 @@ -444,13 +473,21 @@ struct op_code_struct
    {"cmpl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
    {"cmplu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
@@ -344,7 +338,7 @@ index 77d74c17f3a..bd1cc90bff6 100644
    {"breai",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
    {"breaid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
 diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index ad8b8ce345b..86cdb3b0715 100644
+index fcf259a362..eca247c63b 100644
 --- a/opcodes/microblaze-opcm.h
 +++ b/opcodes/microblaze-opcm.h
 @@ -61,7 +61,9 @@ enum microblaze_instr
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
index a8d5a385..e3826d6f 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
@@ -1,19 +1,19 @@
-From 623f4e7ea6c18bec0e141c7471c7bd609bd9a6d7 Mon Sep 17 00:00:00 2001
+From 653712c23456574468c426aebbeb5ee8dae7237e Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit
+Subject: [PATCH 27/52] [Patch,MicroBlaze] : double imml generation for 64 bit
  values.
 
 ---
- gas/config/tc-microblaze.c | 324 ++++++++++++++++++++++++++++++-------
+ gas/config/tc-microblaze.c | 322 ++++++++++++++++++++++++++++++-------
  opcodes/microblaze-opc.h   |   4 +-
- 2 files changed, 264 insertions(+), 64 deletions(-)
+ 2 files changed, 263 insertions(+), 63 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index b4330652758..f5cc1e05f7e 100644
+index eca060b262..aef54ad83f 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1022,7 +1022,7 @@ md_assemble (char * str)
+@@ -1008,7 +1008,7 @@ md_assemble (char * str)
    char * op_start;
    char * op_end;
    char * temp_op_end;
@@ -22,21 +22,20 @@ index b4330652758..f5cc1e05f7e 100644
    char * output = NULL;
    int nlen = 0;
    int i;
-@@ -1206,7 +1206,12 @@ md_assemble (char * str)
+@@ -1192,7 +1192,12 @@ md_assemble (char * str)
            reg2 = 0;
          }
        if (strcmp (op_end, ""))
--       op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
 +        {
-+          if (microblaze_arch_size == 64)
-+            op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+         else
-+           op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
++        if(microblaze_arch_size == 64)
++        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
++       else
+        op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
 +       }
        else
         as_fatal (_("Error in statement syntax"));
  
-@@ -1302,24 +1307,51 @@ md_assemble (char * str)
+@@ -1288,24 +1293,51 @@ md_assemble (char * str)
                 || streq (name, "lwi") || streq (name, "sbi")
                  || streq (name, "shi") || streq (name, "swi"))))
          {
@@ -52,48 +51,48 @@ index b4330652758..f5cc1e05f7e 100644
 +            {
 +             opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
 +             if (opcode1 == NULL)
-                 {
-                   as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
-               inst1 = opcode1->bit_sequence;
--             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
-             }
-+         else 
-+           {
-+           opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL || opcode2 == NULL)
 +                {
 +                  as_bad (_("unknown opcode \"%s\""), "imml");
 +                  return;
 +                }
-+              inst1 = opcode2->bit_sequence;
-+              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
++              inst1 = opcode1->bit_sequence;
++              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
 +              output[0] = INST_BYTE0 (inst1);
 +              output[1] = INST_BYTE1 (inst1);
 +              output[2] = INST_BYTE2 (inst1);
 +              output[3] = INST_BYTE3 (inst1);
 +              output = frag_more (isize);
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
++            }
++         else 
++           {
++           opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
++           opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
++              if (opcode1 == NULL || opcode2 == NULL)
+                 {
+                   as_bad (_("unknown opcode \"%s\""), "imml");
+                   return;
+                 }
++              inst1 = opcode2->bit_sequence;
++              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
 +              output[0] = INST_BYTE0 (inst1);
 +              output[1] = INST_BYTE1 (inst1);
 +              output[2] = INST_BYTE2 (inst1);
 +              output[3] = INST_BYTE3 (inst1);
 +              output = frag_more (isize);
-+            }
+               inst1 = opcode1->bit_sequence;
+-             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
++              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
+               output[0] = INST_BYTE0 (inst1);
+               output[1] = INST_BYTE1 (inst1);
+               output[2] = INST_BYTE2 (inst1);
+               output[3] = INST_BYTE3 (inst1);
+               output = frag_more (isize);
+             }
 +         }
            inst |= (reg1 << RD_LOW) & RD_MASK;
            inst |= (reg2 << RA_LOW) & RA_MASK;
            inst |= (immed << IMM_LOW) & IMM_MASK;
-@@ -1330,14 +1362,13 @@ md_assemble (char * str)
+@@ -1316,14 +1348,13 @@ md_assemble (char * str)
             if ((temp != 0) && (temp != 0xFFFF8000))
              {
                 /* Needs an immediate inst.  */
@@ -110,7 +109,7 @@ index b4330652758..f5cc1e05f7e 100644
                 inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
                 output[0] = INST_BYTE0 (inst1);
                 output[1] = INST_BYTE1 (inst1);
-@@ -1578,7 +1609,7 @@ md_assemble (char * str)
+@@ -1564,7 +1595,7 @@ md_assemble (char * str)
          as_fatal (_("Cannot use special register with this instruction"));
  
        if (exp.X_op != O_constant)
@@ -119,7 +118,7 @@ index b4330652758..f5cc1e05f7e 100644
        else
         {
            output = frag_more (isize);
-@@ -1912,8 +1943,9 @@ md_assemble (char * str)
+@@ -1898,8 +1929,9 @@ md_assemble (char * str)
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
         {
@@ -130,7 +129,7 @@ index b4330652758..f5cc1e05f7e 100644
            if (opcode1 == NULL)
              {
                as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -1942,7 +1974,12 @@ md_assemble (char * str)
+@@ -1928,7 +1960,12 @@ md_assemble (char * str)
            reg1 = 0;
          }
        if (strcmp (op_end, ""))
@@ -143,7 +142,7 @@ index b4330652758..f5cc1e05f7e 100644
        else
          as_fatal (_("Error in statement syntax"));
  
-@@ -1981,30 +2018,55 @@ md_assemble (char * str)
+@@ -1967,30 +2004,55 @@ md_assemble (char * str)
          }
        if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
          {
@@ -204,8 +203,8 @@ index b4330652758..f5cc1e05f7e 100644
        temp = immed & 0xFFFF8000;
        if ((temp != 0) && (temp != 0xFFFF8000))
         {
-@@ -2090,25 +2152,50 @@ md_assemble (char * str)
-             streq (name, "breaid") ||
+@@ -2076,25 +2138,50 @@ md_assemble (char * str)
+             streq (name, "breaid") || 
             streq (name, "brai") || streq (name, "braid")))
          {
 -          temp = immed & 0xFFFFFF8000;
@@ -259,7 +258,7 @@ index b4330652758..f5cc1e05f7e 100644
            inst |= (immed << IMM_LOW) & IMM_MASK;
         }
        else
-@@ -2208,21 +2295,45 @@ md_assemble (char * str)
+@@ -2194,21 +2281,45 @@ md_assemble (char * str)
         {
           output = frag_more (isize);
           immedl = exp.X_add_number;
@@ -320,7 +319,7 @@ index b4330652758..f5cc1e05f7e 100644
          }
  
        inst |= (reg1 << RD_LOW) & RD_MASK;
-@@ -2271,21 +2382,46 @@ md_assemble (char * str)
+@@ -2257,21 +2368,46 @@ md_assemble (char * str)
         {
            output = frag_more (isize);
            immedl = exp.X_add_number;
@@ -375,7 +374,7 @@ index b4330652758..f5cc1e05f7e 100644
  
        inst |= (reg1 << RA_LOW) & RA_MASK;
        inst |= (immedl << IMM_LOW) & IMM_MASK;
-@@ -2565,8 +2701,8 @@ md_apply_fix (fixS *   fixP,
+@@ -2551,8 +2687,8 @@ md_apply_fix (fixS *   fixP,
    /* Note: use offsetT because it is signed, valueT is unsigned.  */
    offsetT      val  = (offsetT) * valp;
    int          i;
@@ -386,7 +385,7 @@ index b4330652758..f5cc1e05f7e 100644
  
    symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
  
-@@ -2749,30 +2885,75 @@ md_apply_fix (fixS *   fixP,
+@@ -2735,30 +2871,75 @@ md_apply_fix (fixS *   fixP,
      case BFD_RELOC_MICROBLAZE_64_TEXTREL:
      case BFD_RELOC_MICROBLAZE_64:
      case BFD_RELOC_MICROBLAZE_64_PCREL:
@@ -472,7 +471,7 @@ index b4330652758..f5cc1e05f7e 100644
            /* Generate the imm instruction.  */
            opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
            if (opcode1 == NULL)
-@@ -2784,12 +2965,11 @@ md_apply_fix (fixS *   fixP,
+@@ -2770,12 +2951,11 @@ md_apply_fix (fixS *   fixP,
            inst1 = opcode1->bit_sequence;
            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
             inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
@@ -486,7 +485,7 @@ index b4330652758..f5cc1e05f7e 100644
        /* Add the value only if the symbol is defined.  */
        if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
         {
-@@ -2821,21 +3001,41 @@ md_apply_fix (fixS *   fixP,
+@@ -2807,21 +2987,41 @@ md_apply_fix (fixS *   fixP,
        /* Add an imm instruction.  First save the current instruction.  */
        for (i = 0; i < INST_WORD_SIZE; i++)
         buf[i + INST_WORD_SIZE] = buf[i];
@@ -533,7 +532,7 @@ index b4330652758..f5cc1e05f7e 100644
          within the same section only.  */
        buf[0] = INST_BYTE0 (inst1);
 diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index bd1cc90bff6..cf5b5920921 100644
+index c1b453c95e..ba0b3f8b62 100644
 --- a/opcodes/microblaze-opc.h
 +++ b/opcodes/microblaze-opc.h
 @@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
@@ -542,7 +541,7 @@ index bd1cc90bff6..cf5b5920921 100644
  
 -#define MIN_IMML  ((long long) 0xffffff8000000000L)
 -#define MAX_IMML  ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML  ((long long) -9223372036854775807)
++#define MIN_IMML  ((long long) -9223372036854775808)
 +#define MAX_IMML  ((long long) 9223372036854775807)
  
  #endif /* MICROBLAZE_OPC */
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
index 3720f2dc..e8c55106 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
@@ -1,7 +1,7 @@
-From b7b5caa314177cfe8aeb0fb6d748f6e52fe51a83 Mon Sep 17 00:00:00 2001
+From 2c051a6d5326e34cb4a3170073cda17e7269055d Mon Sep 17 00:00:00 2001
 From: Nagaraju <nmekala@xilinx.com>
 Date: Wed, 22 Jan 2020 16:31:12 +0530
-Subject: [PATCH 29/40] Fixed bug in generation of IMML instruction for the new
+Subject: [PATCH 28/52] Fixed bug in generation of IMML instruction for the new
  MB-64 instructions with single register.
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 29/40] Fixed bug in generation of IMML instruction for the new
  1 file changed, 47 insertions(+), 3 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index f5cc1e05f7e..efd1a42769e 100644
+index aef54ad83f..647cfb6869 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -1653,12 +1653,56 @@ md_assemble (char * str)
+@@ -1639,12 +1639,56 @@ md_assemble (char * str)
                               exp.X_add_symbol,
                               exp.X_add_number,
                               (char *) opc);
@@ -70,8 +70,8 @@ index f5cc1e05f7e..efd1a42769e 100644
          }
        inst |= (reg1 << RD_LOW) & RD_MASK;
        inst |= (immed << IMM_LOW) & IMM16_MASK;
-@@ -2152,8 +2196,8 @@ md_assemble (char * str)
-             streq (name, "breaid") ||
+@@ -2138,8 +2182,8 @@ md_assemble (char * str)
+             streq (name, "breaid") || 
             streq (name, "brai") || streq (name, "braid")))
          {
 -          temp = immed & 0xFFFFFFFFFFFF8000;
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
new file mode 100644
index 00000000..abfcdabc
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
@@ -0,0 +1,38 @@
+From 77751e719ba1470f3dc869ae309485adb02819b6 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 16 Apr 2020 18:08:58 +0530
+Subject: [PATCH 29/52]  [Patch,MicroBlaze m64] : This patch will remove imml 0
+ and imml -1 instructions when the offset is less than 16 bit for Type A
+ branch EA instructions.
+
+---
+ gas/config/tc-microblaze.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index 647cfb6869..e565b2a99d 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -2150,9 +2150,7 @@ md_assemble (char * str)
+       if (exp.X_op != O_constant)
+        {
+          char *opc;
+-          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
+-                streq (name, "breaid") || 
+-                streq (name, "brai") || streq (name, "braid")))
++          if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
+             opc = str_microblaze_64;
+          else
+             opc = NULL;
+@@ -2916,7 +2914,7 @@ md_apply_fix (fixS *   fixP,
+     case BFD_RELOC_MICROBLAZE_64:
+     case BFD_RELOC_MICROBLAZE_64_PCREL:
+       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
+-            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
++            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
+         {
+           /* Generate the imm instruction.  */
+            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
new file mode 100644
index 00000000..b8f8b8bd
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
@@ -0,0 +1,39 @@
+From 2a43e06f14cac633d87f5b213a6bacd16085967f Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Wed, 17 Jun 2020 21:20:26 +0530
+Subject: [PATCH 30/52] [Patch,MicroBlaze] : improper address mapping of
+ PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't
+ need to override PROVIDE symbols if symbols are defined in libraries and
+ linker so I am disabling override for PROVIDE symbols.
+
+---
+ ld/ldlang.c | 12 +++++++++---
+ 1 file changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/ld/ldlang.c b/ld/ldlang.c
+index 9977195074..a2c44cf719 100644
+--- a/ld/ldlang.c
++++ b/ld/ldlang.c
+@@ -3657,10 +3657,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
+            plugin_insert = NULL;
+ #endif
+          break;
++         /* This is from a --defsym on the command line.  */
+        case lang_assignment_statement_enum:
+-         if (s->assignment_statement.exp->type.node_class != etree_assert)
+-           exp_fold_tree_no_dot (s->assignment_statement.exp);
+-         break;
++          if (s->assignment_statement.exp->type.node_class != etree_assert)
++          {
++          if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
++          ;
++          else
++          exp_fold_tree_no_dot (s->assignment_statement.exp);
++          }
++          break;
+        default:
+          break;
+        }
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
deleted file mode 100644
index 8cd3563b..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 0afa4ba2af8d63cb70771f1c7e235af920603533 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 16 Apr 2020 18:08:58 +0530
-Subject: [PATCH 30/40] [Patch,MicroBlaze m64]: Update imml instructions for
- Type A branch EA
-
-This patch will remove imml 0 and imml -1 instructions when the offset is less than 16 bit for Type A branch EA instructions.
----
- gas/config/tc-microblaze.c | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index efd1a42769e..1d838abfefa 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2164,13 +2164,13 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
--          if (microblaze_arch_size == 64 && (streq (name, "breai") ||
--                streq (name, "breaid") ||
--                streq (name, "brai") || streq (name, "braid")))
--            opc = strdup(str_microblaze_64);
-+          /* removal of imml 0 and imml -1 for bea type A insns.
-+             if offset is 16 bit then imml instructions are redundant */
-+         if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-+           opc = strdup(str_microblaze_64);
-          else
--            opc = NULL;
--          relax_substateT subtype;
-+           opc = NULL;
-+         relax_substateT subtype;
- 
-          if (exp.X_md != 0)
-            subtype = get_imm_otype(exp.X_md);
-@@ -2930,7 +2930,7 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_PCREL:
-       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
--            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
-         {
-           /* Generate the imm instruction.  */
-            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch
index 0e813f96..83b293f3 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch
@@ -1,7 +1,7 @@
-From 4d0c68ffb688c23f984de8c0a22af824c3902d83 Mon Sep 17 00:00:00 2001
+From c45a69deeb210ebdb80cf055cef9e62bd0bda053 Mon Sep 17 00:00:00 2001
 From: Mark Hatle <mark.hatle@kernel.crashing.org>
 Date: Thu, 16 Jul 2020 12:38:11 -0500
-Subject: [PATCH 32/40] gas: revert moving of md_pseudo_table from const
+Subject: [PATCH 31/52] gas: revert moving of md_pseudo_table from const
 
 The base system expect md_pseudo_table to be constant, Changing the
 definition will break other architectures when compiled with a
@@ -18,10 +18,10 @@ Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
  2 files changed, 14 insertions(+), 4 deletions(-)
 
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 1d838abfefa..da99d4ef482 100644
+index e565b2a99d..c6ca913f8b 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -384,6 +384,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -385,6 +385,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
    demand_empty_rest_of_line ();
  }
  
@@ -39,7 +39,7 @@ index 1d838abfefa..da99d4ef482 100644
  /* This table describes all the machine specific pseudo-ops the assembler
     has to support.  The fields are:
     Pseudo-op name without dot
-@@ -391,7 +402,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -392,7 +403,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
     Integer arg to pass to the function.  */
  /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
     and then in the read.c table.  */
@@ -48,7 +48,7 @@ index 1d838abfefa..da99d4ef482 100644
  {
    {"lcomm", microblaze_s_lcomm, 1},
    {"data", microblaze_s_data, 0},
-@@ -400,7 +411,7 @@ pseudo_typeS md_pseudo_table[] =
+@@ -401,7 +412,7 @@ pseudo_typeS md_pseudo_table[] =
    {"data32", cons, 4},     /* Same as word.  */
    {"ent", s_func, 0}, /* Treat ent as function entry point.  */
    {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
@@ -57,7 +57,7 @@ index 1d838abfefa..da99d4ef482 100644
    {"weakext", microblaze_s_weakext, 0},
    {"rodata", microblaze_s_rdata, 0},
    {"sdata2", microblaze_s_rdata, 1},
-@@ -3464,7 +3475,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -3448,7 +3459,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
      case OPTION_M64:
        //if (arg != NULL && strcmp (arg, "64") == 0)
        microblaze_arch_size = 64;
@@ -66,7 +66,7 @@ index 1d838abfefa..da99d4ef482 100644
      default:
        return 0;
 diff --git a/gas/tc.h b/gas/tc.h
-index 5bdfe5c3475..da1738d67a8 100644
+index 5bdfe5c347..da1738d67a 100644
 --- a/gas/tc.h
 +++ b/gas/tc.h
 @@ -22,7 +22,7 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
deleted file mode 100644
index fda23a1a..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 23f0f6e8281b5cd481ef7636739c07b446828f7e Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 17 Jun 2020 21:20:26 +0530
-Subject: [PATCH 31/40] ldlang.c: Workaround for improper address mapping
- causing runtime loops
-
-[Patch,MicroBlaze] : improper address mapping of PROVIDE directive
-symbols[DTOR_END] are causing runtime loops and we don't need to override
-PROVIDE symbols if symbols are defined in libraries and linker so I am
-disabling override for PROVIDE symbols.
----
- ld/ldlang.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/ld/ldlang.c b/ld/ldlang.c
-index 9977195074a..9e2c1da066e 100644
---- a/ld/ldlang.c
-+++ b/ld/ldlang.c
-@@ -3657,9 +3657,15 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
-            plugin_insert = NULL;
- #endif
-          break;
-+       /* This is from a --defsym on the command line.  */
-        case lang_assignment_statement_enum:
-          if (s->assignment_statement.exp->type.node_class != etree_assert)
--           exp_fold_tree_no_dot (s->assignment_statement.exp);
-+           {
-+             if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
-+               ;
-+             else
-+               exp_fold_tree_no_dot (s->assignment_statement.exp);
-+           }
-          break;
-        default:
-          break;
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
new file mode 100644
index 00000000..8891a77f
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
@@ -0,0 +1,43 @@
+From 7b285c827edbc34cf79d4ed0f46cdfd4916b687c Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Mon, 30 Nov 2020 16:17:36 -0800
+Subject: [PATCH 32/52] ld/emulparams/elf64microblaze: Fix emulation generation
+
+Compilation fails when building ld-new with:
+
+ldemul.o:(.data.rel+0x820): undefined reference to `ld_elf64microblazeel_emulation'
+ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation'
+
+The error appears to be that the elf64 files were referencing the elf32 emulation.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ ld/emulparams/elf64microblaze.sh   | 2 +-
+ ld/emulparams/elf64microblazeel.sh | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
+index 9c7b0eb708..7b4c7c411b 100644
+--- a/ld/emulparams/elf64microblaze.sh
++++ b/ld/emulparams/elf64microblaze.sh
+@@ -19,5 +19,5 @@ NOP=0x80000000
+ #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+ #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+ 
+-TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
+ #GENERATE_SHLIB_SCRIPT=yes
+diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
+index 9c7b0eb708..7b4c7c411b 100644
+--- a/ld/emulparams/elf64microblazeel.sh
++++ b/ld/emulparams/elf64microblazeel.sh
+@@ -19,5 +19,5 @@ NOP=0x80000000
+ #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+ #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+ 
+-TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
+ #GENERATE_SHLIB_SCRIPT=yes
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
index 00e5410c..b296e1b1 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
@@ -1,7 +1,7 @@
-From c466a54f6ac8fae44f3e79e33bb782086dc08a2b Mon Sep 17 00:00:00 2001
+From 3f506a7c6a8f7b746102276f3c41a7b11bd7ac3c Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Mon, 23 Jan 2017 19:07:44 +0530
-Subject: [PATCH 34/40] Add initial port of linux gdbserver add
+Subject: [PATCH 33/52] Add initial port of linux gdbserver add
  gdb_proc_service_h to gdbserver microblaze-linux
 
 gdbserver needs to initialise the microblaze registers
@@ -20,22 +20,18 @@ architecture specific setup - may need to add in future
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
- gdb/configure.host                   |   3 +
- gdb/features/microblaze-linux.xml    |  12 ++
- gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++
- gdb/microblaze-linux-tdep.c          |  29 +++-
- gdb/microblaze-tdep.c                |  35 ++++-
- gdb/microblaze-tdep.h                |   4 +-
- gdb/regformats/reg-microblaze.dat    |  41 ++++++
- gdbserver/Makefile.in                |   4 +
- gdbserver/configure.srv              |   8 ++
- 9 files changed, 322 insertions(+), 3 deletions(-)
- create mode 100644 gdb/features/microblaze-linux.xml
- create mode 100644 gdb/gdbserver/linux-microblaze-low.c
+ gdb/configure.host                |   3 +
+ gdb/microblaze-linux-tdep.c       |  29 ++++-
+ gdb/microblaze-tdep.c             |  35 +++++-
+ gdb/microblaze-tdep.h             |   4 +-
+ gdb/regformats/reg-microblaze.dat |  41 +++++++
+ gdbserver/linux-microblaze-low.c  | 189 ++++++++++++++++++++++++++++++
+ 6 files changed, 298 insertions(+), 3 deletions(-)
  create mode 100644 gdb/regformats/reg-microblaze.dat
+ create mode 100644 gdbserver/linux-microblaze-low.c
 
 diff --git a/gdb/configure.host b/gdb/configure.host
-index ce528237291..cf1a08e8b28 100644
+index ce52823729..cf1a08e8b2 100644
 --- a/gdb/configure.host
 +++ b/gdb/configure.host
 @@ -65,6 +65,7 @@ hppa*)                        gdb_host_cpu=pa ;;
@@ -55,29 +51,195 @@ index ce528237291..cf1a08e8b28 100644
  powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
                         gdb_host=aix ;;
  powerpc*-*-freebsd*)   gdb_host=fbsd ;;
-diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index be710bedb6..fb8241884b 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -37,6 +37,22 @@
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
+ 
++static int microblaze_debug_flag = 0;
++
++static void
++microblaze_debug (const char *fmt, ...)
++{
++  if (microblaze_debug_flag)
++    {
++       va_list args;
++
++       va_start (args, fmt);
++       printf_unfiltered ("MICROBLAZE LINUX: ");
++       vprintf_unfiltered (fmt, args);
++       va_end (args);
++    }
++}
++
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
+                                           struct bp_target_info *bp_tgt)
+@@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+   int val;
+   int bplen;
+   gdb_byte old_contents[BREAKPOINT_MAX];
++  struct cleanup *cleanup;
+ 
+   /* Determine appropriate breakpoint contents and size for this address.  */
+   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+ 
++  /* Make sure we see the memory breakpoints.  */
++  cleanup = make_show_memory_breakpoints_cleanup (1);
+   val = target_read_memory (addr, old_contents, bplen);
+ 
+   /* If our breakpoint is no longer at the address, this means that the
+      program modified the code on us, so it is wrong to put back the
+      old value.  */
+   if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
+-    val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
++  {
++      val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
++      microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
++  }
+ 
++  do_cleanups (cleanup);
+   return val;
+ }
+ 
+@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+   /* Trampolines.  */
+   tramp_frame_prepend_unwinder (gdbarch,
+                                &microblaze_linux_sighandler_tramp_frame);
++
++  /* Enable TLS support.  */
++  set_gdbarch_fetch_tls_load_module_address (gdbarch,
++                                             svr4_fetch_objfile_link_map);
+ }
+ 
+ void _initialize_microblaze_linux_tdep ();
+diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
+index 5c80413304..443adfb364 100644
+--- a/gdb/microblaze-tdep.c
++++ b/gdb/microblaze-tdep.c
+@@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+ 
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+-
++static int
++microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
++                                   struct bp_target_info *bp_tgt)
++{
++  CORE_ADDR addr = bp_tgt->placed_address;
++  const unsigned char *bp;
++  int val;
++  int bplen;
++  gdb_byte old_contents[BREAKPOINT_MAX];
++  struct cleanup *cleanup;
++
++  /* Determine appropriate breakpoint contents and size for this address.  */
++  bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
++  if (bp == NULL)
++    error (_("Software breakpoints not implemented for this target."));
++
++  /* Make sure we see the memory breakpoints.  */
++  cleanup = make_show_memory_breakpoints_cleanup (1);
++  val = target_read_memory (addr, old_contents, bplen);
++
++  /* If our breakpoint is no longer at the address, this means that the
++     program modified the code on us, so it is wrong to put back the
++     old value.  */
++  if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
++  {
++    val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
++    microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
++  }
++
++  do_cleanups (cleanup);
++  return val;
++}
+ 
+ /* Allocate and initialize a frame cache.  */
+ 
+@@ -731,6 +762,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+                                       microblaze_breakpoint::kind_from_pc);
+   set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+                                       microblaze_breakpoint::bp_from_kind);
++  set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint);
+ 
+   set_gdbarch_frame_args_skip (gdbarch, 8);
+ 
+@@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."),
+                             NULL,
+                             &setdebuglist, &showdebuglist);
+ 
++
+ }
+diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
+index 4fbdf9933f..db0772643d 100644
+--- a/gdb/microblaze-tdep.h
++++ b/gdb/microblaze-tdep.h
+@@ -117,6 +117,8 @@ struct microblaze_frame_cache
+ 
+ /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
+    Only used for native debugging.  */
+-#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
++#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
++#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
++
+ 
+ #endif /* microblaze-tdep.h */
+diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
 new file mode 100644
-index 00000000000..8983e66eb3d
+index 0000000000..bd8a438442
 --- /dev/null
-+++ b/gdb/features/microblaze-linux.xml
-@@ -0,0 +1,12 @@
-+<?xml version="1.0"?>
-+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
-+
-+     Copying and distribution of this file, with or without modification,
-+     are permitted in any medium without royalty provided the copyright
-+     notice and this notice are preserved.  -->
-+
-+<!DOCTYPE target SYSTEM "gdb-target.dtd">
-+<target>
-+  <osabi>GNU/Linux</osabi>
-+  <xi:include href="microblaze-core.xml"/>
-+</target>
-diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
++++ b/gdb/regformats/reg-microblaze.dat
+@@ -0,0 +1,41 @@
++name:microblaze
++expedite:r1,pc
++32:r0
++32:r1
++32:r2
++32:r3
++32:r4
++32:r5
++32:r6
++32:r7
++32:r8
++32:r9
++32:r10
++32:r11
++32:r12
++32:r13
++32:r14
++32:r15
++32:r16
++32:r17
++32:r18
++32:r19
++32:r20
++32:r21
++32:r22
++32:r23
++32:r24
++32:r25
++32:r26
++32:r27
++32:r28
++32:r29
++32:r30
++32:r31
++32:pc
++32:msr
++32:ear
++32:esr
++32:fsr
++32:slr
++32:shr
+diff --git a/gdbserver/linux-microblaze-low.c b/gdbserver/linux-microblaze-low.c
 new file mode 100644
-index 00000000000..cba5d6fc585
+index 0000000000..cba5d6fc58
 --- /dev/null
-+++ b/gdb/gdbserver/linux-microblaze-low.c
++++ b/gdbserver/linux-microblaze-low.c
 @@ -0,0 +1,189 @@
 +/* GNU/Linux/Microblaze specific low level interface, for the remote server for
 +   GDB.
@@ -268,233 +430,6 @@ index 00000000000..cba5d6fc585
 +  microblaze_collect_ptrace_register,
 +  microblaze_supply_ptrace_register,
 +};
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index be710bedb64..d15b24d619e 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -37,6 +37,22 @@
- #include "tramp-frame.h"
- #include "linux-tdep.h"
- 
-+static int microblaze_debug_flag = 0;
-+
-+static void
-+microblaze_debug (const char *fmt, ...)
-+{
-+  if (microblaze_debug_flag)
-+    {
-+       va_list args;
-+
-+       va_start (args, fmt);
-+       printf_unfiltered ("MICROBLAZE LINUX: ");
-+       vprintf_unfiltered (fmt, args);
-+       va_end (args);
-+    }
-+}
-+
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
-                                           struct bp_target_info *bp_tgt)
-@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-   /* Determine appropriate breakpoint contents and size for this address.  */
-   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
- 
-+  /* Make sure we see the memory breakpoints.  */
-+  scoped_restore restore_memory
-+    = make_scoped_restore_show_memory_breakpoints (1);
-+
-   val = target_read_memory (addr, old_contents, bplen);
- 
-   /* If our breakpoint is no longer at the address, this means that the
-      program modified the code on us, so it is wrong to put back the
-      old value.  */
-   if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
--    val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
-+  {
-+      val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
-+      microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
-+  }
- 
-   return val;
- }
-@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
-   /* Trampolines.  */
-   tramp_frame_prepend_unwinder (gdbarch,
-                                &microblaze_linux_sighandler_tramp_frame);
-+
-+  /* Enable TLS support.  */
-+  set_gdbarch_fetch_tls_load_module_address (gdbarch,
-+                                             svr4_fetch_objfile_link_map);
- }
- 
- void _initialize_microblaze_linux_tdep ();
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 5c804133040..5972a69eb5f 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
- 
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
--
-+static int
-+microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-+                                   struct bp_target_info *bp_tgt)
-+{
-+  CORE_ADDR addr = bp_tgt->placed_address;
-+  const unsigned char *bp;
-+  int val;
-+  int bplen;
-+  gdb_byte old_contents[BREAKPOINT_MAX];
-+
-+  /* Determine appropriate breakpoint contents and size for this address.  */
-+  bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
-+  if (bp == NULL)
-+    error (_("Software breakpoints not implemented for this target."));
-+
-+  /* Make sure we see the memory breakpoints.  */
-+  scoped_restore restore_memory
-+    = make_scoped_restore_show_memory_breakpoints (1);
-+
-+  val = target_read_memory (addr, old_contents, bplen);
-+
-+  /* If our breakpoint is no longer at the address, this means that the
-+     program modified the code on us, so it is wrong to put back the
-+     old value.  */
-+  if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
-+  {
-+    val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
-+    microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
-+  }
-+
-+  return val;
-+}
- 
- /* Allocate and initialize a frame cache.  */
- 
-@@ -731,6 +762,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
-                                       microblaze_breakpoint::kind_from_pc);
-   set_gdbarch_sw_breakpoint_from_kind (gdbarch,
-                                       microblaze_breakpoint::bp_from_kind);
-+  set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint);
- 
-   set_gdbarch_frame_args_skip (gdbarch, 8);
- 
-@@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."),
-                             NULL,
-                             &setdebuglist, &showdebuglist);
- 
-+
- }
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 4fbdf9933f0..db0772643dc 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
-@@ -117,6 +117,8 @@ struct microblaze_frame_cache
- 
- /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
-    Only used for native debugging.  */
--#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
-+#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
-+#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
-+
- 
- #endif /* microblaze-tdep.h */
-diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
-new file mode 100644
-index 00000000000..bd8a4384424
---- /dev/null
-+++ b/gdb/regformats/reg-microblaze.dat
-@@ -0,0 +1,41 @@
-+name:microblaze
-+expedite:r1,pc
-+32:r0
-+32:r1
-+32:r2
-+32:r3
-+32:r4
-+32:r5
-+32:r6
-+32:r7
-+32:r8
-+32:r9
-+32:r10
-+32:r11
-+32:r12
-+32:r13
-+32:r14
-+32:r15
-+32:r16
-+32:r17
-+32:r18
-+32:r19
-+32:r20
-+32:r21
-+32:r22
-+32:r23
-+32:r24
-+32:r25
-+32:r26
-+32:r27
-+32:r28
-+32:r29
-+32:r30
-+32:r31
-+32:pc
-+32:msr
-+32:ear
-+32:esr
-+32:fsr
-+32:slr
-+32:shr
-diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
-index 9d7687be534..8195ccb8ad2 100644
---- a/gdbserver/Makefile.in
-+++ b/gdbserver/Makefile.in
-@@ -183,6 +183,7 @@ SFILES = \
-        $(srcdir)/linux-ia64-low.cc \
-        $(srcdir)/linux-low.cc \
-        $(srcdir)/linux-m68k-low.cc \
-+       $(srcdir)/linux-microblaze-low.c \
-        $(srcdir)/linux-mips-low.cc \
-        $(srcdir)/linux-nios2-low.cc \
-        $(srcdir)/linux-ppc-low.cc \
-@@ -216,6 +217,7 @@ SFILES = \
-        $(srcdir)/../gdb/nat/linux-namespaces.c \
-        $(srcdir)/../gdb/nat/linux-osdata.c \
-        $(srcdir)/../gdb/nat/linux-personality.c \
-+       $(srcdir)/../gdb/nat/microblaze-linux.c \
-        $(srcdir)/../gdb/nat/mips-linux-watch.c \
-        $(srcdir)/../gdb/nat/ppc-linux.c \
-        $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \
-@@ -557,6 +559,8 @@ target/%.o: ../gdb/target/%.c
- 
- %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh)
-        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
-+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
-+       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
- 
- #
- # Dependency tracking.
-diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
-index 5e33bd9c54d..13d5c6aff87 100644
---- a/gdbserver/configure.srv
-+++ b/gdbserver/configure.srv
-@@ -155,6 +155,14 @@ case "${gdbserver_host}" in
-                        srv_linux_usrregs=yes
-                        srv_linux_thread_db=yes
-                        ;;
-+  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
-+                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-+                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_xmlfiles="microblaze-linux.xml"
-+                       srv_linux_regsets=yes
-+                       srv_linux_usrregs=yes
-+                       srv_linux_thread_db=yes
-+                       ;;
-   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
-                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
-                        srv_regobj="${srv_regobj} powerpc-vsx32l.o"
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
deleted file mode 100644
index 7339995e..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From d9114e764eb42ae1daaf6af7c2a5e48fc764109d Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@kernel.crashing.org>
-Date: Fri, 17 Jul 2020 09:20:54 -0500
-Subject: [PATCH 33/40] Fix various compile warnings
-
-Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
----
- bfd/elf64-microblaze.c     |  9 +++++----
- gas/config/tc-microblaze.c | 11 +++++------
- 2 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index b002b414d64..8308f1ebd09 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- /* Set the howto pointer for a RCE ELF reloc.  */
- 
- static bfd_boolean
--microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
-+microblaze_elf_info_to_howto (bfd * abfd,
-                              arelent * cache_ptr,
-                              Elf_Internal_Rela * dst)
- {
-@@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
-   r_type = ELF64_R_TYPE (dst->r_info);
-   if (r_type >= R_MICROBLAZE_max)
-     {
--      (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
-+      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
-                             abfd, r_type);
-       bfd_set_error (bfd_error_bad_value);
-       return FALSE;
-     }
- 
-   cache_ptr->howto = microblaze_elf_howto_table [r_type];
-- return TRUE;
-+  return TRUE;
- }
- 
- /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
-@@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                        else
-                          {
-                            BFD_FAIL ();
--                           (*_bfd_error_handler)
-+                           _bfd_error_handler
-                              (_("%pB: probably compiled without -fPIC?"),
-                               input_bfd);
-                            bfd_set_error (bfd_error_bad_value);
-@@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd,
-           goto dogottls;
-         case R_MICROBLAZE_TLSLD:
-           tls_type |= (TLS_TLS | TLS_LD);
-+          /* Fall through. */
-         dogottls:
-           sec->has_tls_reloc = 1;
-           /* Fall through. */
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index da99d4ef482..62daa56b47a 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -1091,7 +1091,6 @@ md_assemble (char * str)
-         reg  = is_reg (temp_op_end + 1);
-       if (reg) 
-        {
--          
-          opcode->inst_type=INST_TYPE_RD_R1_IMML;
-           opcode->inst_offset_type = OPCODE_MASK_H;
-           if (streq (name, "addli"))
-@@ -1242,18 +1241,18 @@ md_assemble (char * str)
-          else if (streq (name, "smi"))
-            as_fatal (_("smi pseudo instruction should not use a label in imm field"));
-           if(streq (name, "lli") || streq (name, "sli"))
--            opc = str_microblaze_64;
-+            opc = strdup(str_microblaze_64);
-           else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
-                        || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
-                        || streq (name, "shi") || streq (name, "swi"))))
-            {
--              opc = str_microblaze_64;
-+              opc = strdup(str_microblaze_64);
-              subtype = opcode->inst_offset_type;
-            }
-          else if (reg2 == REG_ROSDP)
--           opc = str_microblaze_ro_anchor;
-+           opc = strdup(str_microblaze_ro_anchor);
-          else if (reg2 == REG_RWSDP)
--           opc = str_microblaze_rw_anchor;
-+           opc = strdup(str_microblaze_rw_anchor);
-          else
-            opc = NULL;
-          if (exp.X_md != 0)
-@@ -1718,7 +1717,7 @@ md_assemble (char * str)
-       inst |= (reg1 << RD_LOW) & RD_MASK;
-       inst |= (immed << IMM_LOW) & IMM16_MASK;
-       break;
--       
-+
-     case INST_TYPE_R1_RFSL:
-       if (strcmp (op_end, ""))
-         op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
--- 
-2.17.1
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Initial-port-of-core-reading-support-Added-support-f.patch
index 4eeeb7da..3d5f7ae2 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Initial-port-of-core-reading-support-Added-support-f.patch
@@ -1,22 +1,22 @@
-From b6c01467951b83f9cca621ffeb89151eba1d73a1 Mon Sep 17 00:00:00 2001
+From bcb8a5479a617eea7b4da869bee5e00d4b750c73 Mon Sep 17 00:00:00 2001
 From: Mahesh Bodapati <mbodapat@xilinx.com>
 Date: Tue, 24 Jan 2017 14:55:56 +0530
-Subject: [PATCH 35/40] Initial port of core reading support Added support for
+Subject: [PATCH 34/52] Initial port of core reading support Added support for
  reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
  information for rebuilding ".reg" sections of core dumps at run time.
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
- bfd/elf32-microblaze.c      | 84 +++++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c      | 84 ++++++++++++++++++++++++++++++++++
  gdb/configure.tgt           |  2 +-
- gdb/microblaze-linux-tdep.c | 17 +++++++-
- gdb/microblaze-tdep.c       | 48 +++++++++++++++++++++
- gdb/microblaze-tdep.h       | 27 ++++++++++++
- 5 files changed, 176 insertions(+), 2 deletions(-)
+ gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++
+ gdb/microblaze-tdep.c       | 90 +++++++++++++++++++++++++++++++++++++
+ gdb/microblaze-tdep.h       | 27 +++++++++++
+ 5 files changed, 259 insertions(+), 1 deletion(-)
 
 diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index bf09c68afd9..a4b15882d77 100644
+index d77710b1f3..7a27e50111 100644
 --- a/bfd/elf32-microblaze.c
 +++ b/bfd/elf32-microblaze.c
 @@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
@@ -107,7 +107,7 @@ index bf09c68afd9..a4b15882d77 100644
  /* ELF linker hash entry.  */
  
  struct elf32_mb_link_hash_entry
-@@ -3574,4 +3655,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+@@ -3576,4 +3657,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
  #define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
  #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
  
@@ -116,7 +116,7 @@ index bf09c68afd9..a4b15882d77 100644
 +
  #include "elf32-target.h"
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index d66f01bb9f7..2938fddfe82 100644
+index d66f01bb9f..2938fddfe8 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
 @@ -389,7 +389,7 @@ mep-*-*)
@@ -129,34 +129,65 @@ index d66f01bb9f7..2938fddfe82 100644
         gdb_sim=../sim/microblaze/libsim.a
         ;;
 diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index d15b24d619e..0d5c08d24f6 100644
+index fb8241884b..2725ce1789 100644
 --- a/gdb/microblaze-linux-tdep.c
 +++ b/gdb/microblaze-linux-tdep.c
-@@ -36,6 +36,7 @@
- #include "frame-unwind.h"
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-+#include "glibc-tdep.h"
- 
- static int microblaze_debug_flag = 0;
- 
-@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
+@@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
    microblaze_linux_sighandler_cache_init
  };
  
--
++const struct microblaze_gregset microblaze_linux_core_gregset;
++
++static void
++microblaze_linux_supply_core_gregset (const struct regset *regset,
++                                   struct regcache *regcache,
++                                   int regnum, const void *gregs, size_t len)
++{
++  microblaze_supply_gregset (&microblaze_linux_core_gregset, regcache,
++                             regnum, gregs);
++}
++
++static void
++microblaze_linux_collect_core_gregset (const struct regset *regset,
++                                    const struct regcache *regcache,
++                                    int regnum, void *gregs, size_t len)
++{
++  microblaze_collect_gregset (&microblaze_linux_core_gregset, regcache,
++                              regnum, gregs);
++}
++
++static void
++microblaze_linux_supply_core_fpregset (const struct regset *regset,
++                                    struct regcache *regcache,
++                                    int regnum, const void *fpregs, size_t len)
++{
++  /* FIXME.  */
++  microblaze_supply_fpregset (regcache, regnum, fpregs);
++}
++
++static void
++microblaze_linux_collect_core_fpregset (const struct regset *regset,
++                                     const struct regcache *regcache,
++                                     int regnum, void *fpregs, size_t len)
++{
++  /* FIXME.  */
++  microblaze_collect_fpregset (regcache, regnum, fpregs);
++}
+ 
  static void
  microblaze_linux_init_abi (struct gdbarch_info info,
                            struct gdbarch *gdbarch)
  {
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
++  tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset,
++                                microblaze_linux_collect_core_gregset);
 +  tdep->sizeof_gregset = 200;
 +
    linux_init_abi (info, gdbarch);
  
    set_gdbarch_memory_remove_breakpoint (gdbarch,
-@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+@@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info,
    tramp_frame_prepend_unwinder (gdbarch,
                                 &microblaze_linux_sighandler_tramp_frame);
  
@@ -171,50 +202,109 @@ index d15b24d619e..0d5c08d24f6 100644
 +  set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
 +  set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
 +
++  set_gdbarch_regset_from_core_section (gdbarch,
++                                       microblaze_regset_from_core_section);
++
    /* Enable TLS support.  */
    set_gdbarch_fetch_tls_load_module_address (gdbarch,
                                               svr4_fetch_objfile_link_map);
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 5972a69eb5f..7462a1f7ce6 100644
+index 443adfb364..1b5cf38e45 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
-@@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+@@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+ 
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
++static CORE_ADDR
++microblaze_store_arguments (struct regcache *regcache, int nargs,
++                           struct value **args, CORE_ADDR sp,
++                           int struct_return, CORE_ADDR struct_addr)
++{
++  error (_("store_arguments not implemented"));
++  return sp;
++}
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+                                    struct bp_target_info *bp_tgt)
+@@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame,
+   return cache->base;
+ }
+ 
++static const struct frame_unwind *
++microblaze_frame_sniffer (struct frame_info *next_frame)
++{
++  return &microblaze_frame_unwind;
++}
++
+ static const struct frame_base microblaze_frame_base =
+ {
+   &microblaze_frame_unwind,
+@@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
                                    tdesc_microblaze_with_stack_protect);
  }
  
 +void
-+microblaze_supply_gregset (const struct regset *regset,
++microblaze_supply_gregset (const struct microblaze_gregset *gregset,
 +                        struct regcache *regcache,
 +                        int regnum, const void *gregs)
 +{
-+  const unsigned int *regs = (const unsigned int *)gregs;
++  unsigned int *regs = gregs;
 +  if (regnum >= 0)
-+    regcache->raw_supply (regnum, regs + regnum);
++    regcache_raw_supply (regcache, regnum, regs + regnum);
 +
 +  if (regnum == -1) {
 +    int i;
 +
 +    for (i = 0; i < 50; i++) {
-+      regcache->raw_supply (i, regs + i);
++      regcache_raw_supply (regcache, i, regs + i);
 +    }
 +  }
 +}
 +
 +
++void
++microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++                         const struct regcache *regcache,
++                         int regnum, void *gregs)
++{
++   /* FIXME.  */
++}
++
++void
++microblaze_supply_fpregset (struct regcache *regcache,
++                         int regnum, const void *fpregs)
++{
++   /* FIXME.  */
++}
++
++void
++microblaze_collect_fpregset (const struct regcache *regcache,
++                          int regnum, void *fpregs)
++{
++   /* FIXME.  */
++}
++
++
 +/* Return the appropriate register set for the core section identified
 +   by SECT_NAME and SECT_SIZE.  */
 +
-+static void
-+microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
-+                                     iterate_over_regset_sections_cb *cb,
-+                                     void *cb_data,
-+                                     const struct regcache *regcache)
++const struct regset *
++microblaze_regset_from_core_section (struct gdbarch *gdbarch,
++                                     const char *sect_name, size_t sect_size)
 +{
 +  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 +
-+  cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
++  microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name);
++
++  if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
++    return tdep->gregset;
++
++  if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
++    return tdep->fpregset;
 +
-+  cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
++  microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n");
++  return NULL;
 +}
 +
 +
@@ -222,7 +312,7 @@ index 5972a69eb5f..7462a1f7ce6 100644
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
  {
-@@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    tdep = XCNEW (struct gdbarch_tdep);
    gdbarch = gdbarch_alloc (&info, tdep);
  
@@ -233,7 +323,7 @@ index 5972a69eb5f..7462a1f7ce6 100644
    set_gdbarch_long_double_bit (gdbarch, 128);
  
    set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
-@@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
    if (tdesc_data != NULL)
      tdesc_use_registers (gdbarch, tdesc, tdesc_data);
@@ -241,14 +331,14 @@ index 5972a69eb5f..7462a1f7ce6 100644
 +
 +  /* If we have register sets, enable the generic core file support.  */
 +  if (tdep->gregset) {
-+    set_gdbarch_iterate_over_regset_sections (gdbarch,
-+                                          microblaze_iterate_over_regset_sections);
++      set_gdbarch_regset_from_core_section (gdbarch,
++                                          microblaze_regset_from_core_section);
 +  }
  
    return gdbarch;
  }
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index db0772643dc..8f41ba19351 100644
+index db0772643d..de66a05cab 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -22,8 +22,22 @@
@@ -278,10 +368,10 @@ index db0772643dc..8f41ba19351 100644
  #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
  #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
  
-+extern void microblaze_supply_gregset (const struct regset *regset,
++extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset,
 +                                    struct regcache *regcache,
 +                                    int regnum, const void *gregs);
-+extern void microblaze_collect_gregset (const struct regset *regset,
++extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset,
 +                                     const struct regcache *regcache,
 +                                     int regnum, void *gregs);
 +extern void microblaze_supply_fpregset (struct regcache *regcache,
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Fix-debug-message-when-register-is-unavailable.patch
index 79d08da9..4c26f259 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0035-Fix-debug-message-when-register-is-unavailable.patch
@@ -1,7 +1,7 @@
-From dc76254a84fa1086983aefe9db4d8f94b42efb9b Mon Sep 17 00:00:00 2001
+From bc2b702d7f73a231bd67c60465137fe37f67479a Mon Sep 17 00:00:00 2001
 From: Nathan Rossi <nathan.rossi@petalogix.com>
 Date: Tue, 8 May 2012 18:11:17 +1000
-Subject: [PATCH 36/40] Fix debug message when register is unavailable
+Subject: [PATCH 35/52] Fix debug message when register is unavailable
 
 Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
  1 file changed, 10 insertions(+), 3 deletions(-)
 
 diff --git a/gdb/frame.c b/gdb/frame.c
-index ff27b9f00e9..bf931b370c9 100644
+index ff27b9f00e..bf931b370c 100644
 --- a/gdb/frame.c
 +++ b/gdb/frame.c
 @@ -1263,12 +1263,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver.patch
new file mode 100644
index 00000000..81f55f76
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver.patch
@@ -0,0 +1,31 @@
+From c84c1a62142bcd18c242ec476539f0c505285d6c Mon Sep 17 00:00:00 2001
+From: David Holsgrove <david.holsgrove@xilinx.com>
+Date: Mon, 22 Jul 2013 11:16:05 +1000
+Subject: [PATCH 36/52] revert master-rebase changes to gdbserver
+
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+---
+ gdbserver/configure.srv | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 5e33bd9c54..7e81388850 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -155,6 +155,13 @@ case "${gdbserver_host}" in
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+                        ;;
++  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
++                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
++                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_linux_regsets=yes
++                       srv_linux_usrregs=yes
++                       srv_linux_thread_db=yes
++                       ;;
+   powerpc*-*-linux*)   srv_regobj="powerpc-32l.o"
+                        srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+                        srv_regobj="${srv_regobj} powerpc-vsx32l.o"
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch
new file mode 100644
index 00000000..24ae7a8c
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch
@@ -0,0 +1,36 @@
+From 06f1e66daaa1c8a2e1e43254a66f35840945e63b Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 30 Apr 2018 17:09:55 +0530
+Subject: [PATCH 37/52] revert master-rebase changes to gdbserver , previous
+ commit typo's
+
+Note: This _WILL NOT WORK_, the format of the files in gdbserver have changed!
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ gdbserver/Makefile.in | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
+index 9d7687be53..df354d636c 100644
+--- a/gdbserver/Makefile.in
++++ b/gdbserver/Makefile.in
+@@ -183,6 +183,7 @@ SFILES = \
+        $(srcdir)/linux-ia64-low.cc \
+        $(srcdir)/linux-low.cc \
+        $(srcdir)/linux-m68k-low.cc \
++       $(srcdir)/linux-microblaze-low.c \
+        $(srcdir)/linux-mips-low.cc \
+        $(srcdir)/linux-nios2-low.cc \
+        $(srcdir)/linux-ppc-low.cc \
+@@ -217,6 +218,7 @@ SFILES = \
+        $(srcdir)/../gdb/nat/linux-osdata.c \
+        $(srcdir)/../gdb/nat/linux-personality.c \
+        $(srcdir)/../gdb/nat/mips-linux-watch.c \
++       $(srcdir)/../gdb/nat/microblaze-linux.c \
+        $(srcdir)/../gdb/nat/ppc-linux.c \
+        $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \
+        $(srcdir)/../gdb/nat/fork-inferior.c \
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
index 80b70fcc..dede70e8 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
@@ -1,7 +1,7 @@
-From 23376adc47cf72e46a1edf99e7fbc40164d39cd6 Mon Sep 17 00:00:00 2001
+From 463a2d331ab68484913a2957614e852eac793583 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@xilinx.com>
 Date: Mon, 16 Dec 2013 16:37:32 +1000
-Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level
+Subject: [PATCH 38/52] microblaze: Add build_gdbserver=yes to top level
  configure.tgt
 
 For Microblaze linux toolchains, set the build_gdbserver=yes
@@ -16,7 +16,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 2938fddfe82..ac2d35a9917 100644
+index 2938fddfe8..ac2d35a991 100644
 --- a/gdb/configure.tgt
 +++ b/gdb/configure.tgt
 @@ -397,6 +397,7 @@ microblaze*-*-*)
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-support-for-native-gdb.patch
index 9360bc5a..646914a4 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-support-for-native-gdb.patch
@@ -1,12 +1,15 @@
-From f34017e4cec8ad571accfd964187ab1f2db8de7f Mon Sep 17 00:00:00 2001
+From eef1384ec08bbbac893e4a564981517f92f90b57 Mon Sep 17 00:00:00 2001
 From: David Holsgrove <david.holsgrove@petalogix.com>
 Date: Fri, 20 Jul 2012 15:18:35 +1000
-Subject: [PATCH 38/40] Initial support for native gdb
+Subject: [PATCH 39/52] Initial support for native gdb
 
 microblaze: Follow PPC method of getting setting registers
 using PTRACE PEEK/POKE
 
 Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
+
+Conflicts:
+        gdb/Makefile.in
 ---
  gdb/Makefile.in                |   2 +
  gdb/config/microblaze/linux.mh |   9 +
@@ -16,7 +19,7 @@ Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
  create mode 100644 gdb/microblaze-linux-nat.c
 
 diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 9ae9fe2d1e1..a44464b9830 100644
+index 9ae9fe2d1e..a44464b983 100644
 --- a/gdb/Makefile.in
 +++ b/gdb/Makefile.in
 @@ -1328,6 +1328,7 @@ HFILES_NO_SRCDIR = \
@@ -37,7 +40,7 @@ index 9ae9fe2d1e1..a44464b9830 100644
         mips-fbsd-tdep.c \
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
 new file mode 100644
-index 00000000000..a4eaf540e1d
+index 0000000000..a4eaf540e1
 --- /dev/null
 +++ b/gdb/config/microblaze/linux.mh
 @@ -0,0 +1,9 @@
@@ -52,7 +55,7 @@ index 00000000000..a4eaf540e1d
 +LOADLIBES = -ldl $(RDYNAMIC)
 diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
 new file mode 100644
-index 00000000000..e9b8c9c5221
+index 0000000000..e9b8c9c522
 --- /dev/null
 +++ b/gdb/microblaze-linux-nat.c
 @@ -0,0 +1,431 @@
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
index 136291f2..e08f16df 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
@@ -1,19 +1,20 @@
-From 1a493a6fc3bebb50d9679a4d11709676f933ab04 Mon Sep 17 00:00:00 2001
+From 976a0e2664559cc194eee8040280cd29e2672d26 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Fri, 17 Feb 2017 14:09:40 +0530
-Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12
+Subject: [PATCH 40/52] Fixing the issues related to GDB-7.12 added all the
+ required function which are new in 7.12 and removed few deprecated functions
+ from 7.6
 
-added all the required function which are new in 7.12 and removed
-few deprecated functions from 7.6
 ---
- gdb/config/microblaze/linux.mh       |  4 +-
- gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
- gdb/microblaze-tdep.h                |  1 +
- gdbserver/configure.srv              |  3 +-
- 4 files changed, 89 insertions(+), 16 deletions(-)
+ gdb/config/microblaze/linux.mh   |  4 +-
+ gdb/microblaze-linux-tdep.c      | 68 ++++++++++++++++++++--
+ gdb/microblaze-tdep.h            |  1 +
+ gdbserver/configure.srv          |  3 +-
+ gdbserver/linux-microblaze-low.c | 97 +++++++++++++++++++++++++++-----
+ 5 files changed, 153 insertions(+), 20 deletions(-)
 
 diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-index a4eaf540e1d..74a53b854a4 100644
+index a4eaf540e1..74a53b854a 100644
 --- a/gdb/config/microblaze/linux.mh
 +++ b/gdb/config/microblaze/linux.mh
 @@ -1,9 +1,11 @@
@@ -29,10 +30,128 @@ index a4eaf540e1d..74a53b854a4 100644
  NAT_CDEPS = $(srcdir)/proc-service.list
  
  LOADLIBES = -ldl $(RDYNAMIC)
-diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-index cba5d6fc585..a2733f3c21c 100644
---- a/gdb/gdbserver/linux-microblaze-low.c
-+++ b/gdb/gdbserver/linux-microblaze-low.c
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index 2725ce1789..a2e858d10f 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -29,13 +29,76 @@
+ #include "regcache.h"
+ #include "value.h"
+ #include "osabi.h"
+-#include "regset.h"
+ #include "solib-svr4.h"
+ #include "microblaze-tdep.h"
+ #include "trad-frame.h"
+ #include "frame-unwind.h"
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
++#include "glibc-tdep.h"
++
++#include "gdb_assert.h"
++
++#ifndef REGSET_H
++#define REGSET_H 1
++
++struct gdbarch;
++struct regcache;
++
++/* Data structure for the supported register notes in a core file.  */
++struct core_regset_section
++{
++  const char *sect_name;
++  int size;
++  const char *human_name;
++};
++
++/* Data structure describing a register set.  */
++
++typedef void (supply_regset_ftype) (const struct regset *, struct regcache *,
++                                    int, const void *, size_t);
++typedef void (collect_regset_ftype) (const struct regset *,
++                                     const struct regcache *,
++                                     int, void *, size_t);
++
++struct regset
++{
++  /* Data pointer for private use by the methods below, presumably
++     providing some sort of description of the register set.  */
++  const void *descr;
++
++  /* Function supplying values in a register set to a register cache.  */
++  supply_regset_ftype *supply_regset;
++
++  /* Function collecting values in a register set from a register cache.  */
++  collect_regset_ftype *collect_regset;
++
++  /* Architecture associated with the register set.  */
++  struct gdbarch *arch;
++};
++
++#endif
++
++/* Allocate a fresh 'struct regset' whose supply_regset function is
++   SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET.
++   If the regset has no collect_regset function, pass NULL for
++   COLLECT_REGSET.
++
++   The object returned is allocated on ARCH's obstack.  */
++
++struct regset *
++regset_alloc (struct gdbarch *arch,
++              supply_regset_ftype *supply_regset,
++              collect_regset_ftype *collect_regset)
++{
++  struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset);
++
++  regset->arch = arch;
++  regset->supply_regset = supply_regset;
++  regset->collect_regset = collect_regset;
++
++  return regset;
++}
+ 
+ static int microblaze_debug_flag = 0;
+ 
+@@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+   set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
+ 
+-  set_gdbarch_regset_from_core_section (gdbarch,
+-                                       microblaze_regset_from_core_section);
+-
+   /* Enable TLS support.  */
+   set_gdbarch_fetch_tls_load_module_address (gdbarch,
+                                              svr4_fetch_objfile_link_map);
+diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
+index de66a05cab..1234f8a36f 100644
+--- a/gdb/microblaze-tdep.h
++++ b/gdb/microblaze-tdep.h
+@@ -24,6 +24,7 @@
+ /* Microblaze architecture-specific information.  */
+ struct microblaze_gregset
+ {
++   microblaze_gregset() {}
+    unsigned int gregs[32];
+    unsigned int fpregs[32];
+    unsigned int pregs[16];
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 7e81388850..456f4b3349 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -156,8 +156,7 @@ case "${gdbserver_host}" in
+                        srv_linux_thread_db=yes
+                        ;;
+   microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
+-                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
+-                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
+                        srv_linux_regsets=yes
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+diff --git a/gdbserver/linux-microblaze-low.c b/gdbserver/linux-microblaze-low.c
+index cba5d6fc58..a2733f3c21 100644
+--- a/gdbserver/linux-microblaze-low.c
++++ b/gdbserver/linux-microblaze-low.c
 @@ -39,10 +39,11 @@ static int microblaze_regmap[] =
    PT_FSR
    };
@@ -185,32 +304,6 @@ index cba5d6fc585..a2733f3c21c 100644
 +{
 +  init_registers_microblaze ();
 +}
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 8f41ba19351..d2112dc07e1 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
-@@ -24,6 +24,7 @@
- /* Microblaze architecture-specific information.  */
- struct microblaze_gregset
- {
-+   microblaze_gregset() {}
-    unsigned int gregs[32];
-    unsigned int fpregs[32];
-    unsigned int pregs[16];
-diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
-index 13d5c6aff87..ff9ada71b0d 100644
---- a/gdbserver/configure.srv
-+++ b/gdbserver/configure.srv
-@@ -156,8 +156,7 @@ case "${gdbserver_host}" in
-                        srv_linux_thread_db=yes
-                        ;;
-   microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
--                       srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
--                       srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+                       srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
-                        srv_xmlfiles="microblaze-linux.xml"
-                        srv_linux_regsets=yes
-                        srv_linux_usrregs=yes
 -- 
 2.17.1
 
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
index 1dc6b695..2cb1cc81 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
@@ -1,33 +1,33 @@
-From 928d8d1f05274ab6029e4da7d659312c769beded Mon Sep 17 00:00:00 2001
+From 90412eba37c683e0526470c39926318ae7f5bd27 Mon Sep 17 00:00:00 2001
 From: Nagaraju Mekala <nmekala@xilix.com>
 Date: Thu, 31 Jan 2019 14:36:00 +0530
-Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support
+Subject: [PATCH 41/52] Adding 64 bit MB support Added new architecture to
+ Microblaze 64-bit support to GDB Signed-off-by :Nagaraju Mekala
+ <nmekala@xilix.com>
 
-Added new architecture to Microblaze 64-bit support to GDB
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+Conflicts:
+        gdb/Makefile.in
 ---
  bfd/archures.c                                |   2 +
  bfd/bfd-in2.h                                 |   2 +
- bfd/cpu-microblaze.c                          |  16 +-
- bfd/elf32-microblaze.c                        |   9 +
- gas/config/tc-microblaze.c                    |  14 ++
+ bfd/cpu-microblaze.c                          |   8 +-
+ gas/config/tc-microblaze.c                    |  13 ++
  gas/config/tc-microblaze.h                    |   4 +
  gdb/features/Makefile                         |   3 +
  gdb/features/microblaze-core.xml              |   6 +-
- gdb/features/microblaze-with-stack-protect.c  |   4 +-
+ gdb/features/microblaze-stack-protect.xml     |   4 +-
+ gdb/features/microblaze-with-stack-protect.c  |   8 +-
  gdb/features/microblaze.c                     |   6 +-
- gdb/features/microblaze64-core.xml            |  69 +++++++
- gdb/features/microblaze64-stack-protect.xml   |  12 ++
- .../microblaze64-with-stack-protect.c         |  79 ++++++++
- .../microblaze64-with-stack-protect.xml       |  12 ++
- gdb/features/microblaze64.c                   |  77 ++++++++
- gdb/features/microblaze64.xml                 |  11 ++
- gdb/microblaze-linux-tdep.c                   |  29 ++-
- gdb/microblaze-tdep.c                         | 176 ++++++++++++++++--
- gdb/microblaze-tdep.h                         |   9 +-
+ gdb/features/microblaze64-core.xml            |  69 ++++++
+ gdb/features/microblaze64-stack-protect.xml   |  12 +
+ .../microblaze64-with-stack-protect.c         |  79 +++++++
+ .../microblaze64-with-stack-protect.xml       |  12 +
+ gdb/features/microblaze64.c                   |  77 +++++++
+ gdb/features/microblaze64.xml                 |  11 +
+ gdb/microblaze-tdep.c                         | 207 ++++++++++++++++--
+ gdb/microblaze-tdep.h                         |   8 +-
  .../microblaze-with-stack-protect.dat         |   4 +-
- 20 files changed, 504 insertions(+), 40 deletions(-)
+ 19 files changed, 491 insertions(+), 44 deletions(-)
  create mode 100644 gdb/features/microblaze64-core.xml
  create mode 100644 gdb/features/microblaze64-stack-protect.xml
  create mode 100644 gdb/features/microblaze64-with-stack-protect.c
@@ -36,7 +36,7 @@ Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
  create mode 100644 gdb/features/microblaze64.xml
 
 diff --git a/bfd/archures.c b/bfd/archures.c
-index 551ec8732f0..627d81261da 100644
+index 551ec8732f..627d81261d 100644
 --- a/bfd/archures.c
 +++ b/bfd/archures.c
 @@ -522,6 +522,8 @@ DESCRIPTION
@@ -49,7 +49,7 @@ index 551ec8732f0..627d81261da 100644
  .  bfd_arch_tilegx,    {* Tilera TILE-Gx.  *}
  .#define bfd_mach_tilepro      1
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 8902d9c7939..0e5071c235d 100644
+index 05fbeb9b3a..788fb2b48b 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
 @@ -1922,6 +1922,8 @@ enum bfd_architecture
@@ -62,37 +62,28 @@ index 8902d9c7939..0e5071c235d 100644
    bfd_arch_tilegx,    /* Tilera TILE-Gx.  */
  #define bfd_mach_tilepro       1
 diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index f94dc2c177b..4dbc149155e 100644
+index 194920b20b..f3e8bbda75 100644
 --- a/bfd/cpu-microblaze.c
 +++ b/bfd/cpu-microblaze.c
-@@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   64,                          /* 32 bits in a word.  */
+@@ -31,7 +31,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    64,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
--  bfd_arch_microblaze,                 /* Architecture.  */
+   bfd_arch_microblaze,                 /* Architecture.  */
 -  0,                           /* Machine number - 0 for now.  */
-+  bfd_arch_microblaze,         /* Architecture.  */
-+  bfd_mach_microblaze64,       /* 64 bit Machine */
++  bfd_mach_microblaze64,       /* 64 bit Machine  */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
-   0 /* Maximum offset of a reloc from the start of an insn.  */
- },
- {
--  32,                          /* Bits in a word.  */
--  32,                          /* Bits in an address.  */
--  8,                           /* Bits in a byte.  */
-+  32,                          /* 32 bits in a word.  */
-+  32,                          /* 32 bits in an address.  */
-+  8,                           /* 8 bits in a byte.  */
+@@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+   32,                          /* Bits in an address.  */
+   8,                           /* Bits in a byte.  */
    bfd_arch_microblaze,         /* Architecture number.  */
 -  0,                           /* Machine number - 0 for now.  */
-+  bfd_mach_microblaze,         /* 32 bit Machine */
++  bfd_mach_microblaze,         /* 32 bit Machine  */
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -63,7 +63,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    32,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
    bfd_arch_microblaze,                 /* Architecture.  */
@@ -101,7 +92,7 @@ index f94dc2c177b..4dbc149155e 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-@@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -78,7 +78,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
    64,                          /* 32 bits in an address.  */
    8,                           /* 8 bits in a byte.  */
    bfd_arch_microblaze,                 /* Architecture.  */
@@ -110,37 +101,11 @@ index f94dc2c177b..4dbc149155e 100644
    "microblaze",                        /* Architecture name.  */
    "MicroBlaze",                        /* Printable name.  */
    3,                           /* Section align power.  */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index a4b15882d77..d33f709b8b3 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -3585,6 +3585,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
-   return TRUE;
- }
- 
-+
-+static bfd_boolean
-+elf_microblaze_object_p (bfd *abfd)
-+{
-+  /* Set the right machine number for an s390 elf32 file.  */
-+  return bfd_default_set_arch_mach (abfd, bfd_arch_microblaze, bfd_mach_microblaze);
-+}
-+
- /* Hook called by the linker routine which adds symbols from an object
-    file.  We use it to put .comm items in .sbss, and not .bss.  */
- 
-@@ -3657,5 +3665,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- 
- #define elf_backend_grok_prstatus               microblaze_elf_grok_prstatus
- #define elf_backend_grok_psinfo                 microblaze_elf_grok_psinfo
-+#define elf_backend_object_p                   elf_microblaze_object_p
- 
- #include "elf32-target.h"
 diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 62daa56b47a..b22f6de2df6 100644
+index c6ca913f8b..df7088d6c3 100644
 --- a/gas/config/tc-microblaze.c
 +++ b/gas/config/tc-microblaze.c
-@@ -437,6 +437,11 @@ md_begin (void)
+@@ -438,6 +438,11 @@ md_begin (void)
  
    opcode_hash_control = hash_new ();
  
@@ -150,12 +115,12 @@ index 62daa56b47a..b22f6de2df6 100644
 +    bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze);
 +
    /* Insert unique names into hash table.  */
-   for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
+   for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
      {
-@@ -3494,6 +3499,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -3478,6 +3483,14 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+   fprintf (stream, "  -%-23s%s\n", "m64", N_("generate 64-bit elf"));
  }
  
- 
 +unsigned long
 +microblaze_mach (void)
 +{
@@ -164,12 +129,11 @@ index 62daa56b47a..b22f6de2df6 100644
 +  else
 +    return bfd_mach_microblaze;
 +}
-+
+ 
  /* Create a fixup for a cons expression.  If parse_cons_expression_microblaze
     found a machine specific op in an expression,
-    then we create relocs accordingly.  */
 diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 7435a70ef5e..90c2a4a5558 100644
+index 7435a70ef5..90c2a4a555 100644
 --- a/gas/config/tc-microblaze.h
 +++ b/gas/config/tc-microblaze.h
 @@ -23,6 +23,10 @@
@@ -184,7 +148,7 @@ index 7435a70ef5e..90c2a4a5558 100644
  /* Used to initialise target_big_endian.  */
  #define TARGET_BYTES_BIG_ENDIAN 1
 diff --git a/gdb/features/Makefile b/gdb/features/Makefile
-index d0af9a47b48..2c3cf91b69f 100644
+index d0af9a47b4..2c3cf91b69 100644
 --- a/gdb/features/Makefile
 +++ b/gdb/features/Makefile
 @@ -46,6 +46,7 @@
@@ -206,7 +170,7 @@ index d0af9a47b48..2c3cf91b69f 100644
         mips-linux.xml \
         mips64-dsp-linux.xml \
 diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index f272650a41b..d1f2282fd1e 100644
+index f272650a41..a87f0f2319 100644
 --- a/gdb/features/microblaze-core.xml
 +++ b/gdb/features/microblaze-core.xml
 @@ -8,7 +8,7 @@
@@ -231,11 +195,24 @@ index f272650a41b..d1f2282fd1e 100644
    <reg name="rtlbsx" bitsize="32"/>
    <reg name="rtlblo" bitsize="32"/>
    <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="rslr" bitsize="32"/>
-+  <reg name="rshr" bitsize="32"/>
++  <reg name="slr" bitsize="32"/>
++  <reg name="shr" bitsize="32"/>
+ </feature>
+diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
+index 1b16223406..1a67f88c18 100644
+--- a/gdb/features/microblaze-stack-protect.xml
++++ b/gdb/features/microblaze-stack-protect.xml
+@@ -7,6 +7,6 @@
+ 
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze.stack-protect">
+-  <reg name="rslr" bitsize="32"/>
+-  <reg name="rshr" bitsize="32"/>
++  <reg name="slr" bitsize="32"/>
++  <reg name="shr" bitsize="32"/>
  </feature>
 diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index b39aa198874..ab162fd2588 100644
+index b39aa19887..609934e2b4 100644
 --- a/gdb/features/microblaze-with-stack-protect.c
 +++ b/gdb/features/microblaze-with-stack-protect.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
@@ -256,8 +233,19 @@ index b39aa198874..ab162fd2588 100644
    tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int");
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
+   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+ 
+   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
+-  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
+-  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
++  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
++  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
+ 
+   tdesc_microblaze_with_stack_protect = result;
+ }
 diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index 6c86fc07700..7919ac96e62 100644
+index 6c86fc0770..ceb98ca8b8 100644
 --- a/gdb/features/microblaze.c
 +++ b/gdb/features/microblaze.c
 @@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void)
@@ -282,14 +270,14 @@ index 6c86fc07700..7919ac96e62 100644
    tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
    tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
  
    tdesc_microblaze = result;
  }
 diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
 new file mode 100644
-index 00000000000..b9adadfade6
+index 0000000000..96e99e2fb2
 --- /dev/null
 +++ b/gdb/features/microblaze64-core.xml
 @@ -0,0 +1,69 @@
@@ -359,12 +347,12 @@ index 00000000000..b9adadfade6
 +  <reg name="rtlbsx" bitsize="32"/>
 +  <reg name="rtlblo" bitsize="32"/>
 +  <reg name="rtlbhi" bitsize="32"/>
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
++  <reg name="slr" bitsize="64"/>
++  <reg name="shr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
 new file mode 100644
-index 00000000000..9d7ea8b9fd7
+index 0000000000..1bbf5fc3ce
 --- /dev/null
 +++ b/gdb/features/microblaze64-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -377,12 +365,12 @@ index 00000000000..9d7ea8b9fd7
 +
 +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
 +<feature name="org.gnu.gdb.microblaze64.stack-protect">
-+  <reg name="rslr" bitsize="64"/>
-+  <reg name="rshr" bitsize="64"/>
++  <reg name="slr" bitsize="64"/>
++  <reg name="shr" bitsize="64"/>
 +</feature>
 diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
 new file mode 100644
-index 00000000000..249cb534daa
+index 0000000000..f448c9a749
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.c
 @@ -0,0 +1,79 @@
@@ -460,14 +448,14 @@ index 00000000000..249cb534daa
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
 +
 +  feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64_with_stack_protect = result;
 +}
 diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml
 new file mode 100644
-index 00000000000..0e9f01611f3
+index 0000000000..0e9f01611f
 --- /dev/null
 +++ b/gdb/features/microblaze64-with-stack-protect.xml
 @@ -0,0 +1,12 @@
@@ -485,7 +473,7 @@ index 00000000000..0e9f01611f3
 +</target>
 diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
 new file mode 100644
-index 00000000000..5d3e2c8cd91
+index 0000000000..1aa37c4512
 --- /dev/null
 +++ b/gdb/features/microblaze64.c
 @@ -0,0 +1,77 @@
@@ -561,14 +549,14 @@ index 00000000000..5d3e2c8cd91
 +  tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
 +  tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
 +
 +  tdesc_microblaze64 = result;
 +}
 diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml
 new file mode 100644
-index 00000000000..515d18e65cf
+index 0000000000..515d18e65c
 --- /dev/null
 +++ b/gdb/features/microblaze64.xml
 @@ -0,0 +1,11 @@
@@ -583,55 +571,8 @@ index 00000000000..515d18e65cf
 +<target>
 +  <xi:include href="microblaze64-core.xml"/>
 +</target>
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 0d5c08d24f6..a9a0eef3854 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- 
-   /* BFD target for core files.  */
-   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+    }
-   else
--    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    {
-+      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
-+          MICROBLAZE_REGISTER_SIZE=8;
-+        }
-+      else
-+        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+    }
-+
-+  switch (info.bfd_arch_info->mach)
-+    {
-+    case bfd_mach_microblaze64:
-+      set_gdbarch_ptr_bit (gdbarch, 64);
-+    break;
-+    }
- 
- 
-   /* Shared library handling.  */
-@@ -177,6 +198,8 @@ void _initialize_microblaze_linux_tdep ();
- void
- _initialize_microblaze_linux_tdep ()
- {
--  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
-+                         microblaze_linux_init_abi);
-+  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
-                          microblaze_linux_init_abi);
- }
 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 7462a1f7ce6..5dd0b3ea532 100644
+index 1b5cf38e45..f4ea3cc342 100644
 --- a/gdb/microblaze-tdep.c
 +++ b/gdb/microblaze-tdep.c
 @@ -40,7 +40,9 @@
@@ -644,34 +585,57 @@ index 7462a1f7ce6..5dd0b3ea532 100644
  
  /* Instruction macros used for analyzing the prologue.  */
  /* This set of instruction macros need to be changed whenever the
-@@ -79,8 +81,9 @@ static const char *microblaze_register_names[] =
+@@ -75,12 +77,13 @@ static const char *microblaze_register_names[] =
+   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
+   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
+   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+-  "rslr", "rshr"
++  "slr", "shr"
  };
  
  #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
--
-+
+ 
  static unsigned int microblaze_debug_flag = 0;
-+int MICROBLAZE_REGISTER_SIZE = 4;
++int reg_size = 4;
  
  static void ATTRIBUTE_PRINTF (1, 2)
  microblaze_debug (const char *fmt, ...)
-@@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
- 
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+@@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs,
+   error (_("store_arguments not implemented"));
+   return sp;
+ }
 +#if 0
  static int
  microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
                                     struct bp_target_info *bp_tgt)
-@@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
- 
+@@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+   int val;
+   int bplen;
+   gdb_byte old_contents[BREAKPOINT_MAX];
+-  struct cleanup *cleanup;
++  //struct cleanup *cleanup;
+ 
+   /* Determine appropriate breakpoint contents and size for this address.  */
+   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+@@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+     error (_("Software breakpoints not implemented for this target."));
+ 
+   /* Make sure we see the memory breakpoints.  */
+-  cleanup = make_show_memory_breakpoints_cleanup (1);
++  scoped_restore 
++    cleanup = make_scoped_restore_show_memory_breakpoints (1);
+   val = target_read_memory (addr, old_contents, bplen);
+ 
+   /* If our breakpoint is no longer at the address, this means that the
+@@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
    return val;
  }
-+#endif
  
++#endif
  /* Allocate and initialize a frame cache.  */
  
-@@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
+ static struct microblaze_frame_cache *
+@@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
                                  gdb_byte *valbuf)
  {
    gdb_byte buf[8];
@@ -679,7 +643,19 @@ index 7462a1f7ce6..5dd0b3ea532 100644
    /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF.  */
    switch (TYPE_LENGTH (type))
      {
-@@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
+       case 1:  /* return last byte in the register.  */
+        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
+-       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
++       memcpy(valbuf, buf + reg_size - 1, 1);
+        return;
+       case 2:  /* return last 2 bytes in register.  */
+        regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
+-       memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
++       memcpy(valbuf, buf + reg_size - 2, 2);
+        return;
+       case 4:  /* for sizes 4 or 8, copy the required length.  */
+       case 8:
+@@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
    return (TYPE_LENGTH (type) == 16);
  }
  
@@ -791,14 +767,16 @@ index 7462a1f7ce6..5dd0b3ea532 100644
 +}
 +#endif
 +
++static void
++microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
++{
++  regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
++}
++
  static int dwarf2_to_reg_map[78] =
  { 0  /* r0  */,   1  /* r1  */,   2  /* r2  */,   3  /* r3  */,  /*  0- 3 */
    4  /* r4  */,   5  /* r5  */,   6  /* r6  */,   7  /* r7  */,  /*  4- 7 */
-@@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
-   return -1;
- }
- 
-+#if 0
+@@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
  static void
  microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
  {
@@ -814,27 +792,46 @@ index 7462a1f7ce6..5dd0b3ea532 100644
 -                                  tdesc_microblaze_with_stack_protect);
 +                                  tdesc_microblaze64_with_stack_protect);
  }
-+#endif
  
  void
- microblaze_supply_gregset (const struct regset *regset,
+@@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
                          struct regcache *regcache,
                          int regnum, const void *gregs)
  {
--  const unsigned int *regs = (const unsigned int *)gregs;
+-  unsigned int *regs = gregs;
 +  const gdb_byte *regs = (const gdb_byte *) gregs;
    if (regnum >= 0)
-     regcache->raw_supply (regnum, regs + regnum);
+-    regcache_raw_supply (regcache, regnum, regs + regnum);
++    regcache->raw_supply (regnum, regs + regnum);
+ 
+   if (regnum == -1) {
+     int i;
  
-@@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
+     for (i = 0; i < 50; i++) {
+-      regcache_raw_supply (regcache, i, regs + i);
++      regcache->raw_supply (regnum, regs + i);
+     }
+   }
+ }
+@@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
  }
  
  
--
++static void
++make_regs (struct gdbarch *arch)
++{
++  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
++  int mach = gdbarch_bfd_arch_info (arch)->mach;
++  
++  if (mach == bfd_mach_microblaze64)
++    {
++      set_gdbarch_ptr_bit (arch, 64);
++    }
++}
+ 
  static struct gdbarch *
  microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- {
-@@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    if (arches != NULL)
      return arches->gdbarch;
    if (tdesc == NULL)
@@ -844,7 +841,7 @@ index 7462a1f7ce6..5dd0b3ea532 100644
 +      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) 
 +        {
 +         tdesc = tdesc_microblaze64;
-+          MICROBLAZE_REGISTER_SIZE = 8;
++          reg_size = 8;
 +       }
 +      else
 +       tdesc = tdesc_microblaze;
@@ -852,7 +849,7 @@ index 7462a1f7ce6..5dd0b3ea532 100644
    /* Check any target description for validity.  */
    if (tdesc_has_registers (tdesc))
      {
-@@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
        int valid_p;
        int i;
  
@@ -893,7 +890,7 @@ index 7462a1f7ce6..5dd0b3ea532 100644
          }
  
        if (!valid_p)
-@@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
            tdesc_data_cleanup (tdesc_data);
            return NULL;
          }
@@ -901,7 +898,7 @@ index 7462a1f7ce6..5dd0b3ea532 100644
      }
  
    /* Allocate space for the new architecture.  */
-@@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
    /* Register numbers of various important registers.  */
    set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); 
    set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); 
@@ -919,7 +916,7 @@ index 7462a1f7ce6..5dd0b3ea532 100644
    /* Map Dwarf2 registers to GDB registers.  */
    set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
  
-@@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
                                        microblaze_breakpoint::kind_from_pc);
    set_gdbarch_sw_breakpoint_from_kind (gdbarch,
                                        microblaze_breakpoint::bp_from_kind);
@@ -937,7 +934,21 @@ index 7462a1f7ce6..5dd0b3ea532 100644
  
    frame_base_set_default (gdbarch, &microblaze_frame_base);
  
-@@ -841,6 +981,8 @@ _initialize_microblaze_tdep ()
+@@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+     tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+   //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
+ 
+-  /* If we have register sets, enable the generic core file support.  */
++  /* If we have register sets, enable the generic core file support.  
+   if (tdep->gregset) {
+       set_gdbarch_regset_from_core_section (gdbarch,
+                                           microblaze_regset_from_core_section);
+-  }
++  }*/
+ 
+   return gdbarch;
+ }
+@@ -883,6 +1040,8 @@ _initialize_microblaze_tdep ()
  
    initialize_tdesc_microblaze_with_stack_protect ();
    initialize_tdesc_microblaze ();
@@ -947,7 +958,7 @@ index 7462a1f7ce6..5dd0b3ea532 100644
    add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
                              &microblaze_debug_flag, _("\
 diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index d2112dc07e1..bd03e969b9b 100644
+index 1234f8a36f..c0fc900733 100644
 --- a/gdb/microblaze-tdep.h
 +++ b/gdb/microblaze-tdep.h
 @@ -27,7 +27,7 @@ struct microblaze_gregset
@@ -971,18 +982,17 @@ index d2112dc07e1..bd03e969b9b 100644
  };
  
  struct microblaze_frame_cache
-@@ -128,7 +128,8 @@ struct microblaze_frame_cache
+@@ -128,7 +128,7 @@ struct microblaze_frame_cache
    struct trad_frame_saved_reg *saved_regs;
  };
  /* All registers are 32 bits.  */
 -#define MICROBLAZE_REGISTER_SIZE 4
-+extern int microblaze_reg_size;
-+#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size
++//#define MICROBLAZE_REGISTER_SIZE 8
  
  /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
     Only used for native debugging.  */
 diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat
-index 8040a7b3fd0..450e321d49e 100644
+index 8040a7b3fd..450e321d49 100644
 --- a/gdb/regformats/microblaze-with-stack-protect.dat
 +++ b/gdb/regformats/microblaze-with-stack-protect.dat
 @@ -60,5 +60,5 @@ expedite:r1,rpc
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0042-porting-GDB-for-linux.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0042-porting-GDB-for-linux.patch
new file mode 100644
index 00000000..e115666c
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0042-porting-GDB-for-linux.patch
@@ -0,0 +1,155 @@
+From c810c6e2a6ae66426444580d04659e8b2d0b2daa Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 12 Dec 2019 14:56:17 +0530
+Subject: [PATCH 42/52] porting GDB for linux
+
+---
+ gdb/features/microblaze-linux.xml | 12 ++++++++++
+ gdb/microblaze-linux-tdep.c       | 39 ++++++++++++++++++++++++-------
+ gdbserver/Makefile.in             |  2 ++
+ gdbserver/configure.srv           |  3 ++-
+ 4 files changed, 47 insertions(+), 9 deletions(-)
+ create mode 100644 gdb/features/microblaze-linux.xml
+
+diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
+new file mode 100644
+index 0000000000..8983e66eb3
+--- /dev/null
++++ b/gdb/features/microblaze-linux.xml
+@@ -0,0 +1,12 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
++
++     Copying and distribution of this file, with or without modification,
++     are permitted in any medium without royalty provided the copyright
++     notice and this notice are preserved.  -->
++
++<!DOCTYPE target SYSTEM "gdb-target.dtd">
++<target>
++  <osabi>GNU/Linux</osabi>
++  <xi:include href="microblaze-core.xml"/>
++</target>
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index a2e858d10f..a37c4c86f4 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -41,7 +41,7 @@
+ 
+ #ifndef REGSET_H
+ #define REGSET_H 1
+-
++int MICROBLAZE_REGISTER_SIZE=4;
+ struct gdbarch;
+ struct regcache;
+ 
+@@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...)
+        va_end (args);
+     }
+ }
+-
++#if 0
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, 
+                                           struct bp_target_info *bp_tgt)
+@@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+   bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+ 
+   /* Make sure we see the memory breakpoints.  */
+-  cleanup = make_show_memory_breakpoints_cleanup (1);
++  cleanup = make_scoped_restore_show_memory_breakpoints (1);
+   val = target_read_memory (addr, old_contents, bplen);
+ 
+   /* If our breakpoint is no longer at the address, this means that the
+@@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+   do_cleanups (cleanup);
+   return val;
+ }
++#endif
+ 
+ static void
+ microblaze_linux_sigtramp_cache (struct frame_info *next_frame,
+@@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ 
+   linux_init_abi (info, gdbarch);
+ 
+-  set_gdbarch_memory_remove_breakpoint (gdbarch,
+-                                       microblaze_linux_memory_remove_breakpoint);
++//  set_gdbarch_memory_remove_breakpoint (gdbarch,
++//                                     microblaze_linux_memory_remove_breakpoint);
+ 
+   /* Shared library handling.  */
+   set_solib_svr4_fetch_link_map_offsets (gdbarch,
+@@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ 
+   /* BFD target for core files.  */
+   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++    }
+   else
+-    set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    {
++      if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++          set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
++          MICROBLAZE_REGISTER_SIZE=8;
++        }
++      else
++        set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++    }
+ 
++  switch (info.bfd_arch_info->mach)
++    {
++    case bfd_mach_microblaze64:
++      set_gdbarch_ptr_bit (gdbarch, 64);
++    break;
++    }
+ 
+   /* Shared library handling.  */
+   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+@@ -279,6 +300,8 @@ void _initialize_microblaze_linux_tdep ();
+ void
+ _initialize_microblaze_linux_tdep ()
+ {
+-  gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, 
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, 
++                         microblaze_linux_init_abi);
++  gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, 
+                          microblaze_linux_init_abi);
+ }
+diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
+index df354d636c..680f536c06 100644
+--- a/gdbserver/Makefile.in
++++ b/gdbserver/Makefile.in
+@@ -559,6 +559,8 @@ target/%.o: ../gdb/target/%.c
+ 
+ %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh)
+        $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
++microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
++       $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
+ 
+ #
+ # Dependency tracking.
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 456f4b3349..ff9ada71b0 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -155,8 +155,9 @@ case "${gdbserver_host}" in
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+                        ;;
+-  microblaze*-*-linux*)        srv_regobj=microblaze-linux.o
++  microblaze*-*-linux*)        srv_regobj="microblaze-linux.o"
+                        srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
++                       srv_xmlfiles="microblaze-linux.xml"
+                        srv_linux_regsets=yes
+                        srv_linux_usrregs=yes
+                        srv_linux_thread_db=yes
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0043-Binutils-security-check-is-causing-build-error-for-w.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0043-Binutils-security-check-is-causing-build-error-for-w.patch
new file mode 100644
index 00000000..969ac2c0
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0043-Binutils-security-check-is-causing-build-error-for-w.patch
@@ -0,0 +1,41 @@
+From 27c8f7f202ea66cd0f4745ca3a77b4f33b6f5990 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 11 Mar 2019 13:57:42 +0530
+Subject: [PATCH 43/52] Binutils security check is causing build error for
+ windows builds.commenting for now.
+
+---
+ bfd/elf-attrs.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
+index 070104c273..b135ac8f11 100644
+--- a/bfd/elf-attrs.c
++++ b/bfd/elf-attrs.c
+@@ -436,12 +436,15 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+   bfd_byte *p_end;
+   bfd_vma len;
+   const char *std_sec;
++#if 0
+   ufile_ptr filesize;
++#endif
+ 
+   /* PR 17512: file: 2844a11d.  */
+   if (hdr->sh_size == 0)
+     return;
+ 
++#if 0
+   filesize = bfd_get_file_size (abfd);
+   if (filesize != 0 && hdr->sh_size > filesize)
+     {
+@@ -451,6 +454,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+       bfd_set_error (bfd_error_invalid_operation);
+       return;
+     }
++#endif
+ 
+   contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1);
+   if (!contents)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
new file mode 100644
index 00000000..48c9c2c9
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
@@ -0,0 +1,146 @@
+From ba70b41346a8d5c9c1a4435f70edbb06e117564d Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Thu, 19 Dec 2019 12:22:04 +0530
+Subject: [PATCH 44/52] Correcting the register names from slr & shr to rslr &
+ rshr
+
+---
+ gdb/features/microblaze-core.xml               | 4 ++--
+ gdb/features/microblaze-stack-protect.xml      | 4 ++--
+ gdb/features/microblaze-with-stack-protect.c   | 4 ++--
+ gdb/features/microblaze.c                      | 4 ++--
+ gdb/features/microblaze64-core.xml             | 4 ++--
+ gdb/features/microblaze64-stack-protect.xml    | 4 ++--
+ gdb/features/microblaze64-with-stack-protect.c | 4 ++--
+ gdb/features/microblaze64.c                    | 4 ++--
+ gdb/microblaze-tdep.c                          | 2 +-
+ 9 files changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
+index a87f0f2319..d1f2282fd1 100644
+--- a/gdb/features/microblaze-core.xml
++++ b/gdb/features/microblaze-core.xml
+@@ -64,6 +64,6 @@
+   <reg name="rtlbsx" bitsize="32"/>
+   <reg name="rtlblo" bitsize="32"/>
+   <reg name="rtlbhi" bitsize="32"/>
+-  <reg name="slr" bitsize="32"/>
+-  <reg name="shr" bitsize="32"/>
++  <reg name="rslr" bitsize="32"/>
++  <reg name="rshr" bitsize="32"/>
+ </feature>
+diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
+index 1a67f88c18..1b16223406 100644
+--- a/gdb/features/microblaze-stack-protect.xml
++++ b/gdb/features/microblaze-stack-protect.xml
+@@ -7,6 +7,6 @@
+ 
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze.stack-protect">
+-  <reg name="slr" bitsize="32"/>
+-  <reg name="shr" bitsize="32"/>
++  <reg name="rslr" bitsize="32"/>
++  <reg name="rshr" bitsize="32"/>
+ </feature>
+diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
+index 609934e2b4..ab162fd258 100644
+--- a/gdb/features/microblaze-with-stack-protect.c
++++ b/gdb/features/microblaze-with-stack-protect.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
+   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+ 
+   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
+-  tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
+-  tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
+ 
+   tdesc_microblaze_with_stack_protect = result;
+ }
+diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
+index ceb98ca8b8..7919ac96e6 100644
+--- a/gdb/features/microblaze.c
++++ b/gdb/features/microblaze.c
+@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void)
+   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+-  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+-  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+ 
+   tdesc_microblaze = result;
+ }
+diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
+index 96e99e2fb2..b9adadfade 100644
+--- a/gdb/features/microblaze64-core.xml
++++ b/gdb/features/microblaze64-core.xml
+@@ -64,6 +64,6 @@
+   <reg name="rtlbsx" bitsize="32"/>
+   <reg name="rtlblo" bitsize="32"/>
+   <reg name="rtlbhi" bitsize="32"/>
+-  <reg name="slr" bitsize="64"/>
+-  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
+ </feature>
+diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
+index 1bbf5fc3ce..9d7ea8b9fd 100644
+--- a/gdb/features/microblaze64-stack-protect.xml
++++ b/gdb/features/microblaze64-stack-protect.xml
+@@ -7,6 +7,6 @@
+ 
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze64.stack-protect">
+-  <reg name="slr" bitsize="64"/>
+-  <reg name="shr" bitsize="64"/>
++  <reg name="rslr" bitsize="64"/>
++  <reg name="rshr" bitsize="64"/>
+ </feature>
+diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
+index f448c9a749..249cb534da 100644
+--- a/gdb/features/microblaze64-with-stack-protect.c
++++ b/gdb/features/microblaze64-with-stack-protect.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void)
+   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+ 
+   feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
+-  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+-  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+ 
+   tdesc_microblaze64_with_stack_protect = result;
+ }
+diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
+index 1aa37c4512..5d3e2c8cd9 100644
+--- a/gdb/features/microblaze64.c
++++ b/gdb/features/microblaze64.c
+@@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void)
+   tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+   tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+   tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+-  tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+-  tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++  tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+ 
+   tdesc_microblaze64 = result;
+ }
+diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
+index f4ea3cc342..041ebf1fca 100644
+--- a/gdb/microblaze-tdep.c
++++ b/gdb/microblaze-tdep.c
+@@ -77,7 +77,7 @@ static const char *microblaze_register_names[] =
+   "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
+   "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
+   "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+-  "slr", "shr"
++  "rslr", "rshr"
+ };
+ 
+ #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
new file mode 100644
index 00000000..46124c12
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
@@ -0,0 +1,24 @@
+From 5fac707a9894ec9d0fcac14bbf0eb3ff631d0499 Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Fri, 17 Jan 2020 15:45:48 +0530
+Subject: [PATCH 45/52] Removing the header "gdb_assert.h" from MB target file
+
+---
+ gdb/microblaze-linux-tdep.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index a37c4c86f4..68e73d2e56 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -37,7 +37,6 @@
+ #include "linux-tdep.h"
+ #include "glibc-tdep.h"
+ 
+-#include "gdb_assert.h"
+ 
+ #ifndef REGSET_H
+ #define REGSET_H 1
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch
new file mode 100644
index 00000000..46d51dd6
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch
@@ -0,0 +1,39 @@
+From 1751b6fbc3170d29a3e2873b4394d058f8cb7d36 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 10:08:53 -0800
+Subject: [PATCH 46/52] bfd/cpu-microblaze.c: Enhance disassembler
+
+See commit aebcfb76fc165795e67917cb67cf985c4dfdc577 for why this is needed.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/cpu-microblaze.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
+index f3e8bbda75..f3501df0e2 100644
+--- a/bfd/cpu-microblaze.c
++++ b/bfd/cpu-microblaze.c
+@@ -39,7 +39,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+   bfd_default_compatible,      /* Architecture comparison function.  */
+   bfd_default_scan,            /* String to architecture conversion.  */
+   bfd_arch_default_fill,       /* Default fill.  */
+-  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
+ },
+ {
+   32,                          /* Bits in a word.  */
+@@ -71,7 +72,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+   bfd_default_compatible,      /* Architecture comparison function.  */
+   bfd_default_scan,            /* String to architecture conversion.  */
+   bfd_arch_default_fill,       /* Default fill.  */
+-  &bfd_microblaze_arch[1]      /* Next in list.  */
++  &bfd_microblaze_arch[1],     /* Next in list.  */
++  0 /* Maximum offset of a reloc from the start of an insn.  */
+ },
+ {
+   64,                          /* 32 bits in a word.  */
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch
new file mode 100644
index 00000000..3bc5f04d
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch
@@ -0,0 +1,87 @@
+From 4500a281317093e78b7029e3dcb0037e7c628347 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 11:02:11 -0800
+Subject: [PATCH 47/52] bfd/elf64-microblaze.c: Fix build failures
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index 338f16eeee..cf84e0db4e 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -1572,7 +1572,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+                          {
+                            BFD_FAIL ();
+                            (*_bfd_error_handler)
+-                             (_("%B: probably compiled without -fPIC?"),
++                             (_("%pB: probably compiled without -fPIC?"),
+                               input_bfd);
+                            bfd_set_error (bfd_error_bad_value);
+                            return FALSE;
+@@ -2691,7 +2691,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+                /* If this is a global symbol, we count the number of
+                   relocations we need for this symbol.  */
+                if (h != NULL)
+-                 head = &h->dyn_relocs;
++                 head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs;
+                else
+                  {
+                    /* Track dynamic relocs needed for local syms too.
+@@ -2911,7 +2911,7 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
+ 
+   /* If we didn't find any dynamic relocs in read-only sections, then
+      we'll be keeping the dynamic relocs and avoiding the copy reloc.  */
+-  if (!_bfd_elf_readonly_dynrelocs (h))
++  if (p == NULL)
+     {
+       h->non_got_ref = 0;
+       return TRUE;
+@@ -3096,7 +3096,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+   else
+     h->got.offset = (bfd_vma) -1;
+ 
+-  if (h->dyn_relocs == NULL)
++  if (eh->dyn_relocs == NULL)
+     return TRUE;
+ 
+   /* In the shared -Bsymbolic case, discard space allocated for
+@@ -3113,7 +3113,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+        {
+          struct elf64_mb_dyn_relocs **pp;
+ 
+-         for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
++         for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
+            {
+              p->count -= p->pc_count;
+              p->pc_count = 0;
+@@ -3124,7 +3124,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+            }
+        }
+       else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
+-       h->dyn_relocs = NULL;
++       eh->dyn_relocs = NULL;
+     }
+   else
+     {
+@@ -3154,13 +3154,13 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+            goto keep;
+        }
+ 
+-      h->dyn_relocs = NULL;
++      eh->dyn_relocs = NULL;
+ 
+     keep: ;
+     }
+ 
+   /* Finally, allocate space.  */
+-  for (p = h->dyn_relocs; p != NULL; p = p->next)
++  for (p = eh->dyn_relocs; p != NULL; p = p->next)
+     {
+       asection *sreloc = elf_section_data (p->sec)->sreloc;
+       sreloc->size += p->count * sizeof (Elf64_External_Rela);
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch
new file mode 100644
index 00000000..7feaceb9
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch
@@ -0,0 +1,75 @@
+From 2f07425ca330dd357c374acdc30a27c6647454c9 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 11:23:26 -0800
+Subject: [PATCH 48/52] bfd/elf*-microblaze.c: Remove obsolete entries
+
+Replace microblaze_elf_merge_private_bfd_data with a direct call to
+_bfd_generic_verify_endian_match, this simplifies the implementation.
+
+Remove microblaze_elf_gc_sweep_hook, removed in 2017.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 29 +----------------------------
+ 1 file changed, 1 insertion(+), 28 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index cf84e0db4e..786f659232 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -1690,21 +1690,6 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+   return ret;
+ }
+ 
+-/* Merge backend specific data from an object file to the output
+-   object file when linking.
+-
+-   Note: We only use this hook to catch endian mismatches.  */
+-static bfd_boolean
+-microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
+-{
+-  /* Check if we have the same endianess.  */
+-  if (! _bfd_generic_verify_endian_match (ibfd, obfd))
+-    return FALSE;
+-
+-  return TRUE;
+-}
+-
+-
+ /* Calculate fixup value for reference.  */
+ 
+ static int
+@@ -2427,17 +2412,6 @@ microblaze_elf_gc_mark_hook (asection *sec,
+   return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
+ }
+ 
+-/* Update the got entry reference counts for the section being removed.  */
+-
+-static bfd_boolean
+-microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
+-                             struct bfd_link_info * info ATTRIBUTE_UNUSED,
+-                             asection * sec ATTRIBUTE_UNUSED,
+-                             const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
+-{
+-  return TRUE;
+-}
+-
+ /* PIC support.  */
+ 
+ #define PLT_ENTRY_SIZE 16
+@@ -3704,11 +3678,10 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+ #define bfd_elf64_bfd_is_local_label_name       microblaze_elf_is_local_label_name
+ #define elf_backend_relocate_section           microblaze_elf_relocate_section
+ #define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
+-#define bfd_elf64_bfd_merge_private_bfd_data    microblaze_elf_merge_private_bfd_data
++#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
+ #define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
+ 
+ #define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
+-#define elf_backend_gc_sweep_hook              microblaze_elf_gc_sweep_hook
+ #define elf_backend_check_relocs                microblaze_elf_check_relocs
+ #define elf_backend_copy_indirect_symbol        microblaze_elf_copy_indirect_symbol
+ #define bfd_elf64_bfd_link_hash_table_create    microblaze_elf_link_hash_table_create
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch
new file mode 100644
index 00000000..5f4a2714
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch
@@ -0,0 +1,45 @@
+From a86506136a738c3ab64d42a876fbfdfa1d46ad64 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 12:02:25 -0800
+Subject: [PATCH 49/52] bfd/elf64-microblaze.c: Resolve various compiler
+ warnings
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index 786f659232..70cd80cdf2 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -1258,6 +1258,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+              goto dogot;
+            case (int) R_MICROBLAZE_TLSLD:
+              tls_type = (TLS_TLS | TLS_LD);
++              /* Fall through. */
+            dogot:
+            case (int) R_MICROBLAZE_GOT_64:
+              {
+@@ -2569,6 +2570,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+           tls_type |= (TLS_TLS | TLS_LD);
+         dogottls:
+           sec->has_tls_reloc = 1;
++          /* Fall through. */
+         case R_MICROBLAZE_GOT_64:
+           if (htab->sgot == NULL)
+             {
+@@ -2802,10 +2804,8 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
+   struct elf64_mb_link_hash_table *htab;
+   struct elf64_mb_link_hash_entry * eh;
+   struct elf64_mb_dyn_relocs *p;
+-  asection *sdynbss;
+   asection *s, *srel;
+   unsigned int power_of_two;
+-  bfd *dynobj;
+ 
+   htab = elf64_mb_hash_table (info);
+   if (htab == NULL)
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch
new file mode 100644
index 00000000..475a53ba
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch
@@ -0,0 +1,37 @@
+From de38a354e40a9dcc486c93faf02bee4b059fa34a Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 12:30:09 -0800
+Subject: [PATCH 50/52] opcodes/microblaze-dis.c: Fix compile warnings
+
+Two compiler warnings were evident, it appears both are likely real bugs.
+
+Missing type declaration for a function, and a case statement without a break.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ opcodes/microblaze-dis.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
+index 90d2328659..f1c33dca14 100644
+--- a/opcodes/microblaze-dis.c
++++ b/opcodes/microblaze-dis.c
+@@ -130,6 +130,7 @@ get_field_imm15 (struct string_buf *buf, long instr)
+   return p;
+ }
+ 
++static char *
+ get_field_imm16 (struct string_buf *buf, long instr)
+ {
+   char *p = strbuf (buf);
+@@ -329,6 +330,7 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+                      get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
+           /* TODO: Also print symbol */
++          break;
+        case INST_TYPE_RD_R1_IMMS:
+          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+                   get_field_r1(&buf, inst), get_field_imms (&buf, inst));
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch
new file mode 100644
index 00000000..263f0a9b
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch
@@ -0,0 +1,99 @@
+From f1686db8735972637d2bbcc6e2fbf391c1e848d9 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 14:51:37 -0800
+Subject: [PATCH 51/52] gdb/microblaze-tdep.c: Remove unused functions
+
+Compiler warns the removed functions are not referenced anywhere.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ gdb/microblaze-tdep.c | 45 -------------------------------------------
+ 1 file changed, 45 deletions(-)
+
+diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
+index 041ebf1fca..28f79f9ffc 100644
+--- a/gdb/microblaze-tdep.c
++++ b/gdb/microblaze-tdep.c
+@@ -140,14 +140,6 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+ 
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+-static CORE_ADDR
+-microblaze_store_arguments (struct regcache *regcache, int nargs,
+-                           struct value **args, CORE_ADDR sp,
+-                           int struct_return, CORE_ADDR struct_addr)
+-{
+-  error (_("store_arguments not implemented"));
+-  return sp;
+-}
+ #if 0
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+@@ -555,12 +547,6 @@ microblaze_frame_base_address (struct frame_info *next_frame,
+   return cache->base;
+ }
+ 
+-static const struct frame_unwind *
+-microblaze_frame_sniffer (struct frame_info *next_frame)
+-{
+-  return &microblaze_frame_unwind;
+-}
+-
+ static const struct frame_base microblaze_frame_base =
+ {
+   &microblaze_frame_unwind,
+@@ -759,12 +745,6 @@ microblaze_software_single_step (struct regcache *regcache)
+ }
+ #endif
+ 
+-static void
+-microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
+-{
+-  regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
+-}
+-
+ static int dwarf2_to_reg_map[78] =
+ { 0  /* r0  */,   1  /* r1  */,   2  /* r2  */,   3  /* r3  */,  /*  0- 3 */
+   4  /* r4  */,   5  /* r5  */,   6  /* r6  */,   7  /* r7  */,  /*  4- 7 */
+@@ -796,19 +776,6 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+   return -1;
+ }
+ 
+-static void
+-microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+-{
+-
+-  register_remote_g_packet_guess (gdbarch,
+-                                  4 * MICROBLAZE_NUM_REGS,
+-                                  tdesc_microblaze64);
+-
+-  register_remote_g_packet_guess (gdbarch,
+-                                  4 * MICROBLAZE_NUM_REGS,
+-                                  tdesc_microblaze64_with_stack_protect);
+-}
+-
+ void
+ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+                         struct regcache *regcache,
+@@ -873,18 +840,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
+ }
+ 
+ 
+-static void
+-make_regs (struct gdbarch *arch)
+-{
+-  struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
+-  int mach = gdbarch_bfd_arch_info (arch)->mach;
+-  
+-  if (mach == bfd_mach_microblaze64)
+-    {
+-      set_gdbarch_ptr_bit (arch, 64);
+-    }
+-}
+-
+ static struct gdbarch *
+ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
+-- 
+2.17.1
+
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0052-sim-Allow-microblaze-architecture.patch
index 9671968a..ee5caf0a 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0052-sim-Allow-microblaze-architecture.patch
@@ -1,7 +1,7 @@
-From 501b60af6b36fc69987e1610645742f5593a6da2 Mon Sep 17 00:00:00 2001
+From 5fa859e73662f96c9cfaf21bd2cf01b92afc9c1c Mon Sep 17 00:00:00 2001
 From: Mark Hatle <mark.hatle@kernel.crashing.org>
 Date: Thu, 6 Aug 2020 15:37:52 -0500
-Subject: [PATCH 01/40] sim: Allow microblaze* architecture
+Subject: [PATCH 52/52] sim: Allow microblaze* architecture
 
 Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
 ---
@@ -10,7 +10,7 @@ Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
  2 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/sim/configure b/sim/configure
-index 72f95cd5c7a..9e28cc78687 100755
+index 72f95cd5c7..9e28cc7868 100755
 --- a/sim/configure
 +++ b/sim/configure
 @@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
@@ -23,7 +23,7 @@ index 72f95cd5c7a..9e28cc78687 100755
    sim_arch=microblaze
    subdirs="$subdirs microblaze"
 diff --git a/sim/configure.tgt b/sim/configure.tgt
-index 8a8e03d96f4..f6743fe8d41 100644
+index 8a8e03d96f..f6743fe8d4 100644
 --- a/sim/configure.tgt
 +++ b/sim/configure.tgt
 @@ -59,7 +59,7 @@ case "${target}" in