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authorMing Liu <peter.x.liu@external.atlascopco.com>2017-07-06 04:02:23 +0200
committerNathan Rossi <nathan@nathanrossi.com>2017-07-11 19:29:18 +1000
commite5d00b8cf6e36f484db1b0bd31fa1f60ddf4c8b4 (patch)
tree96d6428b80a6c7954f34ecaaf2792194c56c1b4f /classes
parent6472328917c240d1ad03561f038a6fe2de8bb382 (diff)
downloadmeta-xilinx-e5d00b8cf6e36f484db1b0bd31fa1f60ddf4c8b4.tar.gz
meta: introduce bigendian instead of little-endian/big-endian
The endianess of a specific architecture could be either big or little, there is not a third value, so let it default to be little endian, and get rid of the tune feature 'little-endian' which is redundant to be there, also change tune feature 'big-endian' to 'bigendian'. With these changes, it will behave same with all other architectures in openembedded-core layer. Signed-off-by: Ming Liu <peter.x.liu@external.atlascopco.com> Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Diffstat (limited to 'classes')
-rw-r--r--classes/zynqmp-pmu.bbclass2
1 files changed, 1 insertions, 1 deletions
diff --git a/classes/zynqmp-pmu.bbclass b/classes/zynqmp-pmu.bbclass
index 72913445..3ebe4881 100644
--- a/classes/zynqmp-pmu.bbclass
+++ b/classes/zynqmp-pmu.bbclass
@@ -18,7 +18,7 @@ ORIG_TARGET_ARCH := "${TARGET_ARCH}"
18# zynqmp-pmu target arch (hardcoded based on pre-gen data from arch-microblaze.inc) 18# zynqmp-pmu target arch (hardcoded based on pre-gen data from arch-microblaze.inc)
19ABIEXTENSION = "" 19ABIEXTENSION = ""
20TUNE_ARCH = "microblazeel" 20TUNE_ARCH = "microblazeel"
21#TUNE_FEATURES_tune-microblaze += "v9.2 little-endian barrel-shift pattern-compare" 21#TUNE_FEATURES_tune-microblaze += "v9.2 barrel-shift pattern-compare"
22TUNE_CCARGS = "-mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mno-xl-reorder -mcpu=v9.2 -mxl-soft-mul -mxl-soft-div" 22TUNE_CCARGS = "-mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mno-xl-reorder -mcpu=v9.2 -mxl-soft-mul -mxl-soft-div"
23TUNE_LDARGS = "" 23TUNE_LDARGS = ""
24TUNE_ASARGS = "" 24TUNE_ASARGS = ""