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authorSivaprasad Addepalli <sivaprasad.addepalli@xilinx.com>2024-04-23 15:54:01 +0530
committerSiva Addepalli <sivaprasad.addepalli@xilinx.com>2024-04-23 17:47:12 +0530
commit0236f98cea1ed6af8a12e2f2a42ae3c5b47612a7 (patch)
tree6670c7d400b85b7bf5a86c77a1b9076c8c0a73c7 /COPYING.MIT
parent475d4ed56e6ded13791d22fd2615fa1a07562f2b (diff)
downloadmeta-xilinx-0236f98cea1ed6af8a12e2f2a42ae3c5b47612a7.tar.gz
embeddedsw : Updated SRCREV for 2024.1_6307
Updated changelog for 2024.1 components_1 dsirxss: Update dsirxss to dsi2rxss. dsi2rx: Add new subcore driver for DSI RX. ThirdParty: openamp: Add Compiler flag -Os for applications by default BSP: cortexr5: Support lockstep_mode_debug in SDT flow iomodule: Ensure that xio.h is included only for MB and MB-V scripts:pyesw:create_bsp: Update the Findcommon.cmake file to maintain backward compatibility for NON_YOCTO variable
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