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authorNathan Rossi <nathan.rossi@xilinx.com>2013-06-19 12:12:07 +1000
committerNathan Rossi <nathan.rossi@xilinx.com>2013-06-19 14:23:17 +1000
commitbd5773b10e482e551427b64fee902ca38846e5af (patch)
tree9603c20b1ace4d81837ac7f1f9d050e8b0e5eb08
parentcfa8891aec70ef6d91a86a4b5b1ba7a457a26c85 (diff)
downloadmeta-xilinx-bd5773b10e482e551427b64fee902ca38846e5af.tar.gz
meta-zedboard: linux-xlnx: Refactored device tree
* Changed to using zynq-7-base.dtsi * Mirrored disabled/non-probed devices Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Diffstat
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts14
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts14
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed.dtsi268
3 files changed, 22 insertions, 274 deletions
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts
index 4660c715..d3e24501 100644
--- a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts
@@ -3,19 +3,9 @@
3 */ 3 */
4 4
5/dts-v1/; 5/dts-v1/;
6/include/ "zynq-zed.dtsi"
6/ { 7/ {
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-zc770";
10 model = "Xilinx Zynq";
11 aliases {
12 ethernet0 = &ps7_ethernet_0;
13 serial0 = &ps7_uart_1;
14 } ;
15 chosen { 8 chosen {
16 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 ro ip=:::::eth0:dhcp earlyprintk"; 9 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 ro earlyprintk";
17 linux,stdout-path = "/axi@0/serial@e0001000";
18 } ; 10 } ;
19
20/include/ "zynq-zed.dtsi"
21} ; 11} ;
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts
index 8099f9ee..adf60fa2 100644
--- a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts
@@ -3,19 +3,9 @@
3 */ 3 */
4 4
5/dts-v1/; 5/dts-v1/;
6/include/ "zynq-zed.dtsi"
6/ { 7/ {
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-zc770";
10 model = "Xilinx Zynq";
11 aliases {
12 ethernet0 = &ps7_ethernet_0;
13 serial0 = &ps7_uart_1;
14 } ;
15 chosen { 8 chosen {
16 bootargs = "console=ttyPS0,115200 root=/dev/ram rw ip=:::::eth0:dhcp earlyprintk"; 9 bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
17 linux,stdout-path = "/axi@0/serial@e0001000";
18 } ; 10 } ;
19
20/include/ "zynq-zed.dtsi"
21} ; 11} ;
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed.dtsi b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed.dtsi
index c60802c9..3f3d67ac 100644
--- a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed.dtsi
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed.dtsi
@@ -1,109 +1,17 @@
1 1/include/ "zynq-7-base.dtsi"
2 cpus { 2/ {
3 #address-cells = <1>; 3 model = "ZedBoard";
4 #cpus = <0x2>; 4 chosen {
5 #size-cells = <0>; 5 bootargs = "console=ttyPS0,115200 earlyprintk";
6 ps7_cortexa9_0: cpu@0 { 6 linux,stdout-path = "/axi@0/serial@e0001000";
7 compatible = "xlnx,ps7-cortexa9-1.00.a";
8 d-cache-line-size = <0x20>;
9 d-cache-size = <0x8000>;
10 device_type = "cpu";
11 i-cache-line-size = <0x20>;
12 i-cache-size = <0x8000>;
13 model = "ps7_cortexa9,1.00.a";
14 reg = <0>;
15 xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
16 xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
17 } ;
18 ps7_cortexa9_1: cpu@1 {
19 compatible = "xlnx,ps7-cortexa9-1.00.a";
20 d-cache-line-size = <0x20>;
21 d-cache-size = <0x8000>;
22 device_type = "cpu";
23 i-cache-line-size = <0x20>;
24 i-cache-size = <0x8000>;
25 model = "ps7_cortexa9,1.00.a";
26 reg = <1>;
27 xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
28 xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
29 } ;
30 } ;
31 pmu {
32 compatible = "arm,cortex-a9-pmu";
33 interrupt-parent = <&ps7_scugic_0>;
34 interrupts = < 0 5 4 0 6 4 >;
35 reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
36 } ; 7 } ;
37 ps7_ddr_0: memory@0 { 8 ps7_ddr_0: memory@0 {
38 device_type = "memory"; 9 device_type = "memory";
39 reg = < 0x0 0x20000000 >; 10 reg = < 0x0 0x20000000 >;
40 } ; 11 } ;
41 ps7_axi_interconnect_0: amba@0 { 12 ps7_axi_interconnect_0: amba@0 {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
45 ranges ;
46 ps7_afi_0: ps7-afi@f8008000 {
47 compatible = "xlnx,ps7-afi-1.00.a";
48 reg = < 0xf8008000 0x1000 >;
49 } ;
50 ps7_afi_1: ps7-afi@f8009000 {
51 compatible = "xlnx,ps7-afi-1.00.a";
52 reg = < 0xf8009000 0x1000 >;
53 } ;
54 ps7_afi_2: ps7-afi@f800a000 {
55 compatible = "xlnx,ps7-afi-1.00.a";
56 reg = < 0xf800a000 0x1000 >;
57 } ;
58 ps7_afi_3: ps7-afi@f800b000 {
59 compatible = "xlnx,ps7-afi-1.00.a";
60 reg = < 0xf800b000 0x1000 >;
61 } ;
62 ps7_ddrc_0: ps7-ddrc@f8006000 {
63 compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
64 reg = < 0xf8006000 0x1000 >;
65 xlnx,has-ecc = <0x0>;
66 } ;
67 ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
68 compatible = "xlnx,ps7-dev-cfg-1.00.a";
69 interrupt-parent = <&ps7_scugic_0>;
70 interrupts = < 0 8 4 >;
71 reg = < 0xf8007000 0x1000 >;
72 } ;
73 ps7_dma_s: ps7-dma@f8003000 {
74 #dma-cells = <1>;
75 #dma-channels = <8>;
76 #dma-requests = <4>;
77 arm,primecell-periphid = <0x41330>;
78 compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
79 interrupt-parent = <&ps7_scugic_0>;
80 interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
81 reg = < 0xf8003000 0x1000 >;
82 } ;
83 ps7_ethernet_0: ps7-ethernet@e000b000 { 13 ps7_ethernet_0: ps7-ethernet@e000b000 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 compatible = "xlnx,ps7-ethernet-1.00.a";
87 interrupt-parent = <&ps7_scugic_0>;
88 interrupts = < 0 22 1 >;
89 local-mac-address = [ 00 0a 35 00 00 00 ];
90 phy-handle = <&phy0>;
91 phy-mode = "rgmii-id";
92 reg = < 0xe000b000 0x1000 >;
93 xlnx,enet-clk-freq-hz = <0x7735940>;
94 xlnx,enet-reset = <0xffffffff>;
95 xlnx,enet-slcr-1000mbps-div0 = <0x8>;
96 xlnx,enet-slcr-1000mbps-div1 = <0x1>;
97 xlnx,enet-slcr-100mbps-div0 = <0x8>;
98 xlnx,enet-slcr-100mbps-div1 = <0x5>;
99 xlnx,enet-slcr-10mbps-div0 = <0x8>;
100 xlnx,enet-slcr-10mbps-div1 = <0x32>;
101 xlnx,eth-mode = <0x1>;
102 xlnx,has-mdio = <0x1>;
103 xlnx,ptp-enet-clock = <111111115>;
104 mdio { 14 mdio {
105 #address-cells = <1>;
106 #size-cells = <0>;
107 phy0: phy@7 { 15 phy0: phy@7 {
108 compatible = "marvell,88e1510"; 16 compatible = "marvell,88e1510";
109 device_type = "ethernet-phy"; 17 device_type = "ethernet-phy";
@@ -111,45 +19,7 @@
111 } ; 19 } ;
112 } ; 20 } ;
113 } ; 21 } ;
114 ps7_gpio_0: ps7-gpio@e000a000 {
115 #gpio-cells = <2>;
116 compatible = "xlnx,ps7-gpio-1.00.a";
117 emio-gpio-width = <64>;
118 gpio-controller ;
119 gpio-mask-high = <0xc0000>;
120 gpio-mask-low = <0xfe81>;
121 interrupt-parent = <&ps7_scugic_0>;
122 interrupts = < 0 20 4 >;
123 reg = < 0xe000a000 0x1000 >;
124 } ;
125 ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
126 compatible = "xlnx,ps7-iop-bus-config-1.00.a";
127 reg = < 0xe0200000 0x1000 >;
128 } ;
129 ps7_pl310_0: ps7-pl310@f8f02000 {
130 arm,data-latency = < 3 2 2 >;
131 arm,tag-latency = < 2 2 2 >;
132 cache-level = < 2 >;
133 cache-unified ;
134 compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
135 interrupt-parent = <&ps7_scugic_0>;
136 interrupts = < 0 2 4 >;
137 reg = < 0xf8f02000 0x1000 >;
138 } ;
139 ps7_qspi_0: ps7-qspi@e000d000 { 22 ps7_qspi_0: ps7-qspi@e000d000 {
140 bus-num = <0>;
141 compatible = "xlnx,ps7-qspi-1.00.a";
142 interrupt-parent = <&ps7_scugic_0>;
143 interrupts = < 0 19 4 >;
144 is-dual = <0>;
145 num-chip-select = <1>;
146 reg = < 0xe000d000 0x1000 >;
147 speed-hz = <200000000>;
148 xlnx,fb-clk = <0x1>;
149 xlnx,qspi-clk-freq-hz = <0xbebc200>;
150 xlnx,qspi-mode = <0x0>;
151 #address-cells = <1>;
152 #size-cells = <0>;
153 flash@0 { 23 flash@0 {
154 compatible = "n25q128"; 24 compatible = "n25q128";
155 reg = <0x0>; 25 reg = <0x0>;
@@ -178,118 +48,16 @@
178 }; 48 };
179 }; 49 };
180 } ; 50 } ;
181 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
182 compatible = "xlnx,ps7-qspi-linear-1.00.a";
183 reg = < 0xfc000000 0x1000000 >;
184 xlnx,qspi-clk-freq-hz = <0xe4e1c0>;
185 } ;
186 ps7_ram_0: ps7-ram@0 {
187 compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
188 reg = < 0xfffc0000 0x40000 >;
189 } ;
190 ps7_scugic_0: ps7-scugic@f8f01000 {
191 #address-cells = < 2 >;
192 #interrupt-cells = < 3 >;
193 #size-cells = < 1 >;
194 compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
195 interrupt-controller ;
196 linux,phandle = < 0x1 >;
197 phandle = < 0x1 >;
198 reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
199 } ;
200 ps7_scutimer_0: ps7-scutimer@f8f00600 {
201 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
202 interrupt-parent = <&ps7_scugic_0>;
203 interrupts = < 1 13 769 >;
204 reg = < 0xf8f00600 0x20 >;
205 } ;
206 ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
207 compatible = "xlnx,ps7-scuwdt-1.00.a";
208 device_type = "watchdog";
209 interrupt-parent = <&ps7_scugic_0>;
210 interrupts = < 1 14 769 >;
211 reg = < 0xf8f00620 0xe0 >;
212 } ;
213 ps7_sd_0: ps7-sdio@e0100000 {
214 clock-frequency = <50000000>;
215 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
216 interrupt-parent = <&ps7_scugic_0>;
217 interrupts = < 0 24 4 >;
218 reg = < 0xe0100000 0x1000 >;
219 xlnx,has-cd = <0x1>;
220 xlnx,has-power = <0x0>;
221 xlnx,has-wp = <0x1>;
222 xlnx,sdio-clk-freq-hz = <0x2faf080>;
223 } ;
224 ps7_slcr_0: ps7-slcr@f8000000 {
225 compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
226 reg = < 0xf8000000 0x1000 >;
227 clocks {
228 #address-cells = <1>;
229 #size-cells = <0>;
230 armpll: armpll {
231 #clock-cells = <0>;
232 clock-output-names = "armpll";
233 clocks = <&ps_clk>;
234 compatible = "xlnx,zynq-pll";
235 lockbit = <0>;
236 reg = < 0x100 0x110 0x10c >;
237 } ;
238 ddrpll: ddrpll {
239 #clock-cells = <0>;
240 clock-output-names = "ddrpll";
241 clocks = <&ps_clk>;
242 compatible = "xlnx,zynq-pll";
243 lockbit = <1>;
244 reg = < 0x104 0x114 0x10c >;
245 } ;
246 iopll: iopll {
247 #clock-cells = <0>;
248 clock-output-names = "iopll";
249 clocks = <&ps_clk>;
250 compatible = "xlnx,zynq-pll";
251 lockbit = <2>;
252 reg = < 0x108 0x118 0x10c >;
253 } ;
254 ps_clk: ps_clk {
255 #clock-cells = <0>;
256 clock-frequency = <33333333>;
257 clock-output-names = "ps_clk";
258 compatible = "fixed-clock";
259 } ;
260 } ;
261 } ;
262 ps7_ttc_0: ps7-ttc@f8001000 {
263 compatible = "xlnx,ps7-ttc-1.00.a";
264 interrupt-parent = <&ps7_scugic_0>;
265 interrupts = < 0 10 4 0 11 4 0 12 4 >;
266 reg = < 0xf8001000 0x1000 >;
267 } ;
268 ps7_uart_1: serial@e0001000 {
269 compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
270 current-speed = <115200>;
271 device_type = "serial";
272 interrupt-parent = <&ps7_scugic_0>;
273 interrupts = < 0 50 4 >;
274 port-number = <0>;
275 reg = < 0xe0001000 0x1000 >;
276 xlnx,has-modem = <0x0>;
277 xlnx,uart-clk-freq-hz = <0x2faf080>;
278 } ;
279 ps7_usb_0: ps7-usb@e0002000 {
280 compatible = "xlnx,ps7-usb-1.00.a";
281 dr_mode = "host";
282 interrupt-parent = <&ps7_scugic_0>;
283 interrupts = < 0 21 4 >;
284 phy_type = "ulpi";
285 reg = < 0xe0002000 0x1000 >;
286 xlnx,usb-reset = <0xffffffff>;
287 } ;
288 ps7_xadc: ps7-xadc@f8007100 {
289 compatible = "xlnx,ps7-xadc-1.00.a";
290 interrupt-parent = <&ps7_scugic_0>;
291 interrupts = < 0 7 4 >;
292 reg = < 0xf8007100 0x20 >;
293 } ;
294 } ;
295 51
52 /* Disabled Devices */
53 ps7_sd_1: ps7-sdio@e0101000 { compatible = "invalid"; };
54 ps7_uart_0: serial@e0000000 { compatible = "invalid"; };
55 ps7_ethernet_1: ps7-ethernet@e000c000 { compatible = "invalid"; };
56 ps7_i2c_0: ps7-i2c@e0004000 { compatible = "invalid"; };
57 ps7_i2c_1: ps7-i2c@e0005000 { compatible = "invalid"; };
58 ps7_wdt_0: ps7-wdt@f8005000 { compatible = "invalid"; };
59 ps7_can_0: ps7-can@e0008000 { compatible = "invalid"; };
60 ps7_can_1: ps7-can@e0009000 { compatible = "invalid"; };
61 ps7_usb_1: ps7-usb@e0003000 { compatible = "invalid"; };
62 } ;
63} ;
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-13 05:59:10 +0000