xvisor: update to v0.3.2master-next

Along with the uprev:

  - drop patch that has an equivalment upstream
  - fix a c99 build error with typedef bool
  - add addtional QA skips for buildpaths

Bumping xvisor to version v0.3.2-43-g355c79a0, which comprises the following commits:

    0ff13149 TOP: Bump-up version to 0.3.2
    ba466764 DOCS: Add Xvisor v0.3.2 release notes
    0c941aa5 x86: Move the logging to subsystem level logging
    b796e9e0 x86: Add sub-system level loggin facility for x86 architecture
    9bec8ba1 x86: Make guest be CR0 owner
    3c0ebc10 tests: Disable and Enable virtio block and LAPIC emulation respectively
    fcd8311b emulators: Add class code in i440FX emulator
    71e51bfc emulators: Fix the ordering of class and prog_if registers
    3fbc78df x86: Separate out the EPT logs from general VM logs
    a24f34db doc: x86: updated the reponame
    5e97e0fa x86: Add support for PAM registers and boot from single copy of BIOS
    4938d909 x86: Handle reset in better way
    f884efed x86: Add support for direct ljmp instruction decoding
    23cd1898 x86: Remove static linking of guest fdt in Xvisor binary
    63ebd17c TESTS: common: Update default linux version in scripts
    4f8a845b ARCH: generic_mmu: Don't print if attach fails in mmu_pgtbl_get_child()
    b420fc50 ARM: arm32ve: Fix linker warning seen with binutils 2.39
    eb1d1dd4 DRIVERS: input/mouse: Use "static inline" instead of "inline"
    0f9cf481 CORE: Fix compile warning seen with GCC 12 (or higher)
    45aea5f7 Makefile: Suppress linker warning
    e8d2f6ca TESTS: arm32/arm64/riscv: Clean spaces and alignment in linker scripts
    bb9bfc54 TESTS: arm32/arm64/riscv: Suppress linker warning
    a658b6ca RISC-V: Fix compile error for RV32 systems.
    4c5b22da RISC-V: Add nested virtualization support for Sstc extension
    5696391b RISC-V: Take nested interrupts after vmm_scheduler_irq_exit()
    60ea33c8 TESTS: riscv: Add sstc to ISA string whenever Xvisor support it
    eed9c4aa RISC-V: Use Sstc virtualization in VCPU timer implement
    01edb473 RISC-V: VCPU ISA bitmap should only have extensions available on Host
    65f8a9b9 RISC-V: Introduce VCPU timer save/restore functions
    29f4b46d RISC-V: Move time delta update function to cpu_vcpu_timer.c
    1d0efd78 RISC-V: Rename VCPU timer handling functions for consistency
    cedc2575 DRIVERS: riscv_timer: Use Sstc extension when available
    e2001afb RISC-V: Add CSR defines for Sstc extension
    fda8f6e6 RISC-V: Extend ISA parsing to detect Sstc extension
    f175f245 RISC-V: Change the SBI specification version to v1.0 for guest
    7d57a594 RISC-V: Add cpu_vcpu_sbi_xlate_error() helper function
    82f6c463 RISC-V: Add regs_updated flag in struct cpu_vcpu_sbi_return
    2ec320ec RISC-V: Combine SBI extension handler output parameters into a struct
    ed9a6c89 RISC-V: Make function to emulate SRET instruction as global
    bbe352fd RISC-V: Improve SRET based nested world-switch
    a7cf2ae1 CORE: Add endianness helper macros for long
    0f0a06a4 CORE: Add vmm_scheduler_irq_regs() function
    3bc00b88 RISC-V: Gather and prints stats for normal VCPU
    7314d0d4 DRIVERS: irqchip/riscv-imsic: Use riscv,slow-ipi DT property
    bf6a24b4 DRIVERS: irqchip/riscv-imsic: Remove [m|s|vs][set|clr]eipnum CSRs
    940b76ff RISC-V: Remove riscv_aia_available feature flag
    358e0222 RISC-V: Extend ISA string parsing for multi-letter extension names
    e475b1ab EMULATORS: plic: Fix number of irq lines
    5dc36a1e TESTS: Don't disable CONFIG_PROFILING in update-linux-defconfig.sh
    688e2525 RISC-V: Emulate dummy henvcfg[h] CSR for the guest hypervisor
    43b75145 drivers: Outsmarted by compilers. IDE detection with latest compiler fails.
    21b2818f ARCH: generic_mmu: Initialize attributes of hypervisor page table
    f1be1ac5 COMMANDS: memory: Add iodump8, iodump16, and iodump32 sub-commands
    6b525a5d ARCH: generic_mmu: Fix typo in mmu_pgtbl_nonpool_alloc()
    ece1229f RISC-V: Print shadow page input address when panic
    f8415e0d ARCH: generic_mmu: Check child pointer before use in mmu_pgtbl_get_child()
    bec57dbd RISC-V: Fix compile error for latest binutils 2.38
    e6004db5 COMMANDS: host: Add sub-command to poke a host CPU
    5d8775f4 RISC-V: Enable RISC-V IMSIC in RV32 and RV64 defconfigs
    c7803a49 DRIVERS: irqchip/riscv-aplic: Add support for MSI-mode
    0361bfd3 DRIVERS: irqchip: Add RISC-V incoming MSI controller driver
    c53bd8f0 LIBS: bitops: Improve get_count_order() implementation
    44162c12 CORE: vmm_host_irqext: Fix extended IRQ allocations
    05603bb8 CORE: vmm_devres: Add custom action APIs
    d6f365a3 CORE: vmm_host_irq: Allow irqchip drivers to mark chained interrupts
    e27a6647 CORE: vmm_msi: Add common msi_index for both PCIe and Platform MSIs
    421083c1 CORE: vmm_msi: Provide complete set of default ops
    a1c78b6b CORE: vmm_msi: Add vmm_msi_domain_write_msg() API
    96e8fac3 CORE: vmm_msi: Use desc->msg in vmm_msi_domain_alloc/free_irqs()
    f56aa048 CORE: vmm_msi: Move compose_msi_msg() from MSI domain to irqchip
    cb05e804 CORE: vmm_host_irqdomain: Add alloc() and free() domain operations
    030b9bed DRIVERS: irqchip/riscv-aplic: Align priority and threshold with Linux
    3b7563d5 RISC-V: Setup interrupt delegation for both Orphan and Normal VCPUs
    d84772f4 RISC-V: Use timer event to ensure interrupt delivery to virtual-VS mode
    15f6c9db CORE: vmm_stdio: Improve defterm polling in vmm_scanchars()
    8cbb373f RISC-V: Use shadow_page for nested_swtlb_lookup()
    106139c4 TESTS: riscv: Enable earlycon=sbi for Linux Guest/VM
    a9d45de1 RISC-V: Add Sv57x4 support for Guest/VM
    e9eb5389 RISC-V: Add Sv57 support for Host
    e75e1884 TESTS: common: Enable conspy in busybox-1.33.1 defconfig
    3486a117 DRIVERS: riscv_timer: Ensure timer interrupt is not pending at boot time
    10c6355f RISC-V: Emulate guest G-stage page table and guest HFENCE instructions
    edce82b7 ARCH: generic_mmu: Add attributes and hardware tag for each page table
    88cfeee6 RISC-V: Emulate HLV and HSV instructions for guest hypervisor
    7228e6bd ARCH: generic_mmu: Add mechanism to get guest page table mapping
    a1c7f49e RISC-V: Initial support for nested virtualization
    f3a8e769 RISC-V: Add helper functions for nested virtualization
    d344d440 RISC-V: Improve H-extension CSR defines for emulation
    e19319ce RISC-V: Add more indentation in VCPU register dump prints
    bffdf810 RISC-V: Add nested virtualization state in VCPU private context
    0356895d RISC-V: Treat Guest SBI HFENCE calls as NOPs
    1bf1d25f RISC-V: Fix typo in __sbi_rfence_v02() call to host
    60ea8f65 TESTS: riscv: Generate VCPU isa string using Xvisor SBI extension
    ad77ac9a RISC-V: Add Xvisor specific SBI extension
    0310b843 TESTS: riscv: Improve SBI support in basic firmware
    4c4839a8 TESTS: riscv: Add letter h to guest ISA string
    f0994562 TESTS: riscv: Enable SBI based earlycon for guest linux
    2f5ec150 TESTS: riscv: Enable HUGETLBFS for Linux guest
    ee5b02ed x86: Fix compilation warnings in guest address translation
    a393c49b x86: Add framebuffer support for early prints
    464ff881 x86: Information on how to add Qemu monitor on telnet
    b54c1e85 x86: Add EPT tracepoints
    5557a15c x86: Add locks for accessing LAPIC area
    d187dc38 x86: Facing facility for timer programming and IRQs
    74fb4224 x86: program the flags before writing to ICR
    ddeabbff RISC-V: Add linux style flat image header
    76b00f26 RISC-V: Make CY, TM, and IR counters accessible in VU mode
    434652b4 TESTS: riscv: Update ramdisk size in autoexec command list
    02134aba TESTS: riscv: Disable DRM drivers for Linux guests
    ba26c6ae RISC-V: Fix usage of hfence.gvma instruction
    fcb2870c RISC-V: Use hfence.vvma in arch_mmu_test_nested_pgtbl()
    af877113 RISC-V: Enable RISC-V APLIC in RV32 and RV64 defconfigs
    649a05a7 DRIVERS: irqchip: Add RISC-V Advancded PLIC driver
    8b699fef CORE: vmm_devtree_irq: Fix vmm_devtree_irq_create_mapping() domain check
    78728e5c CORE: vmm_platform: Probe interrupt controller before other devices
    6f03350e CORE: vmm_devtree: Add declaration of vmm_devtree_irqdomain_find() API
    5083883a DRIVERS: irqchip/sifive-plic: Simplify contexts setup in plic_init()
    7f9c4167 CORE: vmm_smp: Add vmm_smp_map_cpuid() API
    1bc308b8 DRIVERS: irqchip/sifive-plic: Implement irqdomain map() callback
    b165fd50 CORE: vmm_host_irqdomain: Add common xlate() to translate two cells
    3ddbe813 CORE: vmm_host_irq: Provide previous interrupt in active_irq() callback
    e2e58eaa DRIVERS: irqchip/riscv-intc: Add support for RISC-V AIA
    5f3a5adf RISC-V: Fix base host irq used for IPI irqdomain
    ba80399c CORE: vmm_host_irq: Improve sanity check in vmm_host_irqdomain_add()
    fdefa93f RISC-V: Add feature flag for AIA support on all CPUs
    35159846 RISC-V: Add AIA related CSR defines
    40a06b69 RISC-V: Sync-up CSR and instruction encoding defines with OpenSBI v1.0
    9be2fdd7 DOCS: Update commit tag in v0.3.1 release notes
    5609318e TOP: Bump-up version to 0.3.1
    82418c99 DOCS: Add Xvisor v0.3.1 release notes
    cb2f5a6f TESTS: common: Improve basic firmware WFI test
    8a0e6af5 CORE: vmm_vcpu_irq: Yield a few times before pausing VCPU upon WFI
    974aed5f CORE: vmm_vcpu_irq: Check for pending interrupts after VCPU pause
    11b344d4 CORE: vmm_vcpu_irq: Reduce granularity of default WFI timeout
    6d369bab ARM: Fix MPIDR emulation generic v7 and v8 CPUs
    f5a56566 TESTS: common: Update default linux and busybox version in scripts
    0eba1089 ARM: Fix timer event expiry in generic_timer_vcpu_context_save()
    f3090f88 TOP: Update the list of supported architectures in README.md
    1befa80c ALL: Fix compile warning for packed structure
    ddf3d681 ARM: Emulate cp15 aux control read for generic-v7 Guest VCPUs
    cb2b8e02 TESTS: common: Fix busybox-1.33.1 defconfig
    217edf76 TESTS: common: Update busybox and linux version in build scripts
    c67b5d04 TESTS: arm32: Remove guests meant for ARM32 without virtualization
    b282d089 DOCS: Remove documentation for ARM32 boards without virtualization
    9fcd6969 ARCH: arm: Remove port for ARM32 without virtualization support
    19bcb59c DRIVERS: clocksource/riscv_timer: Add error prints
    f5bec49b RISC-V: Add riscv_node_to_hartid() for drivers
    89b0b0dd DRIVERS: irqchip/riscv-intc: Minor cosmetic changes
    6a9bc097 RISC-V: Enable ACLINT SWI driver in defconfigs
    86c5d590 DRIVERS: irqchip: Add RISC-V ACLINT SWI driver
    67585877 DRIVERS: irqchip/sifive-plic: Add multi-socket support
    17805551 RISC-V: Add arch specific irqchip driver for SBI based IPI
    c795c72c ARCH: generic_devtree: parse multiple memory DT nodes
    9f0f85bb COMMANDS: host: Print HWIRQ number for each host IRQ
    f216a723 CORE: vmm_host_irqdomain: Allow domain of_node to be NULL
    81b230f3 RISC-V: Advertise SBI v0.3 via SBI BASE GET_SPEC_VERSION call
    7ba8378c RISC-V: Add a simple implementation of SBI HSM HART suspend call
    ab455318 RISC-V: Update SBI defines as-per SBI v0.3 specification
    1eee1160 ARM: vgic: Queue interrupt immediately in __vgic_irq_handle()
    32153a14 TESTS: common: disable NFS support in busybox
    1c96c910 TESTS: common: busybox-1.33.1_defconfig addition
    48ca88b1 TESTS: riscv: Increate Guest NOR flash size to 48 MB
    e1d6ae2f RISC-V: Fix SBI remote HFENCE function ids
    0a0a8643 x86: Fix build break
    a326d27d x86: Handle vmwrite failures during vmlaunch/vmresume
    dd22f58c x86: Fixed all the warning in the code.
    45cca8d2 x86: VMInstruction handling moved to interception code
    b9a178a3 x86: VM_LOG will not print file/line number by default
    cfcb782a x86: Added support for Extended CPUID in guest
    3fe74279 x86: Change the CPUID base name to LFUNCxx
    7bd2f854 x86: Refactored the CPUID feature bit and mask
    27d34efb x86: Enable interrupts on VMExit
    c926d1a8 x86: Initialize AMD specified feature after checking vendor id
    79b6cce7 x86: Fix the interrupts missing problem
    0ec1e62b x86: Fixed problem with default terminal
    0bd47a35 x86: Add missing changes in boot code for FB support
    190f32b8 x86: Add CPUID handling code in vmexit
    8d8994d1 x86: Fix the xvisor hang issue after vmexit
    4e099d12 x86: Refactoring and Emlation support
    93ae808b x86: Guest entry is successful
    c11b7018 x86: Added information on how to run QEMU with nested VTX
    7f1d496b x86: Change the following
    7a82b55f x86: Fix EPT setup
    fbad8542 x86: Add function to read rflags
    3da8b83e x86: Fix the long standing VMCS configuration problem!
    473fa8f7 x86: Add VMCS configuration auditor
    ac1ff63b x86: Fix the bootup problem in bochs
    45b82a25 x86: Updated test bios and guest init commands
    276b1051 x86: Updated the dts and defconfig
    12af8433 DOCS: Update the  document regarding the virtual drive creation
    c33c0aa5 x86: Set the serial port to port zero is none is specified.
    d8da527c x86: Fix the host env init failures
    40d7db68 x86: Fix the LAPIC timer for AMD processors
    e3d3aac6 x86: cosmetic change
    626e3b6a x86: Framebuffer support for initial and later console.
    46cf54d8 RISC-V: Remove TIMER_EVENT_THRESHOLD_NS define
    54b3bb14 RISC-V: Don't pack essential structs in arch_regs.h
    c132e616 COMMANDS: vcpu: Fix expected args count for monitor sub-command
    bdd07429 RISC-V: Simplify initialization of Guest time_delta
    826e9f61 RISC-V: Cosmentic changes in arch specific macros
    e5b1a8b2 TESTS: riscv: Update default earlycon bootargs for Guest Linux
    cdab53db TESTS: riscv: stdout-path should be in Guest Linux DTS
    0a92c06b TESTS: riscv: Introduce sbi_clear_timer() and use it for timer driver
    b678e305 RISC-V: Stop timer in riscv_timer_event_start() when next_cycle=-1ULL
    6eea7e9c DRIVERS: irqchip: Simplify riscv_intc_active_irq() implementation
    583eafdc RISC-V: Implement SBI SRST extension for Guest/VM
    6e867bd1 RISC-V: Don't print SBI in all prints of sbi_init()
    0f8efab4 RISC-V: Detect and use SBI SRST extension when available.
    e1898a01 RISC-V: Add SBI SRST extension defines
    cfc58782 x86: Fix early vmentry host-state check failures
    1ae7f05d TOP: Update travis.yml to use makeall script
    26140d28 TOOLS: scripts: Add optional parameter to makeall script
    b37fa9e8 TOP: Update README.md to show travis build status
    62ccb953 TOP: Added travis.yml for travis-ci
    f2ef21bc ARCH: generic_devtree: Check and show FDT/DTB as reserved entry
    b82ee019 RISC-V: The root stage2 page table is 16KB in size and 16KB aligned
    2f1ab3cc DOCS: Replace Linaro toolchains with ARM Ltd toolchains
    c217b919 TESTS: arm32: Explicity enable NEON for Realview-PB-A8 Guest Linux
    f0412862 TESTS: common: Add Busybox v1.32.0 defconfig
    a9a918e4 ARM: arm64: Get nested MMU test suite working
    2577c1a5 ARM: mmu_lpae: Set access flag for no-read-write Stage1 memory
    6a1e8e43 ARCH: generic_mmu: Minor fix in mmu_test_nested_pgtbl()
    ac7b3492 RISC-V: Remove redundant add instruction from SAVE_ALL() macro
    65731aa6 RISC-V: Save/restore SCOUNTEREN CSR for normal VCPUs
    f0926293 RISC-V: Determine transformed instruction length correctly
    da009fb5 DOCS: Update RISC-V related READMEs
    2bfa5ab5 CORE: Orphan VCPU may take wrong waitqueue lock after context switch
    e12adf5d CORE: vmm_host_irqdomain_alloc() parameter validation is incorrect
    1e3c0872 ARM: FSC Access Faults are not handled correctly.
    f35352c2 ARM: vgic reset does not de-activate all pending LRs
    a17e06fc RISC-V: Fix typo in HCOUNTEREN CSR define
    004ff06e TESTS: riscv: virt32/virt64: Remove interrupt-parent from Linux DTS root
    c42db8c2 TESTS: common/basic: Add fdt_print_tree command
    92997e62 LIBS: wboxtest: Print leakage details only when there is some leakage
    1b709f37 LIBS: wboxtest: More nested MMU tests
    3ce72f92 RISC-V: Set HSTATUS.SPVP to known value in arch_mmu_test_nested_pgtbl()
    bc33f339 RISC-V: Set access and dirty bits in leaf PTEs
    f8df22b2 RISC-V: Provide initial defterm ops using SBI console calls
    68a25e9a ARCH: generic_defterm: Allow overriding initial defterm operations
    b3bde40c DOCS: riscv: No need to specify console and rtc in boot parameters
    c148104c CORE: vmm_main: Improve boot parameter processing
    e6a92afd LIBS: wboxtest: Add nested MMU tests
    38bdc217 CORE: vmm_host_ram: Add APIs to get start and end of all RAM banks
    1242cb07 RISC-V: Implement arch_mmu_test_nested_pgtbl() for testing nested MMU
    51ffd3df ARCH: generic_mmu: Add mechanism to test nested page tables
    6b090292 ARCH: arm32ve/arm64/riscv: Add arch_mmu_pgflags_set() function
    a3ac2dba ARM: arm32ve: Remove redundant defines from arch_mmu.h
    9e31f030 RISC-V: Rename __hfence_bvma_xyz() to __hfence_vvma_xyz()
    c381176d RISC-V: Fix __hfence_gvma_vmid_gpa() and __hfence_bvma_asid_va() args
    8128ba24 RISC-V: Add support for H-extension v0.6.1 draft
    3c6f5457 RISC-V: Enable all counters for VS/VU-mode by default
    51aa969e TOOLS: d2c.py: Add varalign and varprefix parameters
    38c4b223 ARM: arm32ve: fix access to SPSR banked register
    81f49add RISC-V: Minor fix in arch_cpu_nascent_init()
    a19e6602 TOOLS: openconf: improve code to fix potential string buffer overrun
    4aae2669 EMULATORS: Allow Xvisor to compile with gcc 10.
    bd88e3cf CORE: Allow Xvisor to compile in VERBOSE mode.
    7b3ed10b ARM: Allow arm32ve and aarch64 to compile in non SMP mode
    94745330 ARM: RPI4: Add DT node to power off/reset device
    d2787229 ARCH: generic_mmu: Separate root and non-root initial page tables
    363493df ARCH: generic_mmu: Remove redundant def_pgtbl_tree[]
    975de604 RISC-V: Use struct cpu_vcpu_trap extensively for passing trap details
    05231dd8 RISC-V: Use HLV/HSV instruction for unpriv access
    f966f0c8 RISC-V: Use HVIP CSR to inject virtual interrupts
    f806605c RISC-V: Update CSR defines as-per H-Extension v0.6 spec
    4e0ea042 ARCH: generic_mmu: arch functions for page table size and align order
    bb38fcb4 ARCH: Remove redundant ARCH_MMU_PGTBL_ENT<xyz> defines
    8374279d ARCH: generic_mmu: Common arch_cpu_aspace_memory_xyz() functions
    0d6af31d ARCH: generic_mmu: Use page table pool only for stage1 page tables
    c4eb4ece ARCH: generic_mmu: Implement arch_cpu_aspace_print_info() function
    08829d3d COMMANDS: host: Add aspace info sub-command
    6d83b8ea ARCH: simplify includes in arch/include headers
    93e8d90c ARCH: Add generic MMU implementation
    9918d806 DOCS: Update DTB path in all documentation files
    1242a0f6 ARCH: Move DTS files outside board directory
    1d531ed1 ARM: Move SMP operations from board to cpu sources
    e87d50a0 RISC-V: Move SMP operations from board to cpu sources
    0f715395 ARCH: Introduce generic arch board implementation
    827c990c ARCH: Introduce generic arch defterm early implementation
    b656ad6a ARCH: Introduce generic arch defterm implementation
    689c60bb ARCH: Introduce generic arch IPI implementation
    37f7464e ARCH: Introduce generic arch devtree implementation
    f04122c5 Makefile: Allow sources common accross architecture
    60105f0f ARM: Map DTB early instead of copying
    3abcf3f9 RISC-V: Remove load reservation hack
    8822fcab CORE: Move DMA heap initialization after device tree reservations
    84a7068a CORE: Do pagepool and exception table init after nascent functions
    a82a64b0 RISC-V: Improve init data and init const free-up
    d341c354 RISC-V: Map DTB early instead of copying
    f8d000a9 CORE: vmm_host_aspace: Introduce arch_cpu_aspace_vapool_xyz() functions
    3bec3fda COMMANDS: host: Use vmm_host_vapool_size() for VAPOOL size
    773cc46a RISC-V: Provide shutdown method using SBI v0.1 call
    8c22af64 DOCS: Add Raspberry Pi4 documentation
    b100144b RISC-V: Parse CPU capabilities in arch_cpu_nascent_init()
    94963123 ARM: Do PSCI init from arch_cpu_nascent_init()
    31241524 ARCH: Introduce nascent init functions
    94fe1144 ARM: Factor-out PSCI library from SMP operations
    a1049497 COMMANDS: Fix cmd_devtree_print_attribute() for boolean attributes
    ad7675d3 ARM: arm32ve: arm64: No need for identity mappings in intial page table
    8cd0f5e6 ARM: arm32ve: arm64: Increase default VAPOOL size to 64MB
    a802f231 ARM: arm32ve: arm64: Set MAX_DTB_SIZE to 1MB in defconfigs
    8ca6ac4a ARCH: Reduce memory waste from ALIGN(MAX_DTB_SIZE) in linker scripts
    bfd794e1 ARCH: defterm: Fix console node parsing
    48245a5e RISC-V: No need for identity mappings in intial page table
    06e9233b ARM: Initial DTS for RPi4 model B board
    370b11a5 ARM: arm32ve/arm64: Use cache invalidate for early page table setup
    b3dac5b1 ARCH: defterm_early: Fix early_base computation
    0069e564 RISC-V: Detect and use Sv48 MMU mode for Guest whenever possible
    f7bf69c6 RISC-V: Simplify stage1 and stage2 mode managment
    1ce7a618 RISC-V: Detect and use Sv48 MMU mode for host whenever possible
    ff55d352 RISC-V: Print MMU mode in arch_cpu_print_summary()
    5416b36d RISC-V: Don't have compile time fixed MMU mode
    3f683003 RISC-V: Fix linker error for RV32 systems
    72cf420d RISC-V: Fix #ifdef used for defterm early mappings
    26c67263 CORE: Don't return failure in vmm_devtree_reserved_memory_init()
    f7a19dde ARM: Add RK3399 I2C device tree configuration.
    20c0a2db ARM: Enable RK3399 I2C driver in generic-v8 defconfig
    fe249951 DRIVERS: Add RK3399 I2C driver ported from Linux
    5ac38de6 DRIVERS: i2c: Add generic i2c Device Tree parsing
    c258e593 DRIVERS: Add EACCES errno error number definition
    ae37ac83 CORE: The result from vmm_devtree_attrval is ambiguous.
    d7eb5cbd RISC-V: Fixup HIDELEG CSR programming
    d3b65e1f ARM: Add RK3399 pinctrl and pinmuxes to deivce tree
    1dc602cc ARM: Enable RK3399 pinctrl driver in generic-v8 defconfig
    87d4f797 DRIVERS: pinctrl: Fix compiler warning
    f04f7f37 DRIVERS: Add GPIO pin control driver for RK3399
    d6612ba8 DRIVERS: of: Add function to count children of a DT node
    e5bcce54 DRIVERS: gpio: Move the gpiochip_generic_XXX functions to gpiolib
    118daefa RISC-V: Use hardware division instructions
    0be68702 RISC-V: Guest SBI v0.2 HSM extension implementation
    271a8ddf RISC-V: Guest SBI v0.2 RFENCE extension implementation
    761514bb RISC-V: Guest SBI v0.2 TIME extension implementation
    656bc817 RISC-V: Guest SBI v0.2 IPI extension implementation
    090001f0 RISC-V: Guest SBI v0.2 base extension implementation
    ec85ff26 RISC-V: SBI error codes defines as-per SBI v0.2 spec
    264a48e7 RISC-V: Re-factor Guest SBI implementation
    a0b66eaf DRIVERS: 8250-uart: Prepare uart clock if configured in device tree
    8856c5dd ARM: Turn off unused clocks on RK3399 SoC
    db458c58 ARM: Add UART clock configuration to device tree for RK3399
    9e79b2b7 DRIVERS: clk: Incorrect cells count name for assigned-clock-parents
    59c9c1b7 ARM: Add RK3399 clock configuration to device tree
    903b9836 ARM: Enable RK3399 clock driver in generic-v8 defconfig
    13eaa65f DRIVERS: Add the Rockchip clock drivers.
    d55c5e3d DRIVERS: clk: Add support to limit input rate for fractional divider
    e3fb7ac1 DRIVERS: clk: Allow clock adjustment back to requested rate after parent changes
    22cdf5f4 LIBS: mathlib: Add a GCD function
    66a26c36 CORE: __initconst and __initdata variables must be in separate sections
    c041a2a8 DRIVERS: do_div macro does not behave as Linux drivers expect
    2ae1a3fe LIBS: mathlib: DIV_ROUND ULL macros return incorrect result
    25e58269 ARCH: 64-bit arch_in_<xxx> macros lose upper 32-bits of result
    0ef0e194 RISC-V: Update SBI HSM defines as-per latest SBI spec
    d3136401 RISC-V: Use hbase=-1UL whenever hart_mask=NULL for SBI v0.2 calls
    6c360b1a RISC-V: Remove redundant SMP_OPS_DECLARE() macro
    97e31963 RISC-V: Add SBI SMP operations
    83ca3b07 RISC-V: Add SBI v0.2 HSM extension defines
    d03b500c EMULATORS: virtio_mmio: Fix compile warning with GCC9
    9e9a0172 DOCS: arm: Add RockPro64 documentation.
    54269ba1 TESTS: Basic Firmware does not poll serial port correctly
    174435bb ARM: Basic support for RockPro64 Single Board Computer
    0b138c5f CORE: Split vmm_smp_ipi_init() into two parts
    a16d4440 RISC-V: Allow multiple version of riscv gcc to build xvisor
    1f82ff89 tools: Add the RISC-V architecture to the makeall script.
    f3e9be29 RISC-V: Fix RV32 build when using RV64 crosss compiler
    3379e5c9 CORE: vmm_schedalgo_prr: Use list_del_init() instead of list_del()
    6fea5d23 DOCS: Update commit tag in v0.3.0 release notes

Signed-off-by: Bruce Ashfield <bruce.ashfield@gmail.com>

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