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From 2d8b759e4227eb14bcb64fc007ea839a65d6fce6 Mon Sep 17 00:00:00 2001
From: Kevin Hilman <khilman@ti.com>
Date: Thu, 14 Jul 2011 11:10:27 -0700
Subject: [PATCH 132/149] OMAP3+: VP: move timing calculation/config into VP init
Move VP timing calcluation (based on sys clock) and register programming
into VP init.
Signed-off-by: Kevin Hilman <khilman@ti.com>
---
arch/arm/mach-omap2/voltage.c | 22 ----------------------
arch/arm/mach-omap2/vp.c | 23 ++++++++++++++++++++++-
2 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 533ea38..4a15668 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -46,31 +46,9 @@ static LIST_HEAD(voltdm_list);
static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
{
struct omap_vdd_info *vdd = voltdm->vdd;
- u32 sys_clk_rate, timeout_val, waittime;
-
- /* Divide to avoid overflow */
- sys_clk_rate = voltdm->sys_clk.rate / 1000;
- WARN_ON(!sys_clk_rate);
/* Generic voltage parameters */
vdd->volt_scale = omap_vp_forceupdate_scale;
- voltdm->vp->enabled = false;
-
- vdd->vp_rt_data.vpconfig_erroroffset =
- (voltdm->pmic->vp_erroroffset <<
- __ffs(voltdm->vp->common->vpconfig_erroroffset_mask));
-
- timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
- vdd->vp_rt_data.vlimitto_timeout = timeout_val;
- vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin;
- vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax;
-
- waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
- sys_clk_rate) / 1000;
- vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime;
- vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime;
- vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin;
- vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax;
return 0;
}
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 297d094..ea61a47 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -50,7 +50,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp = voltdm->vp;
struct omap_vdd_info *vdd = voltdm->vdd;
- u32 vp_val;
+ u32 vp_val, sys_clk_rate, timeout_val, waittime;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
@@ -58,6 +58,27 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
return;
}
+ vp->enabled = false;
+
+ /* Divide to avoid overflow */
+ sys_clk_rate = voltdm->sys_clk.rate / 1000;
+
+ vdd->vp_rt_data.vpconfig_erroroffset =
+ (voltdm->pmic->vp_erroroffset <<
+ __ffs(voltdm->vp->common->vpconfig_erroroffset_mask));
+
+ timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
+ vdd->vp_rt_data.vlimitto_timeout = timeout_val;
+ vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin;
+ vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax;
+
+ waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
+ sys_clk_rate) / 1000;
+ vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime;
+ vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime;
+ vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin;
+ vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax;
+
vp_val = vdd->vp_rt_data.vpconfig_erroroffset |
(vdd->vp_rt_data.vpconfig_errorgain <<
__ffs(vp->common->vpconfig_errorgain_mask)) |
--
1.6.6.1
|
