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From ebabfd9f1e6f712aafc2bba5ddfae530be4119ee Mon Sep 17 00:00:00 2001
From: Jason Kridner <jkridner@beagleboard.org>
Date: Tue, 19 Apr 2011 14:01:13 -0500
Subject: [PATCH 21/30] BeagleBoard: Configure DVI/S-video
Based on patches from Syed Mohammed Khasim (khasim@ti.com).
Configures the output of the BeagleBoard DVI to be orange.
Configures the output of the BeagleBoard S-Video to be a colorbar.
---
Updates for this version
* Rebased on u-boot-ti.
v3
* Rebased again.
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
---
board/ti/beagle/beagle.c | 24 +++++++++++++
board/ti/beagle/beagle.h | 86 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 110 insertions(+), 0 deletions(-)
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index a290f89..39d9038 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -164,6 +164,28 @@ unsigned int get_expansion_id(void)
}
/*
+ * Configure DSS to display background color on DVID
+ * Configure VENC to display color bar on S-Video
+ */
+void display_init(void)
+{
+ omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
+ switch (get_board_revision()) {
+ case REVISION_AXBX:
+ case REVISION_CX:
+ case REVISION_C4:
+ omap3_dss_panel_config(&dvid_cfg);
+ break;
+ case REVISION_XM_A:
+ case REVISION_XM_B:
+ case REVISION_XM_C:
+ default:
+ omap3_dss_panel_config(&dvid_cfg_xm);
+ break;
+ }
+}
+
+/*
* Routine: misc_init_r
* Description: Configure board specific parts
*/
@@ -330,6 +352,8 @@ int misc_init_r(void)
GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
dieid_num_r();
+ display_init();
+ omap3_dss_enable();
return 0;
}
diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index 04247cd..18bfaa8 100644
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -23,6 +23,8 @@
#ifndef _BEAGLE_H_
#define _BEAGLE_H_
+#include <asm/arch/dss.h>
+
const omap3_sysinfo sysinfo = {
DDR_STACKED,
"OMAP3 Beagle board",
@@ -472,4 +474,88 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 BT_EN*/\
MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) /*GPIO_139 WLAN_EN*/
+/*
+ * Display Configuration
+ */
+
+#define DVI_BEAGLE_ORANGE_COL 0x00FF8000
+#define VENC_HEIGHT 0x00ef
+#define VENC_WIDTH 0x027f
+
+/*
+ * Configure VENC in DSS for Beagle to generate Color Bar
+ *
+ * Kindly refer to OMAP TRM for definition of these values.
+ */
+static const struct venc_regs venc_config_std_tv = {
+ .status = 0x0000001B,
+ .f_control = 0x00000040,
+ .vidout_ctrl = 0x00000000,
+ .sync_ctrl = 0x00008000,
+ .llen = 0x00008359,
+ .flens = 0x0000020C,
+ .hfltr_ctrl = 0x00000000,
+ .cc_carr_wss_carr = 0x043F2631,
+ .c_phase = 0x00000024,
+ .gain_u = 0x00000130,
+ .gain_v = 0x00000198,
+ .gain_y = 0x000001C0,
+ .black_level = 0x0000006A,
+ .blank_level = 0x0000005C,
+ .x_color = 0x00000000,
+ .m_control = 0x00000001,
+ .bstamp_wss_data = 0x0000003F,
+ .s_carr = 0x21F07C1F,
+ .line21 = 0x00000000,
+ .ln_sel = 0x00000015,
+ .l21__wc_ctl = 0x00001400,
+ .htrigger_vtrigger = 0x00000000,
+ .savid__eavid = 0x069300F4,
+ .flen__fal = 0x0016020C,
+ .lal__phase_reset = 0x00060107,
+ .hs_int_start_stop_x = 0x008D034E,
+ .hs_ext_start_stop_x = 0x000F0359,
+ .vs_int_start_x = 0x01A00000,
+ .vs_int_stop_x__vs_int_start_y = 0x020501A0,
+ .vs_int_stop_y__vs_ext_start_x = 0x01AC0024,
+ .vs_ext_stop_x__vs_ext_start_y = 0x020D01AC,
+ .vs_ext_stop_y = 0x00000006,
+ .avid_start_stop_x = 0x03480079,
+ .avid_start_stop_y = 0x02040024,
+ .fid_int_start_x__fid_int_start_y = 0x0001008A,
+ .fid_int_offset_y__fid_ext_start_x = 0x01AC0106,
+ .fid_ext_start_y__fid_ext_offset_y = 0x01060006,
+ .tvdetgp_int_start_stop_x = 0x00140001,
+ .tvdetgp_int_start_stop_y = 0x00010001,
+ .gen_ctrl = 0x00FF0000,
+ .output_control = 0x0000000D,
+ .dac_b__dac_c = 0x00000000
+};
+
+/*
+ * Configure Timings for DVI D
+ */
+static const struct panel_config dvid_cfg = {
+ .timing_h = 0x0ff03f31, /* Horizantal timing */
+ .timing_v = 0x01400504, /* Vertical timing */
+ .pol_freq = 0x00007028, /* Pol Freq */
+ .divisor = 0x00010006, /* 72Mhz Pixel Clock */
+ .lcd_size = 0x02ff03ff, /* 1024x768 */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color = DVI_BEAGLE_ORANGE_COL /* ORANGE */
+};
+
+static const struct panel_config dvid_cfg_xm = {
+ .timing_h = 0x1a4024c9, /* Horizantal timing */
+ .timing_v = 0x02c00509, /* Vertical timing */
+ .pol_freq = 0x00007028, /* Pol Freq */
+ .divisor = 0x00010001, /* 96MHz Pixel Clock */
+ .lcd_size = 0x02ff03ff, /* 1024x768 */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color = DVI_BEAGLE_ORANGE_COL /* ORANGE */
+};
#endif
--
1.6.6.1
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