1 files changed, 62 insertions, 0 deletions

diff --git a/recipes-kernel/linux/linux-ti33x-psp-3.2/3.2.17/0120-ARM-7397-1-l2x0-only-apply-workaround-for-erratum-75.patch b/recipes-kernel/linux/linux-ti33x-psp-3.2/3.2.17/0120-ARM-7397-1-l2x0-only-apply-workaround-for-erratum-75.patch
new file mode 100644
index 00000000..32e3a48f
--- /dev/null
+++ b/recipes-kernel/linux/linux-ti33x-psp-3.2/3.2.17/0120-ARM-7397-1-l2x0-only-apply-workaround-for-erratum-75.patch
@@ -0,0 +1,62 @@
+From 8d2876b00b257ea48fddbccfb531ad618d83ed0b Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Fri, 20 Apr 2012 17:21:08 +0100
+Subject: [PATCH 120/165] ARM: 7397/1: l2x0: only apply workaround for erratum
+ #753970 on PL310
+
+commit f154fe9b806574437b47f08e924ad10c0e240b23 upstream.
+
+The workaround for PL310 erratum #753970 can lead to deadlock on systems
+with an L220 cache controller.
+
+This patch makes the workaround effective only when the cache controller
+is identified as a PL310 at probe time.
+
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+[bwh: Backported to 3.2: adjust context]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+---
+ arch/arm/mm/cache-l2x0.c |   12 ++++++------
+ 1 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
+index b1e192b..971d527 100644
+--- a/arch/arm/mm/cache-l2x0.c
++++ b/arch/arm/mm/cache-l2x0.c
+@@ -32,6 +32,7 @@ static void __iomem *l2x0_base;
+ static DEFINE_RAW_SPINLOCK(l2x0_lock);
+ static uint32_t l2x0_way_mask; /* Bitmask of active ways */
+ static uint32_t l2x0_size;
++static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
+ 
+ struct l2x0_regs l2x0_saved_regs;
+ 
+@@ -61,12 +62,7 @@ static inline void cache_sync(void)
+ {
+        void __iomem *base = l2x0_base;
+ 
+-#ifdef CONFIG_PL310_ERRATA_753970
+-       /* write to an unmmapped register */
+-       writel_relaxed(0, base + L2X0_DUMMY_REG);
+-#else
+-       writel_relaxed(0, base + L2X0_CACHE_SYNC);
+-#endif
++       writel_relaxed(0, base + sync_reg_offset);
+        cache_wait(base + L2X0_CACHE_SYNC, 1);
+ }
+ 
+@@ -331,6 +327,10 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+                else
+                        ways = 8;
+                type = "L310";
++#ifdef CONFIG_PL310_ERRATA_753970
++               /* Unmapped register. */
++               sync_reg_offset = L2X0_DUMMY_REG;
++#endif
+                break;
+        case L2X0_CACHE_ID_PART_L210:
+                ways = (aux >> 13) & 0xf;
+-- 
+1.7.7.6
+