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-rw-r--r--recipes-bsp/u-boot/u-boot/2011.06/0021-BeagleBoard-Configure-DVI-S-video.patch170
1 files changed, 0 insertions, 170 deletions
diff --git a/recipes-bsp/u-boot/u-boot/2011.06/0021-BeagleBoard-Configure-DVI-S-video.patch b/recipes-bsp/u-boot/u-boot/2011.06/0021-BeagleBoard-Configure-DVI-S-video.patch
deleted file mode 100644
index f8ab5a18..00000000
--- a/recipes-bsp/u-boot/u-boot/2011.06/0021-BeagleBoard-Configure-DVI-S-video.patch
+++ /dev/null
@@ -1,170 +0,0 @@
1From ebabfd9f1e6f712aafc2bba5ddfae530be4119ee Mon Sep 17 00:00:00 2001
2From: Jason Kridner <jkridner@beagleboard.org>
3Date: Tue, 19 Apr 2011 14:01:13 -0500
4Subject: [PATCH 21/30] BeagleBoard: Configure DVI/S-video
5
6Based on patches from Syed Mohammed Khasim (khasim@ti.com).
7
8Configures the output of the BeagleBoard DVI to be orange.
9Configures the output of the BeagleBoard S-Video to be a colorbar.
10---
11Updates for this version
12* Rebased on u-boot-ti.
13
14v3
15* Rebased again.
16
17Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
18Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
19---
20 board/ti/beagle/beagle.c | 24 +++++++++++++
21 board/ti/beagle/beagle.h | 86 ++++++++++++++++++++++++++++++++++++++++++++++
22 2 files changed, 110 insertions(+), 0 deletions(-)
23
24diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
25index a290f89..39d9038 100644
26--- a/board/ti/beagle/beagle.c
27+++ b/board/ti/beagle/beagle.c
28@@ -164,6 +164,28 @@ unsigned int get_expansion_id(void)
29 }
30
31 /*
32+ * Configure DSS to display background color on DVID
33+ * Configure VENC to display color bar on S-Video
34+ */
35+void display_init(void)
36+{
37+ omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
38+ switch (get_board_revision()) {
39+ case REVISION_AXBX:
40+ case REVISION_CX:
41+ case REVISION_C4:
42+ omap3_dss_panel_config(&dvid_cfg);
43+ break;
44+ case REVISION_XM_A:
45+ case REVISION_XM_B:
46+ case REVISION_XM_C:
47+ default:
48+ omap3_dss_panel_config(&dvid_cfg_xm);
49+ break;
50+ }
51+}
52+
53+/*
54 * Routine: misc_init_r
55 * Description: Configure board specific parts
56 */
57@@ -330,6 +352,8 @@ int misc_init_r(void)
58 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
59
60 dieid_num_r();
61+ display_init();
62+ omap3_dss_enable();
63
64 return 0;
65 }
66diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
67index 04247cd..18bfaa8 100644
68--- a/board/ti/beagle/beagle.h
69+++ b/board/ti/beagle/beagle.h
70@@ -23,6 +23,8 @@
71 #ifndef _BEAGLE_H_
72 #define _BEAGLE_H_
73
74+#include <asm/arch/dss.h>
75+
76 const omap3_sysinfo sysinfo = {
77 DDR_STACKED,
78 "OMAP3 Beagle board",
79@@ -472,4 +474,88 @@ const omap3_sysinfo sysinfo = {
80 MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 BT_EN*/\
81 MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) /*GPIO_139 WLAN_EN*/
82
83+/*
84+ * Display Configuration
85+ */
86+
87+#define DVI_BEAGLE_ORANGE_COL 0x00FF8000
88+#define VENC_HEIGHT 0x00ef
89+#define VENC_WIDTH 0x027f
90+
91+/*
92+ * Configure VENC in DSS for Beagle to generate Color Bar
93+ *
94+ * Kindly refer to OMAP TRM for definition of these values.
95+ */
96+static const struct venc_regs venc_config_std_tv = {
97+ .status = 0x0000001B,
98+ .f_control = 0x00000040,
99+ .vidout_ctrl = 0x00000000,
100+ .sync_ctrl = 0x00008000,
101+ .llen = 0x00008359,
102+ .flens = 0x0000020C,
103+ .hfltr_ctrl = 0x00000000,
104+ .cc_carr_wss_carr = 0x043F2631,
105+ .c_phase = 0x00000024,
106+ .gain_u = 0x00000130,
107+ .gain_v = 0x00000198,
108+ .gain_y = 0x000001C0,
109+ .black_level = 0x0000006A,
110+ .blank_level = 0x0000005C,
111+ .x_color = 0x00000000,
112+ .m_control = 0x00000001,
113+ .bstamp_wss_data = 0x0000003F,
114+ .s_carr = 0x21F07C1F,
115+ .line21 = 0x00000000,
116+ .ln_sel = 0x00000015,
117+ .l21__wc_ctl = 0x00001400,
118+ .htrigger_vtrigger = 0x00000000,
119+ .savid__eavid = 0x069300F4,
120+ .flen__fal = 0x0016020C,
121+ .lal__phase_reset = 0x00060107,
122+ .hs_int_start_stop_x = 0x008D034E,
123+ .hs_ext_start_stop_x = 0x000F0359,
124+ .vs_int_start_x = 0x01A00000,
125+ .vs_int_stop_x__vs_int_start_y = 0x020501A0,
126+ .vs_int_stop_y__vs_ext_start_x = 0x01AC0024,
127+ .vs_ext_stop_x__vs_ext_start_y = 0x020D01AC,
128+ .vs_ext_stop_y = 0x00000006,
129+ .avid_start_stop_x = 0x03480079,
130+ .avid_start_stop_y = 0x02040024,
131+ .fid_int_start_x__fid_int_start_y = 0x0001008A,
132+ .fid_int_offset_y__fid_ext_start_x = 0x01AC0106,
133+ .fid_ext_start_y__fid_ext_offset_y = 0x01060006,
134+ .tvdetgp_int_start_stop_x = 0x00140001,
135+ .tvdetgp_int_start_stop_y = 0x00010001,
136+ .gen_ctrl = 0x00FF0000,
137+ .output_control = 0x0000000D,
138+ .dac_b__dac_c = 0x00000000
139+};
140+
141+/*
142+ * Configure Timings for DVI D
143+ */
144+static const struct panel_config dvid_cfg = {
145+ .timing_h = 0x0ff03f31, /* Horizantal timing */
146+ .timing_v = 0x01400504, /* Vertical timing */
147+ .pol_freq = 0x00007028, /* Pol Freq */
148+ .divisor = 0x00010006, /* 72Mhz Pixel Clock */
149+ .lcd_size = 0x02ff03ff, /* 1024x768 */
150+ .panel_type = 0x01, /* TFT */
151+ .data_lines = 0x03, /* 24 Bit RGB */
152+ .load_mode = 0x02, /* Frame Mode */
153+ .panel_color = DVI_BEAGLE_ORANGE_COL /* ORANGE */
154+};
155+
156+static const struct panel_config dvid_cfg_xm = {
157+ .timing_h = 0x1a4024c9, /* Horizantal timing */
158+ .timing_v = 0x02c00509, /* Vertical timing */
159+ .pol_freq = 0x00007028, /* Pol Freq */
160+ .divisor = 0x00010001, /* 96MHz Pixel Clock */
161+ .lcd_size = 0x02ff03ff, /* 1024x768 */
162+ .panel_type = 0x01, /* TFT */
163+ .data_lines = 0x03, /* 24 Bit RGB */
164+ .load_mode = 0x02, /* Frame Mode */
165+ .panel_color = DVI_BEAGLE_ORANGE_COL /* ORANGE */
166+};
167 #endif
168--
1691.6.6.1
170
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