diff options
Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap/linus/0022-ASoC-codecs-wm8955-Fix-register-cache-incoherency.patch')
-rw-r--r-- | extras/recipes-kernel/linux/linux-omap/linus/0022-ASoC-codecs-wm8955-Fix-register-cache-incoherency.patch | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap/linus/0022-ASoC-codecs-wm8955-Fix-register-cache-incoherency.patch b/extras/recipes-kernel/linux/linux-omap/linus/0022-ASoC-codecs-wm8955-Fix-register-cache-incoherency.patch new file mode 100644 index 00000000..420b4cc2 --- /dev/null +++ b/extras/recipes-kernel/linux/linux-omap/linus/0022-ASoC-codecs-wm8955-Fix-register-cache-incoherency.patch | |||
@@ -0,0 +1,107 @@ | |||
1 | From 8febc5cbe3b8d4a4a056df364e4a82958a6eb1df Mon Sep 17 00:00:00 2001 | ||
2 | From: Lars-Peter Clausen <lars@metafoo.de> | ||
3 | Date: Tue, 28 Dec 2010 21:38:00 +0100 | ||
4 | Subject: [PATCH 22/65] ASoC: codecs: wm8955: Fix register cache incoherency | ||
5 | |||
6 | The multi-component patch(commit f0fba2ad1) moved the allocation of the | ||
7 | register cache from the driver to the ASoC core. Most drivers where adjusted to | ||
8 | this, but the wm8955 driver still uses its own register cache for its | ||
9 | private functions, while functions from the ASoC core use the generic cache. | ||
10 | Thus we end up with two from each other incoherent caches, which can lead to | ||
11 | undefined behaviour. | ||
12 | This patch fixes the issue by changing the wm8955 driver to use the | ||
13 | generic register cache in its private functions. | ||
14 | |||
15 | Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> | ||
16 | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
17 | Cc: stable@kernel.org (for 2.6.37 only) | ||
18 | --- | ||
19 | sound/soc/codecs/wm8955.c | 30 +++++++++++++++--------------- | ||
20 | 1 files changed, 15 insertions(+), 15 deletions(-) | ||
21 | |||
22 | diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c | ||
23 | index a2ad91d..2ac35b0 100644 | ||
24 | --- a/sound/soc/codecs/wm8955.c | ||
25 | +++ b/sound/soc/codecs/wm8955.c | ||
26 | @@ -42,8 +42,6 @@ static const char *wm8955_supply_names[WM8955_NUM_SUPPLIES] = { | ||
27 | struct wm8955_priv { | ||
28 | enum snd_soc_control_type control_type; | ||
29 | |||
30 | - u16 reg_cache[WM8955_MAX_REGISTER + 1]; | ||
31 | - | ||
32 | unsigned int mclk_rate; | ||
33 | |||
34 | int deemph; | ||
35 | @@ -768,6 +766,7 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec, | ||
36 | enum snd_soc_bias_level level) | ||
37 | { | ||
38 | struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); | ||
39 | + u16 *reg_cache = codec->reg_cache; | ||
40 | int ret, i; | ||
41 | |||
42 | switch (level) { | ||
43 | @@ -800,14 +799,14 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec, | ||
44 | /* Sync back cached values if they're | ||
45 | * different from the hardware default. | ||
46 | */ | ||
47 | - for (i = 0; i < ARRAY_SIZE(wm8955->reg_cache); i++) { | ||
48 | + for (i = 0; i < codec->driver->reg_cache_size; i++) { | ||
49 | if (i == WM8955_RESET) | ||
50 | continue; | ||
51 | |||
52 | - if (wm8955->reg_cache[i] == wm8955_reg[i]) | ||
53 | + if (reg_cache[i] == wm8955_reg[i]) | ||
54 | continue; | ||
55 | |||
56 | - snd_soc_write(codec, i, wm8955->reg_cache[i]); | ||
57 | + snd_soc_write(codec, i, reg_cache[i]); | ||
58 | } | ||
59 | |||
60 | /* Enable VREF and VMID */ | ||
61 | @@ -902,6 +901,7 @@ static int wm8955_probe(struct snd_soc_codec *codec) | ||
62 | { | ||
63 | struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); | ||
64 | struct wm8955_pdata *pdata = dev_get_platdata(codec->dev); | ||
65 | + u16 *reg_cache = codec->reg_cache; | ||
66 | int ret, i; | ||
67 | |||
68 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8955->control_type); | ||
69 | @@ -934,25 +934,25 @@ static int wm8955_probe(struct snd_soc_codec *codec) | ||
70 | } | ||
71 | |||
72 | /* Change some default settings - latch VU and enable ZC */ | ||
73 | - wm8955->reg_cache[WM8955_LEFT_DAC_VOLUME] |= WM8955_LDVU; | ||
74 | - wm8955->reg_cache[WM8955_RIGHT_DAC_VOLUME] |= WM8955_RDVU; | ||
75 | - wm8955->reg_cache[WM8955_LOUT1_VOLUME] |= WM8955_LO1VU | WM8955_LO1ZC; | ||
76 | - wm8955->reg_cache[WM8955_ROUT1_VOLUME] |= WM8955_RO1VU | WM8955_RO1ZC; | ||
77 | - wm8955->reg_cache[WM8955_LOUT2_VOLUME] |= WM8955_LO2VU | WM8955_LO2ZC; | ||
78 | - wm8955->reg_cache[WM8955_ROUT2_VOLUME] |= WM8955_RO2VU | WM8955_RO2ZC; | ||
79 | - wm8955->reg_cache[WM8955_MONOOUT_VOLUME] |= WM8955_MOZC; | ||
80 | + reg_cache[WM8955_LEFT_DAC_VOLUME] |= WM8955_LDVU; | ||
81 | + reg_cache[WM8955_RIGHT_DAC_VOLUME] |= WM8955_RDVU; | ||
82 | + reg_cache[WM8955_LOUT1_VOLUME] |= WM8955_LO1VU | WM8955_LO1ZC; | ||
83 | + reg_cache[WM8955_ROUT1_VOLUME] |= WM8955_RO1VU | WM8955_RO1ZC; | ||
84 | + reg_cache[WM8955_LOUT2_VOLUME] |= WM8955_LO2VU | WM8955_LO2ZC; | ||
85 | + reg_cache[WM8955_ROUT2_VOLUME] |= WM8955_RO2VU | WM8955_RO2ZC; | ||
86 | + reg_cache[WM8955_MONOOUT_VOLUME] |= WM8955_MOZC; | ||
87 | |||
88 | /* Also enable adaptive bass boost by default */ | ||
89 | - wm8955->reg_cache[WM8955_BASS_CONTROL] |= WM8955_BB; | ||
90 | + reg_cache[WM8955_BASS_CONTROL] |= WM8955_BB; | ||
91 | |||
92 | /* Set platform data values */ | ||
93 | if (pdata) { | ||
94 | if (pdata->out2_speaker) | ||
95 | - wm8955->reg_cache[WM8955_ADDITIONAL_CONTROL_2] | ||
96 | + reg_cache[WM8955_ADDITIONAL_CONTROL_2] | ||
97 | |= WM8955_ROUT2INV; | ||
98 | |||
99 | if (pdata->monoin_diff) | ||
100 | - wm8955->reg_cache[WM8955_MONO_OUT_MIX_1] | ||
101 | + reg_cache[WM8955_MONO_OUT_MIX_1] | ||
102 | |= WM8955_DMEN; | ||
103 | } | ||
104 | |||
105 | -- | ||
106 | 1.6.6.1 | ||
107 | |||