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Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch')
-rw-r--r--extras/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch2441
1 files changed, 2441 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch
new file mode 100644
index 00000000..f8b4af9d
--- /dev/null
+++ b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/cam/0031-BeagleXM-Cam-Add-support-for-MT9V113-VGA-Sensor.patch
@@ -0,0 +1,2441 @@
1From 2355a460abc09be0a8c61360792a59056eb09230 Mon Sep 17 00:00:00 2001
2From: Vaibhav Hiremath <hvaibhav@ti.com>
3Date: Wed, 7 Jul 2010 11:55:43 +0530
4Subject: [PATCH 31/75] BeagleXM:Cam: Add support for MT9V113 VGA Sensor
5
6This patch replaces the MT9T111 to MT9V113 sensor.
7---
8 arch/arm/mach-omap2/board-omap3beagle-camera.c | 132 ++-
9 arch/arm/mach-omap2/board-omap3beagle.c | 32 +-
10 drivers/media/video/Kconfig | 10 +
11 drivers/media/video/Makefile | 1 +
12 drivers/media/video/mt9v113.c | 1522 ++++++++++++++++++++++++
13 drivers/media/video/mt9v113_regs.h | 294 +++++
14 include/media/mt9v113.h | 83 ++
15 include/media/v4l2-int-device.h | 27 +
16 8 files changed, 2023 insertions(+), 78 deletions(-)
17 create mode 100644 drivers/media/video/mt9v113.c
18 create mode 100644 drivers/media/video/mt9v113_regs.h
19 create mode 100644 include/media/mt9v113.h
20
21diff --git a/arch/arm/mach-omap2/board-omap3beagle-camera.c b/arch/arm/mach-omap2/board-omap3beagle-camera.c
22index 8faa437..6c06265 100644
23--- a/arch/arm/mach-omap2/board-omap3beagle-camera.c
24+++ b/arch/arm/mach-omap2/board-omap3beagle-camera.c
25@@ -37,7 +37,7 @@
26 #include <plat/control.h>
27
28 #include <media/v4l2-int-device.h>
29-#include <media/mt9t111.h>
30+#include <media/mt9v113.h>
31
32 /* Include V4L2 ISP-Camera driver related header file */
33 #include <../drivers/media/video/omap34xxcam.h>
34@@ -50,99 +50,99 @@
35
36 #define CAM_USE_XCLKA 0
37
38-#define ISP_MT9T111_MCLK 216000000
39+#define ISP_MT9V113_MCLK 216000000
40
41 #define LEOPARD_RESET_GPIO 98
42
43-static struct regulator *beagle_mt9t111_1_8v1;
44-static struct regulator *beagle_mt9t111_1_8v2;
45+static struct regulator *beagle_mt9v113_1_8v1;
46+static struct regulator *beagle_mt9v113_1_8v2;
47
48-#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE)
49+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE)
50
51 /* Arbitrary memory handling limit */
52-#define MT9T111_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN(2048 * 1536 * 4)
53+#define MT9V113_BIGGEST_FRAME_BYTE_SIZE PAGE_ALIGN(2048 * 1536 * 4)
54
55-static struct isp_interface_config mt9t111_if_config = {
56- .ccdc_par_ser = ISP_PARLL,
57+static struct isp_interface_config mt9v113_if_config = {
58+ .ccdc_par_ser = ISP_PARLL,
59 .dataline_shift = 0x0,
60 .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE,
61 .strobe = 0x0,
62 .prestrobe = 0x0,
63 .shutter = 0x0,
64- .cam_mclk = ISP_MT9T111_MCLK,
65+ .cam_mclk = ISP_MT9V113_MCLK,
66 .wenlog = ISPCCDC_CFG_WENLOG_AND,
67 .wait_hs_vs = 2,
68 .u.par.par_bridge = 0x1,
69 .u.par.par_clk_pol = 0x0,
70 };
71
72-static struct v4l2_ifparm mt9t111_ifparm_s = {
73+static struct v4l2_ifparm mt9v113_ifparm_s = {
74 #if 1
75- .if_type = V4L2_IF_TYPE_RAW,
76+ .if_type = V4L2_IF_TYPE_RAW,
77 .u = {
78- .raw = {
79+ .raw = {
80 .frame_start_on_rising_vs = 1,
81 .bt_sync_correct = 0,
82 .swap = 0,
83 .latch_clk_inv = 0,
84 .nobt_hs_inv = 0, /* active high */
85 .nobt_vs_inv = 0, /* active high */
86- .clock_min = MT9T111_CLK_MIN,
87- .clock_max = MT9T111_CLK_MAX,
88+ .clock_min = MT9V113_CLK_MIN,
89+ .clock_max = MT9V113_CLK_MAX,
90 },
91 },
92-#else
93- .if_type = V4L2_IF_TYPE_YCbCr,
94+#else
95+ .if_type = V4L2_IF_TYPE_YCbCr,
96 .u = {
97- .ycbcr = {
98+ .ycbcr = {
99 .frame_start_on_rising_vs = 1,
100 .bt_sync_correct = 0,
101 .swap = 0,
102 .latch_clk_inv = 0,
103 .nobt_hs_inv = 0, /* active high */
104 .nobt_vs_inv = 0, /* active high */
105- .clock_min = MT9T111_CLK_MIN,
106- .clock_max = MT9T111_CLK_MAX,
107+ .clock_min = MT9V113_CLK_MIN,
108+ .clock_max = MT9V113_CLK_MAX,
109 },
110 },
111 #endif
112 };
113
114 /**
115- * @brief mt9t111_ifparm - Returns the mt9t111 interface parameters
116+ * @brief mt9v113_ifparm - Returns the mt9v113 interface parameters
117 *
118 * @param p - pointer to v4l2_ifparm structure
119 *
120 * @return result of operation - 0 is success
121 */
122-static int mt9t111_ifparm(struct v4l2_ifparm *p)
123+static int mt9v113_ifparm(struct v4l2_ifparm *p)
124 {
125 if (p == NULL)
126 return -EINVAL;
127
128- *p = mt9t111_ifparm_s;
129+ *p = mt9v113_ifparm_s;
130 return 0;
131 }
132
133 #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
134-static struct omap34xxcam_hw_config mt9t111_hwc = {
135+static struct omap34xxcam_hw_config mt9v113_hwc = {
136 .dev_index = 0,
137 .dev_minor = 0,
138 .dev_type = OMAP34XXCAM_SLAVE_SENSOR,
139 .u.sensor.sensor_isp = 1,
140- .u.sensor.capture_mem = MT9T111_BIGGEST_FRAME_BYTE_SIZE * 2,
141+ .u.sensor.capture_mem = MT9V113_BIGGEST_FRAME_BYTE_SIZE * 2,
142 .u.sensor.ival_default = { 1, 10 },
143 };
144 #endif
145
146 /**
147- * @brief mt9t111_set_prv_data - Returns mt9t111 omap34xx driver private data
148+ * @brief mt9v113_set_prv_data - Returns mt9v113 omap34xx driver private data
149 *
150 * @param priv - pointer to omap34xxcam_hw_config structure
151 *
152 * @return result of operation - 0 is success
153 */
154-static int mt9t111_set_prv_data(void *priv)
155+static int mt9v113_set_prv_data(void *priv)
156 {
157 #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
158 struct omap34xxcam_hw_config *hwc = priv;
159@@ -150,10 +150,10 @@ static int mt9t111_set_prv_data(void *priv)
160 if (priv == NULL)
161 return -EINVAL;
162
163- hwc->u.sensor = mt9t111_hwc.u.sensor;
164- hwc->dev_index = mt9t111_hwc.dev_index;
165- hwc->dev_minor = mt9t111_hwc.dev_minor;
166- hwc->dev_type = mt9t111_hwc.dev_type;
167+ hwc->u.sensor = mt9v113_hwc.u.sensor;
168+ hwc->dev_index = mt9v113_hwc.dev_index;
169+ hwc->dev_minor = mt9v113_hwc.dev_minor;
170+ hwc->dev_type = mt9v113_hwc.dev_type;
171 return 0;
172 #else
173 return -EINVAL;
174@@ -161,13 +161,13 @@ static int mt9t111_set_prv_data(void *priv)
175 }
176
177 /**
178- * @brief mt9t111_power_set - Power-on or power-off TVP5146 device
179+ * @brief mt9v113_power_set - Power-on or power-off TVP5146 device
180 *
181 * @param power - enum, Power on/off, resume/standby
182 *
183 * @return result of operation - 0 is success
184 */
185-static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power)
186+static int mt9v113_power_set(struct v4l2_int_device *s, enum v4l2_power power)
187 {
188 struct omap34xxcam_videodev *vdev = s->u.slave->master->priv;
189
190@@ -176,32 +176,32 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power)
191 case V4L2_POWER_STANDBY:
192 isp_set_xclk(vdev->cam->isp, 0, CAM_USE_XCLKA);
193
194- if (regulator_is_enabled(beagle_mt9t111_1_8v1))
195- regulator_disable(beagle_mt9t111_1_8v1);
196- if (regulator_is_enabled(beagle_mt9t111_1_8v2))
197- regulator_disable(beagle_mt9t111_1_8v2);
198+ if (regulator_is_enabled(beagle_mt9v113_1_8v1))
199+ regulator_disable(beagle_mt9v113_1_8v1);
200+ if (regulator_is_enabled(beagle_mt9v113_1_8v2))
201+ regulator_disable(beagle_mt9v113_1_8v2);
202 break;
203
204 case V4L2_POWER_ON:
205 #if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
206- isp_configure_interface(vdev->cam->isp, &mt9t111_if_config);
207+ isp_configure_interface(vdev->cam->isp, &mt9v113_if_config);
208 #endif
209
210 /* Set RESET_BAR to 0 */
211 gpio_set_value(LEOPARD_RESET_GPIO, 0);
212
213 /* turn on VDD */
214- regulator_enable(beagle_mt9t111_1_8v1);
215+ regulator_enable(beagle_mt9v113_1_8v1);
216
217 mdelay(1);
218
219 /* turn on VDD_IO */
220- regulator_enable(beagle_mt9t111_1_8v2);
221+ regulator_enable(beagle_mt9v113_1_8v2);
222
223 mdelay(50);
224
225 /* Enable EXTCLK */
226- isp_set_xclk(vdev->cam->isp, MT9T111_CLK_MIN, CAM_USE_XCLKA);
227+ isp_set_xclk(vdev->cam->isp, MT9V113_CLK_MIN, CAM_USE_XCLKA);
228
229 /*
230 * Wait at least 70 CLK cycles (w/EXTCLK = 6MHz, or CLK_MIN):
231@@ -229,44 +229,48 @@ static int mt9t111_power_set(struct v4l2_int_device *s, enum v4l2_power power)
232 return 0;
233 }
234
235-struct mt9t111_platform_data mt9t111_pdata = {
236+struct mt9v113_platform_data mt9v113_pdata = {
237 .master = "omap34xxcam",
238- .power_set = mt9t111_power_set,
239- .priv_data_set = mt9t111_set_prv_data,
240- .ifparm = mt9t111_ifparm,
241+ .power_set = mt9v113_power_set,
242+ .priv_data_set = mt9v113_set_prv_data,
243+ .ifparm = mt9v113_ifparm,
244 /* Some interface dependent params */
245 .clk_polarity = 0, /* data clocked out on falling edge */
246 .hs_polarity = 1, /* 0 - Active low, 1- Active high */
247 .vs_polarity = 1, /* 0 - Active low, 1- Active high */
248 };
249
250-#endif /* #ifdef CONFIG_VIDEO_MT9T111 */
251+#endif /* #ifdef CONFIG_VIDEO_MT9V113 */
252
253
254 static int beagle_cam_probe(struct platform_device *pdev)
255 {
256 int err;
257
258- beagle_mt9t111_1_8v1 = regulator_get(&pdev->dev, "vaux3_1");
259- if (IS_ERR(beagle_mt9t111_1_8v1)) {
260+ printk("%s:%d\n", __func__, __LINE__);
261+ beagle_mt9v113_1_8v1 = regulator_get(&pdev->dev, "vaux3_1");
262+ if (IS_ERR(beagle_mt9v113_1_8v1)) {
263 dev_err(&pdev->dev, "vaux3_1 regulator missing\n");
264- return PTR_ERR(beagle_mt9t111_1_8v1);
265+ return PTR_ERR(beagle_mt9v113_1_8v1);
266 }
267- beagle_mt9t111_1_8v2 = regulator_get(&pdev->dev, "vaux4_1");
268- if (IS_ERR(beagle_mt9t111_1_8v2)) {
269+ printk("%s:%d\n", __func__, __LINE__);
270+ beagle_mt9v113_1_8v2 = regulator_get(&pdev->dev, "vaux4_1");
271+ if (IS_ERR(beagle_mt9v113_1_8v2)) {
272 dev_err(&pdev->dev, "vaux4_1 regulator missing\n");
273- regulator_put(beagle_mt9t111_1_8v1);
274- return PTR_ERR(beagle_mt9t111_1_8v2);
275+ regulator_put(beagle_mt9v113_1_8v1);
276+ return PTR_ERR(beagle_mt9v113_1_8v2);
277 }
278
279+ printk("%s:%d\n", __func__, __LINE__);
280 if (gpio_request(LEOPARD_RESET_GPIO, "cam_rst") != 0) {
281 dev_err(&pdev->dev, "Could not request GPIO %d",
282 LEOPARD_RESET_GPIO);
283- regulator_put(beagle_mt9t111_1_8v2);
284- regulator_put(beagle_mt9t111_1_8v1);
285+ regulator_put(beagle_mt9v113_1_8v2);
286+ regulator_put(beagle_mt9v113_1_8v1);
287 return -ENODEV;
288 }
289
290+ printk("%s:%d\n", __func__, __LINE__);
291 /* set to output mode, default value 0 */
292 gpio_direction_output(LEOPARD_RESET_GPIO, 0);
293
294@@ -277,12 +281,13 @@ static int beagle_cam_probe(struct platform_device *pdev)
295
296 static int beagle_cam_remove(struct platform_device *pdev)
297 {
298- if (regulator_is_enabled(beagle_mt9t111_1_8v1))
299- regulator_disable(beagle_mt9t111_1_8v1);
300- regulator_put(beagle_mt9t111_1_8v1);
301- if (regulator_is_enabled(beagle_mt9t111_1_8v2))
302- regulator_disable(beagle_mt9t111_1_8v2);
303- regulator_put(beagle_mt9t111_1_8v2);
304+ printk("%s:%d\n", __func__, __LINE__);
305+ if (regulator_is_enabled(beagle_mt9v113_1_8v1))
306+ regulator_disable(beagle_mt9v113_1_8v1);
307+ regulator_put(beagle_mt9v113_1_8v1);
308+ if (regulator_is_enabled(beagle_mt9v113_1_8v2))
309+ regulator_disable(beagle_mt9v113_1_8v2);
310+ regulator_put(beagle_mt9v113_1_8v2);
311
312 gpio_free(LEOPARD_RESET_GPIO);
313
314@@ -355,9 +360,12 @@ static struct platform_driver beagle_cam_driver = {
315 */
316 int __init omap3beaglelmb_init(void)
317 {
318+ printk("%s:%d\n", __func__, __LINE__);
319 if (cpu_is_omap3630()) {
320- platform_driver_register(&beagle_cam_driver);
321+ printk("%s:%d\n", __func__, __LINE__);
322+ platform_driver_register(&beagle_cam_driver);
323 }
324- return 0;
325+ printk("%s:%d\n", __func__, __LINE__);
326+ return 0;
327 }
328 late_initcall(omap3beaglelmb_init);
329diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
330index af9b818..d4b0b0a 100644
331--- a/arch/arm/mach-omap2/board-omap3beagle.c
332+++ b/arch/arm/mach-omap2/board-omap3beagle.c
333@@ -71,10 +71,10 @@ static struct omap_opp * _omap35x_l3_rate_table = NULL;
334 static struct omap_opp * _omap37x_l3_rate_table = NULL;
335 #endif /* CONFIG_PM */
336
337-#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE)
338+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE)
339 #include <media/v4l2-int-device.h>
340-#include <media/mt9t111.h>
341-extern struct mt9t111_platform_data mt9t111_pdata;
342+#include <media/mt9v113.h>
343+extern struct mt9v113_platform_data mt9v113_pdata;
344 #endif
345
346 #define GPMC_CS0_BASE 0x60
347@@ -159,7 +159,7 @@ static void __init omap3beagle_ks8851_init(void)
348 printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n");
349 return;
350 }
351-
352+
353 spi_register_board_info(omap3beagle_zippy2_spi_board_info,
354 ARRAY_SIZE(omap3beagle_zippy2_spi_board_info));
355 }
356@@ -369,9 +369,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
357 */
358
359 if (cpu_is_omap3630()) {
360- /* Power on DVI, Serial and PWR led */
361+ /* Power on DVI, Serial and PWR led */
362 gpio_request(gpio + 1, "nDVI_PWR_EN");
363- gpio_direction_output(gpio + 1, 0);
364+ gpio_direction_output(gpio + 1, 0);
365
366 /* Power on camera interface */
367 gpio_request(gpio + 2, "CAM_EN");
368@@ -560,7 +560,7 @@ static struct i2c_board_info __initdata beagle_i2c1_boardinfo[] = {
369 },
370 };
371
372-
373+
374 #if defined(CONFIG_EEPROM_AT24) || defined(CONFIG_EEPROM_AT24_MODULE)
375 #include <linux/i2c/at24.h>
376
377@@ -594,10 +594,10 @@ static struct i2c_board_info __initdata beagle_zippy_i2c2_boardinfo[] = {};
378 #endif
379
380 static struct i2c_board_info __initdata beagle_i2c2_boardinfo[] = {
381-#if defined(CONFIG_VIDEO_MT9T111) || defined(CONFIG_VIDEO_MT9T111_MODULE)
382+#if defined(CONFIG_VIDEO_MT9V113) || defined(CONFIG_VIDEO_MT9V113_MODULE)
383 {
384- I2C_BOARD_INFO("mt9t111", MT9T111_I2C_ADDR),
385- .platform_data = &mt9t111_pdata,
386+ I2C_BOARD_INFO("mt9v113", MT9V113_I2C_ADDR),
387+ .platform_data = &mt9v113_pdata,
388 },
389 #endif
390 };
391@@ -606,7 +606,7 @@ static int __init omap3_beagle_i2c_init(void)
392 {
393 omap_register_i2c_bus(1, 2600, beagle_i2c1_boardinfo,
394 ARRAY_SIZE(beagle_i2c1_boardinfo));
395- if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2"))
396+ if(!strcmp(expansionboard_name, "zippy") || !strcmp(expansionboard_name, "zippy2"))
397 {
398 printk(KERN_INFO "Beagle expansionboard: registering i2c2 bus for zippy/zippy2\n");
399 omap_register_i2c_bus(2, 400, beagle_zippy_i2c2_boardinfo,
400@@ -681,7 +681,7 @@ static struct spi_board_info beaglefpga_mcspi_board_info[] = {
401 .modalias = "spidev",
402 .max_speed_hz = 48000000, //48 Mbps
403 .bus_num = 4,
404- .chip_select = 0,
405+ .chip_select = 0,
406 .mode = SPI_MODE_1,
407 },
408 };
409@@ -830,7 +830,7 @@ static void __init omap3_beagle_init(void)
410 /* REVISIT leave DVI powered down until it's needed ... */
411 gpio_direction_output(170, true);
412
413- if(!strcmp(expansionboard_name, "zippy"))
414+ if(!strcmp(expansionboard_name, "zippy"))
415 {
416 printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n");
417 omap3beagle_enc28j60_init();
418@@ -838,8 +838,8 @@ static void __init omap3_beagle_init(void)
419 mmc[1].gpio_wp = 141;
420 mmc[1].gpio_cd = 162;
421 }
422-
423- if(!strcmp(expansionboard_name, "zippy2"))
424+
425+ if(!strcmp(expansionboard_name, "zippy2"))
426 {
427 printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n");
428 omap3beagle_ks8851_init();
429@@ -880,7 +880,7 @@ static void __init omap3_beagle_init(void)
430 }
431
432 if(!strcmp(expansionboard_name, "beaglefpga"))
433- {
434+ {
435 printk(KERN_INFO "Beagle expansionboard: Using McSPI for SPI\n");
436 beaglefpga_init_spi();
437 }
438diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
439index f67ed46..c14d758 100644
440--- a/drivers/media/video/Kconfig
441+++ b/drivers/media/video/Kconfig
442@@ -329,6 +329,16 @@ config VIDEO_MT9V011
443 mt0v011 1.3 Mpixel camera. It currently only works with the
444 em28xx driver.
445
446+config VIDEO_MT9V113
447+ tristate "Aptina MT9V113 VGA CMOS IMAGE SENSOR"
448+ depends on VIDEO_V4L2 && I2C
449+ ---help---
450+ This is a Video4Linux2 sensor-level driver for the Aptina MT9V113
451+ image sensor.
452+
453+ To compile this driver as a module, choose M here: the
454+ module will be called mt9v113.
455+
456 config VIDEO_TCM825X
457 tristate "TCM825x camera sensor support"
458 depends on I2C && VIDEO_V4L2
459diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
460index 31688bf..763c157 100644
461--- a/drivers/media/video/Makefile
462+++ b/drivers/media/video/Makefile
463@@ -75,6 +75,7 @@ obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
464 obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
465 obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o
466 obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o
467+obj-$(CONFIG_VIDEO_MT9V113) += mt9v113.o
468
469 obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o
470 obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o
471diff --git a/drivers/media/video/mt9v113.c b/drivers/media/video/mt9v113.c
472new file mode 100644
473index 0000000..755a88a
474--- /dev/null
475+++ b/drivers/media/video/mt9v113.c
476@@ -0,0 +1,1522 @@
477+/*
478+ * drivers/media/video/mt9v113.c
479+ *
480+ * Based on TI TVP5146/47 decoder driver
481+ *
482+ *
483+ * This package is free software; you can redistribute it and/or modify
484+ * it under the terms of the GNU General Public License version 2 as
485+ * published by the Free Software Foundation.
486+ *
487+ * This program is distributed in the hope that it will be useful,
488+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
489+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
490+ * GNU General Public License for more details.
491+ *
492+ * You should have received a copy of the GNU General Public License
493+ * along with this program; if not, write to the Free Software
494+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
495+ *
496+ */
497+
498+#include <linux/i2c.h>
499+#include <linux/delay.h>
500+#include <linux/videodev2.h>
501+#include <media/v4l2-int-device.h>
502+#include <media/mt9v113.h>
503+#include <mach/hardware.h>
504+#include <linux/io.h>
505+
506+#include "mt9v113_regs.h"
507+
508+/* Module Name */
509+#define MT9V113_MODULE_NAME "mt9v113"
510+
511+/* Private macros for TVP */
512+#define I2C_RETRY_COUNT (5)
513+#define LOCK_RETRY_COUNT (5)
514+#define LOCK_RETRY_DELAY (200)
515+
516+/* Debug functions */
517+static int debug = 1;
518+module_param(debug, bool, 0644);
519+MODULE_PARM_DESC(debug, "Debug level (0-1)");
520+
521+#define dump_reg(client, reg, val) \
522+ do { \
523+ val = mt9v113_read_reg(client, reg); \
524+ v4l_info(client, "Reg(0x%.2X): 0x%.2X\n", reg, val); \
525+ } while (0)
526+
527+/**
528+ * enum mt9v113_std - enum for supported standards
529+ */
530+enum mt9v113_std {
531+ MT9V113_STD_VGA = 0,
532+ MT9V113_STD_QVGA,
533+ MT9V113_STD_INVALID
534+};
535+
536+/**
537+ * enum mt9v113_state - enum for different decoder states
538+ */
539+enum mt9v113_state {
540+ STATE_NOT_DETECTED,
541+ STATE_DETECTED
542+};
543+
544+/**
545+ * struct mt9v113_std_info - Structure to store standard informations
546+ * @width: Line width in pixels
547+ * @height:Number of active lines
548+ * @video_std: Value to write in REG_VIDEO_STD register
549+ * @standard: v4l2 standard structure information
550+ */
551+struct mt9v113_std_info {
552+ unsigned long width;
553+ unsigned long height;
554+ u8 video_std;
555+ struct v4l2_standard standard;
556+};
557+
558+/**
559+ * struct mt9v113_decoded - decoder object
560+ * @v4l2_int_device: Slave handle
561+ * @pdata: Board specific
562+ * @client: I2C client data
563+ * @id: Entry from I2C table
564+ * @ver: Chip version
565+ * @state: decoder state - detected or not-detected
566+ * @pix: Current pixel format
567+ * @num_fmts: Number of formats
568+ * @fmt_list: Format list
569+ * @current_std: Current standard
570+ * @num_stds: Number of standards
571+ * @std_list: Standards list
572+ * @route: input and output routing at chip level
573+ */
574+struct mt9v113_decoder {
575+ struct v4l2_int_device *v4l2_int_device;
576+ const struct mt9v113_platform_data *pdata;
577+ struct i2c_client *client;
578+
579+ struct i2c_device_id *id;
580+
581+ int ver;
582+ enum mt9v113_state state;
583+
584+ struct v4l2_pix_format pix;
585+ int num_fmts;
586+ const struct v4l2_fmtdesc *fmt_list;
587+
588+ enum mt9v113_std current_std;
589+ int num_stds;
590+ struct mt9v113_std_info *std_list;
591+
592+ struct v4l2_routing route;
593+};
594+
595+/* MT9V113 register set for VGA mode */
596+static struct mt9v113_reg mt9v113_vga_reg[] = {
597+ {TOK_WRITE, 0x098C, 0x2739},
598+ {TOK_WRITE, 0x0990, 0x0000},
599+ {TOK_WRITE, 0x098C, 0x273B},
600+ {TOK_WRITE, 0x0990, 0x027F},
601+ {TOK_WRITE, 0x098C, 0x273D},
602+ {TOK_WRITE, 0x0990, 0x0000},
603+ {TOK_WRITE, 0x098C, 0x273F},
604+ {TOK_WRITE, 0x0990, 0x01DF},
605+ {TOK_WRITE, 0x098C, 0x2703},
606+ {TOK_WRITE, 0x0990, 0x0280},
607+ {TOK_WRITE, 0x098C, 0x2705},
608+ {TOK_WRITE, 0x0990, 0x01E0},
609+ {TOK_WRITE, 0x098C, 0xA103},
610+ {TOK_WRITE, 0x0990, 0x0005},
611+ {TOK_DELAY, 0, 100},
612+ {TOK_TERM, 0, 0},
613+};
614+
615+/* MT9V113 default register values */
616+static struct mt9v113_reg mt9v113_reg_list[] = {
617+ {TOK_WRITE, 0x0018, 0x4028},
618+ {TOK_DELAY, 0, 100},
619+ {TOK_WRITE, 0x001A, 0x0011},
620+ {TOK_WRITE, 0x001A, 0x0010},
621+ {TOK_WRITE, 0x0018, 0x4028},
622+ {TOK_DELAY, 0, 100},
623+ {TOK_WRITE, 0x098C, 0x02F0},
624+ {TOK_WRITE, 0x0990, 0x0000},
625+ {TOK_WRITE, 0x098C, 0x02F2},
626+ {TOK_WRITE, 0x0990, 0x0210},
627+ {TOK_WRITE, 0x098C, 0x02F4},
628+ {TOK_WRITE, 0x0990, 0x001A},
629+ {TOK_WRITE, 0x098C, 0x2145},
630+ {TOK_WRITE, 0x0990, 0x02F4},
631+ {TOK_WRITE, 0x098C, 0xA134},
632+ {TOK_WRITE, 0x0990, 0x0001},
633+ {TOK_WRITE, 0x31E0, 0x0001},
634+ {TOK_WRITE, 0x001A, 0x0210},
635+ {TOK_WRITE, 0x001E, 0x0777},
636+ {TOK_WRITE, 0x0016, 0x42DF},
637+ {TOK_WRITE, 0x0014, 0x2145},
638+ {TOK_WRITE, 0x0014, 0x2145},
639+ {TOK_WRITE, 0x0010, 0x0431},
640+ {TOK_WRITE, 0x0012, 0x0000},
641+ {TOK_WRITE, 0x0014, 0x244B},
642+ {TOK_WRITE, 0x0014, 0x304B},
643+ {TOK_DELAY, 0, 100},
644+ {TOK_WRITE, 0x0014, 0xB04A},
645+ {TOK_WRITE, 0x098C, 0xAB1F},
646+ {TOK_WRITE, 0x0990, 0x00C7},
647+ {TOK_WRITE, 0x098C, 0xAB31},
648+ {TOK_WRITE, 0x0990, 0x001E},
649+ {TOK_WRITE, 0x098C, 0x274F},
650+ {TOK_WRITE, 0x0990, 0x0004},
651+ {TOK_WRITE, 0x098C, 0x2741},
652+ {TOK_WRITE, 0x0990, 0x0004},
653+ {TOK_WRITE, 0x098C, 0xAB20},
654+ {TOK_WRITE, 0x0990, 0x0054},
655+ {TOK_WRITE, 0x098C, 0xAB21},
656+ {TOK_WRITE, 0x0990, 0x0046},
657+ {TOK_WRITE, 0x098C, 0xAB22},
658+ {TOK_WRITE, 0x0990, 0x0002},
659+ {TOK_WRITE, 0x098C, 0xAB24},
660+ {TOK_WRITE, 0x0990, 0x0005},
661+ {TOK_WRITE, 0x098C, 0x2B28},
662+ {TOK_WRITE, 0x0990, 0x170C},
663+ {TOK_WRITE, 0x098C, 0x2B2A},
664+ {TOK_WRITE, 0x0990, 0x3E80},
665+ {TOK_WRITE, 0x3210, 0x09A8},
666+ {TOK_WRITE, 0x098C, 0x2306},
667+ {TOK_WRITE, 0x0990, 0x0315},
668+ {TOK_WRITE, 0x098C, 0x2308},
669+ {TOK_WRITE, 0x0990, 0xFDDC},
670+ {TOK_WRITE, 0x098C, 0x230A},
671+ {TOK_WRITE, 0x0990, 0x003A},
672+ {TOK_WRITE, 0x098C, 0x230C},
673+ {TOK_WRITE, 0x0990, 0xFF58},
674+ {TOK_WRITE, 0x098C, 0x230E},
675+ {TOK_WRITE, 0x0990, 0x02B7},
676+ {TOK_WRITE, 0x098C, 0x2310},
677+ {TOK_WRITE, 0x0990, 0xFF31},
678+ {TOK_WRITE, 0x098C, 0x2312},
679+ {TOK_WRITE, 0x0990, 0xFF4C},
680+ {TOK_WRITE, 0x098C, 0x2314},
681+ {TOK_WRITE, 0x0990, 0xFE4C},
682+ {TOK_WRITE, 0x098C, 0x2316},
683+ {TOK_WRITE, 0x0990, 0x039E},
684+ {TOK_WRITE, 0x098C, 0x2318},
685+ {TOK_WRITE, 0x0990, 0x001C},
686+ {TOK_WRITE, 0x098C, 0x231A},
687+ {TOK_WRITE, 0x0990, 0x0039},
688+ {TOK_WRITE, 0x098C, 0x231C},
689+ {TOK_WRITE, 0x0990, 0x007F},
690+ {TOK_WRITE, 0x098C, 0x231E},
691+ {TOK_WRITE, 0x0990, 0xFF77},
692+ {TOK_WRITE, 0x098C, 0x2320},
693+ {TOK_WRITE, 0x0990, 0x000A},
694+ {TOK_WRITE, 0x098C, 0x2322},
695+ {TOK_WRITE, 0x0990, 0x0020},
696+ {TOK_WRITE, 0x098C, 0x2324},
697+ {TOK_WRITE, 0x0990, 0x001B},
698+ {TOK_WRITE, 0x098C, 0x2326},
699+ {TOK_WRITE, 0x0990, 0xFFC6},
700+ {TOK_WRITE, 0x098C, 0x2328},
701+ {TOK_WRITE, 0x0990, 0x0086},
702+ {TOK_WRITE, 0x098C, 0x232A},
703+ {TOK_WRITE, 0x0990, 0x00B5},
704+ {TOK_WRITE, 0x098C, 0x232C},
705+ {TOK_WRITE, 0x0990, 0xFEC3},
706+ {TOK_WRITE, 0x098C, 0x232E},
707+ {TOK_WRITE, 0x0990, 0x0001},
708+ {TOK_WRITE, 0x098C, 0x2330},
709+ {TOK_WRITE, 0x0990, 0xFFEF},
710+ {TOK_WRITE, 0x098C, 0xA348},
711+ {TOK_WRITE, 0x0990, 0x0008},
712+ {TOK_WRITE, 0x098C, 0xA349},
713+ {TOK_WRITE, 0x0990, 0x0002},
714+ {TOK_WRITE, 0x098C, 0xA34A},
715+ {TOK_WRITE, 0x0990, 0x0090},
716+ {TOK_WRITE, 0x098C, 0xA34B},
717+ {TOK_WRITE, 0x0990, 0x00FF},
718+ {TOK_WRITE, 0x098C, 0xA34C},
719+ {TOK_WRITE, 0x0990, 0x0075},
720+ {TOK_WRITE, 0x098C, 0xA34D},
721+ {TOK_WRITE, 0x0990, 0x00EF},
722+ {TOK_WRITE, 0x098C, 0xA351},
723+ {TOK_WRITE, 0x0990, 0x0000},
724+ {TOK_WRITE, 0x098C, 0xA352},
725+ {TOK_WRITE, 0x0990, 0x007F},
726+ {TOK_WRITE, 0x098C, 0xA354},
727+ {TOK_WRITE, 0x0990, 0x0043},
728+ {TOK_WRITE, 0x098C, 0xA355},
729+ {TOK_WRITE, 0x0990, 0x0001},
730+ {TOK_WRITE, 0x098C, 0xA35D},
731+ {TOK_WRITE, 0x0990, 0x0078},
732+ {TOK_WRITE, 0x098C, 0xA35E},
733+ {TOK_WRITE, 0x0990, 0x0086},
734+ {TOK_WRITE, 0x098C, 0xA35F},
735+ {TOK_WRITE, 0x0990, 0x007E},
736+ {TOK_WRITE, 0x098C, 0xA360},
737+ {TOK_WRITE, 0x0990, 0x0082},
738+ {TOK_WRITE, 0x098C, 0x2361},
739+ {TOK_WRITE, 0x0990, 0x0040},
740+ {TOK_WRITE, 0x098C, 0xA363},
741+ {TOK_WRITE, 0x0990, 0x00D2},
742+ {TOK_WRITE, 0x098C, 0xA364},
743+ {TOK_WRITE, 0x0990, 0x00F6},
744+ {TOK_WRITE, 0x098C, 0xA302},
745+ {TOK_WRITE, 0x0990, 0x0000},
746+ {TOK_WRITE, 0x098C, 0xA303},
747+ {TOK_WRITE, 0x0990, 0x00EF},
748+ {TOK_WRITE, 0x098C, 0xAB20},
749+ {TOK_WRITE, 0x0990, 0x0024},
750+ {TOK_WRITE, 0x098C, 0xA103},
751+ {TOK_WRITE, 0x0990, 0x0006},
752+ {TOK_DELAY, 0, 100},
753+ {TOK_WRITE, 0x098C, 0xA103},
754+ {TOK_WRITE, 0x0990, 0x0005},
755+ {TOK_DELAY, 0, 100},
756+ {TOK_WRITE, 0x098C, 0x222D},
757+ {TOK_WRITE, 0x0990, 0x0088},
758+ {TOK_WRITE, 0x098C, 0xA408},
759+ {TOK_WRITE, 0x0990, 0x0020},
760+ {TOK_WRITE, 0x098C, 0xA409},
761+ {TOK_WRITE, 0x0990, 0x0023},
762+ {TOK_WRITE, 0x098C, 0xA40A},
763+ {TOK_WRITE, 0x0990, 0x0027},
764+ {TOK_WRITE, 0x098C, 0xA40B},
765+ {TOK_WRITE, 0x0990, 0x002A},
766+ {TOK_WRITE, 0x098C, 0x2411},
767+ {TOK_WRITE, 0x0990, 0x0088},
768+ {TOK_WRITE, 0x098C, 0x2413},
769+ {TOK_WRITE, 0x0990, 0x00A4},
770+ {TOK_WRITE, 0x098C, 0x2415},
771+ {TOK_WRITE, 0x0990, 0x0088},
772+ {TOK_WRITE, 0x098C, 0x2417},
773+ {TOK_WRITE, 0x0990, 0x00A4},
774+ {TOK_WRITE, 0x098C, 0xA404},
775+ {TOK_WRITE, 0x0990, 0x0010},
776+ {TOK_WRITE, 0x098C, 0xA40D},
777+ {TOK_WRITE, 0x0990, 0x0002},
778+ {TOK_WRITE, 0x098C, 0xA40E},
779+ {TOK_WRITE, 0x0990, 0x0003},
780+ {TOK_WRITE, 0x098C, 0xA103},
781+ {TOK_WRITE, 0x0990, 0x0006},
782+ {TOK_DELAY, 0, 100},
783+ /* test pattern all white*/
784+ /* {TOK_WRITE, 0x098C, 0xA766},
785+ {TOK_WRITE, 0x0990, 0x0001},
786+ */
787+ {TOK_WRITE, 0x098C, 0xA103},
788+ {TOK_WRITE, 0x0990, 0x0005},
789+ {TOK_DELAY, 0, 100},
790+ {TOK_TERM, 0, 0},
791+};
792+
793+/* List of image formats supported by mt9v113
794+ * Currently we are using 8 bit mode only, but can be
795+ * extended to 10/20 bit mode.
796+ */
797+static const struct v4l2_fmtdesc mt9v113_fmt_list[] = {
798+ {
799+ .index = 0,
800+ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
801+ .flags = 0,
802+ .description = "8-bit UYVY 4:2:2 Format",
803+ .pixelformat = V4L2_PIX_FMT_UYVY,
804+ },
805+};
806+
807+/*
808+ * Supported standards -
809+ *
810+ * Currently supports two standards only, need to add support for rest of the
811+ * modes, like SECAM, etc...
812+ */
813+static struct mt9v113_std_info mt9v113_std_list[] = {
814+ /* Standard: STD_NTSC_MJ */
815+ [MT9V113_STD_VGA] = {
816+ .width = VGA_NUM_ACTIVE_PIXELS,
817+ .height = VGA_NUM_ACTIVE_LINES,
818+ .video_std = MT9V113_IMAGE_STD_VGA,
819+ .standard = {
820+ .index = 0,
821+ .id = MT9V113_IMAGE_STD_VGA,
822+ .name = "VGA",
823+ .frameperiod = {1001, 30000},
824+ .framelines = 480
825+ },
826+ /* Standard: STD_PAL_BDGHIN */
827+ },
828+ [MT9V113_STD_QVGA] = {
829+ .width = QVGA_NUM_ACTIVE_PIXELS,
830+ .height = QVGA_NUM_ACTIVE_LINES,
831+ .video_std = MT9V113_IMAGE_STD_QVGA,
832+ .standard = {
833+ .index = 1,
834+ .id = MT9V113_IMAGE_STD_QVGA,
835+ .name = "QVGA",
836+ .frameperiod = {1001, 30000},
837+ .framelines = 320
838+ },
839+ },
840+ /* Standard: need to add for additional standard */
841+};
842+/*
843+ * Control structure for Auto Gain
844+ * This is temporary data, will get replaced once
845+ * v4l2_ctrl_query_fill supports it.
846+ */
847+static const struct v4l2_queryctrl mt9v113_autogain_ctrl = {
848+ .id = V4L2_CID_AUTOGAIN,
849+ .name = "Gain, Automatic",
850+ .type = V4L2_CTRL_TYPE_BOOLEAN,
851+ .minimum = 0,
852+ .maximum = 1,
853+ .step = 1,
854+ .default_value = 1,
855+};
856+
857+static int mt9v113_read_reg(struct i2c_client *client, unsigned short reg)
858+{
859+ int err = 0;
860+ struct i2c_msg msg[1];
861+ unsigned char data[2];
862+ unsigned short val = 0;
863+
864+ if (!client->adapter) {
865+ err = -ENODEV;
866+ return err;
867+ }else {
868+ // TODO: addr should be set up where else
869+ msg->addr = MT9V113_I2C_ADDR;//client->addr;
870+ msg->flags = 0;
871+ msg->len = I2C_TWO_BYTE_TRANSFER;
872+ msg->buf = data;
873+ data[0] = (reg & I2C_TXRX_DATA_MASK_UPPER) >>
874+ I2C_TXRX_DATA_SHIFT;
875+ data[1] = (reg & I2C_TXRX_DATA_MASK);
876+ err = i2c_transfer(client->adapter, msg, 1);
877+ if (err >= 0) {
878+ msg->flags = I2C_M_RD;
879+ msg->len = I2C_TWO_BYTE_TRANSFER; /* 2 byte read */
880+ err = i2c_transfer(client->adapter, msg, 1);
881+ if (err >= 0) {
882+ val = ((data[0] & I2C_TXRX_DATA_MASK)
883+ << I2C_TXRX_DATA_SHIFT)
884+ | (data[1] & I2C_TXRX_DATA_MASK);
885+ }
886+ }
887+ }
888+ return (int)(0x0000ffff & val);
889+}
890+
891+
892+
893+static int mt9v113_write_reg(struct i2c_client *client, unsigned short reg, unsigned short val)
894+{
895+ int err = 0;
896+ int trycnt = 0;
897+
898+ struct i2c_msg msg[1];
899+ unsigned char data[4];
900+ err = -1;
901+
902+ v4l_dbg(1, debug, client,
903+ "mt9v113_write_reg reg=0x%x, val=0x%x\n",
904+ reg,val);
905+
906+ while ((err < 0) && (trycnt < I2C_RETRY_COUNT)) {
907+ trycnt++;
908+ if (!client->adapter) {
909+ err = -ENODEV;
910+ } else {
911+ // TODO: addr should be set up where else
912+ msg->addr = MT9V113_I2C_ADDR;//client->addr;
913+ msg->flags = 0;
914+ msg->len = I2C_FOUR_BYTE_TRANSFER;
915+ msg->buf = data;
916+ data[0] = (reg & I2C_TXRX_DATA_MASK_UPPER) >>
917+ I2C_TXRX_DATA_SHIFT;
918+ data[1] = (reg & I2C_TXRX_DATA_MASK);
919+ data[2] = (val & I2C_TXRX_DATA_MASK_UPPER) >>
920+ I2C_TXRX_DATA_SHIFT;
921+ data[3] = (val & I2C_TXRX_DATA_MASK);
922+ err = i2c_transfer(client->adapter, msg, 1);
923+ }
924+ }
925+ if (err < 0) {
926+ printk(KERN_INFO "\n I2C write failed");
927+ }
928+ return err;
929+}
930+
931+/* configure mux, for DM355 EVM only */
932+#ifndef CONFIG_MACH_DM355_LEOPARD
933+static int mt9v113_en_mux(struct i2c_client *client)
934+{
935+ int err = 0;
936+ int trycnt = 0;
937+ /* unsigned short readval = 0;*/
938+
939+ struct i2c_msg msg[1];
940+ unsigned char data[4];
941+ err = -1;
942+ printk(KERN_INFO
943+ "\n entering mt9v113_en_mux \n");
944+
945+ while ((err < 0) && (trycnt < 5)) {
946+ trycnt++;
947+ if (!client->adapter) {
948+ err = -ENODEV;
949+ } else {
950+ msg->addr = 0x25;
951+ msg->flags = 0;
952+ msg->len = I2C_TWO_BYTE_TRANSFER;
953+ msg->buf = data;
954+ data[0] = (unsigned char)(0x08 & I2C_TXRX_DATA_MASK);
955+ data[1] = (unsigned char)(0x80 & I2C_TXRX_DATA_MASK);
956+
957+ err = i2c_transfer(client->adapter, msg, 1);
958+ if (err < 0) {
959+ printk(KERN_INFO
960+ "\n ERROR in ECP register write\n");
961+ }
962+ }
963+ }
964+ if (err < 0) {
965+ printk(KERN_INFO "\n I2C write failed");
966+ }
967+ return err;
968+}
969+#endif
970+
971+/*
972+ * mt9v113_write_regs : Initializes a list of registers
973+ * if token is TOK_TERM, then entire write operation terminates
974+ * if token is TOK_DELAY, then a delay of 'val' msec is introduced
975+ * if token is TOK_SKIP, then the register write is skipped
976+ * if token is TOK_WRITE, then the register write is performed
977+ *
978+ * reglist - list of registers to be written
979+ * Returns zero if successful, or non-zero otherwise.
980+ */
981+static int mt9v113_write_regs(struct i2c_client *client,
982+ const struct mt9v113_reg reglist[])
983+{
984+ int err;
985+ const struct mt9v113_reg *next = reglist;
986+
987+ for (; next->token != TOK_TERM; next++) {
988+ if (next->token == TOK_DELAY) {
989+ msleep(next->val);
990+ continue;
991+ }
992+
993+ if (next->token == TOK_SKIP)
994+ continue;
995+
996+ err = mt9v113_write_reg(client, next->reg, next->val);
997+ if (err < 0) {
998+ v4l_err(client, "Write failed. Err[%d]\n", err);
999+ return err;
1000+ }
1001+ }
1002+ return 0;
1003+}
1004+
1005+/*
1006+ * mt9v113_get_current_std:
1007+ * Returns the current standard
1008+ */
1009+static enum mt9v113_std mt9v113_get_current_std(struct mt9v113_decoder
1010+ *decoder)
1011+{
1012+ return MT9V113_STD_VGA;
1013+}
1014+
1015+/*
1016+ * Configure the mt9v113 with the current register settings
1017+ * Returns zero if successful, or non-zero otherwise.
1018+ */
1019+static int mt9v113_configure(struct mt9v113_decoder *decoder)
1020+{
1021+ int err;
1022+
1023+ /* common register initialization */
1024+ err =
1025+ mt9v113_write_regs(decoder->client, mt9v113_reg_list);
1026+ if (err)
1027+ return err;
1028+
1029+// if (debug)
1030+// mt9v113_reg_dump(decoder);
1031+
1032+ return 0;
1033+}
1034+
1035+/*
1036+ * Configure the MT9V113 to VGA mode
1037+ * Returns zero if successful, or non-zero otherwise.
1038+ */
1039+static int mt9v113_vga_mode(struct mt9v113_decoder *decoder)
1040+{
1041+ int err;
1042+
1043+ err =
1044+ mt9v113_write_regs(decoder->client, mt9v113_vga_reg);
1045+ if (err)
1046+ return err;
1047+
1048+ return 0;
1049+}
1050+
1051+
1052+/*
1053+ * Detect if an mt9v113 is present, and if so which revision.
1054+ * A device is considered to be detected if the chip ID (LSB and MSB)
1055+ * registers match the expected values.
1056+ * Any value of the rom version register is accepted.
1057+ * Returns ENODEV error number if no device is detected, or zero
1058+ * if a device is detected.
1059+ */
1060+static int mt9v113_detect(struct mt9v113_decoder *decoder)
1061+{
1062+ unsigned short val=0;
1063+
1064+#ifndef CONFIG_MACH_DM355_LEOPARD
1065+// mt9v113_en_mux(decoder->client);
1066+#endif
1067+
1068+ val = mt9v113_read_reg(decoder->client, REG_CHIP_ID);
1069+
1070+ v4l_dbg(1, debug, decoder->client,
1071+ "chip id detected 0x%x\n",
1072+ val);
1073+
1074+ if (MT9V113_CHIP_ID != val) {
1075+ /* We didn't read the values we expected, so this must not be
1076+ * MT9V113.
1077+ */
1078+ v4l_err(decoder->client,
1079+ "chip id mismatch read 0x%x, expecting 0x%x\n", val, MT9V113_CHIP_ID);
1080+ return -ENODEV;
1081+ }
1082+
1083+ decoder->ver = val;
1084+ decoder->state = STATE_DETECTED;
1085+
1086+ v4l_info(decoder->client,
1087+ "%s found at 0x%x (%s)\n", decoder->client->name,
1088+ decoder->client->addr << 1,
1089+ decoder->client->adapter->name);
1090+
1091+ return 0;
1092+}
1093+
1094+/*
1095+ * Following are decoder interface functions implemented by
1096+ * mt9v113 decoder driver.
1097+ */
1098+
1099+/**
1100+ * ioctl_querystd - V4L2 decoder interface handler for VIDIOC_QUERYSTD ioctl
1101+ * @s: pointer to standard V4L2 device structure
1102+ * @std_id: standard V4L2 std_id ioctl enum
1103+ *
1104+ * Returns the current standard detected by mt9v113. If no active input is
1105+ * detected, returns -EINVAL
1106+ */
1107+static int ioctl_querystd(struct v4l2_int_device *s, v4l2_std_id *std_id)
1108+{
1109+ struct mt9v113_decoder *decoder = s->priv;
1110+ enum mt9v113_std current_std;
1111+
1112+ if (std_id == NULL)
1113+ return -EINVAL;
1114+
1115+ /* get the current standard */
1116+ current_std = mt9v113_get_current_std(decoder);
1117+ if (current_std == MT9V113_IMAGE_STD_INVALID)
1118+ return -EINVAL;
1119+
1120+ decoder->current_std = current_std;
1121+ *std_id = decoder->std_list[current_std].standard.id;
1122+
1123+ v4l_dbg(1, debug, decoder->client, "Current STD: %s",
1124+ decoder->std_list[current_std].standard.name);
1125+ return 0;
1126+}
1127+
1128+/**
1129+ * ioctl_s_std - V4L2 decoder interface handler for VIDIOC_S_STD ioctl
1130+ * @s: pointer to standard V4L2 device structure
1131+ * @std_id: standard V4L2 v4l2_std_id ioctl enum
1132+ *
1133+ * If std_id is supported, sets the requested standard. Otherwise, returns
1134+ * -EINVAL
1135+ */
1136+static int ioctl_s_std(struct v4l2_int_device *s, v4l2_std_id *std_id)
1137+{
1138+ struct mt9v113_decoder *decoder = s->priv;
1139+ int err, i;
1140+
1141+ if (std_id == NULL)
1142+ return -EINVAL;
1143+
1144+ for (i = 0; i < decoder->num_stds; i++)
1145+ if (*std_id & decoder->std_list[i].standard.id)
1146+ break;
1147+
1148+ if ((i == decoder->num_stds) || (i == MT9V113_STD_INVALID))
1149+ return -EINVAL;
1150+
1151+ err = mt9v113_write_reg(decoder->client, REG_VIDEO_STD,
1152+ decoder->std_list[i].video_std);
1153+ if (err)
1154+ return err;
1155+
1156+ decoder->current_std = i;
1157+ mt9v113_reg_list[REG_VIDEO_STD].val = decoder->std_list[i].video_std;
1158+
1159+ v4l_dbg(1, debug, decoder->client, "Standard set to: %s",
1160+ decoder->std_list[i].standard.name);
1161+ return 0;
1162+}
1163+
1164+/**
1165+ * ioctl_s_routing - V4L2 decoder interface handler for VIDIOC_S_INPUT ioctl
1166+ * @s: pointer to standard V4L2 device structure
1167+ * @index: number of the input
1168+ *
1169+ * If index is valid, selects the requested input. Otherwise, returns -EINVAL if
1170+ * the input is not supported or there is no active signal present in the
1171+ * selected input.
1172+ */
1173+static int ioctl_s_routing(struct v4l2_int_device *s,
1174+ struct v4l2_routing *route)
1175+{
1176+ return 0;
1177+}
1178+
1179+/**
1180+ * ioctl_queryctrl - V4L2 decoder interface handler for VIDIOC_QUERYCTRL ioctl
1181+ * @s: pointer to standard V4L2 device structure
1182+ * @qctrl: standard V4L2 v4l2_queryctrl structure
1183+ *
1184+ * If the requested control is supported, returns the control information.
1185+ * Otherwise, returns -EINVAL if the control is not supported.
1186+ */
1187+static int
1188+ioctl_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qctrl)
1189+{
1190+ struct mt9v113_decoder *decoder = s->priv;
1191+ int err = -EINVAL;
1192+
1193+ if (qctrl == NULL)
1194+ return err;
1195+
1196+ switch (qctrl->id) {
1197+ case V4L2_CID_BRIGHTNESS:
1198+ /* Brightness supported is same as standard one (0-255),
1199+ * so make use of standard API provided.
1200+ */
1201+ err = v4l2_ctrl_query_fill(qctrl, 0, 255, 1, 128);
1202+ break;
1203+ case V4L2_CID_CONTRAST:
1204+ case V4L2_CID_SATURATION:
1205+ /* Saturation and Contrast supported is -
1206+ * Contrast: 0 - 255 (Default - 128)
1207+ * Saturation: 0 - 255 (Default - 128)
1208+ */
1209+ err = v4l2_ctrl_query_fill(qctrl, 0, 255, 1, 128);
1210+ break;
1211+ case V4L2_CID_HUE:
1212+ /* Hue Supported is -
1213+ * Hue - -180 - +180 (Default - 0, Step - +180)
1214+ */
1215+ err = v4l2_ctrl_query_fill(qctrl, -180, 180, 180, 0);
1216+ break;
1217+ case V4L2_CID_AUTOGAIN:
1218+ /* Autogain is either 0 or 1*/
1219+ memcpy(qctrl, &mt9v113_autogain_ctrl,
1220+ sizeof(struct v4l2_queryctrl));
1221+ err = 0;
1222+ break;
1223+ default:
1224+ v4l_err(decoder->client,
1225+ "invalid control id %d\n", qctrl->id);
1226+ return err;
1227+ }
1228+
1229+ v4l_dbg(1, debug, decoder->client,
1230+ "Query Control: %s : Min - %d, Max - %d, Def - %d",
1231+ qctrl->name,
1232+ qctrl->minimum,
1233+ qctrl->maximum,
1234+ qctrl->default_value);
1235+
1236+ return err;
1237+}
1238+
1239+/**
1240+ * ioctl_g_ctrl - V4L2 decoder interface handler for VIDIOC_G_CTRL ioctl
1241+ * @s: pointer to standard V4L2 device structure
1242+ * @ctrl: pointer to v4l2_control structure
1243+ *
1244+ * If the requested control is supported, returns the control's current
1245+ * value from the decoder. Otherwise, returns -EINVAL if the control is not
1246+ * supported.
1247+ */
1248+static int
1249+ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *ctrl)
1250+{
1251+ struct mt9v113_decoder *decoder = s->priv;
1252+
1253+ if (ctrl == NULL)
1254+ return -EINVAL;
1255+
1256+ switch (ctrl->id) {
1257+ case V4L2_CID_BRIGHTNESS:
1258+ ctrl->value = mt9v113_reg_list[REG_BRIGHTNESS].val;
1259+ break;
1260+ case V4L2_CID_CONTRAST:
1261+ ctrl->value = mt9v113_reg_list[REG_CONTRAST].val;
1262+ break;
1263+ case V4L2_CID_SATURATION:
1264+ ctrl->value = mt9v113_reg_list[REG_SATURATION].val;
1265+ break;
1266+ case V4L2_CID_HUE:
1267+ ctrl->value = mt9v113_reg_list[REG_HUE].val;
1268+ if (ctrl->value == 0x7F)
1269+ ctrl->value = 180;
1270+ else if (ctrl->value == 0x80)
1271+ ctrl->value = -180;
1272+ else
1273+ ctrl->value = 0;
1274+
1275+ break;
1276+ case V4L2_CID_AUTOGAIN:
1277+ ctrl->value = mt9v113_reg_list[REG_AFE_GAIN_CTRL].val;
1278+ if ((ctrl->value & 0x3) == 3)
1279+ ctrl->value = 1;
1280+ else
1281+ ctrl->value = 0;
1282+
1283+ break;
1284+ default:
1285+ v4l_err(decoder->client,
1286+ "invalid control id %d\n", ctrl->id);
1287+ return -EINVAL;
1288+ }
1289+
1290+ v4l_dbg(1, debug, decoder->client,
1291+ "Get Control: ID - %d - %d",
1292+ ctrl->id, ctrl->value);
1293+ return 0;
1294+}
1295+
1296+/**
1297+ * ioctl_s_ctrl - V4L2 decoder interface handler for VIDIOC_S_CTRL ioctl
1298+ * @s: pointer to standard V4L2 device structure
1299+ * @ctrl: pointer to v4l2_control structure
1300+ *
1301+ * If the requested control is supported, sets the control's current
1302+ * value in HW. Otherwise, returns -EINVAL if the control is not supported.
1303+ */
1304+static int
1305+ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *ctrl)
1306+{
1307+ struct mt9v113_decoder *decoder = s->priv;
1308+ int err = -EINVAL, value;
1309+
1310+ if (ctrl == NULL)
1311+ return err;
1312+
1313+ value = (__s32) ctrl->value;
1314+
1315+ switch (ctrl->id) {
1316+ case V4L2_CID_BRIGHTNESS:
1317+ if (ctrl->value < 0 || ctrl->value > 255) {
1318+ v4l_err(decoder->client,
1319+ "invalid brightness setting %d\n",
1320+ ctrl->value);
1321+ return -ERANGE;
1322+ }
1323+ err = mt9v113_write_reg(decoder->client, REG_BRIGHTNESS,
1324+ value);
1325+ if (err)
1326+ return err;
1327+ mt9v113_reg_list[REG_BRIGHTNESS].val = value;
1328+ break;
1329+ case V4L2_CID_CONTRAST:
1330+ if (ctrl->value < 0 || ctrl->value > 255) {
1331+ v4l_err(decoder->client,
1332+ "invalid contrast setting %d\n",
1333+ ctrl->value);
1334+ return -ERANGE;
1335+ }
1336+ err = mt9v113_write_reg(decoder->client, REG_CONTRAST,
1337+ value);
1338+ if (err)
1339+ return err;
1340+ mt9v113_reg_list[REG_CONTRAST].val = value;
1341+ break;
1342+ case V4L2_CID_SATURATION:
1343+ if (ctrl->value < 0 || ctrl->value > 255) {
1344+ v4l_err(decoder->client,
1345+ "invalid saturation setting %d\n",
1346+ ctrl->value);
1347+ return -ERANGE;
1348+ }
1349+ err = mt9v113_write_reg(decoder->client, REG_SATURATION,
1350+ value);
1351+ if (err)
1352+ return err;
1353+ mt9v113_reg_list[REG_SATURATION].val = value;
1354+ break;
1355+ case V4L2_CID_HUE:
1356+ if (value == 180)
1357+ value = 0x7F;
1358+ else if (value == -180)
1359+ value = 0x80;
1360+ else if (value == 0)
1361+ value = 0;
1362+ else {
1363+ v4l_err(decoder->client,
1364+ "invalid hue setting %d\n",
1365+ ctrl->value);
1366+ return -ERANGE;
1367+ }
1368+ err = mt9v113_write_reg(decoder->client, REG_HUE,
1369+ value);
1370+ if (err)
1371+ return err;
1372+ mt9v113_reg_list[REG_HUE].val = value;
1373+ break;
1374+ case V4L2_CID_AUTOGAIN:
1375+ if (value == 1)
1376+ value = 0x0F;
1377+ else if (value == 0)
1378+ value = 0x0C;
1379+ else {
1380+ v4l_err(decoder->client,
1381+ "invalid auto gain setting %d\n",
1382+ ctrl->value);
1383+ return -ERANGE;
1384+ }
1385+ err = mt9v113_write_reg(decoder->client, REG_AFE_GAIN_CTRL,
1386+ value);
1387+ if (err)
1388+ return err;
1389+ mt9v113_reg_list[REG_AFE_GAIN_CTRL].val = value;
1390+ break;
1391+ default:
1392+ v4l_err(decoder->client,
1393+ "invalid control id %d\n", ctrl->id);
1394+ return err;
1395+ }
1396+
1397+ v4l_dbg(1, debug, decoder->client,
1398+ "Set Control: ID - %d - %d",
1399+ ctrl->id, ctrl->value);
1400+
1401+ return err;
1402+}
1403+
1404+/**
1405+ * ioctl_enum_fmt_cap - Implement the CAPTURE buffer VIDIOC_ENUM_FMT ioctl
1406+ * @s: pointer to standard V4L2 device structure
1407+ * @fmt: standard V4L2 VIDIOC_ENUM_FMT ioctl structure
1408+ *
1409+ * Implement the VIDIOC_ENUM_FMT ioctl to enumerate supported formats
1410+ */
1411+static int
1412+ioctl_enum_fmt_cap(struct v4l2_int_device *s, struct v4l2_fmtdesc *fmt)
1413+{
1414+ struct mt9v113_decoder *decoder = s->priv;
1415+ int index;
1416+
1417+ if (fmt == NULL)
1418+ return -EINVAL;
1419+
1420+ index = fmt->index;
1421+ if ((index >= decoder->num_fmts) || (index < 0))
1422+ return -EINVAL; /* Index out of bound */
1423+
1424+ if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1425+ return -EINVAL; /* only capture is supported */
1426+
1427+ memcpy(fmt, &decoder->fmt_list[index],
1428+ sizeof(struct v4l2_fmtdesc));
1429+
1430+ v4l_dbg(1, debug, decoder->client,
1431+ "Current FMT: index - %d (%s)",
1432+ decoder->fmt_list[index].index,
1433+ decoder->fmt_list[index].description);
1434+ return 0;
1435+}
1436+
1437+/**
1438+ * ioctl_try_fmt_cap - Implement the CAPTURE buffer VIDIOC_TRY_FMT ioctl
1439+ * @s: pointer to standard V4L2 device structure
1440+ * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure
1441+ *
1442+ * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This
1443+ * ioctl is used to negotiate the image capture size and pixel format
1444+ * without actually making it take effect.
1445+ */
1446+static int
1447+ioctl_try_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f)
1448+{
1449+ struct mt9v113_decoder *decoder = s->priv;
1450+ int ifmt;
1451+ struct v4l2_pix_format *pix;
1452+ enum mt9v113_std current_std;
1453+
1454+ if (f == NULL)
1455+ return -EINVAL;
1456+
1457+ if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1458+ f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1459+
1460+ pix = &f->fmt.pix;
1461+
1462+ /* Calculate height and width based on current standard */
1463+ current_std = mt9v113_get_current_std(decoder);
1464+ if (current_std == MT9V113_STD_INVALID)
1465+ return -EINVAL;
1466+
1467+ decoder->current_std = current_std;
1468+ pix->width = decoder->std_list[current_std].width;
1469+ pix->height = decoder->std_list[current_std].height;
1470+
1471+ for (ifmt = 0; ifmt < decoder->num_fmts; ifmt++) {
1472+ if (pix->pixelformat ==
1473+ decoder->fmt_list[ifmt].pixelformat)
1474+ break;
1475+ }
1476+ if (ifmt == decoder->num_fmts)
1477+ ifmt = 0; /* None of the format matched, select default */
1478+ pix->pixelformat = decoder->fmt_list[ifmt].pixelformat;
1479+
1480+ pix->field = V4L2_FIELD_NONE;
1481+ pix->bytesperline = pix->width * 2;
1482+ pix->sizeimage = pix->bytesperline * pix->height;
1483+ pix->colorspace = V4L2_COLORSPACE_SMPTE170M;
1484+ pix->priv = 0;
1485+
1486+ v4l_dbg(1, debug, decoder->client,
1487+ "Try FMT: pixelformat - %s, bytesperline - %d"
1488+ "Width - %d, Height - %d",
1489+ decoder->fmt_list[ifmt].description, pix->bytesperline,
1490+ pix->width, pix->height);
1491+ return 0;
1492+}
1493+
1494+/**
1495+ * ioctl_s_fmt_cap - V4L2 decoder interface handler for VIDIOC_S_FMT ioctl
1496+ * @s: pointer to standard V4L2 device structure
1497+ * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure
1498+ *
1499+ * If the requested format is supported, configures the HW to use that
1500+ * format, returns error code if format not supported or HW can't be
1501+ * correctly configured.
1502+ */
1503+static int
1504+ioctl_s_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f)
1505+{
1506+ struct mt9v113_decoder *decoder = s->priv;
1507+ struct v4l2_pix_format *pix;
1508+ int rval;
1509+
1510+ if (f == NULL)
1511+ return -EINVAL;
1512+
1513+ if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1514+ return -EINVAL; /* only capture is supported */
1515+
1516+ pix = &f->fmt.pix;
1517+ rval = ioctl_try_fmt_cap(s, f);
1518+ if (rval)
1519+ return rval;
1520+
1521+ decoder->pix = *pix;
1522+
1523+ return rval;
1524+}
1525+
1526+/**
1527+ * ioctl_g_fmt_cap - V4L2 decoder interface handler for ioctl_g_fmt_cap
1528+ * @s: pointer to standard V4L2 device structure
1529+ * @f: pointer to standard V4L2 v4l2_format structure
1530+ *
1531+ * Returns the decoder's current pixel format in the v4l2_format
1532+ * parameter.
1533+ */
1534+static int
1535+ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f)
1536+{
1537+ struct mt9v113_decoder *decoder = s->priv;
1538+
1539+ if (f == NULL)
1540+ return -EINVAL;
1541+
1542+ if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1543+ return -EINVAL; /* only capture is supported */
1544+
1545+ f->fmt.pix = decoder->pix;
1546+
1547+ v4l_dbg(1, debug, decoder->client,
1548+ "Current FMT: bytesperline - %d"
1549+ "Width - %d, Height - %d",
1550+ decoder->pix.bytesperline,
1551+ decoder->pix.width, decoder->pix.height);
1552+ return 0;
1553+}
1554+
1555+/**
1556+ * ioctl_g_parm - V4L2 decoder interface handler for VIDIOC_G_PARM ioctl
1557+ * @s: pointer to standard V4L2 device structure
1558+ * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure
1559+ *
1560+ * Returns the decoder's video CAPTURE parameters.
1561+ */
1562+static int
1563+ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a)
1564+{
1565+ struct mt9v113_decoder *decoder = s->priv;
1566+ struct v4l2_captureparm *cparm;
1567+ enum mt9v113_std current_std;
1568+
1569+ if (a == NULL)
1570+ return -EINVAL;
1571+
1572+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1573+ return -EINVAL; /* only capture is supported */
1574+
1575+ memset(a, 0, sizeof(*a));
1576+ a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1577+
1578+ /* get the current standard */
1579+ current_std = mt9v113_get_current_std(decoder);
1580+ if (current_std == MT9V113_STD_INVALID)
1581+ return -EINVAL;
1582+
1583+ decoder->current_std = current_std;
1584+
1585+ cparm = &a->parm.capture;
1586+ cparm->capability = V4L2_CAP_TIMEPERFRAME;
1587+ cparm->timeperframe =
1588+ decoder->std_list[current_std].standard.frameperiod;
1589+
1590+ return 0;
1591+}
1592+
1593+/**
1594+ * ioctl_s_parm - V4L2 decoder interface handler for VIDIOC_S_PARM ioctl
1595+ * @s: pointer to standard V4L2 device structure
1596+ * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure
1597+ *
1598+ * Configures the decoder to use the input parameters, if possible. If
1599+ * not possible, returns the appropriate error code.
1600+ */
1601+static int
1602+ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a)
1603+{
1604+ struct mt9v113_decoder *decoder = s->priv;
1605+ struct v4l2_fract *timeperframe;
1606+ enum mt9v113_std current_std;
1607+
1608+ if (a == NULL)
1609+ return -EINVAL;
1610+
1611+ if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1612+ return -EINVAL; /* only capture is supported */
1613+
1614+ timeperframe = &a->parm.capture.timeperframe;
1615+
1616+ /* get the current standard */
1617+ current_std = mt9v113_get_current_std(decoder);
1618+ if (current_std == MT9V113_STD_INVALID)
1619+ return -EINVAL;
1620+
1621+ decoder->current_std = current_std;
1622+
1623+ *timeperframe =
1624+ decoder->std_list[current_std].standard.frameperiod;
1625+
1626+ return 0;
1627+}
1628+
1629+/**
1630+ * ioctl_g_ifparm - V4L2 decoder interface handler for vidioc_int_g_ifparm_num
1631+ * @s: pointer to standard V4L2 device structure
1632+ * @p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure
1633+ *
1634+ * Gets slave interface parameters.
1635+ * Calculates the required xclk value to support the requested
1636+ * clock parameters in p. This value is returned in the p
1637+ * parameter.
1638+ */
1639+static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)
1640+{
1641+ struct mt9v113_decoder *decoder = s->priv;
1642+ int rval;
1643+
1644+ if (p == NULL)
1645+ return -EINVAL;
1646+
1647+ if (NULL == decoder->pdata->ifparm)
1648+ return -EINVAL;
1649+
1650+ rval = decoder->pdata->ifparm(p);
1651+ if (rval) {
1652+ v4l_err(decoder->client, "g_ifparm.Err[%d]\n", rval);
1653+ return rval;
1654+ }
1655+
1656+ p->u.bt656.clock_curr = 27000000; // TODO: read clock rate from sensor
1657+
1658+ return 0;
1659+}
1660+
1661+/**
1662+ * ioctl_g_priv - V4L2 decoder interface handler for vidioc_int_g_priv_num
1663+ * @s: pointer to standard V4L2 device structure
1664+ * @p: void pointer to hold decoder's private data address
1665+ *
1666+ * Returns device's (decoder's) private data area address in p parameter
1667+ */
1668+static int ioctl_g_priv(struct v4l2_int_device *s, void *p)
1669+{
1670+ struct mt9v113_decoder *decoder = s->priv;
1671+
1672+ if (NULL == decoder->pdata->priv_data_set)
1673+ return -EINVAL;
1674+
1675+ return decoder->pdata->priv_data_set(p);
1676+}
1677+
1678+/**
1679+ * ioctl_s_power - V4L2 decoder interface handler for vidioc_int_s_power_num
1680+ * @s: pointer to standard V4L2 device structure
1681+ * @on: power state to which device is to be set
1682+ *
1683+ * Sets devices power state to requrested state, if possible.
1684+ */
1685+static int ioctl_s_power(struct v4l2_int_device *s, enum v4l2_power on)
1686+{
1687+ struct mt9v113_decoder *decoder = s->priv;
1688+ int err = 0;
1689+
1690+ switch (on) {
1691+ case V4L2_POWER_OFF:
1692+ /* Power Down Sequence */
1693+ err =
1694+ mt9v113_write_reg(decoder->client, REG_OPERATION_MODE,
1695+ 0x01);
1696+ /* Disable mux for mt9v113 data path */
1697+ if (decoder->pdata->power_set)
1698+ err |= decoder->pdata->power_set(s, on);
1699+ decoder->state = STATE_NOT_DETECTED;
1700+ break;
1701+
1702+ case V4L2_POWER_STANDBY:
1703+ if (decoder->pdata->power_set)
1704+ err = decoder->pdata->power_set(s, on);
1705+ break;
1706+
1707+ case V4L2_POWER_ON:
1708+ /* Enable mux for mt9v113 data path */
1709+ if ((decoder->pdata->power_set) &&
1710+ (decoder->state == STATE_NOT_DETECTED)) {
1711+
1712+ err = decoder->pdata->power_set(s, on);
1713+
1714+ /* Detect the sensor is not already detected */
1715+ err |= mt9v113_detect(decoder);
1716+ if (err) {
1717+ v4l_err(decoder->client,
1718+ "Unable to detect decoder\n");
1719+ return err;
1720+ }
1721+ }
1722+ // Only VGA mode for now
1723+ err |= mt9v113_vga_mode(decoder);
1724+ break;
1725+
1726+ default:
1727+ err = -ENODEV;
1728+ break;
1729+ }
1730+
1731+ return err;
1732+}
1733+
1734+/**
1735+ * ioctl_init - V4L2 decoder interface handler for VIDIOC_INT_INIT
1736+ * @s: pointer to standard V4L2 device structure
1737+ *
1738+ * Initialize the decoder device (calls mt9v113_configure())
1739+ */
1740+static int ioctl_init(struct v4l2_int_device *s)
1741+{
1742+// struct mt9v113_decoder *decoder = s->priv;
1743+ int err = 0;
1744+
1745+ /* Set default standard to auto */
1746+ //mt9v113_reg_list[REG_VIDEO_STD].val =
1747+ // VIDEO_STD_AUTO_SWITCH_BIT;
1748+// err |= mt9v113_configure(decoder);
1749+// err |= mt9v113_vga_mode(decoder);
1750+
1751+ return err;
1752+}
1753+
1754+/**
1755+ * ioctl_dev_exit - V4L2 decoder interface handler for vidioc_int_dev_exit_num
1756+ * @s: pointer to standard V4L2 device structure
1757+ *
1758+ * Delinitialise the dev. at slave detach. The complement of ioctl_dev_init.
1759+ */
1760+static int ioctl_dev_exit(struct v4l2_int_device *s)
1761+{
1762+ return 0;
1763+}
1764+
1765+/**
1766+ * ioctl_dev_init - V4L2 decoder interface handler for vidioc_int_dev_init_num
1767+ * @s: pointer to standard V4L2 device structure
1768+ *
1769+ * Initialise the device when slave attaches to the master. Returns 0 if
1770+ * mt9v113 device could be found, otherwise returns appropriate error.
1771+ */
1772+static int ioctl_dev_init(struct v4l2_int_device *s)
1773+{
1774+ struct mt9v113_decoder *decoder = s->priv;
1775+ int err;
1776+
1777+ printk("%s: %d\n", __func__, __LINE__);
1778+ err = mt9v113_detect(decoder);
1779+ if (err < 0) {
1780+ v4l_err(decoder->client,
1781+ "Unable to detect decoder\n");
1782+ return err;
1783+ }
1784+
1785+ v4l_info(decoder->client,
1786+ "chip version 0x%.2x detected\n", decoder->ver);
1787+
1788+ err |= mt9v113_configure(decoder);
1789+ err |= mt9v113_vga_mode(decoder);
1790+
1791+ return 0;
1792+}
1793+
1794+static struct v4l2_int_ioctl_desc mt9v113_ioctl_desc[] = {
1795+ {vidioc_int_dev_init_num, (v4l2_int_ioctl_func*) ioctl_dev_init},
1796+ {vidioc_int_dev_exit_num, (v4l2_int_ioctl_func*) ioctl_dev_exit},
1797+ {vidioc_int_s_power_num, (v4l2_int_ioctl_func*) ioctl_s_power},
1798+ {vidioc_int_g_priv_num, (v4l2_int_ioctl_func*) ioctl_g_priv},
1799+ {vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func*) ioctl_g_ifparm},
1800+ {vidioc_int_init_num, (v4l2_int_ioctl_func*) ioctl_init},
1801+ {vidioc_int_enum_fmt_cap_num,
1802+ (v4l2_int_ioctl_func *) ioctl_enum_fmt_cap},
1803+ {vidioc_int_try_fmt_cap_num,
1804+ (v4l2_int_ioctl_func *) ioctl_try_fmt_cap},
1805+ {vidioc_int_g_fmt_cap_num,
1806+ (v4l2_int_ioctl_func *) ioctl_g_fmt_cap},
1807+ {vidioc_int_s_fmt_cap_num,
1808+ (v4l2_int_ioctl_func *) ioctl_s_fmt_cap},
1809+ {vidioc_int_g_parm_num, (v4l2_int_ioctl_func *) ioctl_g_parm},
1810+ {vidioc_int_s_parm_num, (v4l2_int_ioctl_func *) ioctl_s_parm},
1811+ {vidioc_int_queryctrl_num,
1812+ (v4l2_int_ioctl_func *) ioctl_queryctrl},
1813+ {vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *) ioctl_g_ctrl},
1814+ {vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *) ioctl_s_ctrl},
1815+ {vidioc_int_querystd_num, (v4l2_int_ioctl_func *) ioctl_querystd},
1816+ {vidioc_int_s_std_num, (v4l2_int_ioctl_func *) ioctl_s_std},
1817+ {vidioc_int_s_video_routing_num,
1818+ (v4l2_int_ioctl_func *) ioctl_s_routing},
1819+};
1820+
1821+static struct v4l2_int_slave mt9v113_slave = {
1822+ .ioctls = mt9v113_ioctl_desc,
1823+ .num_ioctls = ARRAY_SIZE(mt9v113_ioctl_desc),
1824+};
1825+
1826+static struct mt9v113_decoder mt9v113_dev = {
1827+ .state = STATE_NOT_DETECTED,
1828+
1829+ .fmt_list = mt9v113_fmt_list,
1830+ .num_fmts = ARRAY_SIZE(mt9v113_fmt_list),
1831+
1832+ .pix = { /* Default to 8-bit YUV 422 */
1833+ .width = VGA_NUM_ACTIVE_PIXELS,
1834+ .height = VGA_NUM_ACTIVE_LINES,
1835+ .pixelformat = V4L2_PIX_FMT_UYVY,
1836+ .field = V4L2_FIELD_NONE,
1837+ .bytesperline = VGA_NUM_ACTIVE_PIXELS * 2,
1838+ .sizeimage =
1839+ VGA_NUM_ACTIVE_PIXELS * 2 * VGA_NUM_ACTIVE_LINES,
1840+ .colorspace = V4L2_COLORSPACE_SMPTE170M,
1841+ },
1842+
1843+ .current_std = MT9V113_STD_VGA,
1844+ .std_list = mt9v113_std_list,
1845+ .num_stds = ARRAY_SIZE(mt9v113_std_list),
1846+
1847+};
1848+
1849+static struct v4l2_int_device mt9v113_int_device = {
1850+ .module = THIS_MODULE,
1851+ .name = MT9V113_MODULE_NAME,
1852+ .priv = &mt9v113_dev,
1853+ .type = v4l2_int_type_slave,
1854+ .u = {
1855+ .slave = &mt9v113_slave,
1856+ },
1857+};
1858+
1859+/**
1860+ * mt9v113_probe - decoder driver i2c probe handler
1861+ * @client: i2c driver client device structure
1862+ *
1863+ * Register decoder as an i2c client device and V4L2
1864+ * device.
1865+ */
1866+static int
1867+mt9v113_probe(struct i2c_client *client, const struct i2c_device_id *id)
1868+{
1869+ struct mt9v113_decoder *decoder = &mt9v113_dev;
1870+ int err;
1871+
1872+ printk("%s: %d\n", __func__, __LINE__);
1873+ /* Check if the adapter supports the needed features */
1874+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1875+ return -EIO;
1876+
1877+ printk("%s: %d\n", __func__, __LINE__);
1878+ decoder->pdata = client->dev.platform_data;
1879+ if (!decoder->pdata) {
1880+ v4l_err(client, "No platform data!!\n");
1881+ return -ENODEV;
1882+ }
1883+ printk("%s: %d\n", __func__, __LINE__);
1884+ /*
1885+ * Fetch platform specific data, and configure the
1886+ * mt9v113_reg_list[] accordingly. Since this is one
1887+ * time configuration, no need to preserve.
1888+ */
1889+
1890+ /*mt9v113_reg_list[REG_OUTPUT_FORMATTER2].val |=
1891+ (decoder->pdata->clk_polarity << 1);
1892+ mt9v113_reg_list[REG_SYNC_CONTROL].val |=
1893+ ((decoder->pdata->hs_polarity << 2) |
1894+ (decoder->pdata->vs_polarity << 3));
1895+ */
1896+ /*
1897+ * Save the id data, required for power up sequence
1898+ */
1899+ decoder->id = (struct i2c_device_id *)id;
1900+ /* Attach to Master */
1901+ strcpy(mt9v113_int_device.u.slave->attach_to, decoder->pdata->master);
1902+ decoder->v4l2_int_device = &mt9v113_int_device;
1903+ decoder->client = client;
1904+ i2c_set_clientdata(client, decoder);
1905+
1906+ /* Register with V4L2 layer as slave device */
1907+ err = v4l2_int_device_register(decoder->v4l2_int_device);
1908+ if (err) {
1909+ i2c_set_clientdata(client, NULL);
1910+ v4l_err(client,
1911+ "Unable to register to v4l2. Err[%d]\n", err);
1912+
1913+ } else
1914+ v4l_info(client, "Registered to v4l2 master %s!!\n",
1915+ decoder->pdata->master);
1916+
1917+ return 0;
1918+}
1919+
1920+/**
1921+ * mt9v113_remove - decoder driver i2c remove handler
1922+ * @client: i2c driver client device structure
1923+ *
1924+ * Unregister decoder as an i2c client device and V4L2
1925+ * device. Complement of mt9v113_probe().
1926+ */
1927+static int __exit mt9v113_remove(struct i2c_client *client)
1928+{
1929+ struct mt9v113_decoder *decoder = i2c_get_clientdata(client);
1930+
1931+ if (!client->adapter)
1932+ return -ENODEV; /* our client isn't attached */
1933+
1934+ v4l2_int_device_unregister(decoder->v4l2_int_device);
1935+ i2c_set_clientdata(client, NULL);
1936+
1937+ return 0;
1938+}
1939+/*
1940+ * mt9v113 Init/Power on Sequence
1941+ */
1942+static const struct mt9v113_reg mt9v113m_init_reg_seq[] = {
1943+ {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1944+ {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1945+};
1946+static const struct mt9v113_init_seq mt9v113m_init = {
1947+ .no_regs = ARRAY_SIZE(mt9v113m_init_reg_seq),
1948+ .init_reg_seq = mt9v113m_init_reg_seq,
1949+};
1950+/*
1951+ * I2C Device Table -
1952+ *
1953+ * name - Name of the actual device/chip.
1954+ * driver_data - Driver data
1955+ */
1956+static const struct i2c_device_id mt9v113_id[] = {
1957+ {"mt9v113", (unsigned long)&mt9v113m_init},
1958+ {},
1959+};
1960+
1961+MODULE_DEVICE_TABLE(i2c, mt9v113_id);
1962+
1963+static struct i2c_driver mt9v113_i2c_driver = {
1964+ .driver = {
1965+ .name = MT9V113_MODULE_NAME,
1966+ .owner = THIS_MODULE,
1967+ },
1968+ .probe = mt9v113_probe,
1969+ .remove = __exit_p(mt9v113_remove),
1970+ .id_table = mt9v113_id,
1971+};
1972+
1973+/**
1974+ * mt9v113_init
1975+ *
1976+ * Module init function
1977+ */
1978+static int __init mt9v113_init(void)
1979+{
1980+ return i2c_add_driver(&mt9v113_i2c_driver);
1981+}
1982+
1983+/**
1984+ * mt9v113_cleanup
1985+ *
1986+ * Module exit function
1987+ */
1988+static void __exit mt9v113_cleanup(void)
1989+{
1990+ i2c_del_driver(&mt9v113_i2c_driver);
1991+}
1992+
1993+module_init(mt9v113_init);
1994+module_exit(mt9v113_cleanup);
1995+
1996+MODULE_AUTHOR("Texas Instruments");
1997+MODULE_DESCRIPTION("MT9V113 linux decoder driver");
1998+MODULE_LICENSE("GPL");
1999diff --git a/drivers/media/video/mt9v113_regs.h b/drivers/media/video/mt9v113_regs.h
2000new file mode 100644
2001index 0000000..64b065f
2002--- /dev/null
2003+++ b/drivers/media/video/mt9v113_regs.h
2004@@ -0,0 +1,294 @@
2005+/*
2006+ * drivers/media/video/mt9v113_regs.h
2007+ *
2008+ * Copyright (C) 2008 Texas Instruments Inc
2009+ * Author: Vaibhav Hiremath <hvaibhav@ti.com>
2010+ *
2011+ * Contributors:
2012+ * Sivaraj R <sivaraj@ti.com>
2013+ * Brijesh R Jadav <brijesh.j@ti.com>
2014+ * Hardik Shah <hardik.shah@ti.com>
2015+ * Manjunath Hadli <mrh@ti.com>
2016+ * Karicheri Muralidharan <m-karicheri2@ti.com>
2017+ *
2018+ * This package is free software; you can redistribute it and/or modify
2019+ * it under the terms of the GNU General Public License version 2 as
2020+ * published by the Free Software Foundation.
2021+ *
2022+ * This program is distributed in the hope that it will be useful,
2023+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
2024+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2025+ * GNU General Public License for more details.
2026+ *
2027+ * You should have received a copy of the GNU General Public License
2028+ * along with this program; if not, write to the Free Software
2029+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
2030+ *
2031+ */
2032+
2033+#ifndef _MT9V113_REGS_H
2034+#define _MT9V113_REGS_H
2035+
2036+/*
2037+ * MT9V113 registers
2038+ */
2039+#define REG_CHIP_ID (0x00)
2040+
2041+/*
2042+ * MT9V113 registers
2043+ */
2044+#define REG_INPUT_SEL (0x00)
2045+#define REG_AFE_GAIN_CTRL (0x01)
2046+#define REG_VIDEO_STD (0x02)
2047+#define REG_OPERATION_MODE (0x03)
2048+#define REG_AUTOSWITCH_MASK (0x04)
2049+
2050+#define REG_COLOR_KILLER (0x05)
2051+#define REG_LUMA_CONTROL1 (0x06)
2052+#define REG_LUMA_CONTROL2 (0x07)
2053+#define REG_LUMA_CONTROL3 (0x08)
2054+
2055+#define REG_BRIGHTNESS (0x09)
2056+#define REG_CONTRAST (0x0A)
2057+#define REG_SATURATION (0x0B)
2058+#define REG_HUE (0x0C)
2059+
2060+#define REG_CHROMA_CONTROL1 (0x0D)
2061+#define REG_CHROMA_CONTROL2 (0x0E)
2062+
2063+/* 0x0F Reserved */
2064+
2065+#define REG_COMP_PR_SATURATION (0x10)
2066+#define REG_COMP_Y_CONTRAST (0x11)
2067+#define REG_COMP_PB_SATURATION (0x12)
2068+
2069+/* 0x13 Reserved */
2070+
2071+#define REG_COMP_Y_BRIGHTNESS (0x14)
2072+
2073+/* 0x15 Reserved */
2074+
2075+#define REG_AVID_START_PIXEL_LSB (0x16)
2076+#define REG_AVID_START_PIXEL_MSB (0x17)
2077+#define REG_AVID_STOP_PIXEL_LSB (0x18)
2078+#define REG_AVID_STOP_PIXEL_MSB (0x19)
2079+
2080+#define REG_HSYNC_START_PIXEL_LSB (0x1A)
2081+#define REG_HSYNC_START_PIXEL_MSB (0x1B)
2082+#define REG_HSYNC_STOP_PIXEL_LSB (0x1C)
2083+#define REG_HSYNC_STOP_PIXEL_MSB (0x1D)
2084+
2085+#define REG_VSYNC_START_LINE_LSB (0x1E)
2086+#define REG_VSYNC_START_LINE_MSB (0x1F)
2087+#define REG_VSYNC_STOP_LINE_LSB (0x20)
2088+#define REG_VSYNC_STOP_LINE_MSB (0x21)
2089+
2090+#define REG_VBLK_START_LINE_LSB (0x22)
2091+#define REG_VBLK_START_LINE_MSB (0x23)
2092+#define REG_VBLK_STOP_LINE_LSB (0x24)
2093+#define REG_VBLK_STOP_LINE_MSB (0x25)
2094+
2095+/* 0x26 - 0x27 Reserved */
2096+
2097+#define REG_FAST_SWTICH_CONTROL (0x28)
2098+
2099+/* 0x29 Reserved */
2100+
2101+#define REG_FAST_SWTICH_SCART_DELAY (0x2A)
2102+
2103+/* 0x2B Reserved */
2104+
2105+#define REG_SCART_DELAY (0x2C)
2106+#define REG_CTI_DELAY (0x2D)
2107+#define REG_CTI_CONTROL (0x2E)
2108+
2109+/* 0x2F - 0x31 Reserved */
2110+
2111+#define REG_SYNC_CONTROL (0x32)
2112+#define REG_OUTPUT_FORMATTER1 (0x33)
2113+#define REG_OUTPUT_FORMATTER2 (0x34)
2114+#define REG_OUTPUT_FORMATTER3 (0x35)
2115+#define REG_OUTPUT_FORMATTER4 (0x36)
2116+#define REG_OUTPUT_FORMATTER5 (0x37)
2117+#define REG_OUTPUT_FORMATTER6 (0x38)
2118+#define REG_CLEAR_LOST_LOCK (0x39)
2119+
2120+#define REG_STATUS1 (0x3A)
2121+#define REG_STATUS2 (0x3B)
2122+
2123+#define REG_AGC_GAIN_STATUS_LSB (0x3C)
2124+#define REG_AGC_GAIN_STATUS_MSB (0x3D)
2125+
2126+/* 0x3E Reserved */
2127+
2128+#define REG_VIDEO_STD_STATUS (0x3F)
2129+#define REG_GPIO_INPUT1 (0x40)
2130+#define REG_GPIO_INPUT2 (0x41)
2131+
2132+/* 0x42 - 0x45 Reserved */
2133+
2134+#define REG_AFE_COARSE_GAIN_CH1 (0x46)
2135+#define REG_AFE_COARSE_GAIN_CH2 (0x47)
2136+#define REG_AFE_COARSE_GAIN_CH3 (0x48)
2137+#define REG_AFE_COARSE_GAIN_CH4 (0x49)
2138+
2139+#define REG_AFE_FINE_GAIN_PB_B_LSB (0x4A)
2140+#define REG_AFE_FINE_GAIN_PB_B_MSB (0x4B)
2141+#define REG_AFE_FINE_GAIN_Y_G_CHROMA_LSB (0x4C)
2142+#define REG_AFE_FINE_GAIN_Y_G_CHROMA_MSB (0x4D)
2143+#define REG_AFE_FINE_GAIN_PR_R_LSB (0x4E)
2144+#define REG_AFE_FINE_GAIN_PR_R_MSB (0x4F)
2145+#define REG_AFE_FINE_GAIN_CVBS_LUMA_LSB (0x50)
2146+#define REG_AFE_FINE_GAIN_CVBS_LUMA_MSB (0x51)
2147+
2148+/* 0x52 - 0x68 Reserved */
2149+
2150+#define REG_FBIT_VBIT_CONTROL1 (0x69)
2151+
2152+/* 0x6A - 0x6B Reserved */
2153+
2154+#define REG_BACKEND_AGC_CONTROL (0x6C)
2155+
2156+/* 0x6D - 0x6E Reserved */
2157+
2158+#define REG_AGC_DECREMENT_SPEED_CONTROL (0x6F)
2159+#define REG_ROM_VERSION (0x70)
2160+
2161+/* 0x71 - 0x73 Reserved */
2162+
2163+#define REG_AGC_WHITE_PEAK_PROCESSING (0x74)
2164+#define REG_FBIT_VBIT_CONTROL2 (0x75)
2165+#define REG_VCR_TRICK_MODE_CONTROL (0x76)
2166+#define REG_HORIZONTAL_SHAKE_INCREMENT (0x77)
2167+#define REG_AGC_INCREMENT_SPEED (0x78)
2168+#define REG_AGC_INCREMENT_DELAY (0x79)
2169+
2170+/* 0x7A - 0x7F Reserved */
2171+
2172+#define REG_CHIP_ID_MSB (0x80)
2173+#define REG_CHIP_ID_LSB (0x81)
2174+
2175+/* 0x82 Reserved */
2176+
2177+#define REG_CPLL_SPEED_CONTROL (0x83)
2178+
2179+/* 0x84 - 0x96 Reserved */
2180+
2181+#define REG_STATUS_REQUEST (0x97)
2182+
2183+/* 0x98 - 0x99 Reserved */
2184+
2185+#define REG_VERTICAL_LINE_COUNT_LSB (0x9A)
2186+#define REG_VERTICAL_LINE_COUNT_MSB (0x9B)
2187+
2188+/* 0x9C - 0x9D Reserved */
2189+
2190+#define REG_AGC_DECREMENT_DELAY (0x9E)
2191+
2192+/* 0x9F - 0xB0 Reserved */
2193+
2194+#define REG_VDP_TTX_FILTER_1_MASK1 (0xB1)
2195+#define REG_VDP_TTX_FILTER_1_MASK2 (0xB2)
2196+#define REG_VDP_TTX_FILTER_1_MASK3 (0xB3)
2197+#define REG_VDP_TTX_FILTER_1_MASK4 (0xB4)
2198+#define REG_VDP_TTX_FILTER_1_MASK5 (0xB5)
2199+#define REG_VDP_TTX_FILTER_2_MASK1 (0xB6)
2200+#define REG_VDP_TTX_FILTER_2_MASK2 (0xB7)
2201+#define REG_VDP_TTX_FILTER_2_MASK3 (0xB8)
2202+#define REG_VDP_TTX_FILTER_2_MASK4 (0xB9)
2203+#define REG_VDP_TTX_FILTER_2_MASK5 (0xBA)
2204+#define REG_VDP_TTX_FILTER_CONTROL (0xBB)
2205+#define REG_VDP_FIFO_WORD_COUNT (0xBC)
2206+#define REG_VDP_FIFO_INTERRUPT_THRLD (0xBD)
2207+
2208+/* 0xBE Reserved */
2209+
2210+#define REG_VDP_FIFO_RESET (0xBF)
2211+#define REG_VDP_FIFO_OUTPUT_CONTROL (0xC0)
2212+#define REG_VDP_LINE_NUMBER_INTERRUPT (0xC1)
2213+#define REG_VDP_PIXEL_ALIGNMENT_LSB (0xC2)
2214+#define REG_VDP_PIXEL_ALIGNMENT_MSB (0xC3)
2215+
2216+/* 0xC4 - 0xD5 Reserved */
2217+
2218+#define REG_VDP_LINE_START (0xD6)
2219+#define REG_VDP_LINE_STOP (0xD7)
2220+#define REG_VDP_GLOBAL_LINE_MODE (0xD8)
2221+#define REG_VDP_FULL_FIELD_ENABLE (0xD9)
2222+#define REG_VDP_FULL_FIELD_MODE (0xDA)
2223+
2224+/* 0xDB - 0xDF Reserved */
2225+
2226+#define REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR (0xE0)
2227+#define REG_VBUS_DATA_ACCESS_VBUS_ADDR_INCR (0xE1)
2228+#define REG_FIFO_READ_DATA (0xE2)
2229+
2230+/* 0xE3 - 0xE7 Reserved */
2231+
2232+#define REG_VBUS_ADDRESS_ACCESS1 (0xE8)
2233+#define REG_VBUS_ADDRESS_ACCESS2 (0xE9)
2234+#define REG_VBUS_ADDRESS_ACCESS3 (0xEA)
2235+
2236+/* 0xEB - 0xEF Reserved */
2237+
2238+#define REG_INTERRUPT_RAW_STATUS0 (0xF0)
2239+#define REG_INTERRUPT_RAW_STATUS1 (0xF1)
2240+#define REG_INTERRUPT_STATUS0 (0xF2)
2241+#define REG_INTERRUPT_STATUS1 (0xF3)
2242+#define REG_INTERRUPT_MASK0 (0xF4)
2243+#define REG_INTERRUPT_MASK1 (0xF5)
2244+#define REG_INTERRUPT_CLEAR0 (0xF6)
2245+#define REG_INTERRUPT_CLEAR1 (0xF7)
2246+
2247+/* 0xF8 - 0xFF Reserved */
2248+
2249+/* The ID values we are looking for */
2250+#define MT9V113_CHIP_ID_MSB (0x51)
2251+
2252+#define MT9V113_IMAGE_STD_VGA (0x01)
2253+#define MT9V113_IMAGE_STD_QVGA (0x02)
2254+#define MT9V113_IMAGE_STD_INVALID (0xFF)
2255+
2256+/*
2257+ * Status bit
2258+ */
2259+#define STATUS_TV_VCR_BIT (1<<0)
2260+#define STATUS_HORZ_SYNC_LOCK_BIT (1<<1)
2261+#define STATUS_VIRT_SYNC_LOCK_BIT (1<<2)
2262+#define STATUS_CLR_SUBCAR_LOCK_BIT (1<<3)
2263+#define STATUS_LOST_LOCK_DETECT_BIT (1<<4)
2264+#define STATUS_FEILD_RATE_BIT (1<<5)
2265+#define STATUS_LINE_ALTERNATING_BIT (1<<6)
2266+#define STATUS_PEAK_WHITE_DETECT_BIT (1<<7)
2267+
2268+/* Tokens for register write */
2269+#define TOK_WRITE (0) /* token for write operation */
2270+#define TOK_TERM (1) /* terminating token */
2271+#define TOK_DELAY (2) /* delay token for reg list */
2272+#define TOK_SKIP (3) /* token to skip a register */
2273+/**
2274+ * struct mt9v113_reg - Structure for TVP5146/47 register initialization values
2275+ * @token - Token: TOK_WRITE, TOK_TERM etc..
2276+ * @reg - Register offset
2277+ * @val - Register Value for TOK_WRITE or delay in ms for TOK_DELAY
2278+ */
2279+struct mt9v113_reg {
2280+ unsigned short token;
2281+ unsigned short reg;
2282+ unsigned short val;
2283+};
2284+
2285+/**
2286+ * struct mt9v113_init_seq - Structure for TVP5146/47/46M2/47M1 power up
2287+ * Sequence.
2288+ * @ no_regs - Number of registers to write for power up sequence.
2289+ * @ init_reg_seq - Array of registers and respective value to write.
2290+ */
2291+struct mt9v113_init_seq {
2292+ unsigned int no_regs;
2293+ const struct mt9v113_reg *init_reg_seq;
2294+};
2295+
2296+#define MT9V113_CHIP_ID (0x2280)
2297+
2298+#endif /* ifndef _MT9V113_REGS_H */
2299diff --git a/include/media/mt9v113.h b/include/media/mt9v113.h
2300new file mode 100644
2301index 0000000..c7ad362
2302--- /dev/null
2303+++ b/include/media/mt9v113.h
2304@@ -0,0 +1,83 @@
2305+/*
2306+ * drivers/media/video/mt9v113.h
2307+ *
2308+ * Copyright (C) 2008 Texas Instruments Inc
2309+ * Author: Vaibhav Hiremath <hvaibhav@ti.com>
2310+ *
2311+ * Contributors:
2312+ * Sivaraj R <sivaraj@ti.com>
2313+ * Brijesh R Jadav <brijesh.j@ti.com>
2314+ * Hardik Shah <hardik.shah@ti.com>
2315+ * Manjunath Hadli <mrh@ti.com>
2316+ * Karicheri Muralidharan <m-karicheri2@ti.com>
2317+ *
2318+ * This package is free software; you can redistribute it and/or modify
2319+ * it under the terms of the GNU General Public License version 2 as
2320+ * published by the Free Software Foundation.
2321+ *
2322+ * This program is distributed in the hope that it will be useful,
2323+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
2324+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2325+ * GNU General Public License for more details.
2326+ *
2327+ * You should have received a copy of the GNU General Public License
2328+ * along with this program; if not, write to the Free Software
2329+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
2330+ *
2331+ */
2332+
2333+#ifndef _MT9V113_H
2334+#define _MT9V113_H
2335+
2336+/*
2337+ * Other macros
2338+ */
2339+#define MT9V113_MODULE_NAME "mt9v113"
2340+
2341+/* Number of pixels and number of lines per frame for different standards */
2342+#define VGA_NUM_ACTIVE_PIXELS (640*2)
2343+#define VGA_NUM_ACTIVE_LINES (480)
2344+#define QVGA_NUM_ACTIVE_PIXELS (320*2)
2345+#define QVGA_NUM_ACTIVE_LINES (240)
2346+
2347+/**
2348+ * struct mt9v113_platform_data - Platform data values and access functions.
2349+ * @power_set: Power state access function, zero is off, non-zero is on.
2350+ * @ifparm: Interface parameters access function.
2351+ * @priv_data_set: Device private data (pointer) access function.
2352+ * @clk_polarity: Clock polarity of the current interface.
2353+ * @ hs_polarity: HSYNC Polarity configuration for current interface.
2354+ * @ vs_polarity: VSYNC Polarity configuration for current interface.
2355+ */
2356+struct mt9v113_platform_data {
2357+ char *master;
2358+ int (*power_set) (struct v4l2_int_device *s, enum v4l2_power on);
2359+ int (*ifparm) (struct v4l2_ifparm *p);
2360+ int (*priv_data_set) (void *);
2361+ /* Interface control params */
2362+ bool clk_polarity;
2363+ bool hs_polarity;
2364+ bool vs_polarity;
2365+};
2366+
2367+// new
2368+
2369+/*i2c adress for MT9V113*/
2370+#define MT9V113_I2C_ADDR (0x78 >>1)
2371+
2372+#define I2C_ONE_BYTE_TRANSFER (1)
2373+#define I2C_TWO_BYTE_TRANSFER (2)
2374+#define I2C_THREE_BYTE_TRANSFER (3)
2375+#define I2C_FOUR_BYTE_TRANSFER (4)
2376+#define I2C_TXRX_DATA_MASK (0x00FF)
2377+#define I2C_TXRX_DATA_MASK_UPPER (0xFF00)
2378+#define I2C_TXRX_DATA_SHIFT (8)
2379+
2380+#define MT9V113_VGA_30FPS (1130)
2381+#define MT9V113_QVGA_30FPS (1131)
2382+
2383+#define MT9V113_CLK_MAX (54000000) /* 54MHz */
2384+#define MT9V113_CLK_MIN (6000000) /* 6Mhz */
2385+
2386+#endif /* ifndef _MT9V113_H */
2387+
2388diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h
2389index ce415ec..7827575 100644
2390--- a/include/media/v4l2-int-device.h
2391+++ b/include/media/v4l2-int-device.h
2392@@ -115,6 +115,7 @@ enum v4l2_if_type {
2393 V4L2_IF_TYPE_BT656,
2394 V4L2_IF_TYPE_YCbCr,
2395 V4L2_IF_TYPE_RAW,
2396+ V4L2_IF_TYPE_PARALLEL,
2397 };
2398
2399 enum v4l2_if_type_bt656_mode {
2400@@ -215,12 +216,38 @@ struct v4l2_if_type_raw {
2401 u32 clock_curr;
2402 };
2403
2404+struct v4l2_if_type_parallel {
2405+ /*
2406+ * 0: Frame begins when vsync is high.
2407+ * 1: Frame begins when vsync changes from low to high.
2408+ */
2409+ unsigned frame_start_on_rising_vs:1;
2410+ /* Swap every two adjacent image data elements. */
2411+ unsigned swap:1;
2412+ /* Inverted latch clock polarity from slave. */
2413+ unsigned latch_clk_inv:1;
2414+ /* Hs polarity. 0 is active high, 1 active low. */
2415+ unsigned no_hs_inv:1;
2416+ /* Vs polarity. 0 is active high, 1 active low. */
2417+ unsigned no_vs_inv:1;
2418+ /* Minimum accepted bus clock for slave (in Hz). */
2419+ u32 clock_min;
2420+ /* Maximum accepted bus clock for slave. */
2421+ u32 clock_max;
2422+ /*
2423+ * Current wish of the slave. May only change in response to
2424+ * ioctls that affect image capture.
2425+ */
2426+ u32 clock_curr;
2427+};
2428+
2429 struct v4l2_ifparm {
2430 enum v4l2_if_type if_type;
2431 union {
2432 struct v4l2_if_type_bt656 bt656;
2433 struct v4l2_if_type_ycbcr ycbcr;
2434 struct v4l2_if_type_raw raw;
2435+ struct v4l2_if_type_parallel parallel;
2436 } u;
2437 };
2438
2439--
24401.6.6.1
2441
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-05-23 23:01:02 +0000