diff options
Diffstat (limited to 'extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch')
| -rw-r--r-- | extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch new file mode 100644 index 00000000..5cecd3fa --- /dev/null +++ b/extras/recipes-kernel/linux/linux-omap-psp-2.6.32/0040-ARM-Add-option-to-allow-userspace-access-to-performa.patch | |||
| @@ -0,0 +1,49 @@ | |||
| 1 | From dd1e35157bfd32303aaf87b1ec3f85d8dd1c0014 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mans Rullgard <mans@mansr.com> | ||
| 3 | Date: Tue, 10 Nov 2009 00:52:56 +0000 | ||
| 4 | Subject: [PATCH 40/45] ARM: Add option to allow userspace access to performance counters | ||
| 5 | |||
| 6 | This adds an option to allow userspace access to the performance monitor | ||
| 7 | registers of the Cortex-A8. | ||
| 8 | |||
| 9 | Signed-off-by: Mans Rullgard <mans@mansr.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mm/Kconfig | 7 +++++++ | ||
| 12 | arch/arm/mm/proc-v7.S | 6 ++++++ | ||
| 13 | 2 files changed, 13 insertions(+), 0 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig | ||
| 16 | index 564ff7d..fda2e68 100644 | ||
| 17 | --- a/arch/arm/mm/Kconfig | ||
| 18 | +++ b/arch/arm/mm/Kconfig | ||
| 19 | @@ -793,3 +793,10 @@ config USER_L2_PLE | ||
| 20 | help | ||
| 21 | Enable userspace access to the L2 preload engine (PLE) available | ||
| 22 | in Cortex-A series ARM processors. | ||
| 23 | + | ||
| 24 | +config USER_PMON | ||
| 25 | + bool "Enable userspace access to performance counters" | ||
| 26 | + depends on CPU_V7 | ||
| 27 | + default n | ||
| 28 | + help | ||
| 29 | + Enable userpsace access to the performance monitor registers. | ||
| 30 | diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S | ||
| 31 | index 3a28521..fec926a 100644 | ||
| 32 | --- a/arch/arm/mm/proc-v7.S | ||
| 33 | +++ b/arch/arm/mm/proc-v7.S | ||
| 34 | @@ -270,6 +270,12 @@ __v7_setup: | ||
| 35 | mcr p15, 0, r5, c10, c2, 0 @ write PRRR | ||
| 36 | mcr p15, 0, r6, c10, c2, 1 @ write NMRR | ||
| 37 | #endif | ||
| 38 | + | ||
| 39 | +#ifdef CONFIG_USER_PMON | ||
| 40 | + mov r0, #1 | ||
| 41 | + mcr p15, 0, r0, c9, c14, 0 | ||
| 42 | +#endif | ||
| 43 | + | ||
| 44 | adr r5, v7_crval | ||
| 45 | ldmia r5, {r5, r6} | ||
| 46 | #ifdef CONFIG_CPU_ENDIAN_BE8 | ||
| 47 | -- | ||
| 48 | 1.6.6.1 | ||
| 49 | |||