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-rw-r--r--toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106877.patch239
1 files changed, 239 insertions, 0 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106877.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106877.patch
new file mode 100644
index 000000000..b83b957c6
--- /dev/null
+++ b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106877.patch
@@ -0,0 +1,239 @@
12012-03-06 Ulrich Weigand <ulrich.weigand@linaro.org>
2
3 Backport from mainline:
4
5 gcc/
6 * config/arm/arm.c (arm_sat_operator_match): New function.
7 * config/arm/arm-protos.h (arm_sat_operator_match): Add prototype.
8 * config/arm/arm.md ("insn" attribute): Add "sat" value.
9 ("SAT", "SATrev"): New code iterators.
10 ("SATlo", "SAThi"): New code iterator attributes.
11 ("*satsi_<SAT:code>"): New pattern.
12 ("*satsi_<SAT:code>_shift"): Likewise.
13 * config/arm/predicates.md (sat_shift_operator): New.
14
15 gcc/testsuite/
16 * gcc.target/arm/sat-1.c: New test.
17
18=== modified file 'gcc/config/arm/arm-protos.h'
19--- old/gcc/config/arm/arm-protos.h 2012-02-22 13:31:54 +0000
20+++ new/gcc/config/arm/arm-protos.h 2012-02-29 14:29:56 +0000
21@@ -104,6 +104,7 @@
22 extern int symbol_mentioned_p (rtx);
23 extern int label_mentioned_p (rtx);
24 extern RTX_CODE minmax_code (rtx);
25+extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
26 extern int adjacent_mem_locations (rtx, rtx);
27 extern bool gen_ldm_seq (rtx *, int, bool);
28 extern bool gen_stm_seq (rtx *, int);
29
30=== modified file 'gcc/config/arm/arm.c'
31--- old/gcc/config/arm/arm.c 2012-03-06 11:01:55 +0000
32+++ new/gcc/config/arm/arm.c 2012-03-06 13:24:25 +0000
33@@ -9978,6 +9978,42 @@
34 }
35 }
36
37+/* Match pair of min/max operators that can be implemented via usat/ssat. */
38+
39+bool
40+arm_sat_operator_match (rtx lo_bound, rtx hi_bound,
41+ int *mask, bool *signed_sat)
42+{
43+ /* The high bound must be a power of two minus one. */
44+ int log = exact_log2 (INTVAL (hi_bound) + 1);
45+ if (log == -1)
46+ return false;
47+
48+ /* The low bound is either zero (for usat) or one less than the
49+ negation of the high bound (for ssat). */
50+ if (INTVAL (lo_bound) == 0)
51+ {
52+ if (mask)
53+ *mask = log;
54+ if (signed_sat)
55+ *signed_sat = false;
56+
57+ return true;
58+ }
59+
60+ if (INTVAL (lo_bound) == -INTVAL (hi_bound) - 1)
61+ {
62+ if (mask)
63+ *mask = log + 1;
64+ if (signed_sat)
65+ *signed_sat = true;
66+
67+ return true;
68+ }
69+
70+ return false;
71+}
72+
73 /* Return 1 if memory locations are adjacent. */
74 int
75 adjacent_mem_locations (rtx a, rtx b)
76
77=== modified file 'gcc/config/arm/arm.md'
78--- old/gcc/config/arm/arm.md 2012-03-02 13:53:14 +0000
79+++ new/gcc/config/arm/arm.md 2012-03-06 13:24:25 +0000
80@@ -286,7 +286,7 @@
81 ;; scheduling information.
82
83 (define_attr "insn"
84- "mov,mvn,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,other"
85+ "mov,mvn,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,sat,other"
86 (const_string "other"))
87
88 ; TYPE attribute is used to detect floating point instructions which, if
89@@ -3424,6 +3424,60 @@
90 (const_int 12)))]
91 )
92
93+(define_code_iterator SAT [smin smax])
94+(define_code_iterator SATrev [smin smax])
95+(define_code_attr SATlo [(smin "1") (smax "2")])
96+(define_code_attr SAThi [(smin "2") (smax "1")])
97+
98+(define_insn "*satsi_<SAT:code>"
99+ [(set (match_operand:SI 0 "s_register_operand" "=r")
100+ (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r")
101+ (match_operand:SI 1 "const_int_operand" "i"))
102+ (match_operand:SI 2 "const_int_operand" "i")))]
103+ "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
104+ && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
105+{
106+ int mask;
107+ bool signed_sat;
108+ if (!arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>],
109+ &mask, &signed_sat))
110+ gcc_unreachable ();
111+
112+ operands[1] = GEN_INT (mask);
113+ if (signed_sat)
114+ return "ssat%?\t%0, %1, %3";
115+ else
116+ return "usat%?\t%0, %1, %3";
117+}
118+ [(set_attr "predicable" "yes")
119+ (set_attr "insn" "sat")])
120+
121+(define_insn "*satsi_<SAT:code>_shift"
122+ [(set (match_operand:SI 0 "s_register_operand" "=r")
123+ (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator"
124+ [(match_operand:SI 4 "s_register_operand" "r")
125+ (match_operand:SI 5 "const_int_operand" "i")])
126+ (match_operand:SI 1 "const_int_operand" "i"))
127+ (match_operand:SI 2 "const_int_operand" "i")))]
128+ "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
129+ && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
130+{
131+ int mask;
132+ bool signed_sat;
133+ if (!arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>],
134+ &mask, &signed_sat))
135+ gcc_unreachable ();
136+
137+ operands[1] = GEN_INT (mask);
138+ if (signed_sat)
139+ return "ssat%?\t%0, %1, %4%S3";
140+ else
141+ return "usat%?\t%0, %1, %4%S3";
142+}
143+ [(set_attr "predicable" "yes")
144+ (set_attr "insn" "sat")
145+ (set_attr "shift" "3")
146+ (set_attr "type" "alu_shift")])
147
148 ;; Shift and rotation insns
149
150
151=== modified file 'gcc/config/arm/predicates.md'
152--- old/gcc/config/arm/predicates.md 2012-02-22 13:31:54 +0000
153+++ new/gcc/config/arm/predicates.md 2012-02-29 14:29:56 +0000
154@@ -241,6 +241,15 @@
155 || ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32")))
156 (match_test "mode == GET_MODE (op)")))
157
158+;; True for shift operators which can be used with saturation instructions.
159+(define_special_predicate "sat_shift_operator"
160+ (and (ior (and (match_code "mult")
161+ (match_test "power_of_two_operand (XEXP (op, 1), mode)"))
162+ (and (match_code "ashift,ashiftrt")
163+ (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT
164+ && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1)) < 32)")))
165+ (match_test "mode == GET_MODE (op)")))
166+
167 ;; True for MULT, to identify which variant of shift_operator is in use.
168 (define_special_predicate "mult_operator"
169 (match_code "mult"))
170
171=== added file 'gcc/testsuite/gcc.target/arm/sat-1.c'
172--- old/gcc/testsuite/gcc.target/arm/sat-1.c 1970-01-01 00:00:00 +0000
173+++ new/gcc/testsuite/gcc.target/arm/sat-1.c 2012-02-29 14:29:56 +0000
174@@ -0,0 +1,64 @@
175+/* { dg-do compile } */
176+/* { dg-require-effective-target arm_arm_ok } */
177+/* { dg-require-effective-target arm_arch_v6_ok } */
178+/* { dg-options "-O2 -marm" } */
179+/* { dg-add-options arm_arch_v6 } */
180+
181+
182+static inline int sat1 (int a, int amin, int amax)
183+{
184+ if (a < amin) return amin;
185+ else if (a > amax) return amax;
186+ else return a;
187+}
188+
189+static inline int sat2 (int a, int amin, int amax)
190+{
191+ if (a > amax) return amax;
192+ else if (a < amin) return amin;
193+ else return a;
194+}
195+
196+int u1 (int x)
197+{
198+ return sat1 (x, 0, 63);
199+}
200+
201+int us1 (int x)
202+{
203+ return sat1 (x >> 5, 0, 63);
204+}
205+
206+int s1 (int x)
207+{
208+ return sat1 (x, -64, 63);
209+}
210+
211+int ss1 (int x)
212+{
213+ return sat1 (x >> 5, -64, 63);
214+}
215+
216+int u2 (int x)
217+{
218+ return sat2 (x, 0, 63);
219+}
220+
221+int us2 (int x)
222+{
223+ return sat2 (x >> 5, 0, 63);
224+}
225+
226+int s2 (int x)
227+{
228+ return sat2 (x, -64, 63);
229+}
230+
231+int ss2 (int x)
232+{
233+ return sat2 (x >> 5, -64, 63);
234+}
235+
236+/* { dg-final { scan-assembler-times "usat" 4 } } */
237+/* { dg-final { scan-assembler-times "ssat" 4 } } */
238+
239
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