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-rw-r--r--recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch157
1 files changed, 157 insertions, 0 deletions
diff --git a/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch
new file mode 100644
index 0000000000..e8c8e63883
--- /dev/null
+++ b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch
@@ -0,0 +1,157 @@
1 LP: #681138
2 Backport from mainline:
3
4 gcc/
5 * config/arm/sync.md (sync_clobber, sync_t2_reqd): New code attribute.
6 (arm_sync_old_<sync_optab>si, arm_sync_old_<sync_optab><mode>): Use
7 the sync_clobber and sync_t2_reqd code attributes.
8 * config/arm/arm.c (arm_output_sync_loop): Reverse the operation if
9 the t2 argument is NULL.
10
11=== modified file 'gcc/config/arm/arm.c'
12Index: gcc-4_5-branch/gcc/config/arm/arm.c
13===================================================================
14--- gcc-4_5-branch.orig/gcc/config/arm/arm.c
15+++ gcc-4_5-branch/gcc/config/arm/arm.c
16@@ -23098,10 +23098,46 @@ arm_output_sync_loop (emit_f emit,
17 break;
18 }
19
20- arm_output_strex (emit, mode, "", t2, t1, memory);
21- operands[0] = t2;
22- arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
23- arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", LOCAL_LABEL_PREFIX);
24+ if (t2)
25+ {
26+ arm_output_strex (emit, mode, "", t2, t1, memory);
27+ operands[0] = t2;
28+ arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
29+ arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=",
30+ LOCAL_LABEL_PREFIX);
31+ }
32+ else
33+ {
34+ /* Use old_value for the return value because for some operations
35+ the old_value can easily be restored. This saves one register. */
36+ arm_output_strex (emit, mode, "", old_value, t1, memory);
37+ operands[0] = old_value;
38+ arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
39+ arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=",
40+ LOCAL_LABEL_PREFIX);
41+
42+ switch (sync_op)
43+ {
44+ case SYNC_OP_ADD:
45+ arm_output_op3 (emit, "sub", old_value, t1, new_value);
46+ break;
47+
48+ case SYNC_OP_SUB:
49+ arm_output_op3 (emit, "add", old_value, t1, new_value);
50+ break;
51+
52+ case SYNC_OP_XOR:
53+ arm_output_op3 (emit, "eor", old_value, t1, new_value);
54+ break;
55+
56+ case SYNC_OP_NONE:
57+ arm_output_op2 (emit, "mov", old_value, required_value);
58+ break;
59+
60+ default:
61+ gcc_unreachable ();
62+ }
63+ }
64
65 arm_process_output_memory_barrier (emit, NULL);
66 arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
67Index: gcc-4_5-branch/gcc/config/arm/sync.md
68===================================================================
69--- gcc-4_5-branch.orig/gcc/config/arm/sync.md
70+++ gcc-4_5-branch/gcc/config/arm/sync.md
71@@ -103,6 +103,18 @@
72 (plus "add")
73 (minus "sub")])
74
75+(define_code_attr sync_clobber [(ior "=&r")
76+ (and "=&r")
77+ (xor "X")
78+ (plus "X")
79+ (minus "X")])
80+
81+(define_code_attr sync_t2_reqd [(ior "4")
82+ (and "4")
83+ (xor "*")
84+ (plus "*")
85+ (minus "*")])
86+
87 (define_expand "sync_<sync_optab>si"
88 [(match_operand:SI 0 "memory_operand")
89 (match_operand:SI 1 "s_register_operand")
90@@ -286,7 +298,6 @@
91 VUNSPEC_SYNC_COMPARE_AND_SWAP))
92 (set (match_dup 1) (unspec_volatile:SI [(match_dup 2)]
93 VUNSPEC_SYNC_COMPARE_AND_SWAP))
94- (clobber:SI (match_scratch:SI 4 "=&r"))
95 (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
96 VUNSPEC_SYNC_COMPARE_AND_SWAP))
97 ]
98@@ -299,7 +310,6 @@
99 (set_attr "sync_required_value" "2")
100 (set_attr "sync_new_value" "3")
101 (set_attr "sync_t1" "0")
102- (set_attr "sync_t2" "4")
103 (set_attr "conds" "clob")
104 (set_attr "predicable" "no")])
105
106@@ -313,7 +323,6 @@
107 VUNSPEC_SYNC_COMPARE_AND_SWAP)))
108 (set (match_dup 1) (unspec_volatile:NARROW [(match_dup 2)]
109 VUNSPEC_SYNC_COMPARE_AND_SWAP))
110- (clobber:SI (match_scratch:SI 4 "=&r"))
111 (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
112 VUNSPEC_SYNC_COMPARE_AND_SWAP))
113 ]
114@@ -326,7 +335,6 @@
115 (set_attr "sync_required_value" "2")
116 (set_attr "sync_new_value" "3")
117 (set_attr "sync_t1" "0")
118- (set_attr "sync_t2" "4")
119 (set_attr "conds" "clob")
120 (set_attr "predicable" "no")])
121
122@@ -487,7 +495,7 @@
123 VUNSPEC_SYNC_OLD_OP))
124 (clobber (reg:CC CC_REGNUM))
125 (clobber (match_scratch:SI 3 "=&r"))
126- (clobber (match_scratch:SI 4 "=&r"))]
127+ (clobber (match_scratch:SI 4 "<sync_clobber>"))]
128 "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
129 {
130 return arm_output_sync_insn (insn, operands);
131@@ -496,7 +504,7 @@
132 (set_attr "sync_memory" "1")
133 (set_attr "sync_new_value" "2")
134 (set_attr "sync_t1" "3")
135- (set_attr "sync_t2" "4")
136+ (set_attr "sync_t2" "<sync_t2_reqd>")
137 (set_attr "sync_op" "<sync_optab>")
138 (set_attr "conds" "clob")
139 (set_attr "predicable" "no")])
140@@ -540,7 +548,7 @@
141 VUNSPEC_SYNC_OLD_OP))
142 (clobber (reg:CC CC_REGNUM))
143 (clobber (match_scratch:SI 3 "=&r"))
144- (clobber (match_scratch:SI 4 "=&r"))]
145+ (clobber (match_scratch:SI 4 "<sync_clobber>"))]
146 "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
147 {
148 return arm_output_sync_insn (insn, operands);
149@@ -549,7 +557,7 @@
150 (set_attr "sync_memory" "1")
151 (set_attr "sync_new_value" "2")
152 (set_attr "sync_t1" "3")
153- (set_attr "sync_t2" "4")
154+ (set_attr "sync_t2" "<sync_t2_reqd>")
155 (set_attr "sync_op" "<sync_optab>")
156 (set_attr "conds" "clob")
157 (set_attr "predicable" "no")])
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-10-24 01:31:53 +0000