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-rw-r--r--meta-aarch64/recipes-multimedia/pulseaudio/files/0001-libatomic_ops-Aarch64-basic-port.patch232
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diff --git a/meta-aarch64/recipes-multimedia/pulseaudio/files/0001-libatomic_ops-Aarch64-basic-port.patch b/meta-aarch64/recipes-multimedia/pulseaudio/files/0001-libatomic_ops-Aarch64-basic-port.patch
new file mode 100644
index 0000000..0769377
--- /dev/null
+++ b/meta-aarch64/recipes-multimedia/pulseaudio/files/0001-libatomic_ops-Aarch64-basic-port.patch
@@ -0,0 +1,232 @@
1From aac120d778ae5fc619b2fb8ef18ea18d3d5d20cc Mon Sep 17 00:00:00 2001
2From: Yvan Roux <yvan.roux@linaro.org>
3Date: Wed, 23 Jan 2013 17:14:16 +0100
4Subject: [PATCH] Aarch64 basic port
5
6Adapted-for-OpenEmbedded-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
7
8---
9 src/atomic_ops.h | 4
10 src/atomic_ops/sysdeps/Makefile.am | 1
11 src/atomic_ops/sysdeps/gcc/aarch64.h | 184 +++++++++++++++++++++++++++++++++++
12 3 files changed, 189 insertions(+)
13 create mode 100644 src/atomic_ops/sysdeps/gcc/aarch64.h
14
15--- libatomic_ops-7.2.orig/src/atomic_ops.h
16+++ libatomic_ops-7.2/src/atomic_ops.h
17@@ -242,10 +242,14 @@
18 # endif /* __m68k__ */
19 # if defined(__powerpc__) || defined(__ppc__) || defined(__PPC__) \
20 || defined(__powerpc64__) || defined(__ppc64__)
21 # include "atomic_ops/sysdeps/gcc/powerpc.h"
22 # endif /* __powerpc__ */
23+# if defined(__aarch64__)
24+# include "atomic_ops/sysdeps/gcc/aarch64.h"
25+# define AO_CAN_EMUL_CAS
26+# endif /* __aarch64__ */
27 # if defined(__arm__) && !defined(AO_USE_PTHREAD_DEFS)
28 # include "atomic_ops/sysdeps/gcc/arm.h"
29 # define AO_CAN_EMUL_CAS
30 # endif /* __arm__ */
31 # if defined(__cris__) || defined(CRIS)
32--- libatomic_ops-7.2.orig/src/atomic_ops/sysdeps/Makefile.am
33+++ libatomic_ops-7.2/src/atomic_ops/sysdeps/Makefile.am
34@@ -24,10 +24,11 @@ nobase_sysdep_HEADERS= generic_pthread.h
35 standard_ao_double_t.h \
36 README \
37 \
38 armcc/arm_v6.h \
39 \
40+ gcc/aarch64.h \
41 gcc/alpha.h gcc/arm.h gcc/avr32.h gcc/cris.h \
42 gcc/hexagon.h gcc/hppa.h gcc/ia64.h gcc/m68k.h \
43 gcc/mips.h gcc/powerpc.h gcc/s390.h \
44 gcc/sh.h gcc/sparc.h gcc/x86.h gcc/x86_64.h \
45 \
46--- /dev/null
47+++ libatomic_ops-7.2/src/atomic_ops/sysdeps/gcc/aarch64.h
48@@ -0,0 +1,184 @@
49+/*
50+ * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
51+ * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
52+ * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved.
53+ *
54+ *
55+ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
56+ * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
57+ *
58+ * Permission is hereby granted to use or copy this program
59+ * for any purpose, provided the above notices are retained on all copies.
60+ * Permission to modify the code and to distribute modified code is granted,
61+ * provided the above notices are retained, and a notice that the code was
62+ * modified is included with the above copyright notice.
63+ *
64+ */
65+
66+#include "../read_ordered.h"
67+
68+#include "../test_and_set_t_is_ao_t.h"
69+
70+AO_INLINE void
71+AO_nop_full(void)
72+{
73+# ifndef AO_UNIPROCESSOR
74+__sync_synchronize ();
75+# endif
76+}
77+#define AO_HAVE_nop_full
78+
79+AO_INLINE AO_t
80+AO_load(const volatile AO_t *addr)
81+{
82+ return __atomic_load_n (addr, __ATOMIC_RELAXED);
83+}
84+#define AO_HAVE_load
85+
86+AO_INLINE AO_t
87+AO_load_acquire(const volatile AO_t *addr)
88+{
89+ return __atomic_load_n (addr, __ATOMIC_ACQUIRE);
90+}
91+#define AO_HAVE_load_acquire
92+
93+AO_INLINE void
94+ AO_store(volatile AO_t *addr, AO_t value)
95+{
96+ __atomic_store_n(addr, value, __ATOMIC_RELAXED);
97+}
98+#define AO_HAVE_store
99+
100+AO_INLINE void
101+ AO_store_release(volatile AO_t *addr, AO_t value)
102+{
103+ __atomic_store_n(addr, value, __ATOMIC_RELEASE);
104+}
105+#define AO_HAVE_store_release
106+
107+AO_INLINE AO_TS_VAL_t
108+AO_test_and_set(volatile AO_TS_t *addr)
109+{
110+ return __atomic_test_and_set(addr, __ATOMIC_RELAXED);
111+}
112+# define AO_HAVE_test_and_set
113+
114+AO_INLINE AO_TS_VAL_t
115+AO_test_and_set_acquire(volatile AO_TS_t *addr)
116+{
117+ return __atomic_test_and_set(addr, __ATOMIC_ACQUIRE);
118+}
119+# define AO_HAVE_test_and_set_acquire
120+
121+AO_INLINE AO_TS_VAL_t
122+AO_test_and_set_release(volatile AO_TS_t *addr)
123+{
124+ return __atomic_test_and_set(addr, __ATOMIC_RELEASE);
125+}
126+# define AO_HAVE_test_and_set_release
127+
128+AO_INLINE AO_TS_VAL_t
129+AO_test_and_set_full(volatile AO_TS_t *addr)
130+{
131+ return __atomic_test_and_set(addr, __ATOMIC_SEQ_CST);
132+}
133+# define AO_HAVE_test_and_set_full
134+
135+AO_INLINE AO_t
136+AO_fetch_and_add(volatile AO_t *p, AO_t incr)
137+{
138+ return __atomic_fetch_add(p, incr, __ATOMIC_RELAXED);
139+}
140+#define AO_HAVE_fetch_and_add
141+
142+AO_INLINE AO_t
143+AO_fetch_and_add_acquire(volatile AO_t *p, AO_t incr)
144+{
145+ return __atomic_fetch_add(p, incr, __ATOMIC_ACQUIRE);
146+}
147+#define AO_HAVE_fetch_and_add_acquire
148+
149+AO_INLINE AO_t
150+AO_fetch_and_add_release(volatile AO_t *p, AO_t incr)
151+{
152+ return __atomic_fetch_add(p, incr, __ATOMIC_RELEASE);
153+}
154+#define AO_HAVE_fetch_and_add_release
155+
156+AO_INLINE AO_t
157+AO_fetch_and_add_full(volatile AO_t *p, AO_t incr)
158+{
159+ return __atomic_fetch_add(p, incr, __ATOMIC_SEQ_CST);
160+}
161+#define AO_HAVE_fetch_and_add_full
162+
163+AO_INLINE AO_t
164+AO_fetch_and_add1(volatile AO_t *p)
165+{
166+ return __atomic_fetch_add(p, 1, __ATOMIC_RELAXED);
167+}
168+#define AO_HAVE_fetch_and_add1
169+
170+AO_INLINE AO_t
171+AO_fetch_and_add1_acquire(volatile AO_t *p)
172+{
173+ return __atomic_fetch_add(p, 1, __ATOMIC_ACQUIRE);
174+}
175+#define AO_HAVE_fetch_and_add1_acquire
176+
177+AO_INLINE AO_t
178+AO_fetch_and_add1_release(volatile AO_t *p)
179+{
180+ return __atomic_fetch_add(p, 1, __ATOMIC_RELEASE);
181+}
182+#define AO_HAVE_fetch_and_add1_release
183+
184+AO_INLINE AO_t
185+AO_fetch_and_add1_full(volatile AO_t *p)
186+{
187+ return __atomic_fetch_add(p, 1, __ATOMIC_SEQ_CST);
188+}
189+#define AO_HAVE_fetch_and_add1_full
190+
191+AO_INLINE AO_t
192+AO_fetch_and_sub1(volatile AO_t *p)
193+{
194+ return __atomic_fetch_sub(p, 1, __ATOMIC_RELAXED);
195+}
196+#define AO_HAVE_fetch_and_sub1
197+
198+AO_INLINE AO_t
199+AO_fetch_and_sub1_acquire(volatile AO_t *p)
200+{
201+ return __atomic_fetch_sub(p, 1, __ATOMIC_ACQUIRE);
202+}
203+#define AO_HAVE_fetch_and_sub1_acquire
204+
205+AO_INLINE AO_t
206+AO_fetch_and_sub1_release(volatile AO_t *p)
207+{
208+ return __atomic_fetch_sub(p, 1, __ATOMIC_RELEASE);
209+}
210+#define AO_HAVE_fetch_and_sub1_release
211+
212+AO_INLINE AO_t
213+AO_fetch_and_sub1_full(volatile AO_t *p)
214+{
215+ return __atomic_fetch_sub(p, 1, __ATOMIC_SEQ_CST);
216+}
217+#define AO_HAVE_fetch_and_sub1_full
218+
219+/* Returns nonzero if the comparison succeeded. */
220+AO_INLINE int
221+AO_compare_and_swap(volatile AO_t *addr, AO_t old_val, AO_t new_val)
222+{
223+ return __sync_bool_compare_and_swap(addr, old_val, new_val);
224+}
225+# define AO_HAVE_compare_and_swap
226+
227+AO_INLINE AO_t
228+AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old_val, AO_t new_val)
229+{
230+ return __sync_val_compare_and_swap(addr, old_val, new_val);
231+}
232+# define AO_HAVE_fetch_compare_and_swap
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