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authorTudor Florea <tudor.florea@enea.com>2015-10-08 22:46:13 +0200
committerTudor Florea <tudor.florea@enea.com>2015-10-08 22:46:13 +0200
commit8d89651ef729e560ad96dcfc002fcde6ff7f923b (patch)
treeeb5be01c25f735d12fe9881ee6327c9b7e8bbe39 /meta-bigendian/recipes-devtools
downloadmeta-linaro-dizzy-enea.tar.gz
initial commit for Enea Linux 5.0 armdizzy-enea
Signed-off-by: Tudor Florea <tudor.florea@enea.com>
Diffstat (limited to 'meta-bigendian/recipes-devtools')
-rw-r--r--meta-bigendian/recipes-devtools/python/python-numpy_1.7.0.bbappend8
-rw-r--r--meta-bigendian/recipes-devtools/python/python/python_ffi_armeb_be8.patch34
-rw-r--r--meta-bigendian/recipes-devtools/python/python_2.7.3.bbappend3
-rw-r--r--meta-bigendian/recipes-devtools/strace/strace/strace-4.8-arm-be8.patch37
-rw-r--r--meta-bigendian/recipes-devtools/strace/strace_%.bbappend3
5 files changed, 85 insertions, 0 deletions
diff --git a/meta-bigendian/recipes-devtools/python/python-numpy_1.7.0.bbappend b/meta-bigendian/recipes-devtools/python/python-numpy_1.7.0.bbappend
new file mode 100644
index 0000000..aa9df9a
--- /dev/null
+++ b/meta-bigendian/recipes-devtools/python/python-numpy_1.7.0.bbappend
@@ -0,0 +1,8 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2
3SRC_URI += " ${CONFIGFILESURI} "
4
5CONFIGFILESURI_armeb = " \
6 file://config.h \
7 file://numpyconfig.h \
8"
diff --git a/meta-bigendian/recipes-devtools/python/python/python_ffi_armeb_be8.patch b/meta-bigendian/recipes-devtools/python/python/python_ffi_armeb_be8.patch
new file mode 100644
index 0000000..afd090b
--- /dev/null
+++ b/meta-bigendian/recipes-devtools/python/python/python_ffi_armeb_be8.patch
@@ -0,0 +1,34 @@
1Index: Python-2.7.3/Modules/_ctypes/libffi/src/arm/ffi.c
2===================================================================
3--- Python-2.7.3.orig/Modules/_ctypes/libffi/src/arm/ffi.c
4+++ Python-2.7.3/Modules/_ctypes/libffi/src/arm/ffi.c
5@@ -272,7 +272,7 @@ ffi_prep_incoming_args_SYSV(char *stack,
6 }
7
8 /* How to make a trampoline. */
9-
10+#if !(defined(__ARMEB__) && defined(__ARM_ARCH_7A__))
11 #define FFI_INIT_TRAMPOLINE(TRAMP,FUN,CTX) \
12 ({ unsigned char *__tramp = (unsigned char*)(TRAMP); \
13 unsigned int __fun = (unsigned int)(FUN); \
14@@ -284,7 +284,19 @@ ffi_prep_incoming_args_SYSV(char *stack,
15 *(unsigned int*) &__tramp[16] = __fun; \
16 __clear_cache((&__tramp[0]), (&__tramp[19])); \
17 })
18-
19+#else /* armv7 big endian: be8 instructions are still little endian */
20+#define FFI_INIT_TRAMPOLINE(TRAMP,FUN,CTX) \
21+({ unsigned char *__tramp = (unsigned char*)(TRAMP); \
22+ unsigned int __fun = (unsigned int)(FUN); \
23+ unsigned int __ctx = (unsigned int)(CTX); \
24+ *(unsigned int*) &__tramp[0] = 0x0f002de9; /* swab(0xe92d000f, 4) - stmfd sp!, {r0-r3} */ \
25+ *(unsigned int*) &__tramp[4] = 0x00009fe5; /* swab(0xe59f0000, 4) - ldr r0, [pc] */ \
26+ *(unsigned int*) &__tramp[8] = 0x00f09fe5; /* swab(0xe59ff000, 4) - ldr pc, [pc] */ \
27+ *(unsigned int*) &__tramp[12] = __ctx; \
28+ *(unsigned int*) &__tramp[16] = __fun; \
29+ __clear_cache((&__tramp[0]), (&__tramp[19])); \
30+ })
31+#endif
32
33 /* the cif must already be prep'ed */
34
diff --git a/meta-bigendian/recipes-devtools/python/python_2.7.3.bbappend b/meta-bigendian/recipes-devtools/python/python_2.7.3.bbappend
new file mode 100644
index 0000000..db79a4a
--- /dev/null
+++ b/meta-bigendian/recipes-devtools/python/python_2.7.3.bbappend
@@ -0,0 +1,3 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2
3SRC_URI += "file://python_ffi_armeb_be8.patch"
diff --git a/meta-bigendian/recipes-devtools/strace/strace/strace-4.8-arm-be8.patch b/meta-bigendian/recipes-devtools/strace/strace/strace-4.8-arm-be8.patch
new file mode 100644
index 0000000..bda4807
--- /dev/null
+++ b/meta-bigendian/recipes-devtools/strace/strace/strace-4.8-arm-be8.patch
@@ -0,0 +1,37 @@
1strace: fix system call matching code in get_scno for be8 arm
2
3on ARM V7 operating in big endian mode strace does not work:
4
5root@genericarmv7ab:~# strace ls
6pid 1356 unknown syscall trap 0x000000ef
7
8it happens because ARM V7 when runs as big endian operates in be8 mode,
9where instruction are still in little endian form. Strace get_scno reads
10instructions and matches it to certain pattern, but in armeb case it needs
11to byteswap it before that.
12
13Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
14Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
15---
16 syscall.c | 10 ++++++++++
17 1 file changed, 10 insertions(+)
18
19--- a/syscall.c
20+++ b/syscall.c
21@@ -1374,6 +1374,16 @@ get_scno(struct tcb *tcp)
22 scno = ptrace(PTRACE_PEEKTEXT, tcp->pid, (void *)(arm_regs.ARM_pc - 4), NULL);
23 if (errno)
24 return -1;
25+
26+#if defined(__ARMEB__) && defined(__ARM_ARCH_7A__)
27+ /* We running big endian arm on ARMv7: instructions are
28+ * in little endian form so we need to byteswap it. Note
29+ * on older ARM like V5 Xscale code is in big endian form
30+ * byte swap is not needed in this case. I.e be8 vs be32.
31+ */
32+ scno = __builtin_bswap32(scno);
33+#endif /* __ARMEB__ && __ARM_ARCH_7A__ */
34+
35 /* EABI syscall convention? */
36 if (scno != 0xef000000) {
37 /* No, it's OABI */
diff --git a/meta-bigendian/recipes-devtools/strace/strace_%.bbappend b/meta-bigendian/recipes-devtools/strace/strace_%.bbappend
new file mode 100644
index 0000000..3f3d73e
--- /dev/null
+++ b/meta-bigendian/recipes-devtools/strace/strace_%.bbappend
@@ -0,0 +1,3 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2
3SRC_URI += "file://strace-4.8-arm-be8.patch"