diff options
Diffstat (limited to 'recipes-multimedia/onevpl/onevpl-intel-gpu/0001-ADLP-add-new-device-id-list.patch')
-rw-r--r-- | recipes-multimedia/onevpl/onevpl-intel-gpu/0001-ADLP-add-new-device-id-list.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/recipes-multimedia/onevpl/onevpl-intel-gpu/0001-ADLP-add-new-device-id-list.patch b/recipes-multimedia/onevpl/onevpl-intel-gpu/0001-ADLP-add-new-device-id-list.patch new file mode 100644 index 00000000..fcc99d55 --- /dev/null +++ b/recipes-multimedia/onevpl/onevpl-intel-gpu/0001-ADLP-add-new-device-id-list.patch | |||
@@ -0,0 +1,43 @@ | |||
1 | From 5dad1ac41e227e75d1a5117c60ffc5331630c827 Mon Sep 17 00:00:00 2001 | ||
2 | From: Dan Ai <dan.ai@intel.com> | ||
3 | Date: Thu, 6 May 2021 22:22:08 +0800 | ||
4 | Subject: [PATCH] [ADLP] add new device id list | ||
5 | |||
6 | Upstream-Status: Backport [https://github.com/oneapi-src/oneVPL-intel-gpu/commit/5dad1ac41e227e75d1a5117c60ffc5331630c827] | ||
7 | |||
8 | Signed-off-by: Yew, Chang Ching <chang.ching.yew@intel.com> | ||
9 | --- | ||
10 | _studio/shared/include/mfxstructures-int.h | 16 +++++++++++++++- | ||
11 | 1 file changed, 15 insertions(+), 1 deletion(-) | ||
12 | |||
13 | diff --git a/_studio/shared/include/mfxstructures-int.h b/_studio/shared/include/mfxstructures-int.h | ||
14 | index c76c8d2358..ad97a78d1d 100755 | ||
15 | --- a/_studio/shared/include/mfxstructures-int.h | ||
16 | +++ b/_studio/shared/include/mfxstructures-int.h | ||
17 | @@ -434,8 +434,22 @@ typedef struct { | ||
18 | |||
19 | /* ADL-P */ | ||
20 | { 0x46A0, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
21 | + { 0x46A1, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
22 | + { 0x46A3, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
23 | + { 0x46A6, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
24 | + { 0x4626, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
25 | + | ||
26 | + { 0x46B0, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
27 | + { 0x46B1, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
28 | + { 0x46B3, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
29 | + { 0x46A8, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
30 | + { 0x4628, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
31 | + | ||
32 | { 0x46C0, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
33 | - { 0x46E0, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
34 | + { 0x46C1, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
35 | + { 0x46C3, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
36 | + { 0x46AA, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
37 | + { 0x462A, MFX_HW_ADL_P, MFX_GT2 },//ADL-P | ||
38 | |||
39 | }; | ||
40 | |||
41 | -- | ||
42 | 2.32.0 | ||
43 | |||