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-rw-r--r--recipes-devtools/binutils/files/bin.e5500.patch102
1 files changed, 0 insertions, 102 deletions
diff --git a/recipes-devtools/binutils/files/bin.e5500.patch b/recipes-devtools/binutils/files/bin.e5500.patch
deleted file mode 100644
index 800590c..0000000
--- a/recipes-devtools/binutils/files/bin.e5500.patch
+++ /dev/null
@@ -1,102 +0,0 @@
1bin.e5500
2
3Implements target e5500 and -me5500, etc..
4
5diff -r -u binutils-2.21-20110211-orig/bfd/archures.c binutils-2.21-20110211/bfd/archures.c
6--- binutils-2.21-20110211-orig/bfd/archures.c 2010-12-30 18:33:31.000000000 -0600
7+++ binutils-2.21-20110211/bfd/archures.c 2011-02-14 13:17:00.528340236 -0600
8@@ -234,6 +234,7 @@
9 .#define bfd_mach_ppc_e500 500
10 .#define bfd_mach_ppc_e500mc 5001
11 .#define bfd_mach_ppc_e500mc64 5005
12+.#define bfd_mach_ppc_e5500 5006
13 .#define bfd_mach_ppc_titan 83
14 . bfd_arch_rs6000, {* IBM RS/6000 *}
15 .#define bfd_mach_rs6k 6000
16diff -r -u binutils-2.21-20110211-orig/bfd/bfd-in2.h binutils-2.21-20110211/bfd/bfd-in2.h
17--- binutils-2.21-20110211-orig/bfd/bfd-in2.h 2011-02-11 10:57:58.000000000 -0600
18+++ binutils-2.21-20110211/bfd/bfd-in2.h 2011-02-14 13:19:57.365092179 -0600
19@@ -1921,6 +1921,7 @@
20 #define bfd_mach_ppc_e500 500
21 #define bfd_mach_ppc_e500mc 5001
22 #define bfd_mach_ppc_e500mc64 5005
23+#define bfd_mach_ppc_e5500 5006
24 #define bfd_mach_ppc_titan 83
25 bfd_arch_rs6000, /* IBM RS/6000 */
26 #define bfd_mach_rs6k 6000
27diff -r -u binutils-2.21-20110211-orig/bfd/cpu-powerpc.c binutils-2.21-20110211/bfd/cpu-powerpc.c
28--- binutils-2.21-20110211-orig/bfd/cpu-powerpc.c 2010-02-07 19:59:34.000000000 -0600
29+++ binutils-2.21-20110211/bfd/cpu-powerpc.c 2011-02-14 13:21:48.802403135 -0600
30@@ -352,6 +352,20 @@
31 FALSE, /* not the default */
32 powerpc_compatible,
33 bfd_default_scan,
34+ &bfd_powerpc_archs[19]
35+ },
36+ {
37+ 64, /* 64 bits in a word */
38+ 64, /* 64 bits in an address */
39+ 8, /* 8 bits in a byte */
40+ bfd_arch_powerpc,
41+ bfd_mach_ppc_e5500,
42+ "powerpc",
43+ "powerpc:e5500",
44+ 3,
45+ FALSE, /* not the default */
46+ powerpc_compatible,
47+ bfd_default_scan,
48 0
49 }
50 };
51diff -r -u binutils-2.21-20110211-orig/gas/config/tc-ppc.c binutils-2.21-20110211/gas/config/tc-ppc.c
52--- binutils-2.21-20110211-orig/gas/config/tc-ppc.c 2011-02-11 10:58:01.000000000 -0600
53+++ binutils-2.21-20110211/gas/config/tc-ppc.c 2011-02-14 13:23:39.478340515 -0600
54@@ -1235,6 +1235,7 @@
55 -me500, -me500x2 generate code for Motorola e500 core complex\n\
56 -me500mc, generate code for Freescale e500mc core complex\n\
57 -me500mc64, generate code for Freescale e500mc64 core complex\n\
58+-me5500, generate code for Freescale e5500 core complex\n\
59 -mspe generate code for Motorola SPE instructions\n\
60 -mtitan generate code for AppliedMicro Titan core complex\n\
61 -mregnames Allow symbolic names for registers\n\
62diff -r -u binutils-2.21-20110211-orig/gas/doc/as.texinfo binutils-2.21-20110211/gas/doc/as.texinfo
63--- binutils-2.21-20110211-orig/gas/doc/as.texinfo 2011-02-11 10:58:01.000000000 -0600
64+++ binutils-2.21-20110211/gas/doc/as.texinfo 2011-02-14 13:26:01.383403323 -0600
65@@ -431,7 +431,7 @@
66 [@b{-a32}|@b{-a64}]
67 [@b{-mpwrx}|@b{-mpwr2}|@b{-mpwr}|@b{-m601}|@b{-mppc}|@b{-mppc32}|@b{-m603}|@b{-m604}|@b{-m403}|@b{-m405}|
68 @b{-m440}|@b{-m464}|@b{-m476}|@b{-m7400}|@b{-m7410}|@b{-m7450}|@b{-m7455}|@b{-m750cl}|@b{-mppc64}|
69- @b{-m620}|@b{-me500}|@b{-e500x2}|@b{-me500mc}|@b{-me500mc64}|@b{-mppc64bridge}|@b{-mbooke}|
70+ @b{-m620}|@b{-me500}|@b{-e500x2}|@b{-me500mc}|@b{-me500mc64}|@b{-me5500}|@b{-mppc64bridge}|@b{-mbooke}|
71 @b{-mpower4}|@b{-mpr4}|@b{-mpower5}|@b{-mpwr5}|@b{-mpwr5x}|@b{-mpower6}|@b{-mpwr6}|
72 @b{-mpower7}|@b{-mpw7}|@b{-ma2}|@b{-mcell}|@b{-mspe}|@b{-mtitan}|@b{-me300}|@b{-mcom}]
73 [@b{-many}] [@b{-maltivec}|@b{-mvsx}]
74diff -r -u binutils-2.21-20110211-orig/gas/doc/c-ppc.texi binutils-2.21-20110211/gas/doc/c-ppc.texi
75--- binutils-2.21-20110211-orig/gas/doc/c-ppc.texi 2011-02-11 10:58:04.000000000 -0600
76+++ binutils-2.21-20110211/gas/doc/c-ppc.texi 2011-02-14 13:26:31.140090956 -0600
77@@ -88,6 +88,9 @@
78 @item -me500mc64
79 Generate code for Freescale e500mc64 core complex.
80
81+@item -me5500
82+Generate code for Freescale e5500 core complex.
83+
84 @item -mspe
85 Generate code for Motorola SPE instructions.
86
87diff -r -u binutils-2.21-20110211-orig/opcodes/ppc-dis.c binutils-2.21-20110211/opcodes/ppc-dis.c
88--- binutils-2.21-20110211-orig/opcodes/ppc-dis.c 2010-07-03 03:27:23.000000000 -0500
89+++ binutils-2.21-20110211/opcodes/ppc-dis.c 2011-02-14 13:28:54.384090879 -0600
90@@ -114,6 +114,12 @@
91 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
92 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
93 0 },
94+ { "e5500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
95+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
96+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
97+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
98+ | PPC_OPCODE_POWER7),
99+ 0 },
100 { "e500x2", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
101 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
102 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI