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authorChunrong Guo <chunrong.guo@nxp.com>2019-07-05 10:53:52 +0800
committerOtavio Salvador <otavio@ossystems.com.br>2019-07-12 17:18:34 -0300
commitf7aee8590616aaed44d030280b9995bb2245314c (patch)
tree4e4acfe1426b4e2fa1e5f0c8fb96eccc86fece27
parent37f84396977e90f4c78a20430f61573baff1eb21 (diff)
downloadmeta-freescale-f7aee8590616aaed44d030280b9995bb2245314c.tar.gz
u-boot: update to c873063
*update to lsdk 1906 tag include the following changes: c873063 - common: qixis: make the qixis compatible with new soc 4fe7bca - armv8: ls1028a: Add environment variables to facilitate the boot d7baae8 - dm: i2c: lx2160: Revert lx2160 i2c dm support patch set 3c75182 - armv8: lx2160ardb : Add slave nodes under the i2c0 controller 1807bb1 - armv8: lx2160ardb : Add pcf2127 node 600e32c - armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodes efe84a3 - gpio: do not include <asm/arch/gpio.h> on ARCH_LX2160A 8fbdb38 - drivers: i2c: mxc: Solve the compiler error when using i2c dm mode 210c880 - configs: lx2160a: enable DM support for pcf2127 rtc 4691972 - armv8: lx2160a: The lx2160a platform supports the I2C driver model. 9b6da05 - board/freescale/common: secure_boot: Set bootdelay to -2. c419c9c - armv8: fsl-layerscape: Increase mmc read size for secure-boot headers e3a324e - configs: fsl-layerscape: secure_boot: Enable setexpr command. 03313e4 - armv8: dts: ls1028a: Add FSPI node for ls1028ardb and ls1028aqds 47a485c - configs: ls1028a: Enable FSPI support for ls1028ardb and ls1028aqds 7a5853e - mtd: spi-nor-ids: Add micron mt35xu02g flash ID d5cf4da - configs: ls1012: unset CONFIG_SPI_FLASH_BAR, move CONFIG_FSL_QSPI to defconfig bcdf1cb - driver: spi: Update QSPI driver xfer 0c337c2 - armv8: ls2088ardb: Fix MC firmware loading during SD boot 336202e - armv8: ls2088aqds: Fix MC firmware loading during SD boot 7be353f - armv8: ls2088aqds: Add bootcmd for TFA boot 9664bf5 - armv8: fsl-layerscape: Change bootcmd update logic 3bad029 - ls1046ardb: Add CONFIG_ENV_ADDR to init env in qspi boot b892a5c - armv8: fsl-lsch2: add clock support for the second eSDHC 6bec285 - configs: ls1088aqds: Enable config to write aligned data to TxFIFO 7db76c5 - arm64: configs: ls1046afrwy: config update 268ebc5 - armv8: fsl-layerscape: Update qspi clk cfg da7f6ec - armv8/fsl-layerscape: Add loop to check L3 dcache status 55007f3 - ARM: dts: ls1021a: Fixed reg for sata node *Upgrade version to 2019.04 Signed-off-by: Chunrong Guo <chunrong.guo@nxp.com>
-rw-r--r--recipes-bsp/u-boot/u-boot-qoriq-common_2019.04.inc (renamed from recipes-bsp/u-boot/u-boot-qoriq-common_2018.09.inc)2
-rw-r--r--recipes-bsp/u-boot/u-boot-qoriq-fw-utils_2019.04.bb (renamed from recipes-bsp/u-boot/u-boot-qoriq-fw-utils_2018.09.bb)0
-rw-r--r--recipes-bsp/u-boot/u-boot-qoriq_2019.04.bb (renamed from recipes-bsp/u-boot/u-boot-qoriq_2018.09.bb)0
3 files changed, 1 insertions, 1 deletions
diff --git a/recipes-bsp/u-boot/u-boot-qoriq-common_2018.09.inc b/recipes-bsp/u-boot/u-boot-qoriq-common_2019.04.inc
index 06ec01bc..46e43140 100644
--- a/recipes-bsp/u-boot/u-boot-qoriq-common_2018.09.inc
+++ b/recipes-bsp/u-boot/u-boot-qoriq-common_2019.04.inc
@@ -12,7 +12,7 @@ LIC_FILES_CHKSUM = " \
12 12
13SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/u-boot;nobranch=1 \ 13SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/u-boot;nobranch=1 \
14" 14"
15SRCREV= "80b2d2bc4cab0a8363c9b7eba8064b1795f12670" 15SRCREV= "c873063750db4479feee58a1d97f38a0934ea7b9"
16 16
17S = "${WORKDIR}/git" 17S = "${WORKDIR}/git"
18PV_append = "+fslgit" 18PV_append = "+fslgit"
diff --git a/recipes-bsp/u-boot/u-boot-qoriq-fw-utils_2018.09.bb b/recipes-bsp/u-boot/u-boot-qoriq-fw-utils_2019.04.bb
index 11078124..11078124 100644
--- a/recipes-bsp/u-boot/u-boot-qoriq-fw-utils_2018.09.bb
+++ b/recipes-bsp/u-boot/u-boot-qoriq-fw-utils_2019.04.bb
diff --git a/recipes-bsp/u-boot/u-boot-qoriq_2018.09.bb b/recipes-bsp/u-boot/u-boot-qoriq_2019.04.bb
index f48dc81f..f48dc81f 100644
--- a/recipes-bsp/u-boot/u-boot-qoriq_2018.09.bb
+++ b/recipes-bsp/u-boot/u-boot-qoriq_2019.04.bb