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-rw-r--r--recipes-kernel/linux/files/arm_arch_timer-Keystone-2-architected-timer-frequenc.patch55
1 files changed, 0 insertions, 55 deletions
diff --git a/recipes-kernel/linux/files/arm_arch_timer-Keystone-2-architected-timer-frequenc.patch b/recipes-kernel/linux/files/arm_arch_timer-Keystone-2-architected-timer-frequenc.patch
deleted file mode 100644
index 49bf07b..0000000
--- a/recipes-kernel/linux/files/arm_arch_timer-Keystone-2-architected-timer-frequenc.patch
+++ /dev/null
@@ -1,55 +0,0 @@
1From e2d575410329f42542972b7276fbb1c2c7f48334 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Sixten=20Sj=C3=B6str=C3=B6m=20Thames?=
3 <Sixten.Sjoestroem.Thames@enea.com>
4Date: Mon, 12 May 2014 21:18:47 +0200
5Subject: [PATCH] arm_arch_timer: Keystone 2 architected timer frequency fix
6MIME-Version: 1.0
7Content-Type: text/plain; charset=UTF-8
8Content-Transfer-Encoding: 8bit
9
10The arch timer frequency register returns incorrect values on early
11versions of the Keystone 2 evm silicon. The frequency register always
12returns 1000 MHz on bad silicon. This temporary fix solves that.
13
14Signed-off-by: Sixten Sjöström Thames <Sixten.Sjoestroem.Thames@enea.com>
15---
16 drivers/clocksource/arm_arch_timer.c | 16 ++++++++++++++++
17 1 file changed, 16 insertions(+)
18
19diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
20index a2b2541..321aba1 100644
21--- a/drivers/clocksource/arm_arch_timer.c
22+++ b/drivers/clocksource/arm_arch_timer.c
23@@ -23,6 +23,8 @@
24
25 #include <clocksource/arm_arch_timer.h>
26
27+#define K2_PG1_AT_FREQ 133120000UL
28+
29 static u32 arch_timer_rate;
30
31 enum ppi_nr {
32@@ -165,6 +167,20 @@ static int arch_timer_available(void)
33 if (arch_timer_rate == 0) {
34 freq = arch_timer_get_cntfrq();
35
36+ /* The Keystone 2 EVM PG1.0 silicon has a malfunctional
37+ * Architected timer. The timer frequency register allways
38+ * incorrectly returns 1000 MHz. This is a temorary fix for
39+ * internal Enea Linux testing so that the same kernel can
40+ * be used on targets with both PG1.0 and PG1.1 silicon.
41+ * Another solution is to have different DTBs with hard
42+ * coded frequencies.*/
43+ if (freq == 1000000000) {
44+ pr_warn("Keystone 2 EVM specific arch timer fix\n");
45+ pr_warn("Set architected timer frequency to %u\n",
46+ K2_PG1_AT_FREQ);
47+ freq = K2_PG1_AT_FREQ;
48+ }
49+
50 /* Check the timer frequency. */
51 if (freq == 0) {
52 pr_warn("Architected timer frequency not available\n");
53--
541.7.10.4
55