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author | Zoltán Böszörményi <zboszor@pr.hu> | 2021-02-13 00:19:53 -0500 |
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committer | Khem Raj <raj.khem@gmail.com> | 2021-02-13 12:19:26 -0800 |
commit | 832fef859a1fabc77d8dfc115d696b720438db4e (patch) | |
tree | 2d19e875baaae3d77e972aa70bcfe8000d4e0cc3 | |
parent | 5f883adda39ad3d2ece13aadee784ccf7c800ac3 (diff) | |
download | meta-clang-832fef859a1fabc77d8dfc115d696b720438db4e.tar.gz |
llvm-project-source: Add a patch to fix LLVM bug 48921
The patch was taken from https://bugs.llvm.org/show_bug.cgi?id=48921
Unfortunately, LLVM 11 is already closed so the patch was only
accepted into LLVM 12.
Also reported at https://gitlab.freedesktop.org/mesa/mesa/-/issues/4107
Signed-off-by: Zoltán Böszörményi <zboszor@pr.hu>
-rw-r--r-- | recipes-devtools/clang/clang/D95527_against_11.x.patch | 85 | ||||
-rw-r--r-- | recipes-devtools/clang/common.inc | 1 |
2 files changed, 86 insertions, 0 deletions
diff --git a/recipes-devtools/clang/clang/D95527_against_11.x.patch b/recipes-devtools/clang/clang/D95527_against_11.x.patch new file mode 100644 index 0000000..f96f732 --- /dev/null +++ b/recipes-devtools/clang/clang/D95527_against_11.x.patch | |||
@@ -0,0 +1,85 @@ | |||
1 | commit b08a140a8fe8d0b0d16a93042b4952d6e34ab913 | ||
2 | Author: Piotr Sobczak <Piotr.Sobczak@amd.com> | ||
3 | Date: Wed Jan 27 16:02:49 2021 +0100 | ||
4 | |||
5 | [AMDGPU] Avoid an illegal operand in si-shrink-instructions | ||
6 | |||
7 | Before the patch it was possible to trigger a constant bus | ||
8 | violation when folding immediates into a shrunk instruction. | ||
9 | |||
10 | The patch adds a check to enforce the legality of the new operand. | ||
11 | |||
12 | Differential Revision: https://reviews.llvm.org/D95527 | ||
13 | |||
14 | diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | ||
15 | index 9c6833a7dab6..6c1b16eddc84 100644 | ||
16 | --- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | ||
17 | +++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | ||
18 | @@ -84,21 +84,23 @@ static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII, | ||
19 | MachineOperand &MovSrc = Def->getOperand(1); | ||
20 | bool ConstantFolded = false; | ||
21 | |||
22 | - if (MovSrc.isImm() && (isInt<32>(MovSrc.getImm()) || | ||
23 | - isUInt<32>(MovSrc.getImm()))) { | ||
24 | - // It's possible to have only one component of a super-reg defined by | ||
25 | - // a single mov, so we need to clear any subregister flag. | ||
26 | - Src0.setSubReg(0); | ||
27 | - Src0.ChangeToImmediate(MovSrc.getImm()); | ||
28 | - ConstantFolded = true; | ||
29 | - } else if (MovSrc.isFI()) { | ||
30 | - Src0.setSubReg(0); | ||
31 | - Src0.ChangeToFrameIndex(MovSrc.getIndex()); | ||
32 | - ConstantFolded = true; | ||
33 | - } else if (MovSrc.isGlobal()) { | ||
34 | - Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(), | ||
35 | - MovSrc.getTargetFlags()); | ||
36 | - ConstantFolded = true; | ||
37 | + if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) { | ||
38 | + if (MovSrc.isImm() && | ||
39 | + (isInt<32>(MovSrc.getImm()) || isUInt<32>(MovSrc.getImm()))) { | ||
40 | + // It's possible to have only one component of a super-reg defined | ||
41 | + // by a single mov, so we need to clear any subregister flag. | ||
42 | + Src0.setSubReg(0); | ||
43 | + Src0.ChangeToImmediate(MovSrc.getImm()); | ||
44 | + ConstantFolded = true; | ||
45 | + } else if (MovSrc.isFI()) { | ||
46 | + Src0.setSubReg(0); | ||
47 | + Src0.ChangeToFrameIndex(MovSrc.getIndex()); | ||
48 | + ConstantFolded = true; | ||
49 | + } else if (MovSrc.isGlobal()) { | ||
50 | + Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(), | ||
51 | + MovSrc.getTargetFlags()); | ||
52 | + ConstantFolded = true; | ||
53 | + } | ||
54 | } | ||
55 | |||
56 | if (ConstantFolded) { | ||
57 | diff --git a/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir | ||
58 | new file mode 100644 | ||
59 | index 000000000000..7889f437facf | ||
60 | --- /dev/null | ||
61 | +++ b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir | ||
62 | @@ -0,0 +1,23 @@ | ||
63 | +# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-shrink-instructions --verify-machineinstrs %s -o - | FileCheck %s | ||
64 | + | ||
65 | +# Make sure immediate folding into V_CNDMASK respects constant bus restrictions. | ||
66 | +--- | ||
67 | + | ||
68 | +name: shrink_cndmask_illegal_imm_folding | ||
69 | +tracksRegLiveness: true | ||
70 | +body: | | ||
71 | + bb.0: | ||
72 | + liveins: $vgpr0, $vgpr1 | ||
73 | + ; CHECK-LABEL: name: shrink_cndmask_illegal_imm_folding | ||
74 | + ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 | ||
75 | + ; CHECK: [[MOV:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec | ||
76 | + ; CHECK: V_CMP_EQ_U32_e32 0, [[COPY]], implicit-def $vcc, implicit $exec | ||
77 | + ; CHECK: V_CNDMASK_B32_e32 [[MOV]], killed [[COPY]], implicit $vcc, implicit $exec | ||
78 | + | ||
79 | + %0:vgpr_32 = COPY $vgpr0 | ||
80 | + %1:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec | ||
81 | + V_CMP_EQ_U32_e32 0, %0:vgpr_32, implicit-def $vcc, implicit $exec | ||
82 | + %2:vgpr_32 = V_CNDMASK_B32_e64 0, %1:vgpr_32, 0, killed %0:vgpr_32, $vcc, implicit $exec | ||
83 | + S_NOP 0 | ||
84 | + | ||
85 | +... | ||
diff --git a/recipes-devtools/clang/common.inc b/recipes-devtools/clang/common.inc index 4709d28..8989904 100644 --- a/recipes-devtools/clang/common.inc +++ b/recipes-devtools/clang/common.inc | |||
@@ -35,6 +35,7 @@ SRC_URI = "\ | |||
35 | file://0025-libcxx-Define-__NR_futex-to-be-__NR_futex_time64-on-.patch \ | 35 | file://0025-libcxx-Define-__NR_futex-to-be-__NR_futex_time64-on-.patch \ |
36 | file://0026-clang-Use-python3-in-python-scripts.patch \ | 36 | file://0026-clang-Use-python3-in-python-scripts.patch \ |
37 | file://0027-For-x86_64-set-Yocto-based-GCC-install-search-path.patch \ | 37 | file://0027-For-x86_64-set-Yocto-based-GCC-install-search-path.patch \ |
38 | file://D95527_against_11.x.patch \ | ||
38 | " | 39 | " |
39 | 40 | ||
40 | # Fallback to no-PIE if not set | 41 | # Fallback to no-PIE if not set |